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authorJonas Gorski <jogo@openwrt.org>2013-02-04 10:19:50 +0000
committerJonas Gorski <jogo@openwrt.org>2013-02-04 10:19:50 +0000
commit3b4fced67dad0b733d77f78205cfecfc0d654695 (patch)
treea672ce6b4f937cdff5c23c4d96583c95c6357b9e /target/linux/brcm63xx/patches-3.7/439-MIPS-BCM63XX-wire-up-the-HS-SPI-controller-for-BCM63.patch
parent0e9365b3462d456baba85cad7269c85b0d0f7d8a (diff)
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bcm63xx: add support for linux 3.7
Based on 3.7.6. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 35481
Diffstat (limited to 'target/linux/brcm63xx/patches-3.7/439-MIPS-BCM63XX-wire-up-the-HS-SPI-controller-for-BCM63.patch')
-rw-r--r--target/linux/brcm63xx/patches-3.7/439-MIPS-BCM63XX-wire-up-the-HS-SPI-controller-for-BCM63.patch56
1 files changed, 56 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.7/439-MIPS-BCM63XX-wire-up-the-HS-SPI-controller-for-BCM63.patch b/target/linux/brcm63xx/patches-3.7/439-MIPS-BCM63XX-wire-up-the-HS-SPI-controller-for-BCM63.patch
new file mode 100644
index 0000000000..5bdb50093a
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.7/439-MIPS-BCM63XX-wire-up-the-HS-SPI-controller-for-BCM63.patch
@@ -0,0 +1,56 @@
+From ed225910f0e062d9c28d5cf216f97b3cf457a8c5 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Mon, 21 Nov 2011 00:55:49 +0100
+Subject: [PATCH 58/81] MIPS: BCM63XX: wire up the HS SPI controller for BCM6362
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/clk.c | 2 ++
+ arch/mips/bcm63xx/dev-hsspi.c | 7 +++++--
+ .../include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h | 1 +
+ 3 files changed, 8 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -222,6 +222,8 @@ static void hsspi_set(struct clk *clk, i
+
+ if (BCMCPU_IS_6328())
+ mask = CKCTL_6328_HSSPI_EN;
++ else if (BCMCPU_IS_6362())
++ mask = CKCTL_6362_HSSPI_EN;
+ else
+ return;
+
+--- a/arch/mips/bcm63xx/dev-hsspi.c
++++ b/arch/mips/bcm63xx/dev-hsspi.c
+@@ -43,7 +43,7 @@ static struct platform_device bcm63xx_hs
+ int __init bcm63xx_hsspi_register(void)
+ {
+
+- if (!BCMCPU_IS_6328())
++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362())
+ return -ENODEV;
+
+ spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
+@@ -51,7 +51,10 @@ int __init bcm63xx_hsspi_register(void)
+ spi_resources[0].end += RSET_HSSPI_SIZE - 1;
+ spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI);
+
+- spi_pdata.speed_hz = HSSPI_PLL_HZ_6328;
++ if (BCMCPU_IS_6328())
++ spi_pdata.speed_hz = HSSPI_PLL_HZ_6328;
++ else
++ spi_pdata.speed_hz = HSSPI_PLL_HZ;
+
+ return platform_device_register(&bcm63xx_hsspi_device);
+ }
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
+@@ -16,6 +16,7 @@ struct bcm63xx_hsspi_pdata {
+ #define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o))
+
+ #define HSSPI_PLL_HZ_6328 133333333
++#define HSSPI_PLL_HZ 400000000
+
+ #define HSSPI_BUFFER_LEN 512
+