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authorHauke Mehrtens <hauke@hauke-m.de>2012-11-18 21:27:00 +0000
committerHauke Mehrtens <hauke@hauke-m.de>2012-11-18 21:27:00 +0000
commit86cc79ac985ffd954d26c88d144b82063a714636 (patch)
treed750f1c9a309e6ff92cdd4233d6b9749ce2bc996 /target/linux/brcm47xx/patches-3.6/900-bcm47xx_wdt-noprescale.patch
parentd648dad7fa7708a1879579ac6a6e87825eccd028 (diff)
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brcm47xx: add support for kernel 3.6
This is based on the patch by Peter Wagner. SVN-Revision: 34252
Diffstat (limited to 'target/linux/brcm47xx/patches-3.6/900-bcm47xx_wdt-noprescale.patch')
-rw-r--r--target/linux/brcm47xx/patches-3.6/900-bcm47xx_wdt-noprescale.patch103
1 files changed, 103 insertions, 0 deletions
diff --git a/target/linux/brcm47xx/patches-3.6/900-bcm47xx_wdt-noprescale.patch b/target/linux/brcm47xx/patches-3.6/900-bcm47xx_wdt-noprescale.patch
new file mode 100644
index 0000000000..bf0a192684
--- /dev/null
+++ b/target/linux/brcm47xx/patches-3.6/900-bcm47xx_wdt-noprescale.patch
@@ -0,0 +1,103 @@
+--- a/drivers/watchdog/bcm47xx_wdt.c
++++ b/drivers/watchdog/bcm47xx_wdt.c
+@@ -33,6 +33,7 @@
+
+ #define WDT_DEFAULT_TIME 30 /* seconds */
+ #define WDT_MAX_TIME 255 /* seconds */
++#define WDT_SHIFT 15 /* 32.768 KHz on cores with slow WDT clock */
+
+ static int wdt_time = WDT_DEFAULT_TIME;
+ static bool nowayout = WATCHDOG_NOWAYOUT;
+@@ -52,20 +53,20 @@ static unsigned long bcm47xx_wdt_busy;
+ static char expect_release;
+ static struct timer_list wdt_timer;
+ static atomic_t ticks;
++static int needs_sw_scale;
+
+-static inline void bcm47xx_wdt_hw_start(void)
++static inline void bcm47xx_wdt_hw_start(u32 ticks)
+ {
+- /* this is 2,5s on 100Mhz clock and 2s on 133 Mhz */
+ switch (bcm47xx_bus_type) {
+ #ifdef CONFIG_BCM47XX_SSB
+ case BCM47XX_BUS_TYPE_SSB:
+- ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0xfffffff);
++ ssb_watchdog_timer_set(&bcm47xx_bus.ssb, ticks);
+ break;
+ #endif
+ #ifdef CONFIG_BCM47XX_BCMA
+ case BCM47XX_BUS_TYPE_BCMA:
+ bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc,
+- 0xfffffff);
++ ticks);
+ break;
+ #endif
+ }
+@@ -90,33 +91,34 @@ static inline int bcm47xx_wdt_hw_stop(vo
+ static void bcm47xx_timer_tick(unsigned long unused)
+ {
+ if (!atomic_dec_and_test(&ticks)) {
+- bcm47xx_wdt_hw_start();
++ /* This is 2,5s on 100Mhz clock and 2s on 133 Mhz */
++ bcm47xx_wdt_hw_start(0xfffffff);
+ mod_timer(&wdt_timer, jiffies + HZ);
+ } else {
+ pr_crit("Watchdog will fire soon!!!\n");
+ }
+ }
+
+-static inline void bcm47xx_wdt_pet(void)
++static void bcm47xx_wdt_pet(void)
+ {
+- atomic_set(&ticks, wdt_time);
++ if(needs_sw_scale)
++ atomic_set(&ticks, wdt_time);
++ else
++ bcm47xx_wdt_hw_start(wdt_time << WDT_SHIFT);
+ }
+
+ static void bcm47xx_wdt_start(void)
+ {
+ bcm47xx_wdt_pet();
+- bcm47xx_timer_tick(0);
+-}
+-
+-static void bcm47xx_wdt_pause(void)
+-{
+- del_timer_sync(&wdt_timer);
+- bcm47xx_wdt_hw_stop();
++ if(needs_sw_scale)
++ bcm47xx_timer_tick(0);
+ }
+
+ static void bcm47xx_wdt_stop(void)
+ {
+- bcm47xx_wdt_pause();
++ if(needs_sw_scale)
++ del_timer_sync(&wdt_timer);
++ bcm47xx_wdt_hw_stop();
+ }
+
+ static int bcm47xx_wdt_settimeout(int new_time)
+@@ -267,7 +269,20 @@ static int __init bcm47xx_wdt_init(void)
+ if (bcm47xx_wdt_hw_stop() < 0)
+ return -ENODEV;
+
+- setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
++ /* FIXME Other cores */
++#ifdef BCM47XX_BUS_TYPE_BCMA
++ if(bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA &&
++ bcm47xx_bus.ssb.chip_id == 0x5354) {
++ /* Slow WDT clock, no pre-scaling */
++ needs_sw_scale = 0;
++ } else {
++#endif
++ /* Fast WDT clock, needs software pre-scaling */
++ needs_sw_scale = 1;
++ setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
++#ifdef BCM47XX_BUS_TYPE_BCMA
++ }
++#endif
+
+ if (bcm47xx_wdt_settimeout(wdt_time)) {
+ bcm47xx_wdt_settimeout(WDT_DEFAULT_TIME);