bmips: add new target

This target has full device tree support, thus reducing the number of
patches needed for bcm63xx, in which there's a patch for every board.

The intention is to start with a minimal amount of downstream patches and
start upstreaming all of them.

Current status:
 - Enabling EHCI/OHCI on BCM6358 causes a kernel panic.
 - BCM63268 lacks Timer Clocks/Reset support.
 - No PCI/PCIe drivers.
 - No ethernet drivers.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>

1 files changed, 66 insertions, 0 deletions

diff --git a/target/linux/bmips/patches-5.10/204-wdt-bcm7038-add-big-endian-compatibility.patch b/target/linux/bmips/patches-5.10/204-wdt-bcm7038-add-big-endian-compatibility.patch
new file mode 100644
index 0000000000..e4fc24a92e
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/204-wdt-bcm7038-add-big-endian-compatibility.patch
@@ -0,0 +1,66 @@
+--- a/drivers/watchdog/bcm7038_wdt.c
++++ b/drivers/watchdog/bcm7038_wdt.c
+@@ -34,6 +34,24 @@ struct bcm7038_watchdog {
+ 
+ static bool nowayout = WATCHDOG_NOWAYOUT;
+ 
++static inline void bcm7038_wdt_write(unsigned long data, void __iomem *reg)
++{
++#ifdef CONFIG_CPU_BIG_ENDIAN
++	iowrite32be(data, reg);
++#else
++	writel(data, reg);
++#endif
++}
++
++static inline unsigned long bcm7038_wdt_read(void __iomem *reg)
++{
++#ifdef CONFIG_CPU_BIG_ENDIAN
++	return ioread32be(reg);
++#else
++	return readl(reg);
++#endif
++}
++
+ static void bcm7038_wdt_set_timeout_reg(struct watchdog_device *wdog)
+ {
+ 	struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
+@@ -41,15 +59,15 @@ static void bcm7038_wdt_set_timeout_reg(
+ 
+ 	timeout = wdt->rate * wdog->timeout;
+ 
+-	writel(timeout, wdt->base + WDT_TIMEOUT_REG);
++	bcm7038_wdt_write(timeout, wdt->base + WDT_TIMEOUT_REG);
+ }
+ 
+ static int bcm7038_wdt_ping(struct watchdog_device *wdog)
+ {
+ 	struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
+ 
+-	writel(WDT_START_1, wdt->base + WDT_CMD_REG);
+-	writel(WDT_START_2, wdt->base + WDT_CMD_REG);
++	bcm7038_wdt_write(WDT_START_1, wdt->base + WDT_CMD_REG);
++	bcm7038_wdt_write(WDT_START_2, wdt->base + WDT_CMD_REG);
+ 
+ 	return 0;
+ }
+@@ -66,8 +84,8 @@ static int bcm7038_wdt_stop(struct watch
+ {
+ 	struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
+ 
+-	writel(WDT_STOP_1, wdt->base + WDT_CMD_REG);
+-	writel(WDT_STOP_2, wdt->base + WDT_CMD_REG);
++	bcm7038_wdt_write(WDT_STOP_1, wdt->base + WDT_CMD_REG);
++	bcm7038_wdt_write(WDT_STOP_2, wdt->base + WDT_CMD_REG);
+ 
+ 	return 0;
+ }
+@@ -88,7 +106,7 @@ static unsigned int bcm7038_wdt_get_time
+ 	struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdog);
+ 	u32 time_left;
+ 
+-	time_left = readl(wdt->base + WDT_CMD_REG);
++	time_left = bcm7038_wdt_read(wdt->base + WDT_CMD_REG);
+ 
+ 	return time_left / wdt->rate;
+ }