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author | Álvaro Fernández Rojas <noltari@gmail.com> | 2021-02-21 10:00:18 +0100 |
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committer | Álvaro Fernández Rojas <noltari@gmail.com> | 2021-02-22 18:29:44 +0100 |
commit | 029093a302c9a66b74bec46285a179abd122a40a (patch) | |
tree | 505f9d21adf4f5d9acb51e7618f72cdbbc2d2ef9 /target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6358-interrupt-controller.h | |
parent | c27532742d8cae7b9c1a8c2fbfe5157e65a20877 (diff) | |
download | upstream-029093a302c9a66b74bec46285a179abd122a40a.tar.gz upstream-029093a302c9a66b74bec46285a179abd122a40a.tar.bz2 upstream-029093a302c9a66b74bec46285a179abd122a40a.zip |
bmips: add new target
This target has full device tree support, thus reducing the number of
patches needed for bcm63xx, in which there's a patch for every board.
The intention is to start with a minimal amount of downstream patches and
start upstreaming all of them.
Current status:
- Enabling EHCI/OHCI on BCM6358 causes a kernel panic.
- BCM63268 lacks Timer Clocks/Reset support.
- No PCI/PCIe drivers.
- No ethernet drivers.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6358-interrupt-controller.h')
-rw-r--r-- | target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6358-interrupt-controller.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6358-interrupt-controller.h b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6358-interrupt-controller.h new file mode 100644 index 0000000000..dc412d1f59 --- /dev/null +++ b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6358-interrupt-controller.h @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6358_H +#define __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6358_H + +#define BCM6358_IRQ_TIMER 0 +#define BCM6358_IRQ_SPI 1 +#define BCM6358_IRQ_UART0 2 +#define BCM6358_IRQ_UART1 3 +#define BCM6358_IRQ_OHCI 5 +#define BCM6358_IRQ_EMAC1 6 +#define BCM6358_IRQ_USBS 7 +#define BCM6358_IRQ_EMAC0 8 +#define BCM6358_IRQ_EPHY 9 +#define BCM6358_IRQ_EHCI 10 +#define BCM6358_IRQ_USB_CTL_RX_DMA 11 +#define BCM6358_IRQ_USB_CTL_TX_DMA 12 +#define BCM6358_IRQ_USB_BULK_RX_DMA 13 +#define BCM6358_IRQ_USB_BULK_TX_DMA 14 +#define BCM6358_IRQ_EMAC0_RX_DMA 15 +#define BCM6358_IRQ_EMAC0_TX_DMA 16 +#define BCM6358_IRQ_EMAC1_RX_DMA 17 +#define BCM6358_IRQ_EMAC1_TX_DMA 18 +#define BCM6358_IRQ_ATM 19 +#define BCM6358_IRQ_EXT4 20 +#define BCM6358_IRQ_EXT5 21 +#define BCM6358_IRQ_PCM 22 +#define BCM6358_IRQ_PCM_RX_DMA 23 +#define BCM6358_IRQ_PCM_TX_DMA 24 +#define BCM6358_IRQ_EXT0 25 +#define BCM6358_IRQ_EXT1 26 +#define BCM6358_IRQ_EXT2 27 +#define BCM6358_IRQ_EXT3 28 +#define BCM6358_IRQ_ADSL 29 +#define BCM6358_IRQ_DG 30 +#define BCM6358_IRQ_MPI 31 + +#endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6358_H */ |