diff options
| author | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2020-02-08 20:33:30 +0100 |
|---|---|---|
| committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2020-02-14 14:10:51 +0100 |
| commit | e7bfda2c243e66a75ff966ba04c28b1590b5d24c (patch) | |
| tree | 069959b7e6a8cf31b0feb2857a63c7c4c0e3dcbf /target/linux/bcm63xx/patches-4.19/802-rtl8367r_fix_RGMII_support.patch | |
| parent | 8fe5ad5d3373cebed4fbc55a7b779721971ce427 (diff) | |
| download | upstream-e7bfda2c243e66a75ff966ba04c28b1590b5d24c.tar.gz upstream-e7bfda2c243e66a75ff966ba04c28b1590b5d24c.tar.bz2 upstream-e7bfda2c243e66a75ff966ba04c28b1590b5d24c.zip | |
brcm63xx: rename target to bcm63xx
This change makes the names of Broadcom targets consistent by using
the common notation based on SoC/CPU ID (which is used internally
anyway), bcmXXXX instead of brcmXXXX.
This is even used for target TITLE in make menuconfig already,
only the short target name used brcm so far.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/bcm63xx/patches-4.19/802-rtl8367r_fix_RGMII_support.patch')
| -rw-r--r-- | target/linux/bcm63xx/patches-4.19/802-rtl8367r_fix_RGMII_support.patch | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/target/linux/bcm63xx/patches-4.19/802-rtl8367r_fix_RGMII_support.patch b/target/linux/bcm63xx/patches-4.19/802-rtl8367r_fix_RGMII_support.patch new file mode 100644 index 0000000000..2aca2f3f74 --- /dev/null +++ b/target/linux/bcm63xx/patches-4.19/802-rtl8367r_fix_RGMII_support.patch @@ -0,0 +1,30 @@ +From e3208e6087642b95a5bab3101fc9c6e34892c861 Mon Sep 17 00:00:00 2001 +From: Miguel GAIO <miguel.gaio@efixo.com> +Date: Fri, 6 Jul 2012 14:12:33 +0200 +Subject: [PATCH 6/8] * [rtl8367r] Fix RGMII support + +--- + drivers/net/phy/rtl8367.c | 5 +++++ + 1 files changed, 5 insertions(+), 0 deletions(-) + +--- a/drivers/net/phy/rtl8367.c ++++ b/drivers/net/phy/rtl8367.c +@@ -146,6 +146,10 @@ + #define RTL8367_EXT_RGMXF_TXDELAY_MASK 1 + #define RTL8367_EXT_RGMXF_RXDELAY_MASK 0x7 + ++#define RTL8367_PHY_AD_REG 0x130f ++#define RTL8370_PHY_AD_DUMMY_1_OFFSET 5 ++#define RTL8370_PHY_AD_DUMMY_1_MASK 0xe0 ++ + #define RTL8367_DI_FORCE_REG(_x) (0x1310 + (_x)) + #define RTL8367_DI_FORCE_MODE BIT(12) + #define RTL8367_DI_FORCE_NWAY BIT(7) +@@ -897,6 +901,7 @@ static int rtl8367_extif_set_mode(struct + case RTL8367_EXTIF_MODE_RGMII_33V: + REG_WR(smi, RTL8367_CHIP_DEBUG0_REG, 0x0367); + REG_WR(smi, RTL8367_CHIP_DEBUG1_REG, 0x7777); ++ REG_RMW(smi, RTL8367_PHY_AD_REG, BIT(5), 0); + break; + + case RTL8367_EXTIF_MODE_TMII_MAC: |