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| author | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2020-02-08 20:33:30 +0100 |
|---|---|---|
| committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2020-02-14 14:10:51 +0100 |
| commit | e7bfda2c243e66a75ff966ba04c28b1590b5d24c (patch) | |
| tree | 069959b7e6a8cf31b0feb2857a63c7c4c0e3dcbf /target/linux/bcm63xx/patches-4.14/331-MIPS-BCM63XX-define-variant-id-field.patch | |
| parent | 8fe5ad5d3373cebed4fbc55a7b779721971ce427 (diff) | |
| download | upstream-e7bfda2c243e66a75ff966ba04c28b1590b5d24c.tar.gz upstream-e7bfda2c243e66a75ff966ba04c28b1590b5d24c.tar.bz2 upstream-e7bfda2c243e66a75ff966ba04c28b1590b5d24c.zip | |
brcm63xx: rename target to bcm63xx
This change makes the names of Broadcom targets consistent by using
the common notation based on SoC/CPU ID (which is used internally
anyway), bcmXXXX instead of brcmXXXX.
This is even used for target TITLE in make menuconfig already,
only the short target name used brcm so far.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/bcm63xx/patches-4.14/331-MIPS-BCM63XX-define-variant-id-field.patch')
| -rw-r--r-- | target/linux/bcm63xx/patches-4.14/331-MIPS-BCM63XX-define-variant-id-field.patch | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/target/linux/bcm63xx/patches-4.14/331-MIPS-BCM63XX-define-variant-id-field.patch b/target/linux/bcm63xx/patches-4.14/331-MIPS-BCM63XX-define-variant-id-field.patch new file mode 100644 index 0000000000..57af836858 --- /dev/null +++ b/target/linux/bcm63xx/patches-4.14/331-MIPS-BCM63XX-define-variant-id-field.patch @@ -0,0 +1,23 @@ +From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001 +From: Jonas Gorski <jogo@openwrt.org> +Date: Sat, 7 Dec 2013 14:22:41 +0100 +Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field + +Some SoC have a variant id field in the chip id register. + +Signed-off-by: Jonas Gorski <jogo@openwrt.org> +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -10,6 +10,8 @@ + #define PERF_REV_REG 0x0 + #define REV_CHIPID_SHIFT 16 + #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT) ++#define REV_VARID_SHIFT 12 ++#define REV_VARID_MASK (0xf << REV_VARID_SHIFT) + #define REV_REVID_SHIFT 0 + #define REV_REVID_MASK (0xff << REV_REVID_SHIFT) + |