diff options
| author | Nick Hainke <vincent@systemli.org> | 2023-05-04 21:13:33 +0200 |
|---|---|---|
| committer | Christian Marangi <ansuelsmth@gmail.com> | 2023-05-12 13:02:43 +0200 |
| commit | 1d3e71bd9710593cc0d7216b0ce9898b8e89aeef (patch) | |
| tree | c323be1fef7f797cdcd97d980f40246c2602015e /target/linux/bcm4908 | |
| parent | 397ba0b54b22454104e57af98bd95db2fb80c50e (diff) | |
| download | upstream-1d3e71bd9710593cc0d7216b0ce9898b8e89aeef.tar.gz upstream-1d3e71bd9710593cc0d7216b0ce9898b8e89aeef.tar.bz2 upstream-1d3e71bd9710593cc0d7216b0ce9898b8e89aeef.zip | |
treewide: remove files for building 5.10 kernel
All targets are bumped to 5.15. Remove the old 5.10 patches, configs
and files using:
find target/linux -iname '*-5.10' -exec rm -r {} \;
Further, remove the 5.10 include.
Signed-off-by: Nick Hainke <vincent@systemli.org>
Diffstat (limited to 'target/linux/bcm4908')
115 files changed, 0 insertions, 14772 deletions
diff --git a/target/linux/bcm4908/config-5.10 b/target/linux/bcm4908/config-5.10 deleted file mode 100644 index 1564123ca7..0000000000 --- a/target/linux/bcm4908/config-5.10 +++ /dev/null @@ -1,234 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ARCH_BCM4908=y -CONFIG_ARCH_BCMBCA=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_STACKWALK=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARM64=y -CONFIG_ARM64_4K_PAGES=y -CONFIG_ARM64_CRYPTO=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PTR_AUTH=y -CONFIG_ARM64_SVE=y -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_PSCI_FW=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_B53=y -CONFIG_BCM4908_ENET=y -CONFIG_BCM7038_WDT=y -CONFIG_BCM7XXX_PHY=y -CONFIG_BCM_NET_PHYLIB=y -CONFIG_BCM_PMB=y -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_PM=y -CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="earlycon=bcm63xx_uart,0xff800640 console=ttyS0,115200" -CONFIG_CMDLINE_FORCE=y -CONFIG_COMMON_CLK=y -# CONFIG_COMPAT_32BIT_TIME is not set -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_RMAP=y -CONFIG_CRC16=y -CONFIG_CRYPTO_AES_ARM64=y -CONFIG_CRYPTO_AES_ARM64_CE=y -CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -CONFIG_CRYPTO_BLAKE2S=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_HASH_INFO=y -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SIMD=y -CONFIG_CRYPTO_ZSTD=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_REMAP=y -CONFIG_DTC=y -CONFIG_EDAC_SUPPORT=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FRAME_POINTER=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_GRO_CELLS=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HOLES_IN_ZONE=y -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_BRCMSTB=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_LEDS_BCM63138=y -CONFIG_LEDS_GPIO=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MDIO_BCM_UNIMAC=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MTD_BRCM_U_BOOT=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_NAND_BRCMNAND=y -CONFIG_MTD_NAND_CORE=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_ECC_SW_HAMMING=y -CONFIG_MTD_OF_PARTS_BCM4908=y -# CONFIG_MTD_OF_PARTS_LINKSYS_NS is not set -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_SPLIT_CFE_BOOTFS=y -# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_BCM_SF2=y -CONFIG_NET_DSA_TAG_BRCM=y -CONFIG_NET_DSA_TAG_BRCM_COMMON=y -CONFIG_NET_DSA_TAG_BRCM_LEGACY=y -CONFIG_NET_DSA_TAG_BRCM_PREPEND=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NO_IOPORT_MAP=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -CONFIG_NVMEM_SYSFS=y -CONFIG_NVMEM_U_BOOT_ENV=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_PADATA=y -CONFIG_PARTITION_PERCPU=y -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PHY_BRCM_USB=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_BCM4908=y -# CONFIG_PINCTRL_SINGLE is not set -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_SYSCON=y -CONFIG_POWER_SUPPLY=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RATIONAL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_RELOCATABLE=y -CONFIG_RFS_ACCEL=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -CONFIG_RPS=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -# CONFIG_SERIAL_8250 is not set -CONFIG_SERIAL_BCM63XX=y -CONFIG_SERIAL_BCM63XX_CONSOLE=y -CONFIG_SGL_ALLOC=y -CONFIG_SMP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSE_IRQ=y -CONFIG_SRCU=y -CONFIG_SWIOTLB=y -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_USB_SUPPORT=y -CONFIG_VMAP_STACK=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZONE_DMA32=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bcm4908/files-5.10/drivers/net/ethernet/broadcom/unimac.h b/target/linux/bcm4908/files-5.10/drivers/net/ethernet/broadcom/unimac.h deleted file mode 100644 index 585a852862..0000000000 --- a/target/linux/bcm4908/files-5.10/drivers/net/ethernet/broadcom/unimac.h +++ /dev/null @@ -1,68 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef __UNIMAC_H -#define __UNIMAC_H - -#define UMAC_HD_BKP_CTRL 0x004 -#define HD_FC_EN (1 << 0) -#define HD_FC_BKOFF_OK (1 << 1) -#define IPG_CONFIG_RX_SHIFT 2 -#define IPG_CONFIG_RX_MASK 0x1F -#define UMAC_CMD 0x008 -#define CMD_TX_EN (1 << 0) -#define CMD_RX_EN (1 << 1) -#define CMD_SPEED_10 0 -#define CMD_SPEED_100 1 -#define CMD_SPEED_1000 2 -#define CMD_SPEED_2500 3 -#define CMD_SPEED_SHIFT 2 -#define CMD_SPEED_MASK 3 -#define CMD_PROMISC (1 << 4) -#define CMD_PAD_EN (1 << 5) -#define CMD_CRC_FWD (1 << 6) -#define CMD_PAUSE_FWD (1 << 7) -#define CMD_RX_PAUSE_IGNORE (1 << 8) -#define CMD_TX_ADDR_INS (1 << 9) -#define CMD_HD_EN (1 << 10) -#define CMD_SW_RESET_OLD (1 << 11) -#define CMD_SW_RESET (1 << 13) -#define CMD_LCL_LOOP_EN (1 << 15) -#define CMD_AUTO_CONFIG (1 << 22) -#define CMD_CNTL_FRM_EN (1 << 23) -#define CMD_NO_LEN_CHK (1 << 24) -#define CMD_RMT_LOOP_EN (1 << 25) -#define CMD_RX_ERR_DISC (1 << 26) -#define CMD_PRBL_EN (1 << 27) -#define CMD_TX_PAUSE_IGNORE (1 << 28) -#define CMD_TX_RX_EN (1 << 29) -#define CMD_RUNT_FILTER_DIS (1 << 30) -#define UMAC_MAC0 0x00c -#define UMAC_MAC1 0x010 -#define UMAC_MAX_FRAME_LEN 0x014 -#define UMAC_PAUSE_QUANTA 0x018 -#define UMAC_MODE 0x044 -#define MODE_LINK_STATUS (1 << 5) -#define UMAC_FRM_TAG0 0x048 /* outer tag */ -#define UMAC_FRM_TAG1 0x04c /* inner tag */ -#define UMAC_TX_IPG_LEN 0x05c -#define UMAC_EEE_CTRL 0x064 -#define EN_LPI_RX_PAUSE (1 << 0) -#define EN_LPI_TX_PFC (1 << 1) -#define EN_LPI_TX_PAUSE (1 << 2) -#define EEE_EN (1 << 3) -#define RX_FIFO_CHECK (1 << 4) -#define EEE_TX_CLK_DIS (1 << 5) -#define DIS_EEE_10M (1 << 6) -#define LP_IDLE_PREDICTION_MODE (1 << 7) -#define UMAC_EEE_LPI_TIMER 0x068 -#define UMAC_EEE_WAKE_TIMER 0x06C -#define UMAC_EEE_REF_COUNT 0x070 -#define EEE_REFERENCE_COUNT_MASK 0xffff -#define UMAC_RX_IPG_INV 0x078 -#define UMAC_MACSEC_PROG_TX_CRC 0x310 -#define UMAC_MACSEC_CTRL 0x314 -#define UMAC_PAUSE_CTRL 0x330 -#define UMAC_TX_FLUSH 0x334 -#define UMAC_RX_FIFO_STATUS 0x338 -#define UMAC_TX_FIFO_STATUS 0x33c - -#endif diff --git a/target/linux/bcm4908/patches-5.10/030-v5.11-0001-dt-bindings-arm-bcm-document-BCM4908-bindings.patch b/target/linux/bcm4908/patches-5.10/030-v5.11-0001-dt-bindings-arm-bcm-document-BCM4908-bindings.patch deleted file mode 100644 index 66726cbf0b..0000000000 --- a/target/linux/bcm4908/patches-5.10/030-v5.11-0001-dt-bindings-arm-bcm-document-BCM4908-bindings.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 2f8913a7b17efd3a116825160a2d3a6610444587 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 12 Nov 2020 16:08:31 +0100 -Subject: [PATCH] dt-bindings: arm: bcm: document BCM4908 bindings -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 is a new family that includes BCM4906, BCM4908 and BCM49408. -It's mostly used in home routers and often replaces Northstar in vendors -portfolio. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../bindings/arm/bcm/brcm,bcm4908.yaml | 38 +++++++++++++++++++ - 1 file changed, 38 insertions(+) - create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml - ---- /dev/null -+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml -@@ -0,0 +1,38 @@ -+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4908.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Broadcom BCM4908 device tree bindings -+ -+description: -+ Broadcom BCM4906 / BCM4908 / BCM49408 Wi-Fi/network SoCs with Brahma CPUs. -+ -+maintainers: -+ - Rafał Miłecki <rafal@milecki.pl> -+ -+properties: -+ $nodename: -+ const: '/' -+ compatible: -+ oneOf: -+ - description: BCM4906 based boards -+ items: -+ - const: brcm,bcm4906 -+ - const: brcm,bcm4908 -+ -+ - description: BCM4908 based boards -+ items: -+ - enum: -+ - asus,gt-ac5300 -+ - const: brcm,bcm4908 -+ -+ - description: BCM49408 based boards -+ items: -+ - const: brcm,bcm49408 -+ - const: brcm,bcm4908 -+ -+additionalProperties: true -+ -+... diff --git a/target/linux/bcm4908/patches-5.10/030-v5.11-0002-arm64-dts-broadcom-add-BCM4908-and-Asus-GT-AC5300-ea.patch b/target/linux/bcm4908/patches-5.10/030-v5.11-0002-arm64-dts-broadcom-add-BCM4908-and-Asus-GT-AC5300-ea.patch deleted file mode 100644 index fd7d6a5f11..0000000000 --- a/target/linux/bcm4908/patches-5.10/030-v5.11-0002-arm64-dts-broadcom-add-BCM4908-and-Asus-GT-AC5300-ea.patch +++ /dev/null @@ -1,307 +0,0 @@ -From 2961f69f151c0a6771f55cef46398fe49ca20902 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 12 Nov 2020 16:08:32 +0100 -Subject: [PATCH] arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early - DTS files -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -They don't descibe hardware fully yet but it's enough to boot a system. - -Some missing blocks: -1. PMC (Power Management Controller?) -2. Ethernet -3. Crypto -4. Thermal - -Asus DTS is missing defining full NAND partitions layout and buttons. - -Further changes will fill those gaps as soon as required bindings will -be found / tested / added. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/Makefile | 1 + - arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 2 + - .../bcm4908/bcm4908-asus-gt-ac5300.dts | 66 +++++++ - .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 187 ++++++++++++++++++ - 4 files changed, 256 insertions(+) - create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/Makefile - create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts - create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi - ---- a/arch/arm64/boot/dts/broadcom/Makefile -+++ b/arch/arm64/boot/dts/broadcom/Makefile -@@ -5,5 +5,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rp - bcm2837-rpi-3-b-plus.dtb \ - bcm2837-rpi-cm3-io3.dtb - -+subdir-y += bcm4908 - subdir-y += northstar2 - subdir-y += stingray ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile -@@ -0,0 +1,2 @@ -+# SPDX-License-Identifier: GPL-2.0 -+dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -@@ -0,0 +1,66 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+ -+#include <dt-bindings/gpio/gpio.h> -+#include <dt-bindings/input/input.h> -+ -+#include "bcm4908.dtsi" -+ -+/ { -+ compatible = "asus,gt-ac5300", "brcm,bcm4908"; -+ model = "Asus GT-AC5300"; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x00 0x00 0x00 0x40000000>; -+ }; -+ -+ gpio-keys-polled { -+ compatible = "gpio-keys-polled"; -+ poll-interval = <100>; -+ -+ wifi { -+ label = "WiFi"; -+ linux,code = <KEY_RFKILL>; -+ gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; -+ }; -+ -+ wps { -+ label = "WPS"; -+ linux,code = <KEY_WPS_BUTTON>; -+ gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; -+ }; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; -+ }; -+ -+ brightness { -+ label = "LEDs"; -+ linux,code = <KEY_BRIGHTNESS_ZERO>; -+ gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&nandcs { -+ nand-ecc-strength = <4>; -+ nand-ecc-step-size = <512>; -+ nand-on-flash-bbt; -+ brcm,nand-has-wp; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ label = "cferom"; -+ reg = <0x0 0x100000>; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -0,0 +1,187 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+ -+#include <dt-bindings/interrupt-controller/irq.h> -+#include <dt-bindings/interrupt-controller/arm-gic.h> -+ -+/dts-v1/; -+ -+/ { -+ interrupt-parent = <&gic>; -+ -+ #address-cells = <2>; -+ #size-cells = <2>; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ cpu0: cpu@0 { -+ device_type = "cpu"; -+ compatible = "brcm,brahma-b53"; -+ reg = <0x0>; -+ next-level-cache = <&l2>; -+ }; -+ -+ cpu1: cpu@1 { -+ device_type = "cpu"; -+ compatible = "brcm,brahma-b53"; -+ reg = <0x1>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0xfff8>; -+ next-level-cache = <&l2>; -+ }; -+ -+ cpu2: cpu@2 { -+ device_type = "cpu"; -+ compatible = "brcm,brahma-b53"; -+ reg = <0x2>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0xfff8>; -+ next-level-cache = <&l2>; -+ }; -+ -+ cpu3: cpu@3 { -+ device_type = "cpu"; -+ compatible = "brcm,brahma-b53"; -+ reg = <0x3>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0xfff8>; -+ next-level-cache = <&l2>; -+ }; -+ -+ l2: l2-cache0 { -+ compatible = "cache"; -+ }; -+ }; -+ -+ axi@81000000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x00 0x00 0x81000000 0x4000>; -+ -+ gic: interrupt-controller@1000 { -+ compatible = "arm,gic-400"; -+ #interrupt-cells = <3>; -+ #address-cells = <0>; -+ interrupt-controller; -+ reg = <0x1000 0x1000>, -+ <0x2000 0x2000>; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; -+ }; -+ -+ pmu { -+ compatible = "arm,cortex-a53-pmu"; -+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; -+ }; -+ -+ clocks { -+ periph_clk: periph_clk { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <50000000>; -+ clock-output-names = "periph"; -+ }; -+ }; -+ -+ soc { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x00 0x00 0x80000000 0x10000>; -+ -+ usb@c300 { -+ compatible = "generic-ehci"; -+ reg = <0xc300 0x100>; -+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; -+ status = "disabled"; -+ }; -+ -+ usb@c400 { -+ compatible = "generic-ohci"; -+ reg = <0xc400 0x100>; -+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; -+ status = "disabled"; -+ }; -+ -+ usb@d000 { -+ compatible = "generic-xhci"; -+ reg = <0xd000 0x8c8>; -+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; -+ status = "disabled"; -+ }; -+ }; -+ -+ bus@ff800000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x00 0x00 0xff800000 0x3000>; -+ -+ timer: timer@400 { -+ compatible = "brcm,bcm6328-timer", "syscon"; -+ reg = <0x400 0x3c>; -+ }; -+ -+ gpio0: gpio-controller@500 { -+ compatible = "brcm,bcm6345-gpio"; -+ reg-names = "dirout", "dat"; -+ reg = <0x500 0x28>, <0x528 0x28>; -+ -+ #gpio-cells = <2>; -+ gpio-controller; -+ }; -+ -+ uart0: serial@640 { -+ compatible = "brcm,bcm6345-uart"; -+ reg = <0x640 0x18>; -+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&periph_clk>; -+ clock-names = "periph"; -+ status = "okay"; -+ }; -+ -+ nand@1800 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand"; -+ reg = <0x1800 0x600>, <0x2000 0x10>; -+ reg-names = "nand", "nand-int-base"; -+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "nand"; -+ status = "okay"; -+ -+ nandcs: nandcs@0 { -+ compatible = "brcm,nandcs"; -+ reg = <0>; -+ }; -+ }; -+ -+ reboot { -+ compatible = "syscon-reboot"; -+ regmap = <&timer>; -+ offset = <0x34>; -+ mask = <1>; -+ }; -+ }; -+}; diff --git a/target/linux/bcm4908/patches-5.10/030-v5.11-0003-v5.11-arm64-add-config-for-Broadcom-BCM4908-SoCs.patch b/target/linux/bcm4908/patches-5.10/030-v5.11-0003-v5.11-arm64-add-config-for-Broadcom-BCM4908-SoCs.patch deleted file mode 100644 index 962517a57e..0000000000 --- a/target/linux/bcm4908/patches-5.10/030-v5.11-0003-v5.11-arm64-add-config-for-Broadcom-BCM4908-SoCs.patch +++ /dev/null @@ -1,44 +0,0 @@ -From dccb22d078ebd098115e4f66bde1ee2249c8640b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 12 Nov 2020 16:08:30 +0100 -Subject: [PATCH] arm64: add config for Broadcom BCM4908 SoCs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Add ARCH_BCM4908 config that can be used for compiling DTS files. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/Kconfig.platforms | 8 ++++++++ - arch/arm64/configs/defconfig | 1 + - 2 files changed, 9 insertions(+) - ---- a/arch/arm64/Kconfig.platforms -+++ b/arch/arm64/Kconfig.platforms -@@ -43,6 +43,14 @@ config ARCH_BCM2835 - This enables support for the Broadcom BCM2837 and BCM2711 SoC. - These SoCs are used in the Raspberry Pi 3 and 4 devices. - -+config ARCH_BCM4908 -+ bool "Broadcom BCM4908 family" -+ select GPIOLIB -+ help -+ This enables support for the Broadcom BCM4906, BCM4908 and -+ BCM49408 SoCs. These SoCs use Brahma-B53 cores and can be -+ found in home routers. -+ - config ARCH_BCM_IPROC - bool "Broadcom iProc SoC Family" - select COMMON_CLK_IPROC ---- a/arch/arm64/configs/defconfig -+++ b/arch/arm64/configs/defconfig -@@ -32,6 +32,7 @@ CONFIG_ARCH_AGILEX=y - CONFIG_ARCH_SUNXI=y - CONFIG_ARCH_ALPINE=y - CONFIG_ARCH_BCM2835=y -+CONFIG_ARCH_BCM4908=y - CONFIG_ARCH_BCM_IPROC=y - CONFIG_ARCH_BERLIN=y - CONFIG_ARCH_BRCMSTB=y diff --git a/target/linux/bcm4908/patches-5.10/031-v5.12-0001-dt-bindings-arm-bcm-document-Netgear-R8000P-binding.patch b/target/linux/bcm4908/patches-5.10/031-v5.12-0001-dt-bindings-arm-bcm-document-Netgear-R8000P-binding.patch deleted file mode 100644 index 24a0749c77..0000000000 --- a/target/linux/bcm4908/patches-5.10/031-v5.12-0001-dt-bindings-arm-bcm-document-Netgear-R8000P-binding.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 3a5da4f54801ac42837a0b3151fa8285e01e8b0e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 8 Dec 2020 08:03:03 +0100 -Subject: [PATCH] dt-bindings: arm: bcm: document Netgear R8000P binding -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's a BCM4906 based device. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Rob Herring <robh@kernel.org> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml -+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml -@@ -19,6 +19,8 @@ properties: - oneOf: - - description: BCM4906 based boards - items: -+ - enum: -+ - netgear,r8000p - - const: brcm,bcm4906 - - const: brcm,bcm4908 - diff --git a/target/linux/bcm4908/patches-5.10/031-v5.12-0002-arm64-dts-broadcom-bcm4908-add-BCM4906-Netgear-R8000.patch b/target/linux/bcm4908/patches-5.10/031-v5.12-0002-arm64-dts-broadcom-bcm4908-add-BCM4906-Netgear-R8000.patch deleted file mode 100644 index 93fa2150af..0000000000 --- a/target/linux/bcm4908/patches-5.10/031-v5.12-0002-arm64-dts-broadcom-bcm4908-add-BCM4906-Netgear-R8000.patch +++ /dev/null @@ -1,104 +0,0 @@ -From c8b404fb05dcfadff477e49b7ea6b500e015f101 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 8 Dec 2020 08:03:04 +0100 -Subject: [PATCH 2/4] arm64: dts: broadcom: bcm4908: add BCM4906 Netgear R8000P - DTS files -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Netgear R8000P is home router based on BCM4906 that is a cheaper variant -of BCM4908 (e.g. 2 cores instead of 4). - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 1 + - .../bcm4908/bcm4906-netgear-r8000p.dts | 52 +++++++++++++++++++ - .../boot/dts/broadcom/bcm4908/bcm4906.dtsi | 18 +++++++ - 3 files changed, 71 insertions(+) - create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts - create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile -@@ -1,2 +1,3 @@ - # SPDX-License-Identifier: GPL-2.0 -+dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-netgear-r8000p.dtb - dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -@@ -0,0 +1,52 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+ -+#include <dt-bindings/gpio/gpio.h> -+#include <dt-bindings/input/input.h> -+#include <dt-bindings/leds/common.h> -+ -+#include "bcm4906.dtsi" -+ -+/ { -+ compatible = "netgear,r8000p", "brcm,bcm4906", "brcm,bcm4908"; -+ model = "Netgear R8000P"; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x00 0x00 0x00 0x20000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ wps { -+ function = LED_FUNCTION_WPS; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&nandcs { -+ nand-ecc-strength = <4>; -+ nand-ecc-step-size = <512>; -+ nand-on-flash-bbt; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ label = "cferom"; -+ reg = <0x0 0x100000>; -+ }; -+ -+ partition@100000 { -+ label = "firmware"; -+ reg = <0x100000 0x4400000>; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi -@@ -0,0 +1,18 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+ -+#include "bcm4908.dtsi" -+ -+/ { -+ cpus { -+ /delete-node/ cpu@2; -+ -+ /delete-node/ cpu@3; -+ }; -+ -+ pmu { -+ compatible = "arm,cortex-a53-pmu"; -+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-affinity = <&cpu0>, <&cpu1>; -+ }; -+}; diff --git a/target/linux/bcm4908/patches-5.10/031-v5.12-0003-arm64-dts-broadcom-bcm4908-use-proper-NAND-binding.patch b/target/linux/bcm4908/patches-5.10/031-v5.12-0003-arm64-dts-broadcom-bcm4908-use-proper-NAND-binding.patch deleted file mode 100644 index ccd260fadf..0000000000 --- a/target/linux/bcm4908/patches-5.10/031-v5.12-0003-arm64-dts-broadcom-bcm4908-use-proper-NAND-binding.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 56098be85d19cd56b59d7b3854ea035cc8cb9e95 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 8 Dec 2020 11:49:50 +0100 -Subject: [PATCH 3/4] arm64: dts: broadcom: bcm4908: use proper NAND binding -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 has controller that needs different IRQ handling just like the -BCM63138. Describe it properly. - -On Linux this change fixes: -brcmstb_nand ff801800.nand: timeout waiting for command 0x9 -brcmstb_nand ff801800.nand: intfc status d0000000 - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -164,7 +164,7 @@ - nand@1800 { - #address-cells = <1>; - #size-cells = <0>; -- compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand"; -+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; - reg = <0x1800 0x600>, <0x2000 0x10>; - reg-names = "nand", "nand-int-base"; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; diff --git a/target/linux/bcm4908/patches-5.10/031-v5.12-0004-arm64-dts-broadcom-bcm4908-describe-PCIe-reset-contr.patch b/target/linux/bcm4908/patches-5.10/031-v5.12-0004-arm64-dts-broadcom-bcm4908-describe-PCIe-reset-contr.patch deleted file mode 100644 index 8ce4d69d8f..0000000000 --- a/target/linux/bcm4908/patches-5.10/031-v5.12-0004-arm64-dts-broadcom-bcm4908-describe-PCIe-reset-contr.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 1b88c6ed26a1aa1d68d1661404e6e939709ff530 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 10 Dec 2020 08:21:54 +0100 -Subject: [PATCH 4/4] arm64: dts: broadcom: bcm4908: describe PCIe reset - controller -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This reset controller is a single register in the Broadcom's MISC block. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -177,6 +177,21 @@ - }; - }; - -+ misc@2600 { -+ compatible = "brcm,misc", "simple-mfd"; -+ reg = <0x2600 0xe4>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x00 0x2600 0xe4>; -+ -+ reset-controller@2644 { -+ compatible = "brcm,bcm4908-misc-pcie-reset"; -+ reg = <0x44 0x04>; -+ #reset-cells = <1>; -+ }; -+ }; -+ - reboot { - compatible = "syscon-reboot"; - regmap = <&timer>; diff --git a/target/linux/bcm4908/patches-5.10/031-v5.12-0005-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch b/target/linux/bcm4908/patches-5.10/031-v5.12-0005-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch deleted file mode 100644 index f80dc239bc..0000000000 --- a/target/linux/bcm4908/patches-5.10/031-v5.12-0005-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch +++ /dev/null @@ -1,184 +0,0 @@ -From 527a3ac9bdf81da4b7160ce3cea57f28a0e5eb64 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 13 Jan 2021 12:14:06 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe internal switch -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 has internal switch with 5 GPHYs. Ports 0 - 3 are always -connected to the internal PHYs. Remaining ports depend on device setup. - -Asus GT-AC5300 has an extra switch with its PHYs accessible using the -internal MDIO. - -CPU port and Ethernet interface remain to be documented. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../bcm4908/bcm4908-asus-gt-ac5300.dts | 51 +++++++++++ - .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 85 ++++++++++++++++++- - 2 files changed, 135 insertions(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -@@ -44,6 +44,57 @@ - }; - }; - -+&ports { -+ port@0 { -+ label = "lan2"; -+ }; -+ -+ port@1 { -+ label = "lan1"; -+ }; -+ -+ port@2 { -+ label = "lan6"; -+ }; -+ -+ port@3 { -+ label = "lan5"; -+ }; -+ -+ /* External BCM53134S switch */ -+ port@7 { -+ label = "sw"; -+ reg = <7>; -+ -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ }; -+ }; -+}; -+ -+&mdio { -+ /* lan8 */ -+ ethernet-phy@0 { -+ reg = <0>; -+ }; -+ -+ /* lan7 */ -+ ethernet-phy@1 { -+ reg = <1>; -+ }; -+ -+ /* lan4 */ -+ ethernet-phy@2 { -+ reg = <2>; -+ }; -+ -+ /* lan3 */ -+ ethernet-phy@3 { -+ reg = <3>; -+ }; -+}; -+ - &nandcs { - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -108,7 +108,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- ranges = <0x00 0x00 0x80000000 0x10000>; -+ ranges = <0x00 0x00 0x80000000 0xd0000>; - - usb@c300 { - compatible = "generic-ehci"; -@@ -130,6 +130,89 @@ - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; -+ -+ ethernet-switch@80000 { -+ compatible = "simple-bus"; -+ #size-cells = <1>; -+ #address-cells = <1>; -+ ranges = <0 0x80000 0x50000>; -+ -+ ethernet-switch@0 { -+ compatible = "brcm,bcm4908-switch"; -+ reg = <0x0 0x40000>, -+ <0x40000 0x110>, -+ <0x40340 0x30>, -+ <0x40380 0x30>, -+ <0x40600 0x34>, -+ <0x40800 0x208>; -+ reg-names = "core", "reg", "intrl2_0", -+ "intrl2_1", "fcb", "acb"; -+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; -+ brcm,num-gphy = <5>; -+ brcm,num-rgmii-ports = <2>; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ports: ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ phy-mode = "internal"; -+ phy-handle = <&phy8>; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ phy-mode = "internal"; -+ phy-handle = <&phy9>; -+ }; -+ -+ port@2 { -+ reg = <2>; -+ phy-mode = "internal"; -+ phy-handle = <&phy10>; -+ }; -+ -+ port@3 { -+ reg = <3>; -+ phy-mode = "internal"; -+ phy-handle = <&phy11>; -+ }; -+ }; -+ }; -+ -+ mdio: mdio@405c0 { -+ compatible = "brcm,unimac-mdio"; -+ reg = <0x405c0 0x8>; -+ reg-names = "mdio"; -+ #size-cells = <0>; -+ #address-cells = <1>; -+ -+ phy8: ethernet-phy@8 { -+ reg = <8>; -+ }; -+ -+ phy9: ethernet-phy@9 { -+ reg = <9>; -+ }; -+ -+ phy10: ethernet-phy@a { -+ reg = <10>; -+ }; -+ -+ phy11: ethernet-phy@b { -+ reg = <11>; -+ }; -+ -+ phy12: ethernet-phy@c { -+ reg = <12>; -+ }; -+ }; -+ }; - }; - - bus@ff800000 { diff --git a/target/linux/bcm4908/patches-5.10/031-v5.12-0006-arm64-dts-broadcom-bcm4908-describe-PMB-block.patch b/target/linux/bcm4908/patches-5.10/031-v5.12-0006-arm64-dts-broadcom-bcm4908-describe-PMB-block.patch deleted file mode 100644 index c1a9c35837..0000000000 --- a/target/linux/bcm4908/patches-5.10/031-v5.12-0006-arm64-dts-broadcom-bcm4908-describe-PMB-block.patch +++ /dev/null @@ -1,50 +0,0 @@ -From edcf90801c8e58bd6306d85a4e714a6f09f452df Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 13 Jan 2021 12:15:47 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe PMB block -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -PMB (Power Management Bus) controls powering connected devices (e.g. -PCIe, USB, SATA). In BCM4908 it's a part of the PROCMON block. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 17 ++++++++++++++++- - 1 file changed, 16 insertions(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -108,7 +108,7 @@ - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; -- ranges = <0x00 0x00 0x80000000 0xd0000>; -+ ranges = <0x00 0x00 0x80000000 0x281000>; - - usb@c300 { - compatible = "generic-ehci"; -@@ -213,6 +213,21 @@ - }; - }; - }; -+ -+ procmon: syscon@280000 { -+ compatible = "simple-bus"; -+ reg = <0x280000 0x1000>; -+ ranges; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ power-controller@2800c0 { -+ compatible = "brcm,bcm4908-pmb"; -+ reg = <0x2800c0 0x40>; -+ #power-domain-cells = <1>; -+ }; -+ }; - }; - - bus@ff800000 { diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0001-arm64-dts-broadcom-bcm4908-describe-USB-PHY.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0001-arm64-dts-broadcom-bcm4908-describe-USB-PHY.patch deleted file mode 100644 index edf2ca6a38..0000000000 --- a/target/linux/bcm4908/patches-5.10/032-v5.13-0001-arm64-dts-broadcom-bcm4908-describe-USB-PHY.patch +++ /dev/null @@ -1,134 +0,0 @@ -From 3c321ba794ca6383a4aa68ea803e18cc6ad44412 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 19 Feb 2021 06:50:26 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe USB PHY -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 uses slightly modified STB family USB PHY. It handles OHCI/EHCI -and XHCI. It requires powering up using the PMB. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../bcm4908/bcm4906-netgear-r8000p.dts | 17 +++++++++++++ - .../bcm4908/bcm4908-asus-gt-ac5300.dts | 17 +++++++++++++ - .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 25 ++++++++++++++++--- - 3 files changed, 55 insertions(+), 4 deletions(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -@@ -26,6 +26,23 @@ - }; - }; - -+&usb_phy { -+ brcm,ioc = <1>; -+ status = "okay"; -+}; -+ -+&ehci { -+ status = "okay"; -+}; -+ -+&ohci { -+ status = "okay"; -+}; -+ -+&xhci { -+ status = "okay"; -+}; -+ - &nandcs { - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -@@ -44,6 +44,23 @@ - }; - }; - -+&usb_phy { -+ brcm,ioc = <1>; -+ status = "okay"; -+}; -+ -+&ehci { -+ status = "okay"; -+}; -+ -+&ohci { -+ status = "okay"; -+}; -+ -+&xhci { -+ status = "okay"; -+}; -+ - &ports { - port@0 { - label = "lan2"; ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -2,6 +2,8 @@ - - #include <dt-bindings/interrupt-controller/irq.h> - #include <dt-bindings/interrupt-controller/arm-gic.h> -+#include <dt-bindings/phy/phy.h> -+#include <dt-bindings/soc/bcm-pmb.h> - - /dts-v1/; - -@@ -110,24 +112,39 @@ - #size-cells = <1>; - ranges = <0x00 0x00 0x80000000 0x281000>; - -- usb@c300 { -+ usb_phy: usb-phy@c200 { -+ compatible = "brcm,bcm4908-usb-phy"; -+ reg = <0xc200 0x100>; -+ reg-names = "ctrl"; -+ power-domains = <&pmb BCM_PMB_HOST_USB>; -+ dr_mode = "host"; -+ brcm,has-xhci; -+ brcm,has-eohci; -+ #phy-cells = <1>; -+ status = "disabled"; -+ }; -+ -+ ehci: usb@c300 { - compatible = "generic-ehci"; - reg = <0xc300 0x100>; - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; -+ phys = <&usb_phy PHY_TYPE_USB2>; - status = "disabled"; - }; - -- usb@c400 { -+ ohci: usb@c400 { - compatible = "generic-ohci"; - reg = <0xc400 0x100>; - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; -+ phys = <&usb_phy PHY_TYPE_USB2>; - status = "disabled"; - }; - -- usb@d000 { -+ xhci: usb@d000 { - compatible = "generic-xhci"; - reg = <0xd000 0x8c8>; - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; -+ phys = <&usb_phy PHY_TYPE_USB3>; - status = "disabled"; - }; - -@@ -222,7 +239,7 @@ - #address-cells = <1>; - #size-cells = <1>; - -- power-controller@2800c0 { -+ pmb: power-controller@2800c0 { - compatible = "brcm,bcm4908-pmb"; - reg = <0x2800c0 0x40>; - #power-domain-cells = <1>; diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0002-arm64-dts-broadcom-bcm4908-describe-Ethernet-control.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0002-arm64-dts-broadcom-bcm4908-describe-Ethernet-control.patch deleted file mode 100644 index 6c41e3d797..0000000000 --- a/target/linux/bcm4908/patches-5.10/032-v5.13-0002-arm64-dts-broadcom-bcm4908-describe-Ethernet-control.patch +++ /dev/null @@ -1,51 +0,0 @@ -From b1bbe48eec190b6a35f400c5a3ec6b0fc8fc3fe6 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 19 Feb 2021 06:50:27 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe Ethernet controller -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 SoCs have an integrated Ethernet controller. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 19 +++++++++++++++++++ - 1 file changed, 19 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -112,6 +112,14 @@ - #size-cells = <1>; - ranges = <0x00 0x00 0x80000000 0x281000>; - -+ enet: ethernet@2000 { -+ compatible = "brcm,bcm4908-enet"; -+ reg = <0x2000 0x1000>; -+ -+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "rx"; -+ }; -+ - usb_phy: usb-phy@c200 { - compatible = "brcm,bcm4908-usb-phy"; - reg = <0xc200 0x100>; -@@ -199,6 +207,17 @@ - phy-mode = "internal"; - phy-handle = <&phy11>; - }; -+ -+ port@8 { -+ reg = <8>; -+ phy-mode = "internal"; -+ ethernet = <&enet>; -+ -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ }; -+ }; - }; - }; - diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0003-arm64-dts-broadcom-bcm4908-describe-Netgear-R8000P-s.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0003-arm64-dts-broadcom-bcm4908-describe-Netgear-R8000P-s.patch deleted file mode 100644 index 9c7f9cee6c..0000000000 --- a/target/linux/bcm4908/patches-5.10/032-v5.13-0003-arm64-dts-broadcom-bcm4908-describe-Netgear-R8000P-s.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 406e98afffe975982f63ea5d21bf9a47a81b56ee Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 19 Feb 2021 06:50:28 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe Netgear R8000P switch -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -R8000P model has 4 LAN ports and 1 WAN port. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../bcm4908/bcm4906-netgear-r8000p.dts | 25 +++++++++++++++++++ - 1 file changed, 25 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -@@ -43,6 +43,31 @@ - status = "okay"; - }; - -+&ports { -+ port@0 { -+ label = "lan4"; -+ }; -+ -+ port@1 { -+ label = "lan3"; -+ }; -+ -+ port@2 { -+ label = "lan2"; -+ }; -+ -+ port@3 { -+ label = "lan1"; -+ }; -+ -+ port@7 { -+ reg = <7>; -+ phy-mode = "internal"; -+ phy-handle = <&phy12>; -+ label = "wan"; -+ }; -+}; -+ - &nandcs { - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0004-arm64-dts-broadcom-bcm4908-add-remaining-Netgear-R80.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0004-arm64-dts-broadcom-bcm4908-add-remaining-Netgear-R80.patch deleted file mode 100644 index 56249c82f8..0000000000 --- a/target/linux/bcm4908/patches-5.10/032-v5.13-0004-arm64-dts-broadcom-bcm4908-add-remaining-Netgear-R80.patch +++ /dev/null @@ -1,81 +0,0 @@ -From 6224415c0389ba6661825746312163a64ece8f3a Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 19 Feb 2021 06:50:29 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: add remaining Netgear R8000P - LEDs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -There are a few more GPIO connected LEDs there didn't get described -initially. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../bcm4908/bcm4906-netgear-r8000p.dts | 50 ++++++++++++++++++- - 1 file changed, 49 insertions(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -@@ -18,11 +18,59 @@ - leds { - compatible = "gpio-leds"; - -- wps { -+ led-power-white { -+ function = LED_FUNCTION_POWER; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-power-amber { -+ function = LED_FUNCTION_POWER; -+ color = <LED_COLOR_ID_AMBER>; -+ gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-wps { - function = LED_FUNCTION_WPS; - color = <LED_COLOR_ID_WHITE>; - gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; - }; -+ -+ led-2ghz { -+ function = "2ghz"; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-5ghz-1 { -+ function = "5ghz-1"; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-5ghz-2 { -+ function = "5ghz-2"; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-usb2 { -+ function = "usb2"; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-usb3 { -+ function = "usb3"; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-wifi { -+ function = "wifi"; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 56 GPIO_ACTIVE_LOW>; -+ }; - }; - }; - diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0005-arm64-dts-broadcom-bcm4908-describe-firmware-partiti.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0005-arm64-dts-broadcom-bcm4908-describe-firmware-partiti.patch deleted file mode 100644 index d03adc1743..0000000000 --- a/target/linux/bcm4908/patches-5.10/032-v5.13-0005-arm64-dts-broadcom-bcm4908-describe-firmware-partiti.patch +++ /dev/null @@ -1,55 +0,0 @@ -From cbaca2c467dc25a163107e14a53b7925214eab17 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 19 Feb 2021 06:50:30 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe firmware partitions -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 bootloader supports multiple firmware partitions and has its own -bindings defined for them. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts | 1 + - .../dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 12 +++++++++++- - 2 files changed, 12 insertions(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -@@ -135,6 +135,7 @@ - }; - - partition@100000 { -+ compatible = "brcm,bcm4908-firmware"; - label = "firmware"; - reg = <0x100000 0x4400000>; - }; ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -@@ -122,7 +122,7 @@ - #size-cells = <0>; - - partitions { -- compatible = "fixed-partitions"; -+ compatible = "brcm,bcm4908-partitions"; - #address-cells = <1>; - #size-cells = <1>; - -@@ -130,5 +130,15 @@ - label = "cferom"; - reg = <0x0 0x100000>; - }; -+ -+ partition@100000 { -+ compatible = "brcm,bcm4908-firmware"; -+ reg = <0x100000 0x5700000>; -+ }; -+ -+ partition@5800000 { -+ compatible = "brcm,bcm4908-firmware"; -+ reg = <0x5800000 0x5700000>; -+ }; - }; - }; diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0006-arm64-dts-broadcom-bcm4908-fix-switch-parent-node-na.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0006-arm64-dts-broadcom-bcm4908-fix-switch-parent-node-na.patch deleted file mode 100644 index 8b95fc2759..0000000000 --- a/target/linux/bcm4908/patches-5.10/032-v5.13-0006-arm64-dts-broadcom-bcm4908-fix-switch-parent-node-na.patch +++ /dev/null @@ -1,30 +0,0 @@ -From a348ff97ffb840b9d74b0e64b3e0e6002187d224 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 9 Mar 2021 19:44:09 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: fix switch parent node name -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Ethernet switch and MDIO are grouped using "simple-bus". It's not -allowed to use "ethernet-switch" node name as it isn't a switch. Replace -it with "bus". - -Fixes: 527a3ac9bdf8 ("arm64: dts: broadcom: bcm4908: describe internal switch") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -156,7 +156,7 @@ - status = "disabled"; - }; - -- ethernet-switch@80000 { -+ bus@80000 { - compatible = "simple-bus"; - #size-cells = <1>; - #address-cells = <1>; diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0007-dt-bindings-arm-bcm-document-TP-Link-Archer-C2300-bi.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0007-dt-bindings-arm-bcm-document-TP-Link-Archer-C2300-bi.patch deleted file mode 100644 index 07d4121ef1..0000000000 --- a/target/linux/bcm4908/patches-5.10/032-v5.13-0007-dt-bindings-arm-bcm-document-TP-Link-Archer-C2300-bi.patch +++ /dev/null @@ -1,27 +0,0 @@ -From b3de2a12d1a61d90a4d86c9840acc7d05066137f Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 10 Mar 2021 08:46:02 +0100 -Subject: [PATCH] dt-bindings: arm: bcm: document TP-Link Archer C2300 binding -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -One more BCM4906 based device. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Rob Herring <robh@kernel.org> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml | 1 + - 1 file changed, 1 insertion(+) - ---- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml -+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml -@@ -21,6 +21,7 @@ properties: - items: - - enum: - - netgear,r8000p -+ - tplink,archer-c2300-v1 - - const: brcm,bcm4906 - - const: brcm,bcm4908 - diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0008-arm64-dts-broadcom-bcm4908-add-TP-Link-Archer-C2300-.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0008-arm64-dts-broadcom-bcm4908-add-TP-Link-Archer-C2300-.patch deleted file mode 100644 index 0dd7f2301f..0000000000 --- a/target/linux/bcm4908/patches-5.10/032-v5.13-0008-arm64-dts-broadcom-bcm4908-add-TP-Link-Archer-C2300-.patch +++ /dev/null @@ -1,212 +0,0 @@ -From 6a30934a5470a0ce7ea32b0c6b600accfae94b1a Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 10 Mar 2021 08:46:03 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: add TP-Link Archer C2300 V1 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Archer C2300 V1 is a home router based on the BCM4906 (2 CPU cores). It -has 512 MiB of RAM, NAND flash, USB 2.0 and USB 3.0 ports, 4 LAN ports, -1 WAN port. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 1 + - .../bcm4906-tplink-archer-c2300-v1.dts | 182 ++++++++++++++++++ - 2 files changed, 183 insertions(+) - create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile -@@ -1,3 +1,4 @@ - # SPDX-License-Identifier: GPL-2.0 - dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-netgear-r8000p.dtb -+dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-tplink-archer-c2300-v1.dtb - dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts -@@ -0,0 +1,182 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+ -+#include <dt-bindings/gpio/gpio.h> -+#include <dt-bindings/input/input.h> -+#include <dt-bindings/leds/common.h> -+ -+#include "bcm4906.dtsi" -+ -+/ { -+ compatible = "tplink,archer-c2300-v1", "brcm,bcm4906", "brcm,bcm4908"; -+ model = "TP-Link Archer C2300 V1"; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x00 0x00 0x00 0x20000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led-power { -+ function = LED_FUNCTION_POWER; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-2ghz { -+ function = "2ghz"; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-5ghz { -+ function = "5ghz"; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-wan-amber { -+ function = LED_FUNCTION_WAN; -+ color = <LED_COLOR_ID_AMBER>; -+ gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ led-wan-blue { -+ function = LED_FUNCTION_WAN; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-lan { -+ function = LED_FUNCTION_LAN; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-wps { -+ function = LED_FUNCTION_WPS; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-usb2 { -+ function = "usb2"; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-usb3 { -+ function = "usbd3"; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-brightness { -+ function = LED_FUNCTION_BACKLIGHT; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+ -+ gpio-keys-polled { -+ compatible = "gpio-keys-polled"; -+ poll-interval = <100>; -+ -+ brightness { -+ label = "LEDs"; -+ linux,code = <KEY_BRIGHTNESS_ZERO>; -+ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; -+ }; -+ -+ wps { -+ label = "WPS"; -+ linux,code = <KEY_WPS_BUTTON>; -+ gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; -+ }; -+ -+ wifi { -+ label = "WiFi"; -+ linux,code = <KEY_RFKILL>; -+ gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; -+ }; -+ -+ restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&usb_phy { -+ brcm,ioc = <1>; -+ status = "okay"; -+}; -+ -+&ehci { -+ status = "okay"; -+}; -+ -+&ohci { -+ status = "okay"; -+}; -+ -+&xhci { -+ status = "okay"; -+}; -+ -+&ports { -+ port@0 { -+ label = "lan4"; -+ }; -+ -+ port@1 { -+ label = "lan3"; -+ }; -+ -+ port@2 { -+ label = "lan2"; -+ }; -+ -+ port@3 { -+ label = "lan1"; -+ }; -+ -+ port@7 { -+ reg = <7>; -+ phy-mode = "internal"; -+ phy-handle = <&phy12>; -+ label = "wan"; -+ }; -+}; -+ -+&nandcs { -+ nand-ecc-strength = <4>; -+ nand-ecc-step-size = <512>; -+ nand-on-flash-bbt; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ partitions { -+ compatible = "brcm,bcm4908-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ label = "cferom"; -+ reg = <0x0 0x100000>; -+ }; -+ -+ partition@100000 { -+ compatible = "brcm,bcm4908-firmware"; -+ reg = <0x100000 0x3900000>; -+ }; -+ -+ partition@5800000 { -+ compatible = "brcm,bcm4908-firmware"; -+ reg = <0x3a00000 0x3900000>; -+ }; -+ }; -+}; diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0009-arm64-dts-broadcom-bcm4908-set-Asus-GT-AC5300-port-7.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0009-arm64-dts-broadcom-bcm4908-set-Asus-GT-AC5300-port-7.patch deleted file mode 100644 index 30def36c39..0000000000 --- a/target/linux/bcm4908/patches-5.10/032-v5.13-0009-arm64-dts-broadcom-bcm4908-set-Asus-GT-AC5300-port-7.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 5ccb9f9cf05bbd729430c6d6d30d40c96a15c56a Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 12 Mar 2021 12:01:20 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: set Asus GT-AC5300 port 7 PHY - mode -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Port 7 is connected to the external BCM53134S switch using RGMII. - -Fixes: 527a3ac9bdf8 ("arm64: dts: broadcom: bcm4908: describe internal switch") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -@@ -82,6 +82,7 @@ - port@7 { - label = "sw"; - reg = <7>; -+ phy-mode = "rgmii"; - - fixed-link { - speed = <1000>; diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0010-arm64-dts-broadcom-bcm4908-add-Ethernet-TX-irq.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0010-arm64-dts-broadcom-bcm4908-add-Ethernet-TX-irq.patch deleted file mode 100644 index 9ba30b3a14..0000000000 --- a/target/linux/bcm4908/patches-5.10/032-v5.13-0010-arm64-dts-broadcom-bcm4908-add-Ethernet-TX-irq.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 5337af7918bedde9713cd223ce5df74b3d6c7d7a Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 17 Mar 2021 09:16:31 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: add Ethernet TX irq -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This hardware supports two interrupts, one per DMA channel (RX and TX). - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -116,8 +116,9 @@ - compatible = "brcm,bcm4908-enet"; - reg = <0x2000 0x1000>; - -- interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; -- interrupt-names = "rx"; -+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "rx", "tx"; - }; - - usb_phy: usb-phy@c200 { diff --git a/target/linux/bcm4908/patches-5.10/032-v5.13-0011-arm64-dts-broadcom-bcm4908-add-Ethernet-MAC-addr.patch b/target/linux/bcm4908/patches-5.10/032-v5.13-0011-arm64-dts-broadcom-bcm4908-add-Ethernet-MAC-addr.patch deleted file mode 100644 index 67f30c8213..0000000000 --- a/target/linux/bcm4908/patches-5.10/032-v5.13-0011-arm64-dts-broadcom-bcm4908-add-Ethernet-MAC-addr.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 9f01f5cdb548352418b34ce77db02a560fe2913b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Mon, 29 Mar 2021 17:45:14 +0200 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: add Ethernet MAC addr -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -On most BCM4908 devices MAC address can be read from the bootloader -binary section containing device settings. Use NVMEM to describe that. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../broadcom/bcm4908/bcm4906-netgear-r8000p.dts | 14 ++++++++++++++ - .../broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 14 ++++++++++++++ - 2 files changed, 28 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -@@ -74,6 +74,11 @@ - }; - }; - -+&enet { -+ nvmem-cells = <&base_mac_addr>; -+ nvmem-cell-names = "mac-address"; -+}; -+ - &usb_phy { - brcm,ioc = <1>; - status = "okay"; -@@ -130,8 +135,17 @@ - #size-cells = <1>; - - partition@0 { -+ compatible = "nvmem-cells"; - label = "cferom"; - reg = <0x0 0x100000>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x0 0x100000>; -+ -+ base_mac_addr: mac@106a0 { -+ reg = <0x106a0 0x6>; -+ }; - }; - - partition@100000 { ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -@@ -44,6 +44,11 @@ - }; - }; - -+&enet { -+ nvmem-cells = <&base_mac_addr>; -+ nvmem-cell-names = "mac-address"; -+}; -+ - &usb_phy { - brcm,ioc = <1>; - status = "okay"; -@@ -128,8 +133,17 @@ - #size-cells = <1>; - - partition@0 { -+ compatible = "nvmem-cells"; - label = "cferom"; - reg = <0x0 0x100000>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x0 0x100000>; -+ -+ base_mac_addr: mac@106a0 { -+ reg = <0x106a0 0x6>; -+ }; - }; - - partition@100000 { diff --git a/target/linux/bcm4908/patches-5.10/033-v5.14-0001-ARM-dts-BCM5301X-Fix-NAND-nodes-names.patch b/target/linux/bcm4908/patches-5.10/033-v5.14-0001-ARM-dts-BCM5301X-Fix-NAND-nodes-names.patch deleted file mode 100644 index 757b2c439d..0000000000 --- a/target/linux/bcm4908/patches-5.10/033-v5.14-0001-ARM-dts-BCM5301X-Fix-NAND-nodes-names.patch +++ /dev/null @@ -1,25 +0,0 @@ -From b660269cba748dfd07eb5551a88ff34d5ea0b86e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 16 Apr 2021 15:37:48 +0200 -Subject: [PATCH] ARM: dts: BCM5301X: Fix NAND nodes names -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This matches nand-controller.yaml requirements. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -306,7 +306,7 @@ - interrupt-names = "nand"; - status = "okay"; - -- nandcs: nandcs@0 { -+ nandcs: nand@0 { - compatible = "brcm,nandcs"; - reg = <0>; - }; diff --git a/target/linux/bcm4908/patches-5.10/034-v5.16-0001-arm64-dts-broadcom-bcm4908-Fix-NAND-node-name.patch b/target/linux/bcm4908/patches-5.10/034-v5.16-0001-arm64-dts-broadcom-bcm4908-Fix-NAND-node-name.patch deleted file mode 100644 index 80ce766751..0000000000 --- a/target/linux/bcm4908/patches-5.10/034-v5.16-0001-arm64-dts-broadcom-bcm4908-Fix-NAND-node-name.patch +++ /dev/null @@ -1,27 +0,0 @@ -From d0ae9c944b9472c5691a482297df7a57d7fd1199 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 19 Aug 2021 14:11:08 +0200 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: Fix NAND node name -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This matches nand-controller.yaml requirements. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -296,7 +296,7 @@ - status = "okay"; - }; - -- nand@1800 { -+ nand-controller@1800 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; diff --git a/target/linux/bcm4908/patches-5.10/034-v5.16-0002-arm64-dts-broadcom-bcm4908-Move-reboot-syscon-out-of.patch b/target/linux/bcm4908/patches-5.10/034-v5.16-0002-arm64-dts-broadcom-bcm4908-Move-reboot-syscon-out-of.patch deleted file mode 100644 index 6ac618a768..0000000000 --- a/target/linux/bcm4908/patches-5.10/034-v5.16-0002-arm64-dts-broadcom-bcm4908-Move-reboot-syscon-out-of.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 6cf9f70255b90b540b9cbde062f18fea29024a75 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 19 Aug 2021 14:26:06 +0200 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: Move reboot syscon out of bus -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This fixes following error for every bcm4908 DTS file: -bus@ff800000: reboot: {'type': 'object'} is not allowed for {'compatible': ['syscon-reboot'], 'regmap': [[15]], 'offset': [[52]], 'mask': [[1]]} - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -326,12 +326,12 @@ - #reset-cells = <1>; - }; - }; -+ }; - -- reboot { -- compatible = "syscon-reboot"; -- regmap = <&timer>; -- offset = <0x34>; -- mask = <1>; -- }; -+ reboot { -+ compatible = "syscon-reboot"; -+ regmap = <&timer>; -+ offset = <0x34>; -+ mask = <1>; - }; - }; diff --git a/target/linux/bcm4908/patches-5.10/034-v5.16-0003-arm64-dts-broadcom-bcm4908-Fix-UART-clock-name.patch b/target/linux/bcm4908/patches-5.10/034-v5.16-0003-arm64-dts-broadcom-bcm4908-Fix-UART-clock-name.patch deleted file mode 100644 index af9441875c..0000000000 --- a/target/linux/bcm4908/patches-5.10/034-v5.16-0003-arm64-dts-broadcom-bcm4908-Fix-UART-clock-name.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 6c38c39ab2141f53786d73e706675e8819a3f2cb Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 19 Aug 2021 17:37:02 +0200 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: Fix UART clock name -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -According to the binding the correct clock name is "refclk". - -Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -292,7 +292,7 @@ - reg = <0x640 0x18>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&periph_clk>; -- clock-names = "periph"; -+ clock-names = "refclk"; - status = "okay"; - }; - diff --git a/target/linux/bcm4908/patches-5.10/035-v5.17-0001-dt-bindings-arm-bcm-document-Netgear-RAXE500-binding.patch b/target/linux/bcm4908/patches-5.10/035-v5.17-0001-dt-bindings-arm-bcm-document-Netgear-RAXE500-binding.patch deleted file mode 100644 index 4d5ffcb9e3..0000000000 --- a/target/linux/bcm4908/patches-5.10/035-v5.17-0001-dt-bindings-arm-bcm-document-Netgear-RAXE500-binding.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 7b0c9ca7f18e8d2e2cf3c342d91f037d436777bf Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 5 Nov 2021 11:14:12 +0100 -Subject: [PATCH] dt-bindings: arm: bcm: document Netgear RAXE500 binding -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -One more BCM4908 based device. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Rob Herring <robh@kernel.org> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml | 1 + - 1 file changed, 1 insertion(+) - ---- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml -+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml -@@ -29,6 +29,7 @@ properties: - items: - - enum: - - asus,gt-ac5300 -+ - netgear,raxe500 - - const: brcm,bcm4908 - - - description: BCM49408 based boards diff --git a/target/linux/bcm4908/patches-5.10/035-v5.17-0002-arm64-dts-broadcom-bcm4908-add-DT-for-Netgear-RAXE50.patch b/target/linux/bcm4908/patches-5.10/035-v5.17-0002-arm64-dts-broadcom-bcm4908-add-DT-for-Netgear-RAXE50.patch deleted file mode 100644 index 9e0236ad0f..0000000000 --- a/target/linux/bcm4908/patches-5.10/035-v5.17-0002-arm64-dts-broadcom-bcm4908-add-DT-for-Netgear-RAXE50.patch +++ /dev/null @@ -1,81 +0,0 @@ -From d0e68d354f345873e15876a7b35be1baaf5e3ec9 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 5 Nov 2021 11:14:13 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: add DT for Netgear RAXE500 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's a home router based on BCM4908 SoC. It has: 1 GiB of RAM, 512 MiB -NAND flash, 6 Ethernet ports and 3 x BCM43684 (WiFi). One of Ethernet -ports is "2.5 G Multi-Gig port" that isn't described yet (it isn't known -how it's wired up). - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 1 + - .../bcm4908/bcm4908-netgear-raxe500.dts | 50 +++++++++++++++++++ - 2 files changed, 51 insertions(+) - create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile -@@ -2,3 +2,4 @@ - dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-netgear-r8000p.dtb - dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-tplink-archer-c2300-v1.dtb - dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb -+dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-netgear-raxe500.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts -@@ -0,0 +1,50 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+ -+#include "bcm4908.dtsi" -+ -+/ { -+ compatible = "netgear,raxe500", "brcm,bcm4908"; -+ model = "Netgear RAXE500"; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x00 0x00 0x00 0x40000000>; -+ }; -+}; -+ -+&ehci { -+ status = "okay"; -+}; -+ -+&ohci { -+ status = "okay"; -+}; -+ -+&xhci { -+ status = "okay"; -+}; -+ -+&ports { -+ port@0 { -+ label = "lan4"; -+ }; -+ -+ port@1 { -+ label = "lan3"; -+ }; -+ -+ port@2 { -+ label = "lan2"; -+ }; -+ -+ port@3 { -+ label = "lan1"; -+ }; -+ -+ port@7 { -+ reg = <7>; -+ phy-mode = "internal"; -+ phy-handle = <&phy12>; -+ label = "wan"; -+ }; -+}; diff --git a/target/linux/bcm4908/patches-5.10/036-v5.18-0001-arm64-dts-broadcom-bcm4908-use-proper-TWD-binding.patch b/target/linux/bcm4908/patches-5.10/036-v5.18-0001-arm64-dts-broadcom-bcm4908-use-proper-TWD-binding.patch deleted file mode 100644 index 420f790fdd..0000000000 --- a/target/linux/bcm4908/patches-5.10/036-v5.18-0001-arm64-dts-broadcom-bcm4908-use-proper-TWD-binding.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 33826e9c6ba76b265d4e26cb95493fa27ed78974 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 29 Dec 2021 11:23:14 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: use proper TWD binding -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Block at <ff800400 0x4c> is a TWD that contains timers, watchdog and -reset. Actual timers happen to be at block beginning but they only span -across the first 0x28 registers. It means the old block description was -incorrect (size 0x3c). - -Drop timers binding for now and use documented TWD binding. Timers -should be properly documented and defined as TWD subnode. - -Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -273,9 +273,9 @@ - #size-cells = <1>; - ranges = <0x00 0x00 0xff800000 0x3000>; - -- timer: timer@400 { -- compatible = "brcm,bcm6328-timer", "syscon"; -- reg = <0x400 0x3c>; -+ twd: timer-mfd@400 { -+ compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon"; -+ reg = <0x400 0x4c>; - }; - - gpio0: gpio-controller@500 { -@@ -330,7 +330,7 @@ - - reboot { - compatible = "syscon-reboot"; -- regmap = <&timer>; -+ regmap = <&twd>; - offset = <0x34>; - mask = <1>; - }; diff --git a/target/linux/bcm4908/patches-5.10/036-v5.18-0002-arm64-dts-broadcom-bcm4908-add-pinctrl-binding.patch b/target/linux/bcm4908/patches-5.10/036-v5.18-0002-arm64-dts-broadcom-bcm4908-add-pinctrl-binding.patch deleted file mode 100644 index 2f4baf80c6..0000000000 --- a/target/linux/bcm4908/patches-5.10/036-v5.18-0002-arm64-dts-broadcom-bcm4908-add-pinctrl-binding.patch +++ /dev/null @@ -1,160 +0,0 @@ -From 72b1c5da796ec5266f2012c36470e226cb4f09c9 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 30 Dec 2021 12:05:35 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: add pinctrl binding -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Describe pinmux block with its maps. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 135 ++++++++++++++++++ - 1 file changed, 135 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -287,6 +287,141 @@ - gpio-controller; - }; - -+ pinctrl@560 { -+ compatible = "brcm,bcm4908-pinctrl"; -+ reg = <0x560 0x10>; -+ -+ pins_led_0_a: led_0-a-pins { -+ function = "led_0"; -+ groups = "led_0_grp_a"; -+ }; -+ -+ pins_led_1_a: led_1-a-pins { -+ function = "led_1"; -+ groups = "led_1_grp_a"; -+ }; -+ -+ pins_led_2_a: led_2-a-pins { -+ function = "led_2"; -+ groups = "led_2_grp_a"; -+ }; -+ -+ pins_led_3_a: led_3-a-pins { -+ function = "led_3"; -+ groups = "led_3_grp_a"; -+ }; -+ -+ pins_led_4_a: led_4-a-pins { -+ function = "led_4"; -+ groups = "led_4_grp_a"; -+ }; -+ -+ pins_led_5_a: led_5-a-pins { -+ function = "led_5"; -+ groups = "led_5_grp_a"; -+ }; -+ -+ pins_led_6_a: led_6-a-pins { -+ function = "led_6"; -+ groups = "led_6_grp_a"; -+ }; -+ -+ pins_led_7_a: led_7-a-pins { -+ function = "led_7"; -+ groups = "led_7_grp_a"; -+ }; -+ -+ pins_led_8_a: led_8-a-pins { -+ function = "led_8"; -+ groups = "led_8_grp_a"; -+ }; -+ -+ pins_led_9_a: led_9-a-pins { -+ function = "led_9"; -+ groups = "led_9_grp_a"; -+ }; -+ -+ pins_led_21_a: led_21-a-pins { -+ function = "led_21"; -+ groups = "led_21_grp_a"; -+ }; -+ -+ pins_led_22_a: led_22-a-pins { -+ function = "led_22"; -+ groups = "led_22_grp_a"; -+ }; -+ -+ pins_led_26_a: led_26-a-pins { -+ function = "led_26"; -+ groups = "led_26_grp_a"; -+ }; -+ -+ pins_led_27_a: led_27-a-pins { -+ function = "led_27"; -+ groups = "led_27_grp_a"; -+ }; -+ -+ pins_led_28_a: led_28-a-pins { -+ function = "led_28"; -+ groups = "led_28_grp_a"; -+ }; -+ -+ pins_led_29_a: led_29-a-pins { -+ function = "led_29"; -+ groups = "led_29_grp_a"; -+ }; -+ -+ pins_led_30_a: led_30-a-pins { -+ function = "led_30"; -+ groups = "led_30_grp_a"; -+ }; -+ -+ pins_hs_uart: hs_uart-pins { -+ function = "hs_uart"; -+ groups = "hs_uart_grp"; -+ }; -+ -+ pins_i2c_a: i2c-a-pins { -+ function = "i2c"; -+ groups = "i2c_grp_a"; -+ }; -+ -+ pins_i2c_b: i2c-b-pins { -+ function = "i2c"; -+ groups = "i2c_grp_b"; -+ }; -+ -+ pins_i2s: i2s-pins { -+ function = "i2s"; -+ groups = "i2s_grp"; -+ }; -+ -+ pins_nand_ctrl: nand_ctrl-pins { -+ function = "nand_ctrl"; -+ groups = "nand_ctrl_grp"; -+ }; -+ -+ pins_nand_data: nand_data-pins { -+ function = "nand_data"; -+ groups = "nand_data_grp"; -+ }; -+ -+ pins_emmc_ctrl: emmc_ctrl-pins { -+ function = "emmc_ctrl"; -+ groups = "emmc_ctrl_grp"; -+ }; -+ -+ pins_usb0_pwr: usb0_pwr-pins { -+ function = "usb0_pwr"; -+ groups = "usb0_pwr_grp"; -+ }; -+ -+ pins_usb1_pwr: usb1_pwr-pins { -+ function = "usb1_pwr"; -+ groups = "usb1_pwr_grp"; -+ }; -+ }; -+ - uart0: serial@640 { - compatible = "brcm,bcm6345-uart"; - reg = <0x640 0x18>; diff --git a/target/linux/bcm4908/patches-5.10/036-v5.18-0003-arm64-dts-broadcom-bcm4908-add-watchdog-block.patch b/target/linux/bcm4908/patches-5.10/036-v5.18-0003-arm64-dts-broadcom-bcm4908-add-watchdog-block.patch deleted file mode 100644 index 3ca778dcd8..0000000000 --- a/target/linux/bcm4908/patches-5.10/036-v5.18-0003-arm64-dts-broadcom-bcm4908-add-watchdog-block.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 47513f6dd93b5b7d91143219c2c1fb883664ed13 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 9 Feb 2022 21:14:17 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: add watchdog block -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 has the same watchdog as BCM63xx devices. Use "brcm,bcm6345-wdt" -binding which matches the first SoC with that block. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -276,6 +276,15 @@ - twd: timer-mfd@400 { - compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon"; - reg = <0x400 0x4c>; -+ ranges = <0x0 0x400 0x4c>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ watchdog@28 { -+ compatible = "brcm,bcm6345-wdt"; -+ reg = <0x28 0x8>; -+ }; - }; - - gpio0: gpio-controller@500 { diff --git a/target/linux/bcm4908/patches-5.10/036-v5.18-0004-arm64-dts-broadcom-bcm4908-add-I2C-block.patch b/target/linux/bcm4908/patches-5.10/036-v5.18-0004-arm64-dts-broadcom-bcm4908-add-I2C-block.patch deleted file mode 100644 index ab00f44b14..0000000000 --- a/target/linux/bcm4908/patches-5.10/036-v5.18-0004-arm64-dts-broadcom-bcm4908-add-I2C-block.patch +++ /dev/null @@ -1,34 +0,0 @@ -From ba5dfa2fd8d0aed4e4b6f650ba9e8ea7cdd6ead1 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 15 Feb 2022 07:36:39 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: add I2C block -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 uses the same I2C hw as BCM63xx / BCM67xx / BCM68xx SoCs. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -456,6 +456,15 @@ - }; - }; - -+ i2c@2100 { -+ compatible = "brcm,brcmper-i2c"; -+ reg = <0x2100 0x58>; -+ clock-frequency = <97500>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pins_i2c_a>; -+ status = "disabled"; -+ }; -+ - misc@2600 { - compatible = "brcm,misc", "simple-mfd"; - reg = <0x2600 0xe4>; diff --git a/target/linux/bcm4908/patches-5.10/037-v5.20-0001-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM63158.patch b/target/linux/bcm4908/patches-5.10/037-v5.20-0001-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM63158.patch deleted file mode 100644 index 2a1260f73b..0000000000 --- a/target/linux/bcm4908/patches-5.10/037-v5.20-0001-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM63158.patch +++ /dev/null @@ -1,199 +0,0 @@ -From 076dcedc6628c6bf92bd17bfcf8fb7b1af62bfb6 Mon Sep 17 00:00:00 2001 -From: William Zhang <william.zhang@broadcom.com> -Date: Wed, 1 Jun 2022 15:56:51 -0700 -Subject: [PATCH] arm64: dts: Add DTS files for bcmbca SoC BCM63158 - -Add DTS for ARMv8 based broadband SoC BCM63158. bcm63158.dtsi is the -SoC description DTS header and bcm963158.dts is a simple DTS file for -Broadcom BCM963158 Reference board that only enable the UART port. - -Signed-off-by: William Zhang <william.zhang@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/Makefile | 1 + - arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 2 + - .../boot/dts/broadcom/bcmbca/bcm63158.dtsi | 128 ++++++++++++++++++ - .../boot/dts/broadcom/bcmbca/bcm963158.dts | 30 ++++ - 4 files changed, 161 insertions(+) - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/Makefile - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts - ---- a/arch/arm64/boot/dts/broadcom/Makefile -+++ b/arch/arm64/boot/dts/broadcom/Makefile -@@ -6,5 +6,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rp - bcm2837-rpi-cm3-io3.dtb - - subdir-y += bcm4908 -+subdir-y += bcmbca - subdir-y += northstar2 - subdir-y += stingray ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -@@ -0,0 +1,2 @@ -+# SPDX-License-Identifier: GPL-2.0 -+dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi -@@ -0,0 +1,128 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright 2022 Broadcom Ltd. -+ */ -+ -+#include <dt-bindings/interrupt-controller/irq.h> -+#include <dt-bindings/interrupt-controller/arm-gic.h> -+ -+/ { -+ compatible = "brcm,bcm63158", "brcm,bcmbca"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ -+ interrupt-parent = <&gic>; -+ -+ cpus { -+ #address-cells = <2>; -+ #size-cells = <0>; -+ -+ B53_0: cpu@0 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x0>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_1: cpu@1 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x1>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_2: cpu@2 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x2>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_3: cpu@3 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x3>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ L2_0: l2-cache0 { -+ compatible = "cache"; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; -+ }; -+ -+ pmu: pmu { -+ compatible = "arm,cortex-a53-pmu"; -+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-affinity = <&B53_0>, <&B53_1>, -+ <&B53_2>, <&B53_3>; -+ }; -+ -+ clocks: clocks { -+ periph_clk: periph-clk { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <200000000>; -+ }; -+ uart_clk: uart-clk { -+ compatible = "fixed-factor-clock"; -+ #clock-cells = <0>; -+ clocks = <&periph_clk>; -+ clock-div = <4>; -+ clock-mult = <1>; -+ }; -+ }; -+ -+ psci { -+ compatible = "arm,psci-0.2"; -+ method = "smc"; -+ }; -+ -+ axi@81000000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x0 0x0 0x81000000 0x8000>; -+ -+ gic: interrupt-controller@1000 { -+ compatible = "arm,gic-400"; -+ #interrupt-cells = <3>; -+ interrupt-controller; -+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; -+ reg = <0x1000 0x1000>, -+ <0x2000 0x2000>, -+ <0x4000 0x2000>, -+ <0x6000 0x2000>; -+ }; -+ }; -+ -+ bus@ff800000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x0 0x0 0xff800000 0x800000>; -+ -+ uart0: serial@12000 { -+ compatible = "arm,pl011", "arm,primecell"; -+ reg = <0x12000 0x1000>; -+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&uart_clk>, <&uart_clk>; -+ clock-names = "uartclk", "apb_pclk"; -+ status = "disabled"; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts -@@ -0,0 +1,30 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright 2022 Broadcom Ltd. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm63158.dtsi" -+ -+/ { -+ model = "Broadcom BCM963158 Reference Board"; -+ compatible = "brcm,bcm963158", "brcm,bcm63158", "brcm,bcmbca"; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0 0x08000000>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; diff --git a/target/linux/bcm4908/patches-5.10/037-v5.20-0002-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM4912.patch b/target/linux/bcm4908/patches-5.10/037-v5.20-0002-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM4912.patch deleted file mode 100644 index 5cdb9d1df1..0000000000 --- a/target/linux/bcm4908/patches-5.10/037-v5.20-0002-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM4912.patch +++ /dev/null @@ -1,191 +0,0 @@ -From 1ba56aeb391401c4cb2126c39f90b3cdbfabdb3f Mon Sep 17 00:00:00 2001 -From: William Zhang <william.zhang@broadcom.com> -Date: Wed, 1 Jun 2022 13:17:34 -0700 -Subject: [PATCH] arm64: dts: Add DTS files for bcmbca SoC BCM4912 - -Add DTS for ARMv8 based broadband SoC BCM4912. bcm4912.dtsi is the -SoC description DTS header and bcm94912.dts is a simple DTS file for -Broadcom BCM94912 Reference board that only enable the UART port. - -Signed-off-by: William Zhang <william.zhang@broadcom.com> -Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +- - .../boot/dts/broadcom/bcmbca/bcm4912.dtsi | 128 ++++++++++++++++++ - .../boot/dts/broadcom/bcmbca/bcm94912.dts | 30 ++++ - 3 files changed, 160 insertions(+), 1 deletion(-) - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -@@ -1,2 +1,3 @@ - # SPDX-License-Identifier: GPL-2.0 --dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb -+dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \ -+ bcm963158.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi -@@ -0,0 +1,128 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright 2022 Broadcom Ltd. -+ */ -+ -+#include <dt-bindings/interrupt-controller/irq.h> -+#include <dt-bindings/interrupt-controller/arm-gic.h> -+ -+/ { -+ compatible = "brcm,bcm4912", "brcm,bcmbca"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ -+ interrupt-parent = <&gic>; -+ -+ cpus { -+ #address-cells = <2>; -+ #size-cells = <0>; -+ -+ B53_0: cpu@0 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x0>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_1: cpu@1 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x1>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_2: cpu@2 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x2>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_3: cpu@3 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x3>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ L2_0: l2-cache0 { -+ compatible = "cache"; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; -+ }; -+ -+ pmu: pmu { -+ compatible = "arm,cortex-a53-pmu"; -+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-affinity = <&B53_0>, <&B53_1>, -+ <&B53_2>, <&B53_3>; -+ }; -+ -+ clocks: clocks { -+ periph_clk: periph-clk { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <200000000>; -+ }; -+ uart_clk: uart-clk { -+ compatible = "fixed-factor-clock"; -+ #clock-cells = <0>; -+ clocks = <&periph_clk>; -+ clock-div = <4>; -+ clock-mult = <1>; -+ }; -+ }; -+ -+ psci { -+ compatible = "arm,psci-0.2"; -+ method = "smc"; -+ }; -+ -+ axi@81000000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x0 0x0 0x81000000 0x8000>; -+ -+ gic: interrupt-controller@1000 { -+ compatible = "arm,gic-400"; -+ #interrupt-cells = <3>; -+ interrupt-controller; -+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; -+ reg = <0x1000 0x1000>, -+ <0x2000 0x2000>, -+ <0x4000 0x2000>, -+ <0x6000 0x2000>; -+ }; -+ }; -+ -+ bus@ff800000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x0 0x0 0xff800000 0x800000>; -+ -+ uart0: serial@12000 { -+ compatible = "arm,pl011", "arm,primecell"; -+ reg = <0x12000 0x1000>; -+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&uart_clk>, <&uart_clk>; -+ clock-names = "uartclk", "apb_pclk"; -+ status = "disabled"; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts -@@ -0,0 +1,30 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright 2022 Broadcom Ltd. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4912.dtsi" -+ -+/ { -+ model = "Broadcom BCM94912 Reference Board"; -+ compatible = "brcm,bcm94912", "brcm,bcm4912", "brcm,bcmbca"; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0 0x08000000>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; diff --git a/target/linux/bcm4908/patches-5.10/037-v5.20-0003-ARM64-dts-Add-DTS-files-for-bcmbca-SoC-BCM6858.patch b/target/linux/bcm4908/patches-5.10/037-v5.20-0003-ARM64-dts-Add-DTS-files-for-bcmbca-SoC-BCM6858.patch deleted file mode 100644 index f10a44f890..0000000000 --- a/target/linux/bcm4908/patches-5.10/037-v5.20-0003-ARM64-dts-Add-DTS-files-for-bcmbca-SoC-BCM6858.patch +++ /dev/null @@ -1,184 +0,0 @@ -From e663e06bd3f21e64bc2163910f626af68add6308 Mon Sep 17 00:00:00 2001 -From: Anand Gore <anand.gore@broadcom.com> -Date: Wed, 1 Jun 2022 13:19:56 -0700 -Subject: [PATCH] ARM64: dts: Add DTS files for bcmbca SoC BCM6858 - -Add DTS for ARMv8 based broadband SoC BCM6858. bcm6858.dtsi is the SoC -description DTS header and bcm96858.dts is a simple DTS file for -Broadcom BCM96858 Reference board that only enables the UART port. - -Signed-off-by: Anand Gore <anand.gore@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +- - .../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 121 ++++++++++++++++++ - .../boot/dts/broadcom/bcmbca/bcm96858.dts | 30 +++++ - 3 files changed, 153 insertions(+), 1 deletion(-) - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -@@ -1,3 +1,4 @@ - # SPDX-License-Identifier: GPL-2.0 - dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \ -- bcm963158.dtb -+ bcm963158.dtb \ -+ bcm96858.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi -@@ -0,0 +1,121 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright 2022 Broadcom Ltd. -+ */ -+ -+#include <dt-bindings/interrupt-controller/irq.h> -+#include <dt-bindings/interrupt-controller/arm-gic.h> -+ -+/ { -+ compatible = "brcm,bcm6858", "brcm,bcmbca"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ -+ interrupt-parent = <&gic>; -+ -+ cpus { -+ #address-cells = <2>; -+ #size-cells = <0>; -+ -+ B53_0: cpu@0 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x0>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_1: cpu@1 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x1>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_2: cpu@2 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x2>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_3: cpu@3 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x3>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ L2_0: l2-cache0 { -+ compatible = "cache"; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; -+ }; -+ -+ pmu: pmu { -+ compatible = "arm,armv8-pmuv3"; -+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-affinity = <&B53_0>, <&B53_1>, -+ <&B53_2>, <&B53_3>; -+ }; -+ -+ clocks: clocks { -+ periph_clk:periph-clk { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <200000000>; -+ }; -+ }; -+ -+ psci { -+ compatible = "arm,psci-0.2"; -+ method = "smc"; -+ }; -+ -+ axi@81000000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x0 0x0 0x81000000 0x8000>; -+ -+ gic: interrupt-controller@1000 { -+ compatible = "arm,gic-400"; -+ #interrupt-cells = <3>; -+ interrupt-controller; -+ reg = <0x1000 0x1000>, /* GICD */ -+ <0x2000 0x2000>, /* GICC */ -+ <0x4000 0x2000>, /* GICH */ -+ <0x6000 0x2000>; /* GICV */ -+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | -+ IRQ_TYPE_LEVEL_HIGH)>; -+ }; -+ }; -+ -+ bus@ff800000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x0 0x0 0xff800000 0x62000>; -+ -+ uart0: serial@640 { -+ compatible = "brcm,bcm6345-uart"; -+ reg = <0x640 0x18>; -+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&periph_clk>; -+ clock-names = "refclk"; -+ status = "disabled"; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts -@@ -0,0 +1,30 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright 2022 Broadcom Ltd. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm6858.dtsi" -+ -+/ { -+ model = "Broadcom BCM96858 Reference Board"; -+ compatible = "brcm,bcm96858", "brcm,bcm6858", "brcm,bcmbca"; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0 0x08000000>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; diff --git a/target/linux/bcm4908/patches-5.10/037-v5.20-0004-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM63146.patch b/target/linux/bcm4908/patches-5.10/037-v5.20-0004-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM63146.patch deleted file mode 100644 index 793c5af738..0000000000 --- a/target/linux/bcm4908/patches-5.10/037-v5.20-0004-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM63146.patch +++ /dev/null @@ -1,174 +0,0 @@ -From 82a58061ada60058ec00113c179380f945914709 Mon Sep 17 00:00:00 2001 -From: William Zhang <william.zhang@broadcom.com> -Date: Wed, 8 Jun 2022 11:00:59 -0700 -Subject: [PATCH] arm64: dts: Add DTS files for bcmbca SoC BCM63146 - -Add DTS for ARMv8 based broadband SoC BCM63146. bcm63146.dtsi is the -SoC description DTS header and bcm963146.dts is a simple DTS file for -Broadcom BCM963146 Reference board that only enable the UART port. - -Signed-off-by: William Zhang <william.zhang@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +- - .../boot/dts/broadcom/bcmbca/bcm63146.dtsi | 110 ++++++++++++++++++ - .../boot/dts/broadcom/bcmbca/bcm963146.dts | 30 +++++ - 3 files changed, 142 insertions(+), 1 deletion(-) - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -@@ -1,4 +1,5 @@ - # SPDX-License-Identifier: GPL-2.0 - dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \ - bcm963158.dtb \ -- bcm96858.dtb -+ bcm96858.dtb \ -+ bcm963146.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi -@@ -0,0 +1,110 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright 2022 Broadcom Ltd. -+ */ -+ -+#include <dt-bindings/interrupt-controller/irq.h> -+#include <dt-bindings/interrupt-controller/arm-gic.h> -+ -+/ { -+ compatible = "brcm,bcm63146", "brcm,bcmbca"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ -+ interrupt-parent = <&gic>; -+ -+ cpus { -+ #address-cells = <2>; -+ #size-cells = <0>; -+ -+ B53_0: cpu@0 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x0>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_1: cpu@1 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x1>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ L2_0: l2-cache0 { -+ compatible = "cache"; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; -+ }; -+ -+ pmu: pmu { -+ compatible = "arm,cortex-a53-pmu"; -+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-affinity = <&B53_0>, <&B53_1>; -+ }; -+ -+ clocks: clocks { -+ periph_clk: periph-clk { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <200000000>; -+ }; -+ uart_clk: uart-clk { -+ compatible = "fixed-factor-clock"; -+ #clock-cells = <0>; -+ clocks = <&periph_clk>; -+ clock-div = <4>; -+ clock-mult = <1>; -+ }; -+ }; -+ -+ psci { -+ compatible = "arm,psci-0.2"; -+ method = "smc"; -+ }; -+ -+ axi@81000000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x0 0x0 0x81000000 0x8000>; -+ -+ gic: interrupt-controller@1000 { -+ compatible = "arm,gic-400"; -+ #interrupt-cells = <3>; -+ interrupt-controller; -+ reg = <0x1000 0x1000>, -+ <0x2000 0x2000>, -+ <0x4000 0x2000>, -+ <0x6000 0x2000>; -+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | -+ IRQ_TYPE_LEVEL_HIGH)>; -+ }; -+ }; -+ -+ bus@ff800000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x0 0x0 0xff800000 0x800000>; -+ -+ uart0: serial@12000 { -+ compatible = "arm,pl011", "arm,primecell"; -+ reg = <0x12000 0x1000>; -+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&uart_clk>, <&uart_clk>; -+ clock-names = "uartclk", "apb_pclk"; -+ status = "disabled"; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts -@@ -0,0 +1,30 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright 2022 Broadcom Ltd. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm63146.dtsi" -+ -+/ { -+ model = "Broadcom BCM963146 Reference Board"; -+ compatible = "brcm,bcm963146", "brcm,bcm63146", "brcm,bcmbca"; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0 0x08000000>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; diff --git a/target/linux/bcm4908/patches-5.10/037-v5.20-0005-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM6856.patch b/target/linux/bcm4908/patches-5.10/037-v5.20-0005-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM6856.patch deleted file mode 100644 index 0fdafb7f17..0000000000 --- a/target/linux/bcm4908/patches-5.10/037-v5.20-0005-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM6856.patch +++ /dev/null @@ -1,167 +0,0 @@ -From 64eca7ad058cff861b48cdead8dee40dfc284e9e Mon Sep 17 00:00:00 2001 -From: William Zhang <william.zhang@broadcom.com> -Date: Wed, 8 Jun 2022 11:04:36 -0700 -Subject: [PATCH] arm64: dts: Add DTS files for bcmbca SoC BCM6856 - -Add DTS for ARMv8 based broadband SoC BCM6856. bcm6856.dtsi is the -SoC description DTS header and bcm96856.dts is a simple DTS file for -Broadcom BCM96956 Reference board that only enable the UART port. - -Signed-off-by: William Zhang <william.zhang@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +- - .../boot/dts/broadcom/bcmbca/bcm6856.dtsi | 103 ++++++++++++++++++ - .../boot/dts/broadcom/bcmbca/bcm96856.dts | 30 +++++ - 3 files changed, 135 insertions(+), 1 deletion(-) - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -@@ -2,4 +2,5 @@ - dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \ - bcm963158.dtb \ - bcm96858.dtb \ -- bcm963146.dtb -+ bcm963146.dtb \ -+ bcm96856.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi -@@ -0,0 +1,103 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright 2022 Broadcom Ltd. -+ */ -+ -+#include <dt-bindings/interrupt-controller/irq.h> -+#include <dt-bindings/interrupt-controller/arm-gic.h> -+ -+/ { -+ compatible = "brcm,bcm6856", "brcm,bcmbca"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ -+ interrupt-parent = <&gic>; -+ -+ cpus { -+ #address-cells = <2>; -+ #size-cells = <0>; -+ -+ B53_0: cpu@0 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x0>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_1: cpu@1 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x1>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ L2_0: l2-cache0 { -+ compatible = "cache"; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; -+ }; -+ -+ pmu: pmu { -+ compatible = "arm,cortex-a53-pmu"; -+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-affinity = <&B53_0>, <&B53_1>; -+ }; -+ -+ clocks: clocks { -+ periph_clk:periph-clk { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <200000000>; -+ }; -+ }; -+ -+ psci { -+ compatible = "arm,psci-0.2"; -+ method = "smc"; -+ }; -+ -+ axi@81000000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x0 0x0 0x81000000 0x8000>; -+ -+ gic: interrupt-controller@1000 { -+ compatible = "arm,gic-400"; -+ #interrupt-cells = <3>; -+ interrupt-controller; -+ reg = <0x1000 0x1000>, /* GICD */ -+ <0x2000 0x2000>, /* GICC */ -+ <0x4000 0x2000>, /* GICH */ -+ <0x6000 0x2000>; /* GICV */ -+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | -+ IRQ_TYPE_LEVEL_HIGH)>; -+ }; -+ }; -+ -+ bus@ff800000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x0 0x0 0xff800000 0x800000>; -+ -+ uart0: serial@640 { -+ compatible = "brcm,bcm6345-uart"; -+ reg = <0x640 0x18>; -+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&periph_clk>; -+ clock-names = "refclk"; -+ status = "disabled"; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts -@@ -0,0 +1,30 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright 2022 Broadcom Ltd. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm6856.dtsi" -+ -+/ { -+ model = "Broadcom BCM96856 Reference Board"; -+ compatible = "brcm,bcm96856", "brcm,bcm6856", "brcm,bcmbca"; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0 0x08000000>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; diff --git a/target/linux/bcm4908/patches-5.10/037-v5.20-0006-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM6813.patch b/target/linux/bcm4908/patches-5.10/037-v5.20-0006-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM6813.patch deleted file mode 100644 index 58af85a68c..0000000000 --- a/target/linux/bcm4908/patches-5.10/037-v5.20-0006-arm64-dts-Add-DTS-files-for-bcmbca-SoC-BCM6813.patch +++ /dev/null @@ -1,192 +0,0 @@ -From eab6bb0994b806525fc5e362e8b865f61c4a9e20 Mon Sep 17 00:00:00 2001 -From: William Zhang <william.zhang@broadcom.com> -Date: Thu, 9 Jun 2022 17:15:33 -0700 -Subject: [PATCH] arm64: dts: Add DTS files for bcmbca SoC BCM6813 - -Add DTS for ARMv8 based broadband SoC BCM6813. bcm6813.dtsi is the -SoC description DTS header and bcm96813.dts is a simple DTS file for -Broadcom BCM96813 Reference board that only enable the UART port. - -Signed-off-by: William Zhang <william.zhang@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +- - .../boot/dts/broadcom/bcmbca/bcm6813.dtsi | 128 ++++++++++++++++++ - .../boot/dts/broadcom/bcmbca/bcm96813.dts | 30 ++++ - 3 files changed, 160 insertions(+), 1 deletion(-) - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -@@ -3,4 +3,5 @@ dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dt - bcm963158.dtb \ - bcm96858.dtb \ - bcm963146.dtb \ -- bcm96856.dtb -+ bcm96856.dtb \ -+ bcm96813.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi -@@ -0,0 +1,128 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright 2022 Broadcom Ltd. -+ */ -+ -+#include <dt-bindings/interrupt-controller/irq.h> -+#include <dt-bindings/interrupt-controller/arm-gic.h> -+ -+/ { -+ compatible = "brcm,bcm6813", "brcm,bcmbca"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ -+ interrupt-parent = <&gic>; -+ -+ cpus { -+ #address-cells = <2>; -+ #size-cells = <0>; -+ -+ B53_0: cpu@0 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x0>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_1: cpu@1 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x1>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_2: cpu@2 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x2>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ B53_3: cpu@3 { -+ compatible = "brcm,brahma-b53"; -+ device_type = "cpu"; -+ reg = <0x0 0x3>; -+ next-level-cache = <&L2_0>; -+ enable-method = "psci"; -+ }; -+ -+ L2_0: l2-cache0 { -+ compatible = "cache"; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; -+ }; -+ -+ pmu: pmu { -+ compatible = "arm,cortex-a53-pmu"; -+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-affinity = <&B53_0>, <&B53_1>, -+ <&B53_2>, <&B53_3>; -+ }; -+ -+ clocks: clocks { -+ periph_clk: periph-clk { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <200000000>; -+ }; -+ uart_clk: uart-clk { -+ compatible = "fixed-factor-clock"; -+ #clock-cells = <0>; -+ clocks = <&periph_clk>; -+ clock-div = <4>; -+ clock-mult = <1>; -+ }; -+ }; -+ -+ psci { -+ compatible = "arm,psci-0.2"; -+ method = "smc"; -+ }; -+ -+ axi@81000000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x0 0x0 0x81000000 0x8000>; -+ -+ gic: interrupt-controller@1000 { -+ compatible = "arm,gic-400"; -+ #interrupt-cells = <3>; -+ interrupt-controller; -+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; -+ reg = <0x1000 0x1000>, -+ <0x2000 0x2000>, -+ <0x4000 0x2000>, -+ <0x6000 0x2000>; -+ }; -+ }; -+ -+ bus@ff800000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x0 0x0 0xff800000 0x800000>; -+ -+ uart0: serial@12000 { -+ compatible = "arm,pl011", "arm,primecell"; -+ reg = <0x12000 0x1000>; -+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&uart_clk>, <&uart_clk>; -+ clock-names = "uartclk", "apb_pclk"; -+ status = "disabled"; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts -@@ -0,0 +1,30 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright 2022 Broadcom Ltd. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm6813.dtsi" -+ -+/ { -+ model = "Broadcom BCM96813 Reference Board"; -+ compatible = "brcm,bcm96813", "brcm,bcm6813", "brcm,bcmbca"; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0 0x08000000>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; diff --git a/target/linux/bcm4908/patches-5.10/037-v5.20-0007-arm64-dts-broadcom-align-gpio-key-node-names-with-dt.patch b/target/linux/bcm4908/patches-5.10/037-v5.20-0007-arm64-dts-broadcom-align-gpio-key-node-names-with-dt.patch deleted file mode 100644 index d0d6151957..0000000000 --- a/target/linux/bcm4908/patches-5.10/037-v5.20-0007-arm64-dts-broadcom-align-gpio-key-node-names-with-dt.patch +++ /dev/null @@ -1,79 +0,0 @@ -From ea559c81b61603d4044df6f826f10a832c42c98c Mon Sep 17 00:00:00 2001 -From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> -Date: Wed, 15 Jun 2022 17:52:59 -0700 -Subject: [PATCH] arm64: dts: broadcom: align gpio-key node names with dtschema - -The node names should be generic and DT schema expects certain pattern -(e.g. with key/button/switch). - -Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> -Link: https://lore.kernel.org/r/20220616005333.18491-6-krzysztof.kozlowski@linaro.org ---- - .../broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts | 8 ++++---- - .../boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 8 ++++---- - 2 files changed, 8 insertions(+), 8 deletions(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts -@@ -83,25 +83,25 @@ - compatible = "gpio-keys-polled"; - poll-interval = <100>; - -- brightness { -+ key-brightness { - label = "LEDs"; - linux,code = <KEY_BRIGHTNESS_ZERO>; - gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; - }; - -- wps { -+ key-wps { - label = "WPS"; - linux,code = <KEY_WPS_BUTTON>; - gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; - }; - -- wifi { -+ key-wifi { - label = "WiFi"; - linux,code = <KEY_RFKILL>; - gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; - }; - -- restart { -+ key-restart { - label = "Reset"; - linux,code = <KEY_RESTART>; - gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -@@ -18,25 +18,25 @@ - compatible = "gpio-keys-polled"; - poll-interval = <100>; - -- wifi { -+ key-wifi { - label = "WiFi"; - linux,code = <KEY_RFKILL>; - gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; - }; - -- wps { -+ key-wps { - label = "WPS"; - linux,code = <KEY_WPS_BUTTON>; - gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; - }; - -- restart { -+ key-restart { - label = "Reset"; - linux,code = <KEY_RESTART>; - gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; - }; - -- brightness { -+ key-brightness { - label = "LEDs"; - linux,code = <KEY_BRIGHTNESS_ZERO>; - gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; diff --git a/target/linux/bcm4908/patches-5.10/037-v5.20-0008-arm64-dts-broadcom-bcm4908-Fix-timer-node-for-BCM490.patch b/target/linux/bcm4908/patches-5.10/037-v5.20-0008-arm64-dts-broadcom-bcm4908-Fix-timer-node-for-BCM490.patch deleted file mode 100644 index c2b924a0fd..0000000000 --- a/target/linux/bcm4908/patches-5.10/037-v5.20-0008-arm64-dts-broadcom-bcm4908-Fix-timer-node-for-BCM490.patch +++ /dev/null @@ -1,33 +0,0 @@ -From b4a544e415e9be33b37d9bfa9d9f9f4d13f553d6 Mon Sep 17 00:00:00 2001 -From: William Zhang <william.zhang@broadcom.com> -Date: Fri, 8 Jul 2022 11:25:06 -0700 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: Fix timer node for BCM4906 SoC - -The cpu mask value in interrupt property inherits from bcm4908.dtsi -which sets to four cpus. Correct the value to two cpus for dual core -BCM4906 SoC. - -Fixes: c8b404fb05dc ("arm64: dts: broadcom: bcm4908: add BCM4906 Netgear R8000P DTS files") -Signed-off-by: William Zhang <william.zhang@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi -@@ -9,6 +9,14 @@ - /delete-node/ cpu@3; - }; - -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; -+ }; -+ - pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, diff --git a/target/linux/bcm4908/patches-5.10/037-v5.20-0009-arm64-dts-broadcom-bcm4908-Fix-cpu-node-for-smp-boot.patch b/target/linux/bcm4908/patches-5.10/037-v5.20-0009-arm64-dts-broadcom-bcm4908-Fix-cpu-node-for-smp-boot.patch deleted file mode 100644 index 482fd1cc98..0000000000 --- a/target/linux/bcm4908/patches-5.10/037-v5.20-0009-arm64-dts-broadcom-bcm4908-Fix-cpu-node-for-smp-boot.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 8bd582ae9a71d7f14c4e0c735b2eacaf7516d626 Mon Sep 17 00:00:00 2001 -From: William Zhang <william.zhang@broadcom.com> -Date: Fri, 8 Jul 2022 11:25:07 -0700 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: Fix cpu node for smp boot - -Add spin-table enable-method and cpu-release-addr properties for -cpu0 node. This is required by all ARMv8 SoC. Otherwise some -bootloader like u-boot can not update cpu-release-addr and linux -fails to start up secondary cpus. - -Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files") -Signed-off-by: William Zhang <william.zhang@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -29,6 +29,8 @@ - device_type = "cpu"; - compatible = "brcm,brahma-b53"; - reg = <0x0>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0xfff8>; - next-level-cache = <&l2>; - }; - diff --git a/target/linux/bcm4908/patches-5.10/037-v5.20-0010-arm64-dts-Add-base-DTS-file-for-bcmbca-device-Asus-G.patch b/target/linux/bcm4908/patches-5.10/037-v5.20-0010-arm64-dts-Add-base-DTS-file-for-bcmbca-device-Asus-G.patch deleted file mode 100644 index 6f71c8b5fb..0000000000 --- a/target/linux/bcm4908/patches-5.10/037-v5.20-0010-arm64-dts-Add-base-DTS-file-for-bcmbca-device-Asus-G.patch +++ /dev/null @@ -1,54 +0,0 @@ -From f3f575c4bef95384e68de552c7b29938fd0d9201 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 13 Jul 2022 22:03:51 +0200 -Subject: [PATCH] arm64: dts: Add base DTS file for bcmbca device Asus - GT-AX6000 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's a home router with 1 GiB of RAM, 6 Ethernet ports, 2 USB ports. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: William Zhang <william.zhang@broadcom.com> -Link: https://lore.kernel.org/r/20220713200351.28526-2-zajec5@gmail.com -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 4 +++- - .../bcmbca/bcm4912-asus-gt-ax6000.dts | 19 +++++++++++++++++++ - 2 files changed, 22 insertions(+), 1 deletion(-) - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm4912-asus-gt-ax6000.dts - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -@@ -1,5 +1,7 @@ - # SPDX-License-Identifier: GPL-2.0 --dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \ -+dtb-$(CONFIG_ARCH_BCMBCA) += \ -+ bcm4912-asus-gt-ax6000.dtb \ -+ bcm94912.dtb \ - bcm963158.dtb \ - bcm96858.dtb \ - bcm963146.dtb \ ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912-asus-gt-ax6000.dts -@@ -0,0 +1,19 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+ -+/dts-v1/; -+ -+#include "bcm4912.dtsi" -+ -+/ { -+ compatible = "asus,gt-ax6000", "brcm,bcm4912", "brcm,bcmbca"; -+ model = "Asus GT-AX6000"; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x00 0x00 0x00 0x40000000>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; diff --git a/target/linux/bcm4908/patches-5.10/037-v5.20-0011-arm64-bcmbca-add-arch-bcmbca-machine-entry.patch b/target/linux/bcm4908/patches-5.10/037-v5.20-0011-arm64-bcmbca-add-arch-bcmbca-machine-entry.patch deleted file mode 100644 index 1b9a32e30a..0000000000 --- a/target/linux/bcm4908/patches-5.10/037-v5.20-0011-arm64-bcmbca-add-arch-bcmbca-machine-entry.patch +++ /dev/null @@ -1,31 +0,0 @@ -From fdcd652ce2b6b819f5c4dc3cead5215c84ee6933 Mon Sep 17 00:00:00 2001 -From: William Zhang <william.zhang@broadcom.com> -Date: Wed, 1 Jun 2022 15:56:50 -0700 -Subject: [PATCH] arm64: bcmbca: add arch bcmbca machine entry - -Add ARCH_BCMBCA config for Broadcom Broadband SoC chipsets - -Signed-off-by: William Zhang <william.zhang@broadcom.com> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/Kconfig.platforms | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/arch/arm64/Kconfig.platforms -+++ b/arch/arm64/Kconfig.platforms -@@ -59,6 +59,15 @@ config ARCH_BCM_IPROC - help - This enables support for Broadcom iProc based SoCs - -+config ARCH_BCMBCA -+ bool "Broadcom Broadband SoC" -+ help -+ Say Y if you intend to run the kernel on a Broadcom Broadband ARM-based -+ BCA chipset. -+ -+ This enables support for Broadcom BCA ARM-based broadband chipsets, -+ including the DSL, PON and Wireless family of chips. -+ - config ARCH_BERLIN - bool "Marvell Berlin SoC Family" - select DW_APB_ICTL diff --git a/target/linux/bcm4908/patches-5.10/038-v6.1-0001-arm64-dts-broadcom-bcm4908-add-remaining-LED-pins.patch b/target/linux/bcm4908/patches-5.10/038-v6.1-0001-arm64-dts-broadcom-bcm4908-add-remaining-LED-pins.patch deleted file mode 100644 index 437249f2cb..0000000000 --- a/target/linux/bcm4908/patches-5.10/038-v6.1-0001-arm64-dts-broadcom-bcm4908-add-remaining-LED-pins.patch +++ /dev/null @@ -1,115 +0,0 @@ -From 456b6dd1baadd2da10e28ffd1717b06d1fa17a97 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Mon, 18 Jul 2022 15:20:58 +0200 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: add remaining LED pins -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Include all 32 pins. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/r/20220718132100.13277-1-zajec5@gmail.com -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 75 +++++++++++++++++++ - 1 file changed, 75 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -352,6 +352,61 @@ - groups = "led_9_grp_a"; - }; - -+ pins_led_10_a: led_10-a-pins { -+ function = "led_10"; -+ groups = "led_10_grp_a"; -+ }; -+ -+ pins_led_11_a: led_11-a-pins { -+ function = "led_11"; -+ groups = "led_11_grp_a"; -+ }; -+ -+ pins_led_12_a: led_12-a-pins { -+ function = "led_12"; -+ groups = "led_12_grp_a"; -+ }; -+ -+ pins_led_13_a: led_13-a-pins { -+ function = "led_13"; -+ groups = "led_13_grp_a"; -+ }; -+ -+ pins_led_14_a: led_14-a-pins { -+ function = "led_14"; -+ groups = "led_14_grp_a"; -+ }; -+ -+ pins_led_15_a: led_15-a-pins { -+ function = "led_15"; -+ groups = "led_15_grp_a"; -+ }; -+ -+ pins_led_16_a: led_16-a-pins { -+ function = "led_16"; -+ groups = "led_16_grp_a"; -+ }; -+ -+ pins_led_17_a: led_17-a-pins { -+ function = "led_17"; -+ groups = "led_17_grp_a"; -+ }; -+ -+ pins_led_18_a: led_18-a-pins { -+ function = "led_18"; -+ groups = "led_18_grp_a"; -+ }; -+ -+ pins_led_19_a: led_19-a-pins { -+ function = "led_19"; -+ groups = "led_19_grp_a"; -+ }; -+ -+ pins_led_20_a: led_20-a-pins { -+ function = "led_20"; -+ groups = "led_20_grp_a"; -+ }; -+ - pins_led_21_a: led_21-a-pins { - function = "led_21"; - groups = "led_21_grp_a"; -@@ -362,6 +417,21 @@ - groups = "led_22_grp_a"; - }; - -+ pins_led_23_a: led_23-a-pins { -+ function = "led_23"; -+ groups = "led_23_grp_a"; -+ }; -+ -+ pins_led_24_a: led_24-a-pins { -+ function = "led_24"; -+ groups = "led_24_grp_a"; -+ }; -+ -+ pins_led_25_a: led_25-a-pins { -+ function = "led_25"; -+ groups = "led_25_grp_a"; -+ }; -+ - pins_led_26_a: led_26-a-pins { - function = "led_26"; - groups = "led_26_grp_a"; -@@ -387,6 +457,11 @@ - groups = "led_30_grp_a"; - }; - -+ pins_led_31_a: led_31-a-pins { -+ function = "led_31"; -+ groups = "led_31_grp_a"; -+ }; -+ - pins_hs_uart: hs_uart-pins { - function = "hs_uart"; - groups = "hs_uart_grp"; diff --git a/target/linux/bcm4908/patches-5.10/038-v6.1-0002-arm64-dts-broadcom-bcm4908-add-LEDs-controller-block.patch b/target/linux/bcm4908/patches-5.10/038-v6.1-0002-arm64-dts-broadcom-bcm4908-add-LEDs-controller-block.patch deleted file mode 100644 index c890340893..0000000000 --- a/target/linux/bcm4908/patches-5.10/038-v6.1-0002-arm64-dts-broadcom-bcm4908-add-LEDs-controller-block.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 7de56b1dc1149c702d4cc1e89ccc251bfb2bc246 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Mon, 18 Jul 2022 15:20:59 +0200 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: add LEDs controller block -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 includes LEDs controller that supports multiple brightness -levels & hardware blinking. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/r/20220718132100.13277-2-zajec5@gmail.com -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -@@ -517,6 +517,14 @@ - status = "okay"; - }; - -+ leds: leds@800 { -+ compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds"; -+ reg = <0x800 0xdc>; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ - nand-controller@1800 { - #address-cells = <1>; - #size-cells = <0>; diff --git a/target/linux/bcm4908/patches-5.10/038-v6.1-0003-arm64-dts-broadcom-bcm4908-add-Asus-GT-AC5300-LEDs.patch b/target/linux/bcm4908/patches-5.10/038-v6.1-0003-arm64-dts-broadcom-bcm4908-add-Asus-GT-AC5300-LEDs.patch deleted file mode 100644 index 3888efb66b..0000000000 --- a/target/linux/bcm4908/patches-5.10/038-v6.1-0003-arm64-dts-broadcom-bcm4908-add-Asus-GT-AC5300-LEDs.patch +++ /dev/null @@ -1,81 +0,0 @@ -From 3bcae3396e986b4ab97a69e8de517e32f9691a4b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Mon, 18 Jul 2022 15:21:00 +0200 -Subject: [PATCH] arm64: dts: broadcom: bcm4908: add Asus GT-AC5300 LEDs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -There are 5 software-controllable LEDs on PCB. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/r/20220718132100.13277-3-zajec5@gmail.com -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../bcm4908/bcm4908-asus-gt-ac5300.dts | 48 +++++++++++++++++++ - 1 file changed, 48 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -@@ -2,6 +2,7 @@ - - #include <dt-bindings/gpio/gpio.h> - #include <dt-bindings/input/input.h> -+#include <dt-bindings/leds/common.h> - - #include "bcm4908.dtsi" - -@@ -118,6 +119,53 @@ - }; - }; - -+&leds { -+ led-power@11 { -+ reg = <0x11>; -+ function = LED_FUNCTION_POWER; -+ color = <LED_COLOR_ID_WHITE>; -+ default-state = "on"; -+ active-low; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pins_led_17_a>; -+ }; -+ -+ led-wan-red@12 { -+ reg = <0x12>; -+ function = LED_FUNCTION_WAN; -+ color = <LED_COLOR_ID_RED>; -+ active-low; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pins_led_18_a>; -+ }; -+ -+ led-wps@14 { -+ reg = <0x14>; -+ function = LED_FUNCTION_WPS; -+ color = <LED_COLOR_ID_WHITE>; -+ active-low; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pins_led_20_a>; -+ }; -+ -+ led-wan-white@15 { -+ reg = <0x15>; -+ function = LED_FUNCTION_WAN; -+ color = <LED_COLOR_ID_WHITE>; -+ active-low; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pins_led_21_a>; -+ }; -+ -+ led-lan@19 { -+ reg = <0x19>; -+ function = LED_FUNCTION_LAN; -+ color = <LED_COLOR_ID_WHITE>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pins_led_25_a>; -+ }; -+}; -+ - &nandcs { - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; diff --git a/target/linux/bcm4908/patches-5.10/038-v6.1-0004-arm64-dts-bcmbca-update-BCM4908-board-dts-files.patch b/target/linux/bcm4908/patches-5.10/038-v6.1-0004-arm64-dts-bcmbca-update-BCM4908-board-dts-files.patch deleted file mode 100644 index d4b7a983de..0000000000 --- a/target/linux/bcm4908/patches-5.10/038-v6.1-0004-arm64-dts-bcmbca-update-BCM4908-board-dts-files.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 4fdcbde682291fba2c3f45a41decd656d92a314f Mon Sep 17 00:00:00 2001 -From: William Zhang <william.zhang@broadcom.com> -Date: Wed, 3 Aug 2022 10:54:49 -0700 -Subject: [PATCH] arm64: dts: bcmbca: update BCM4908 board dts files -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Append "brcm,bcmbca" to compatible strings based on the new bcmbca -binding rule for BCM4908 family based boards. - -Signed-off-by: William Zhang <william.zhang@broadcom.com> -Acked-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/r/20220803175455.47638-4-william.zhang@broadcom.com -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts | 2 +- - .../dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts | 2 +- - arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 2 +- - .../arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts | 2 +- - 4 files changed, 4 insertions(+), 4 deletions(-) - ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -@@ -7,7 +7,7 @@ - #include "bcm4906.dtsi" - - / { -- compatible = "netgear,r8000p", "brcm,bcm4906", "brcm,bcm4908"; -+ compatible = "netgear,r8000p", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca"; - model = "Netgear R8000P"; - - memory@0 { ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts -@@ -7,7 +7,7 @@ - #include "bcm4906.dtsi" - - / { -- compatible = "tplink,archer-c2300-v1", "brcm,bcm4906", "brcm,bcm4908"; -+ compatible = "tplink,archer-c2300-v1", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca"; - model = "TP-Link Archer C2300 V1"; - - memory@0 { ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -@@ -7,7 +7,7 @@ - #include "bcm4908.dtsi" - - / { -- compatible = "asus,gt-ac5300", "brcm,bcm4908"; -+ compatible = "asus,gt-ac5300", "brcm,bcm4908", "brcm,bcmbca"; - model = "Asus GT-AC5300"; - - memory@0 { ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts -@@ -3,7 +3,7 @@ - #include "bcm4908.dtsi" - - / { -- compatible = "netgear,raxe500", "brcm,bcm4908"; -+ compatible = "netgear,raxe500", "brcm,bcm4908", "brcm,bcmbca"; - model = "Netgear RAXE500"; - - memory@0 { diff --git a/target/linux/bcm4908/patches-5.10/038-v6.1-0005-arm64-dts-Move-BCM4908-dts-to-bcmbca-folder.patch b/target/linux/bcm4908/patches-5.10/038-v6.1-0005-arm64-dts-Move-BCM4908-dts-to-bcmbca-folder.patch deleted file mode 100644 index 70484ab93f..0000000000 --- a/target/linux/bcm4908/patches-5.10/038-v6.1-0005-arm64-dts-Move-BCM4908-dts-to-bcmbca-folder.patch +++ /dev/null @@ -1,2491 +0,0 @@ -From ded8f22945899f4e87dd6d952bbc4abce6e64b7e Mon Sep 17 00:00:00 2001 -From: William Zhang <william.zhang@broadcom.com> -Date: Wed, 3 Aug 2022 10:54:50 -0700 -Subject: [PATCH] arm64: dts: Move BCM4908 dts to bcmbca folder - -As part of ARCH_BCM4908 to ARCH_BCMBCA migration, move the BCM4908 dts -files to bcmbca folder and use CONFIG_ARCH_BCMBCA to build all the -BCM4908 board dts. Delete bcm4908 folder and its makefile as well. - -Signed-off-by: William Zhang <william.zhang@broadcom.com> -Link: https://lore.kernel.org/r/20220803175455.47638-5-william.zhang@broadcom.com -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/Makefile | 1 - - arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 5 ----- - arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 4 ++++ - .../broadcom/{bcm4908 => bcmbca}/bcm4906-netgear-r8000p.dts | 0 - .../{bcm4908 => bcmbca}/bcm4906-tplink-archer-c2300-v1.dts | 0 - .../arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4906.dtsi | 0 - .../broadcom/{bcm4908 => bcmbca}/bcm4908-asus-gt-ac5300.dts | 0 - .../broadcom/{bcm4908 => bcmbca}/bcm4908-netgear-raxe500.dts | 0 - .../arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4908.dtsi | 0 - 9 files changed, 4 insertions(+), 6 deletions(-) - delete mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/Makefile - rename arch/arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4906-netgear-r8000p.dts (100%) - rename arch/arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4906-tplink-archer-c2300-v1.dts (100%) - rename arch/arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4906.dtsi (100%) - rename arch/arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4908-asus-gt-ac5300.dts (100%) - rename arch/arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4908-netgear-raxe500.dts (100%) - rename arch/arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4908.dtsi (100%) - ---- a/arch/arm64/boot/dts/broadcom/Makefile -+++ b/arch/arm64/boot/dts/broadcom/Makefile -@@ -5,7 +5,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rp - bcm2837-rpi-3-b-plus.dtb \ - bcm2837-rpi-cm3-io3.dtb - --subdir-y += bcm4908 - subdir-y += bcmbca - subdir-y += northstar2 - subdir-y += stingray ---- a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile -+++ /dev/null -@@ -1,5 +0,0 @@ --# SPDX-License-Identifier: GPL-2.0 --dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-netgear-r8000p.dtb --dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-tplink-archer-c2300-v1.dtb --dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb --dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-netgear-raxe500.dtb ---- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -@@ -1,5 +1,9 @@ - # SPDX-License-Identifier: GPL-2.0 - dtb-$(CONFIG_ARCH_BCMBCA) += \ -+ bcm4906-netgear-r8000p.dtb \ -+ bcm4906-tplink-archer-c2300-v1.dtb \ -+ bcm4908-asus-gt-ac5300.dtb \ -+ bcm4908-netgear-raxe500.dtb \ - bcm4912-asus-gt-ax6000.dtb \ - bcm94912.dtb \ - bcm963158.dtb \ ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts -+++ /dev/null -@@ -1,157 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -- --#include <dt-bindings/gpio/gpio.h> --#include <dt-bindings/input/input.h> --#include <dt-bindings/leds/common.h> -- --#include "bcm4906.dtsi" -- --/ { -- compatible = "netgear,r8000p", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca"; -- model = "Netgear R8000P"; -- -- memory@0 { -- device_type = "memory"; -- reg = <0x00 0x00 0x00 0x20000000>; -- }; -- -- leds { -- compatible = "gpio-leds"; -- -- led-power-white { -- function = LED_FUNCTION_POWER; -- color = <LED_COLOR_ID_WHITE>; -- gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; -- }; -- -- led-power-amber { -- function = LED_FUNCTION_POWER; -- color = <LED_COLOR_ID_AMBER>; -- gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; -- }; -- -- led-wps { -- function = LED_FUNCTION_WPS; -- color = <LED_COLOR_ID_WHITE>; -- gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; -- }; -- -- led-2ghz { -- function = "2ghz"; -- color = <LED_COLOR_ID_WHITE>; -- gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; -- }; -- -- led-5ghz-1 { -- function = "5ghz-1"; -- color = <LED_COLOR_ID_WHITE>; -- gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; -- }; -- -- led-5ghz-2 { -- function = "5ghz-2"; -- color = <LED_COLOR_ID_WHITE>; -- gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; -- }; -- -- led-usb2 { -- function = "usb2"; -- color = <LED_COLOR_ID_WHITE>; -- gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; -- }; -- -- led-usb3 { -- function = "usb3"; -- color = <LED_COLOR_ID_WHITE>; -- gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; -- }; -- -- led-wifi { -- function = "wifi"; -- color = <LED_COLOR_ID_WHITE>; -- gpios = <&gpio0 56 GPIO_ACTIVE_LOW>; -- }; -- }; --}; -- --&enet { -- nvmem-cells = <&base_mac_addr>; -- nvmem-cell-names = "mac-address"; --}; -- --&usb_phy { -- brcm,ioc = <1>; -- status = "okay"; --}; -- --&ehci { -- status = "okay"; --}; -- --&ohci { -- status = "okay"; --}; -- --&xhci { -- status = "okay"; --}; -- --&ports { -- port@0 { -- label = "lan4"; -- }; -- -- port@1 { -- label = "lan3"; -- }; -- -- port@2 { -- label = "lan2"; -- }; -- -- port@3 { -- label = "lan1"; -- }; -- -- port@7 { -- reg = <7>; -- phy-mode = "internal"; -- phy-handle = <&phy12>; -- label = "wan"; -- }; --}; -- --&nandcs { -- nand-ecc-strength = <4>; -- nand-ecc-step-size = <512>; -- nand-on-flash-bbt; -- -- #address-cells = <1>; -- #size-cells = <0>; -- -- partitions { -- compatible = "fixed-partitions"; -- #address-cells = <1>; -- #size-cells = <1>; -- -- partition@0 { -- compatible = "nvmem-cells"; -- label = "cferom"; -- reg = <0x0 0x100000>; -- -- #address-cells = <1>; -- #size-cells = <1>; -- ranges = <0 0x0 0x100000>; -- -- base_mac_addr: mac@106a0 { -- reg = <0x106a0 0x6>; -- }; -- }; -- -- partition@100000 { -- compatible = "brcm,bcm4908-firmware"; -- label = "firmware"; -- reg = <0x100000 0x4400000>; -- }; -- }; --}; ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts -+++ /dev/null -@@ -1,182 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -- --#include <dt-bindings/gpio/gpio.h> --#include <dt-bindings/input/input.h> --#include <dt-bindings/leds/common.h> -- --#include "bcm4906.dtsi" -- --/ { -- compatible = "tplink,archer-c2300-v1", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca"; -- model = "TP-Link Archer C2300 V1"; -- -- memory@0 { -- device_type = "memory"; -- reg = <0x00 0x00 0x00 0x20000000>; -- }; -- -- leds { -- compatible = "gpio-leds"; -- -- led-power { -- function = LED_FUNCTION_POWER; -- color = <LED_COLOR_ID_BLUE>; -- gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; -- }; -- -- led-2ghz { -- function = "2ghz"; -- color = <LED_COLOR_ID_BLUE>; -- gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; -- }; -- -- led-5ghz { -- function = "5ghz"; -- color = <LED_COLOR_ID_BLUE>; -- gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; -- }; -- -- led-wan-amber { -- function = LED_FUNCTION_WAN; -- color = <LED_COLOR_ID_AMBER>; -- gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; -- }; -- -- led-wan-blue { -- function = LED_FUNCTION_WAN; -- color = <LED_COLOR_ID_BLUE>; -- gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; -- }; -- -- led-lan { -- function = LED_FUNCTION_LAN; -- color = <LED_COLOR_ID_BLUE>; -- gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; -- }; -- -- led-wps { -- function = LED_FUNCTION_WPS; -- color = <LED_COLOR_ID_BLUE>; -- gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; -- }; -- -- led-usb2 { -- function = "usb2"; -- color = <LED_COLOR_ID_BLUE>; -- gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; -- }; -- -- led-usb3 { -- function = "usbd3"; -- color = <LED_COLOR_ID_BLUE>; -- gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; -- }; -- -- led-brightness { -- function = LED_FUNCTION_BACKLIGHT; -- color = <LED_COLOR_ID_WHITE>; -- gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; -- }; -- }; -- -- gpio-keys-polled { -- compatible = "gpio-keys-polled"; -- poll-interval = <100>; -- -- key-brightness { -- label = "LEDs"; -- linux,code = <KEY_BRIGHTNESS_ZERO>; -- gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; -- }; -- -- key-wps { -- label = "WPS"; -- linux,code = <KEY_WPS_BUTTON>; -- gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; -- }; -- -- key-wifi { -- label = "WiFi"; -- linux,code = <KEY_RFKILL>; -- gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; -- }; -- -- key-restart { -- label = "Reset"; -- linux,code = <KEY_RESTART>; -- gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; -- }; -- }; --}; -- --&usb_phy { -- brcm,ioc = <1>; -- status = "okay"; --}; -- --&ehci { -- status = "okay"; --}; -- --&ohci { -- status = "okay"; --}; -- --&xhci { -- status = "okay"; --}; -- --&ports { -- port@0 { -- label = "lan4"; -- }; -- -- port@1 { -- label = "lan3"; -- }; -- -- port@2 { -- label = "lan2"; -- }; -- -- port@3 { -- label = "lan1"; -- }; -- -- port@7 { -- reg = <7>; -- phy-mode = "internal"; -- phy-handle = <&phy12>; -- label = "wan"; -- }; --}; -- --&nandcs { -- nand-ecc-strength = <4>; -- nand-ecc-step-size = <512>; -- nand-on-flash-bbt; -- -- #address-cells = <1>; -- #size-cells = <0>; -- -- partitions { -- compatible = "brcm,bcm4908-partitions"; -- #address-cells = <1>; -- #size-cells = <1>; -- -- partition@0 { -- label = "cferom"; -- reg = <0x0 0x100000>; -- }; -- -- partition@100000 { -- compatible = "brcm,bcm4908-firmware"; -- reg = <0x100000 0x3900000>; -- }; -- -- partition@5800000 { -- compatible = "brcm,bcm4908-firmware"; -- reg = <0x3a00000 0x3900000>; -- }; -- }; --}; ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi -+++ /dev/null -@@ -1,26 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -- --#include "bcm4908.dtsi" -- --/ { -- cpus { -- /delete-node/ cpu@2; -- -- /delete-node/ cpu@3; -- }; -- -- timer { -- compatible = "arm,armv8-timer"; -- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; -- }; -- -- pmu { -- compatible = "arm,cortex-a53-pmu"; -- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, -- <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; -- interrupt-affinity = <&cpu0>, <&cpu1>; -- }; --}; ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts -+++ /dev/null -@@ -1,207 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -- --#include <dt-bindings/gpio/gpio.h> --#include <dt-bindings/input/input.h> --#include <dt-bindings/leds/common.h> -- --#include "bcm4908.dtsi" -- --/ { -- compatible = "asus,gt-ac5300", "brcm,bcm4908", "brcm,bcmbca"; -- model = "Asus GT-AC5300"; -- -- memory@0 { -- device_type = "memory"; -- reg = <0x00 0x00 0x00 0x40000000>; -- }; -- -- gpio-keys-polled { -- compatible = "gpio-keys-polled"; -- poll-interval = <100>; -- -- key-wifi { -- label = "WiFi"; -- linux,code = <KEY_RFKILL>; -- gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; -- }; -- -- key-wps { -- label = "WPS"; -- linux,code = <KEY_WPS_BUTTON>; -- gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; -- }; -- -- key-restart { -- label = "Reset"; -- linux,code = <KEY_RESTART>; -- gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; -- }; -- -- key-brightness { -- label = "LEDs"; -- linux,code = <KEY_BRIGHTNESS_ZERO>; -- gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; -- }; -- }; --}; -- --&enet { -- nvmem-cells = <&base_mac_addr>; -- nvmem-cell-names = "mac-address"; --}; -- --&usb_phy { -- brcm,ioc = <1>; -- status = "okay"; --}; -- --&ehci { -- status = "okay"; --}; -- --&ohci { -- status = "okay"; --}; -- --&xhci { -- status = "okay"; --}; -- --&ports { -- port@0 { -- label = "lan2"; -- }; -- -- port@1 { -- label = "lan1"; -- }; -- -- port@2 { -- label = "lan6"; -- }; -- -- port@3 { -- label = "lan5"; -- }; -- -- /* External BCM53134S switch */ -- port@7 { -- label = "sw"; -- reg = <7>; -- phy-mode = "rgmii"; -- -- fixed-link { -- speed = <1000>; -- full-duplex; -- }; -- }; --}; -- --&mdio { -- /* lan8 */ -- ethernet-phy@0 { -- reg = <0>; -- }; -- -- /* lan7 */ -- ethernet-phy@1 { -- reg = <1>; -- }; -- -- /* lan4 */ -- ethernet-phy@2 { -- reg = <2>; -- }; -- -- /* lan3 */ -- ethernet-phy@3 { -- reg = <3>; -- }; --}; -- --&leds { -- led-power@11 { -- reg = <0x11>; -- function = LED_FUNCTION_POWER; -- color = <LED_COLOR_ID_WHITE>; -- default-state = "on"; -- active-low; -- pinctrl-names = "default"; -- pinctrl-0 = <&pins_led_17_a>; -- }; -- -- led-wan-red@12 { -- reg = <0x12>; -- function = LED_FUNCTION_WAN; -- color = <LED_COLOR_ID_RED>; -- active-low; -- pinctrl-names = "default"; -- pinctrl-0 = <&pins_led_18_a>; -- }; -- -- led-wps@14 { -- reg = <0x14>; -- function = LED_FUNCTION_WPS; -- color = <LED_COLOR_ID_WHITE>; -- active-low; -- pinctrl-names = "default"; -- pinctrl-0 = <&pins_led_20_a>; -- }; -- -- led-wan-white@15 { -- reg = <0x15>; -- function = LED_FUNCTION_WAN; -- color = <LED_COLOR_ID_WHITE>; -- active-low; -- pinctrl-names = "default"; -- pinctrl-0 = <&pins_led_21_a>; -- }; -- -- led-lan@19 { -- reg = <0x19>; -- function = LED_FUNCTION_LAN; -- color = <LED_COLOR_ID_WHITE>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pins_led_25_a>; -- }; --}; -- --&nandcs { -- nand-ecc-strength = <4>; -- nand-ecc-step-size = <512>; -- nand-on-flash-bbt; -- brcm,nand-has-wp; -- -- #address-cells = <1>; -- #size-cells = <0>; -- -- partitions { -- compatible = "brcm,bcm4908-partitions"; -- #address-cells = <1>; -- #size-cells = <1>; -- -- partition@0 { -- compatible = "nvmem-cells"; -- label = "cferom"; -- reg = <0x0 0x100000>; -- -- #address-cells = <1>; -- #size-cells = <1>; -- ranges = <0 0x0 0x100000>; -- -- base_mac_addr: mac@106a0 { -- reg = <0x106a0 0x6>; -- }; -- }; -- -- partition@100000 { -- compatible = "brcm,bcm4908-firmware"; -- reg = <0x100000 0x5700000>; -- }; -- -- partition@5800000 { -- compatible = "brcm,bcm4908-firmware"; -- reg = <0x5800000 0x5700000>; -- }; -- }; --}; ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts -+++ /dev/null -@@ -1,50 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -- --#include "bcm4908.dtsi" -- --/ { -- compatible = "netgear,raxe500", "brcm,bcm4908", "brcm,bcmbca"; -- model = "Netgear RAXE500"; -- -- memory@0 { -- device_type = "memory"; -- reg = <0x00 0x00 0x00 0x40000000>; -- }; --}; -- --&ehci { -- status = "okay"; --}; -- --&ohci { -- status = "okay"; --}; -- --&xhci { -- status = "okay"; --}; -- --&ports { -- port@0 { -- label = "lan4"; -- }; -- -- port@1 { -- label = "lan3"; -- }; -- -- port@2 { -- label = "lan2"; -- }; -- -- port@3 { -- label = "lan1"; -- }; -- -- port@7 { -- reg = <7>; -- phy-mode = "internal"; -- phy-handle = <&phy12>; -- label = "wan"; -- }; --}; ---- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi -+++ /dev/null -@@ -1,575 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -- --#include <dt-bindings/interrupt-controller/irq.h> --#include <dt-bindings/interrupt-controller/arm-gic.h> --#include <dt-bindings/phy/phy.h> --#include <dt-bindings/soc/bcm-pmb.h> -- --/dts-v1/; -- --/ { -- interrupt-parent = <&gic>; -- -- #address-cells = <2>; -- #size-cells = <2>; -- -- aliases { -- serial0 = &uart0; -- }; -- -- chosen { -- stdout-path = "serial0:115200n8"; -- }; -- -- cpus { -- #address-cells = <1>; -- #size-cells = <0>; -- -- cpu0: cpu@0 { -- device_type = "cpu"; -- compatible = "brcm,brahma-b53"; -- reg = <0x0>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0xfff8>; -- next-level-cache = <&l2>; -- }; -- -- cpu1: cpu@1 { -- device_type = "cpu"; -- compatible = "brcm,brahma-b53"; -- reg = <0x1>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0xfff8>; -- next-level-cache = <&l2>; -- }; -- -- cpu2: cpu@2 { -- device_type = "cpu"; -- compatible = "brcm,brahma-b53"; -- reg = <0x2>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0xfff8>; -- next-level-cache = <&l2>; -- }; -- -- cpu3: cpu@3 { -- device_type = "cpu"; -- compatible = "brcm,brahma-b53"; -- reg = <0x3>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0xfff8>; -- next-level-cache = <&l2>; -- }; -- -- l2: l2-cache0 { -- compatible = "cache"; -- }; -- }; -- -- axi@81000000 { -- compatible = "simple-bus"; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges = <0x00 0x00 0x81000000 0x4000>; -- -- gic: interrupt-controller@1000 { -- compatible = "arm,gic-400"; -- #interrupt-cells = <3>; -- #address-cells = <0>; -- interrupt-controller; -- reg = <0x1000 0x1000>, -- <0x2000 0x2000>; -- }; -- }; -- -- timer { -- compatible = "arm,armv8-timer"; -- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; -- }; -- -- pmu { -- compatible = "arm,cortex-a53-pmu"; -- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, -- <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, -- <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, -- <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; -- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; -- }; -- -- clocks { -- periph_clk: periph_clk { -- compatible = "fixed-clock"; -- #clock-cells = <0>; -- clock-frequency = <50000000>; -- clock-output-names = "periph"; -- }; -- }; -- -- soc { -- compatible = "simple-bus"; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges = <0x00 0x00 0x80000000 0x281000>; -- -- enet: ethernet@2000 { -- compatible = "brcm,bcm4908-enet"; -- reg = <0x2000 0x1000>; -- -- interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, -- <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; -- interrupt-names = "rx", "tx"; -- }; -- -- usb_phy: usb-phy@c200 { -- compatible = "brcm,bcm4908-usb-phy"; -- reg = <0xc200 0x100>; -- reg-names = "ctrl"; -- power-domains = <&pmb BCM_PMB_HOST_USB>; -- dr_mode = "host"; -- brcm,has-xhci; -- brcm,has-eohci; -- #phy-cells = <1>; -- status = "disabled"; -- }; -- -- ehci: usb@c300 { -- compatible = "generic-ehci"; -- reg = <0xc300 0x100>; -- interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; -- phys = <&usb_phy PHY_TYPE_USB2>; -- status = "disabled"; -- }; -- -- ohci: usb@c400 { -- compatible = "generic-ohci"; -- reg = <0xc400 0x100>; -- interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; -- phys = <&usb_phy PHY_TYPE_USB2>; -- status = "disabled"; -- }; -- -- xhci: usb@d000 { -- compatible = "generic-xhci"; -- reg = <0xd000 0x8c8>; -- interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; -- phys = <&usb_phy PHY_TYPE_USB3>; -- status = "disabled"; -- }; -- -- bus@80000 { -- compatible = "simple-bus"; -- #size-cells = <1>; -- #address-cells = <1>; -- ranges = <0 0x80000 0x50000>; -- -- ethernet-switch@0 { -- compatible = "brcm,bcm4908-switch"; -- reg = <0x0 0x40000>, -- <0x40000 0x110>, -- <0x40340 0x30>, -- <0x40380 0x30>, -- <0x40600 0x34>, -- <0x40800 0x208>; -- reg-names = "core", "reg", "intrl2_0", -- "intrl2_1", "fcb", "acb"; -- interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, -- <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; -- brcm,num-gphy = <5>; -- brcm,num-rgmii-ports = <2>; -- -- #address-cells = <1>; -- #size-cells = <0>; -- -- ports: ports { -- #address-cells = <1>; -- #size-cells = <0>; -- -- port@0 { -- reg = <0>; -- phy-mode = "internal"; -- phy-handle = <&phy8>; -- }; -- -- port@1 { -- reg = <1>; -- phy-mode = "internal"; -- phy-handle = <&phy9>; -- }; -- -- port@2 { -- reg = <2>; -- phy-mode = "internal"; -- phy-handle = <&phy10>; -- }; -- -- port@3 { -- reg = <3>; -- phy-mode = "internal"; -- phy-handle = <&phy11>; -- }; -- -- port@8 { -- reg = <8>; -- phy-mode = "internal"; -- ethernet = <&enet>; -- -- fixed-link { -- speed = <1000>; -- full-duplex; -- }; -- }; -- }; -- }; -- -- mdio: mdio@405c0 { -- compatible = "brcm,unimac-mdio"; -- reg = <0x405c0 0x8>; -- reg-names = "mdio"; -- #size-cells = <0>; -- #address-cells = <1>; -- -- phy8: ethernet-phy@8 { -- reg = <8>; -- }; -- -- phy9: ethernet-phy@9 { -- reg = <9>; -- }; -- -- phy10: ethernet-phy@a { -- reg = <10>; -- }; -- -- phy11: ethernet-phy@b { -- reg = <11>; -- }; -- -- phy12: ethernet-phy@c { -- reg = <12>; -- }; -- }; -- }; -- -- procmon: syscon@280000 { -- compatible = "simple-bus"; -- reg = <0x280000 0x1000>; -- ranges; -- -- #address-cells = <1>; -- #size-cells = <1>; -- -- pmb: power-controller@2800c0 { -- compatible = "brcm,bcm4908-pmb"; -- reg = <0x2800c0 0x40>; -- #power-domain-cells = <1>; -- }; -- }; -- }; -- -- bus@ff800000 { -- compatible = "simple-bus"; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges = <0x00 0x00 0xff800000 0x3000>; -- -- twd: timer-mfd@400 { -- compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon"; -- reg = <0x400 0x4c>; -- ranges = <0x0 0x400 0x4c>; -- -- #address-cells = <1>; -- #size-cells = <1>; -- -- watchdog@28 { -- compatible = "brcm,bcm6345-wdt"; -- reg = <0x28 0x8>; -- }; -- }; -- -- gpio0: gpio-controller@500 { -- compatible = "brcm,bcm6345-gpio"; -- reg-names = "dirout", "dat"; -- reg = <0x500 0x28>, <0x528 0x28>; -- -- #gpio-cells = <2>; -- gpio-controller; -- }; -- -- pinctrl@560 { -- compatible = "brcm,bcm4908-pinctrl"; -- reg = <0x560 0x10>; -- -- pins_led_0_a: led_0-a-pins { -- function = "led_0"; -- groups = "led_0_grp_a"; -- }; -- -- pins_led_1_a: led_1-a-pins { -- function = "led_1"; -- groups = "led_1_grp_a"; -- }; -- -- pins_led_2_a: led_2-a-pins { -- function = "led_2"; -- groups = "led_2_grp_a"; -- }; -- -- pins_led_3_a: led_3-a-pins { -- function = "led_3"; -- groups = "led_3_grp_a"; -- }; -- -- pins_led_4_a: led_4-a-pins { -- function = "led_4"; -- groups = "led_4_grp_a"; -- }; -- -- pins_led_5_a: led_5-a-pins { -- function = "led_5"; -- groups = "led_5_grp_a"; -- }; -- -- pins_led_6_a: led_6-a-pins { -- function = "led_6"; -- groups = "led_6_grp_a"; -- }; -- -- pins_led_7_a: led_7-a-pins { -- function = "led_7"; -- groups = "led_7_grp_a"; -- }; -- -- pins_led_8_a: led_8-a-pins { -- function = "led_8"; -- groups = "led_8_grp_a"; -- }; -- -- pins_led_9_a: led_9-a-pins { -- function = "led_9"; -- groups = "led_9_grp_a"; -- }; -- -- pins_led_10_a: led_10-a-pins { -- function = "led_10"; -- groups = "led_10_grp_a"; -- }; -- -- pins_led_11_a: led_11-a-pins { -- function = "led_11"; -- groups = "led_11_grp_a"; -- }; -- -- pins_led_12_a: led_12-a-pins { -- function = "led_12"; -- groups = "led_12_grp_a"; -- }; -- -- pins_led_13_a: led_13-a-pins { -- function = "led_13"; -- groups = "led_13_grp_a"; -- }; -- -- pins_led_14_a: led_14-a-pins { -- function = "led_14"; -- groups = "led_14_grp_a"; -- }; -- -- pins_led_15_a: led_15-a-pins { -- function = "led_15"; -- groups = "led_15_grp_a"; -- }; -- -- pins_led_16_a: led_16-a-pins { -- function = "led_16"; -- groups = "led_16_grp_a"; -- }; -- -- pins_led_17_a: led_17-a-pins { -- function = "led_17"; -- groups = "led_17_grp_a"; -- }; -- -- pins_led_18_a: led_18-a-pins { -- function = "led_18"; -- groups = "led_18_grp_a"; -- }; -- -- pins_led_19_a: led_19-a-pins { -- function = "led_19"; -- groups = "led_19_grp_a"; -- }; -- -- pins_led_20_a: led_20-a-pins { -- function = "led_20"; -- groups = "led_20_grp_a"; -- }; -- -- pins_led_21_a: led_21-a-pins { -- function = "led_21"; -- groups = "led_21_grp_a"; -- }; -- -- pins_led_22_a: led_22-a-pins { -- function = "led_22"; -- groups = "led_22_grp_a"; -- }; -- -- pins_led_23_a: led_23-a-pins { -- function = "led_23"; -- groups = "led_23_grp_a"; -- }; -- -- pins_led_24_a: led_24-a-pins { -- function = "led_24"; -- groups = "led_24_grp_a"; -- }; -- -- pins_led_25_a: led_25-a-pins { -- function = "led_25"; -- groups = "led_25_grp_a"; -- }; -- -- pins_led_26_a: led_26-a-pins { -- function = "led_26"; -- groups = "led_26_grp_a"; -- }; -- -- pins_led_27_a: led_27-a-pins { -- function = "led_27"; -- groups = "led_27_grp_a"; -- }; -- -- pins_led_28_a: led_28-a-pins { -- function = "led_28"; -- groups = "led_28_grp_a"; -- }; -- -- pins_led_29_a: led_29-a-pins { -- function = "led_29"; -- groups = "led_29_grp_a"; -- }; -- -- pins_led_30_a: led_30-a-pins { -- function = "led_30"; -- groups = "led_30_grp_a"; -- }; -- -- pins_led_31_a: led_31-a-pins { -- function = "led_31"; -- groups = "led_31_grp_a"; -- }; -- -- pins_hs_uart: hs_uart-pins { -- function = "hs_uart"; -- groups = "hs_uart_grp"; -- }; -- -- pins_i2c_a: i2c-a-pins { -- function = "i2c"; -- groups = "i2c_grp_a"; -- }; -- -- pins_i2c_b: i2c-b-pins { -- function = "i2c"; -- groups = "i2c_grp_b"; -- }; -- -- pins_i2s: i2s-pins { -- function = "i2s"; -- groups = "i2s_grp"; -- }; -- -- pins_nand_ctrl: nand_ctrl-pins { -- function = "nand_ctrl"; -- groups = "nand_ctrl_grp"; -- }; -- -- pins_nand_data: nand_data-pins { -- function = "nand_data"; -- groups = "nand_data_grp"; -- }; -- -- pins_emmc_ctrl: emmc_ctrl-pins { -- function = "emmc_ctrl"; -- groups = "emmc_ctrl_grp"; -- }; -- -- pins_usb0_pwr: usb0_pwr-pins { -- function = "usb0_pwr"; -- groups = "usb0_pwr_grp"; -- }; -- -- pins_usb1_pwr: usb1_pwr-pins { -- function = "usb1_pwr"; -- groups = "usb1_pwr_grp"; -- }; -- }; -- -- uart0: serial@640 { -- compatible = "brcm,bcm6345-uart"; -- reg = <0x640 0x18>; -- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; -- clocks = <&periph_clk>; -- clock-names = "refclk"; -- status = "okay"; -- }; -- -- leds: leds@800 { -- compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds"; -- reg = <0x800 0xdc>; -- -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- nand-controller@1800 { -- #address-cells = <1>; -- #size-cells = <0>; -- compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; -- reg = <0x1800 0x600>, <0x2000 0x10>; -- reg-names = "nand", "nand-int-base"; -- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; -- interrupt-names = "nand"; -- status = "okay"; -- -- nandcs: nand@0 { -- compatible = "brcm,nandcs"; -- reg = <0>; -- }; -- }; -- -- i2c@2100 { -- compatible = "brcm,brcmper-i2c"; -- reg = <0x2100 0x58>; -- clock-frequency = <97500>; -- pinctrl-names = "default"; -- pinctrl-0 = <&pins_i2c_a>; -- status = "disabled"; -- }; -- -- misc@2600 { -- compatible = "brcm,misc", "simple-mfd"; -- reg = <0x2600 0xe4>; -- -- #address-cells = <1>; -- #size-cells = <1>; -- ranges = <0x00 0x2600 0xe4>; -- -- reset-controller@2644 { -- compatible = "brcm,bcm4908-misc-pcie-reset"; -- reg = <0x44 0x04>; -- #reset-cells = <1>; -- }; -- }; -- }; -- -- reboot { -- compatible = "syscon-reboot"; -- regmap = <&twd>; -- offset = <0x34>; -- mask = <1>; -- }; --}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts -@@ -0,0 +1,157 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+ -+#include <dt-bindings/gpio/gpio.h> -+#include <dt-bindings/input/input.h> -+#include <dt-bindings/leds/common.h> -+ -+#include "bcm4906.dtsi" -+ -+/ { -+ compatible = "netgear,r8000p", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca"; -+ model = "Netgear R8000P"; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x00 0x00 0x00 0x20000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led-power-white { -+ function = LED_FUNCTION_POWER; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-power-amber { -+ function = LED_FUNCTION_POWER; -+ color = <LED_COLOR_ID_AMBER>; -+ gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-wps { -+ function = LED_FUNCTION_WPS; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-2ghz { -+ function = "2ghz"; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-5ghz-1 { -+ function = "5ghz-1"; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-5ghz-2 { -+ function = "5ghz-2"; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-usb2 { -+ function = "usb2"; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-usb3 { -+ function = "usb3"; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-wifi { -+ function = "wifi"; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 56 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&enet { -+ nvmem-cells = <&base_mac_addr>; -+ nvmem-cell-names = "mac-address"; -+}; -+ -+&usb_phy { -+ brcm,ioc = <1>; -+ status = "okay"; -+}; -+ -+&ehci { -+ status = "okay"; -+}; -+ -+&ohci { -+ status = "okay"; -+}; -+ -+&xhci { -+ status = "okay"; -+}; -+ -+&ports { -+ port@0 { -+ label = "lan4"; -+ }; -+ -+ port@1 { -+ label = "lan3"; -+ }; -+ -+ port@2 { -+ label = "lan2"; -+ }; -+ -+ port@3 { -+ label = "lan1"; -+ }; -+ -+ port@7 { -+ reg = <7>; -+ phy-mode = "internal"; -+ phy-handle = <&phy12>; -+ label = "wan"; -+ }; -+}; -+ -+&nandcs { -+ nand-ecc-strength = <4>; -+ nand-ecc-step-size = <512>; -+ nand-on-flash-bbt; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ compatible = "nvmem-cells"; -+ label = "cferom"; -+ reg = <0x0 0x100000>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x0 0x100000>; -+ -+ base_mac_addr: mac@106a0 { -+ reg = <0x106a0 0x6>; -+ }; -+ }; -+ -+ partition@100000 { -+ compatible = "brcm,bcm4908-firmware"; -+ label = "firmware"; -+ reg = <0x100000 0x4400000>; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts -@@ -0,0 +1,182 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+ -+#include <dt-bindings/gpio/gpio.h> -+#include <dt-bindings/input/input.h> -+#include <dt-bindings/leds/common.h> -+ -+#include "bcm4906.dtsi" -+ -+/ { -+ compatible = "tplink,archer-c2300-v1", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca"; -+ model = "TP-Link Archer C2300 V1"; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x00 0x00 0x00 0x20000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led-power { -+ function = LED_FUNCTION_POWER; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-2ghz { -+ function = "2ghz"; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-5ghz { -+ function = "5ghz"; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-wan-amber { -+ function = LED_FUNCTION_WAN; -+ color = <LED_COLOR_ID_AMBER>; -+ gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ led-wan-blue { -+ function = LED_FUNCTION_WAN; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-lan { -+ function = LED_FUNCTION_LAN; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-wps { -+ function = LED_FUNCTION_WPS; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-usb2 { -+ function = "usb2"; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-usb3 { -+ function = "usbd3"; -+ color = <LED_COLOR_ID_BLUE>; -+ gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; -+ }; -+ -+ led-brightness { -+ function = LED_FUNCTION_BACKLIGHT; -+ color = <LED_COLOR_ID_WHITE>; -+ gpios = <&gpio0 19 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+ -+ gpio-keys-polled { -+ compatible = "gpio-keys-polled"; -+ poll-interval = <100>; -+ -+ key-brightness { -+ label = "LEDs"; -+ linux,code = <KEY_BRIGHTNESS_ZERO>; -+ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; -+ }; -+ -+ key-wps { -+ label = "WPS"; -+ linux,code = <KEY_WPS_BUTTON>; -+ gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; -+ }; -+ -+ key-wifi { -+ label = "WiFi"; -+ linux,code = <KEY_RFKILL>; -+ gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; -+ }; -+ -+ key-restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&usb_phy { -+ brcm,ioc = <1>; -+ status = "okay"; -+}; -+ -+&ehci { -+ status = "okay"; -+}; -+ -+&ohci { -+ status = "okay"; -+}; -+ -+&xhci { -+ status = "okay"; -+}; -+ -+&ports { -+ port@0 { -+ label = "lan4"; -+ }; -+ -+ port@1 { -+ label = "lan3"; -+ }; -+ -+ port@2 { -+ label = "lan2"; -+ }; -+ -+ port@3 { -+ label = "lan1"; -+ }; -+ -+ port@7 { -+ reg = <7>; -+ phy-mode = "internal"; -+ phy-handle = <&phy12>; -+ label = "wan"; -+ }; -+}; -+ -+&nandcs { -+ nand-ecc-strength = <4>; -+ nand-ecc-step-size = <512>; -+ nand-on-flash-bbt; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ partitions { -+ compatible = "brcm,bcm4908-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ label = "cferom"; -+ reg = <0x0 0x100000>; -+ }; -+ -+ partition@100000 { -+ compatible = "brcm,bcm4908-firmware"; -+ reg = <0x100000 0x3900000>; -+ }; -+ -+ partition@5800000 { -+ compatible = "brcm,bcm4908-firmware"; -+ reg = <0x3a00000 0x3900000>; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906.dtsi -@@ -0,0 +1,26 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+ -+#include "bcm4908.dtsi" -+ -+/ { -+ cpus { -+ /delete-node/ cpu@2; -+ -+ /delete-node/ cpu@3; -+ }; -+ -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; -+ }; -+ -+ pmu { -+ compatible = "arm,cortex-a53-pmu"; -+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-affinity = <&cpu0>, <&cpu1>; -+ }; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts -@@ -0,0 +1,207 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+ -+#include <dt-bindings/gpio/gpio.h> -+#include <dt-bindings/input/input.h> -+#include <dt-bindings/leds/common.h> -+ -+#include "bcm4908.dtsi" -+ -+/ { -+ compatible = "asus,gt-ac5300", "brcm,bcm4908", "brcm,bcmbca"; -+ model = "Asus GT-AC5300"; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x00 0x00 0x00 0x40000000>; -+ }; -+ -+ gpio-keys-polled { -+ compatible = "gpio-keys-polled"; -+ poll-interval = <100>; -+ -+ key-wifi { -+ label = "WiFi"; -+ linux,code = <KEY_RFKILL>; -+ gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; -+ }; -+ -+ key-wps { -+ label = "WPS"; -+ linux,code = <KEY_WPS_BUTTON>; -+ gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; -+ }; -+ -+ key-restart { -+ label = "Reset"; -+ linux,code = <KEY_RESTART>; -+ gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; -+ }; -+ -+ key-brightness { -+ label = "LEDs"; -+ linux,code = <KEY_BRIGHTNESS_ZERO>; -+ gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&enet { -+ nvmem-cells = <&base_mac_addr>; -+ nvmem-cell-names = "mac-address"; -+}; -+ -+&usb_phy { -+ brcm,ioc = <1>; -+ status = "okay"; -+}; -+ -+&ehci { -+ status = "okay"; -+}; -+ -+&ohci { -+ status = "okay"; -+}; -+ -+&xhci { -+ status = "okay"; -+}; -+ -+&ports { -+ port@0 { -+ label = "lan2"; -+ }; -+ -+ port@1 { -+ label = "lan1"; -+ }; -+ -+ port@2 { -+ label = "lan6"; -+ }; -+ -+ port@3 { -+ label = "lan5"; -+ }; -+ -+ /* External BCM53134S switch */ -+ port@7 { -+ label = "sw"; -+ reg = <7>; -+ phy-mode = "rgmii"; -+ -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ }; -+ }; -+}; -+ -+&mdio { -+ /* lan8 */ -+ ethernet-phy@0 { -+ reg = <0>; -+ }; -+ -+ /* lan7 */ -+ ethernet-phy@1 { -+ reg = <1>; -+ }; -+ -+ /* lan4 */ -+ ethernet-phy@2 { -+ reg = <2>; -+ }; -+ -+ /* lan3 */ -+ ethernet-phy@3 { -+ reg = <3>; -+ }; -+}; -+ -+&leds { -+ led-power@11 { -+ reg = <0x11>; -+ function = LED_FUNCTION_POWER; -+ color = <LED_COLOR_ID_WHITE>; -+ default-state = "on"; -+ active-low; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pins_led_17_a>; -+ }; -+ -+ led-wan-red@12 { -+ reg = <0x12>; -+ function = LED_FUNCTION_WAN; -+ color = <LED_COLOR_ID_RED>; -+ active-low; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pins_led_18_a>; -+ }; -+ -+ led-wps@14 { -+ reg = <0x14>; -+ function = LED_FUNCTION_WPS; -+ color = <LED_COLOR_ID_WHITE>; -+ active-low; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pins_led_20_a>; -+ }; -+ -+ led-wan-white@15 { -+ reg = <0x15>; -+ function = LED_FUNCTION_WAN; -+ color = <LED_COLOR_ID_WHITE>; -+ active-low; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pins_led_21_a>; -+ }; -+ -+ led-lan@19 { -+ reg = <0x19>; -+ function = LED_FUNCTION_LAN; -+ color = <LED_COLOR_ID_WHITE>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pins_led_25_a>; -+ }; -+}; -+ -+&nandcs { -+ nand-ecc-strength = <4>; -+ nand-ecc-step-size = <512>; -+ nand-on-flash-bbt; -+ brcm,nand-has-wp; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ partitions { -+ compatible = "brcm,bcm4908-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ compatible = "nvmem-cells"; -+ label = "cferom"; -+ reg = <0x0 0x100000>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0 0x0 0x100000>; -+ -+ base_mac_addr: mac@106a0 { -+ reg = <0x106a0 0x6>; -+ }; -+ }; -+ -+ partition@100000 { -+ compatible = "brcm,bcm4908-firmware"; -+ reg = <0x100000 0x5700000>; -+ }; -+ -+ partition@5800000 { -+ compatible = "brcm,bcm4908-firmware"; -+ reg = <0x5800000 0x5700000>; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-netgear-raxe500.dts -@@ -0,0 +1,50 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+ -+#include "bcm4908.dtsi" -+ -+/ { -+ compatible = "netgear,raxe500", "brcm,bcm4908", "brcm,bcmbca"; -+ model = "Netgear RAXE500"; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x00 0x00 0x00 0x40000000>; -+ }; -+}; -+ -+&ehci { -+ status = "okay"; -+}; -+ -+&ohci { -+ status = "okay"; -+}; -+ -+&xhci { -+ status = "okay"; -+}; -+ -+&ports { -+ port@0 { -+ label = "lan4"; -+ }; -+ -+ port@1 { -+ label = "lan3"; -+ }; -+ -+ port@2 { -+ label = "lan2"; -+ }; -+ -+ port@3 { -+ label = "lan1"; -+ }; -+ -+ port@7 { -+ reg = <7>; -+ phy-mode = "internal"; -+ phy-handle = <&phy12>; -+ label = "wan"; -+ }; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -@@ -0,0 +1,575 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+ -+#include <dt-bindings/interrupt-controller/irq.h> -+#include <dt-bindings/interrupt-controller/arm-gic.h> -+#include <dt-bindings/phy/phy.h> -+#include <dt-bindings/soc/bcm-pmb.h> -+ -+/dts-v1/; -+ -+/ { -+ interrupt-parent = <&gic>; -+ -+ #address-cells = <2>; -+ #size-cells = <2>; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ cpu0: cpu@0 { -+ device_type = "cpu"; -+ compatible = "brcm,brahma-b53"; -+ reg = <0x0>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0xfff8>; -+ next-level-cache = <&l2>; -+ }; -+ -+ cpu1: cpu@1 { -+ device_type = "cpu"; -+ compatible = "brcm,brahma-b53"; -+ reg = <0x1>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0xfff8>; -+ next-level-cache = <&l2>; -+ }; -+ -+ cpu2: cpu@2 { -+ device_type = "cpu"; -+ compatible = "brcm,brahma-b53"; -+ reg = <0x2>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0xfff8>; -+ next-level-cache = <&l2>; -+ }; -+ -+ cpu3: cpu@3 { -+ device_type = "cpu"; -+ compatible = "brcm,brahma-b53"; -+ reg = <0x3>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0xfff8>; -+ next-level-cache = <&l2>; -+ }; -+ -+ l2: l2-cache0 { -+ compatible = "cache"; -+ }; -+ }; -+ -+ axi@81000000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x00 0x00 0x81000000 0x4000>; -+ -+ gic: interrupt-controller@1000 { -+ compatible = "arm,gic-400"; -+ #interrupt-cells = <3>; -+ #address-cells = <0>; -+ interrupt-controller; -+ reg = <0x1000 0x1000>, -+ <0x2000 0x2000>; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; -+ }; -+ -+ pmu { -+ compatible = "arm,cortex-a53-pmu"; -+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; -+ }; -+ -+ clocks { -+ periph_clk: periph_clk { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <50000000>; -+ clock-output-names = "periph"; -+ }; -+ }; -+ -+ soc { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x00 0x00 0x80000000 0x281000>; -+ -+ enet: ethernet@2000 { -+ compatible = "brcm,bcm4908-enet"; -+ reg = <0x2000 0x1000>; -+ -+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "rx", "tx"; -+ }; -+ -+ usb_phy: usb-phy@c200 { -+ compatible = "brcm,bcm4908-usb-phy"; -+ reg = <0xc200 0x100>; -+ reg-names = "ctrl"; -+ power-domains = <&pmb BCM_PMB_HOST_USB>; -+ dr_mode = "host"; -+ brcm,has-xhci; -+ brcm,has-eohci; -+ #phy-cells = <1>; -+ status = "disabled"; -+ }; -+ -+ ehci: usb@c300 { -+ compatible = "generic-ehci"; -+ reg = <0xc300 0x100>; -+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; -+ phys = <&usb_phy PHY_TYPE_USB2>; -+ status = "disabled"; -+ }; -+ -+ ohci: usb@c400 { -+ compatible = "generic-ohci"; -+ reg = <0xc400 0x100>; -+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; -+ phys = <&usb_phy PHY_TYPE_USB2>; -+ status = "disabled"; -+ }; -+ -+ xhci: usb@d000 { -+ compatible = "generic-xhci"; -+ reg = <0xd000 0x8c8>; -+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; -+ phys = <&usb_phy PHY_TYPE_USB3>; -+ status = "disabled"; -+ }; -+ -+ bus@80000 { -+ compatible = "simple-bus"; -+ #size-cells = <1>; -+ #address-cells = <1>; -+ ranges = <0 0x80000 0x50000>; -+ -+ ethernet-switch@0 { -+ compatible = "brcm,bcm4908-switch"; -+ reg = <0x0 0x40000>, -+ <0x40000 0x110>, -+ <0x40340 0x30>, -+ <0x40380 0x30>, -+ <0x40600 0x34>, -+ <0x40800 0x208>; -+ reg-names = "core", "reg", "intrl2_0", -+ "intrl2_1", "fcb", "acb"; -+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; -+ brcm,num-gphy = <5>; -+ brcm,num-rgmii-ports = <2>; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ports: ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ phy-mode = "internal"; -+ phy-handle = <&phy8>; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ phy-mode = "internal"; -+ phy-handle = <&phy9>; -+ }; -+ -+ port@2 { -+ reg = <2>; -+ phy-mode = "internal"; -+ phy-handle = <&phy10>; -+ }; -+ -+ port@3 { -+ reg = <3>; -+ phy-mode = "internal"; -+ phy-handle = <&phy11>; -+ }; -+ -+ port@8 { -+ reg = <8>; -+ phy-mode = "internal"; -+ ethernet = <&enet>; -+ -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ }; -+ }; -+ }; -+ }; -+ -+ mdio: mdio@405c0 { -+ compatible = "brcm,unimac-mdio"; -+ reg = <0x405c0 0x8>; -+ reg-names = "mdio"; -+ #size-cells = <0>; -+ #address-cells = <1>; -+ -+ phy8: ethernet-phy@8 { -+ reg = <8>; -+ }; -+ -+ phy9: ethernet-phy@9 { -+ reg = <9>; -+ }; -+ -+ phy10: ethernet-phy@a { -+ reg = <10>; -+ }; -+ -+ phy11: ethernet-phy@b { -+ reg = <11>; -+ }; -+ -+ phy12: ethernet-phy@c { -+ reg = <12>; -+ }; -+ }; -+ }; -+ -+ procmon: syscon@280000 { -+ compatible = "simple-bus"; -+ reg = <0x280000 0x1000>; -+ ranges; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ pmb: power-controller@2800c0 { -+ compatible = "brcm,bcm4908-pmb"; -+ reg = <0x2800c0 0x40>; -+ #power-domain-cells = <1>; -+ }; -+ }; -+ }; -+ -+ bus@ff800000 { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x00 0x00 0xff800000 0x3000>; -+ -+ twd: timer-mfd@400 { -+ compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon"; -+ reg = <0x400 0x4c>; -+ ranges = <0x0 0x400 0x4c>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ watchdog@28 { -+ compatible = "brcm,bcm6345-wdt"; -+ reg = <0x28 0x8>; -+ }; -+ }; -+ -+ gpio0: gpio-controller@500 { -+ compatible = "brcm,bcm6345-gpio"; -+ reg-names = "dirout", "dat"; -+ reg = <0x500 0x28>, <0x528 0x28>; -+ -+ #gpio-cells = <2>; -+ gpio-controller; -+ }; -+ -+ pinctrl@560 { -+ compatible = "brcm,bcm4908-pinctrl"; -+ reg = <0x560 0x10>; -+ -+ pins_led_0_a: led_0-a-pins { -+ function = "led_0"; -+ groups = "led_0_grp_a"; -+ }; -+ -+ pins_led_1_a: led_1-a-pins { -+ function = "led_1"; -+ groups = "led_1_grp_a"; -+ }; -+ -+ pins_led_2_a: led_2-a-pins { -+ function = "led_2"; -+ groups = "led_2_grp_a"; -+ }; -+ -+ pins_led_3_a: led_3-a-pins { -+ function = "led_3"; -+ groups = "led_3_grp_a"; -+ }; -+ -+ pins_led_4_a: led_4-a-pins { -+ function = "led_4"; -+ groups = "led_4_grp_a"; -+ }; -+ -+ pins_led_5_a: led_5-a-pins { -+ function = "led_5"; -+ groups = "led_5_grp_a"; -+ }; -+ -+ pins_led_6_a: led_6-a-pins { -+ function = "led_6"; -+ groups = "led_6_grp_a"; -+ }; -+ -+ pins_led_7_a: led_7-a-pins { -+ function = "led_7"; -+ groups = "led_7_grp_a"; -+ }; -+ -+ pins_led_8_a: led_8-a-pins { -+ function = "led_8"; -+ groups = "led_8_grp_a"; -+ }; -+ -+ pins_led_9_a: led_9-a-pins { -+ function = "led_9"; -+ groups = "led_9_grp_a"; -+ }; -+ -+ pins_led_10_a: led_10-a-pins { -+ function = "led_10"; -+ groups = "led_10_grp_a"; -+ }; -+ -+ pins_led_11_a: led_11-a-pins { -+ function = "led_11"; -+ groups = "led_11_grp_a"; -+ }; -+ -+ pins_led_12_a: led_12-a-pins { -+ function = "led_12"; -+ groups = "led_12_grp_a"; -+ }; -+ -+ pins_led_13_a: led_13-a-pins { -+ function = "led_13"; -+ groups = "led_13_grp_a"; -+ }; -+ -+ pins_led_14_a: led_14-a-pins { -+ function = "led_14"; -+ groups = "led_14_grp_a"; -+ }; -+ -+ pins_led_15_a: led_15-a-pins { -+ function = "led_15"; -+ groups = "led_15_grp_a"; -+ }; -+ -+ pins_led_16_a: led_16-a-pins { -+ function = "led_16"; -+ groups = "led_16_grp_a"; -+ }; -+ -+ pins_led_17_a: led_17-a-pins { -+ function = "led_17"; -+ groups = "led_17_grp_a"; -+ }; -+ -+ pins_led_18_a: led_18-a-pins { -+ function = "led_18"; -+ groups = "led_18_grp_a"; -+ }; -+ -+ pins_led_19_a: led_19-a-pins { -+ function = "led_19"; -+ groups = "led_19_grp_a"; -+ }; -+ -+ pins_led_20_a: led_20-a-pins { -+ function = "led_20"; -+ groups = "led_20_grp_a"; -+ }; -+ -+ pins_led_21_a: led_21-a-pins { -+ function = "led_21"; -+ groups = "led_21_grp_a"; -+ }; -+ -+ pins_led_22_a: led_22-a-pins { -+ function = "led_22"; -+ groups = "led_22_grp_a"; -+ }; -+ -+ pins_led_23_a: led_23-a-pins { -+ function = "led_23"; -+ groups = "led_23_grp_a"; -+ }; -+ -+ pins_led_24_a: led_24-a-pins { -+ function = "led_24"; -+ groups = "led_24_grp_a"; -+ }; -+ -+ pins_led_25_a: led_25-a-pins { -+ function = "led_25"; -+ groups = "led_25_grp_a"; -+ }; -+ -+ pins_led_26_a: led_26-a-pins { -+ function = "led_26"; -+ groups = "led_26_grp_a"; -+ }; -+ -+ pins_led_27_a: led_27-a-pins { -+ function = "led_27"; -+ groups = "led_27_grp_a"; -+ }; -+ -+ pins_led_28_a: led_28-a-pins { -+ function = "led_28"; -+ groups = "led_28_grp_a"; -+ }; -+ -+ pins_led_29_a: led_29-a-pins { -+ function = "led_29"; -+ groups = "led_29_grp_a"; -+ }; -+ -+ pins_led_30_a: led_30-a-pins { -+ function = "led_30"; -+ groups = "led_30_grp_a"; -+ }; -+ -+ pins_led_31_a: led_31-a-pins { -+ function = "led_31"; -+ groups = "led_31_grp_a"; -+ }; -+ -+ pins_hs_uart: hs_uart-pins { -+ function = "hs_uart"; -+ groups = "hs_uart_grp"; -+ }; -+ -+ pins_i2c_a: i2c-a-pins { -+ function = "i2c"; -+ groups = "i2c_grp_a"; -+ }; -+ -+ pins_i2c_b: i2c-b-pins { -+ function = "i2c"; -+ groups = "i2c_grp_b"; -+ }; -+ -+ pins_i2s: i2s-pins { -+ function = "i2s"; -+ groups = "i2s_grp"; -+ }; -+ -+ pins_nand_ctrl: nand_ctrl-pins { -+ function = "nand_ctrl"; -+ groups = "nand_ctrl_grp"; -+ }; -+ -+ pins_nand_data: nand_data-pins { -+ function = "nand_data"; -+ groups = "nand_data_grp"; -+ }; -+ -+ pins_emmc_ctrl: emmc_ctrl-pins { -+ function = "emmc_ctrl"; -+ groups = "emmc_ctrl_grp"; -+ }; -+ -+ pins_usb0_pwr: usb0_pwr-pins { -+ function = "usb0_pwr"; -+ groups = "usb0_pwr_grp"; -+ }; -+ -+ pins_usb1_pwr: usb1_pwr-pins { -+ function = "usb1_pwr"; -+ groups = "usb1_pwr_grp"; -+ }; -+ }; -+ -+ uart0: serial@640 { -+ compatible = "brcm,bcm6345-uart"; -+ reg = <0x640 0x18>; -+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&periph_clk>; -+ clock-names = "refclk"; -+ status = "okay"; -+ }; -+ -+ leds: leds@800 { -+ compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds"; -+ reg = <0x800 0xdc>; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ nand-controller@1800 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; -+ reg = <0x1800 0x600>, <0x2000 0x10>; -+ reg-names = "nand", "nand-int-base"; -+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "nand"; -+ status = "okay"; -+ -+ nandcs: nand@0 { -+ compatible = "brcm,nandcs"; -+ reg = <0>; -+ }; -+ }; -+ -+ i2c@2100 { -+ compatible = "brcm,brcmper-i2c"; -+ reg = <0x2100 0x58>; -+ clock-frequency = <97500>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pins_i2c_a>; -+ status = "disabled"; -+ }; -+ -+ misc@2600 { -+ compatible = "brcm,misc", "simple-mfd"; -+ reg = <0x2600 0xe4>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges = <0x00 0x2600 0xe4>; -+ -+ reset-controller@2644 { -+ compatible = "brcm,bcm4908-misc-pcie-reset"; -+ reg = <0x44 0x04>; -+ #reset-cells = <1>; -+ }; -+ }; -+ }; -+ -+ reboot { -+ compatible = "syscon-reboot"; -+ regmap = <&twd>; -+ offset = <0x34>; -+ mask = <1>; -+ }; -+}; diff --git a/target/linux/bcm4908/patches-5.10/038-v6.1-0006-arm64-dts-Add-BCM4908-generic-board-dts.patch b/target/linux/bcm4908/patches-5.10/038-v6.1-0006-arm64-dts-Add-BCM4908-generic-board-dts.patch deleted file mode 100644 index b19c5d33b4..0000000000 --- a/target/linux/bcm4908/patches-5.10/038-v6.1-0006-arm64-dts-Add-BCM4908-generic-board-dts.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 72e0bdb6d7edb1785d58f2e8e7c80e1d2f93a319 Mon Sep 17 00:00:00 2001 -From: William Zhang <william.zhang@broadcom.com> -Date: Wed, 3 Aug 2022 10:54:51 -0700 -Subject: [PATCH] arm64: dts: Add BCM4908 generic board dts - -Add generic bare bone bcm94908.dts file to support any 4908 based -design. It supports cpu subsystem, memory and an uart console. This can -be useful for board bring-up and cpu subsystem and memory related kernel -test as well. - -Signed-off-by: William Zhang <william.zhang@broadcom.com> -Link: https://lore.kernel.org/r/20220803175455.47638-6-william.zhang@broadcom.com -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 1 + - .../boot/dts/broadcom/bcmbca/bcm94908.dts | 30 +++++++++++++++++++ - 2 files changed, 31 insertions(+) - create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile -@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_BCMBCA) += \ - bcm4906-tplink-archer-c2300-v1.dtb \ - bcm4908-asus-gt-ac5300.dtb \ - bcm4908-netgear-raxe500.dtb \ -+ bcm94908.dtb \ - bcm4912-asus-gt-ax6000.dtb \ - bcm94912.dtb \ - bcm963158.dtb \ ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts -@@ -0,0 +1,30 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright 2022 Broadcom Ltd. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4908.dtsi" -+ -+/ { -+ model = "Broadcom BCM94908 Reference Board"; -+ compatible = "brcm,bcm94908", "brcm,bcm4908", "brcm,bcmbca"; -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0 0x08000000>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; diff --git a/target/linux/bcm4908/patches-5.10/039-v6.2-0001-arm64-dts-broadcom-bcmbca-bcm4908-add-TWD-block-time.patch b/target/linux/bcm4908/patches-5.10/039-v6.2-0001-arm64-dts-broadcom-bcmbca-bcm4908-add-TWD-block-time.patch deleted file mode 100644 index a3f49ca440..0000000000 --- a/target/linux/bcm4908/patches-5.10/039-v6.2-0001-arm64-dts-broadcom-bcmbca-bcm4908-add-TWD-block-time.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 68064196cffea33f090bd2e8d81cd5e20107ecf1 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 3 Nov 2022 11:53:16 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: add TWD block timer -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 TWD contains block with 4 timers. Add binding for it. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/r/20221103105316.21294-1-zajec5@gmail.com -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -@@ -283,6 +283,11 @@ - #address-cells = <1>; - #size-cells = <1>; - -+ timer@0 { -+ compatible = "brcm,bcm63138-timer"; -+ reg = <0x0 0x28>; -+ }; -+ - watchdog@28 { - compatible = "brcm,bcm6345-wdt"; - reg = <0x28 0x8>; diff --git a/target/linux/bcm4908/patches-5.10/039-v6.2-0002-arm64-dts-broadcom-bcmbca-bcm6858-add-TWD-block.patch b/target/linux/bcm4908/patches-5.10/039-v6.2-0002-arm64-dts-broadcom-bcmbca-bcm6858-add-TWD-block.patch deleted file mode 100644 index e8e81ae544..0000000000 --- a/target/linux/bcm4908/patches-5.10/039-v6.2-0002-arm64-dts-broadcom-bcmbca-bcm6858-add-TWD-block.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 4f9fb09175e87a233787a2dee1e5dabb14deb022 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 3 Nov 2022 12:00:15 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm6858: add TWD block -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM6858 contains TWD block with timers, watchdog, and reset subblocks. -Describe it. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/r/20221103110015.21761-1-zajec5@gmail.com -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 19 +++++++++++++++++++ - 1 file changed, 19 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi -@@ -109,6 +109,25 @@ - #size-cells = <1>; - ranges = <0x0 0x0 0xff800000 0x62000>; - -+ twd: timer-mfd@400 { -+ compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon"; -+ reg = <0x400 0x4c>; -+ ranges = <0x0 0x400 0x4c>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ timer@0 { -+ compatible = "brcm,bcm63138-timer"; -+ reg = <0x0 0x28>; -+ }; -+ -+ watchdog@28 { -+ compatible = "brcm,bcm6345-wdt"; -+ reg = <0x28 0x8>; -+ }; -+ }; -+ - uart0: serial@640 { - compatible = "brcm,bcm6345-uart"; - reg = <0x640 0x18>; diff --git a/target/linux/bcm4908/patches-5.10/039-v6.2-0003-arm64-dts-Update-cache-properties-for-broadcom.patch b/target/linux/bcm4908/patches-5.10/039-v6.2-0003-arm64-dts-Update-cache-properties-for-broadcom.patch deleted file mode 100644 index a19ab8cf8f..0000000000 --- a/target/linux/bcm4908/patches-5.10/039-v6.2-0003-arm64-dts-Update-cache-properties-for-broadcom.patch +++ /dev/null @@ -1,134 +0,0 @@ -From e567e58d6819adc002c57b81e16b88da24d3b4aa Mon Sep 17 00:00:00 2001 -From: Pierre Gondois <pierre.gondois@arm.com> -Date: Tue, 22 Nov 2022 17:32:07 +0100 -Subject: [PATCH] arm64: dts: Update cache properties for broadcom - -The DeviceTree Specification v0.3 specifies that the cache node -'compatible' and 'cache-level' properties are 'required'. Cf. -s3.8 Multi-level and Shared Cache Nodes -The 'cache-unified' property should be present if one of the -properties for unified cache is present ('cache-size', ...). - -Update the Device Trees accordingly. - -Acked-by: William Zhang <william.zhang@broadcom.com> -Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> -Link: https://lore.kernel.org/r/20221122163208.3810985-3-pierre.gondois@arm.com -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 1 + - arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 1 + - arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi | 1 + - arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi | 1 + - arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 1 + - arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 1 + - arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 1 + - arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 1 + - arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 4 ++++ - 9 files changed, 12 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -@@ -63,6 +63,7 @@ - - l2: l2-cache0 { - compatible = "cache"; -+ cache-level = <2>; - }; - }; - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi -@@ -51,6 +51,7 @@ - - L2_0: l2-cache0 { - compatible = "cache"; -+ cache-level = <2>; - }; - }; - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi -@@ -35,6 +35,7 @@ - - L2_0: l2-cache0 { - compatible = "cache"; -+ cache-level = <2>; - }; - }; - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi -@@ -51,6 +51,7 @@ - - L2_0: l2-cache0 { - compatible = "cache"; -+ cache-level = <2>; - }; - }; - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi -@@ -51,6 +51,7 @@ - - L2_0: l2-cache0 { - compatible = "cache"; -+ cache-level = <2>; - }; - }; - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi -@@ -35,6 +35,7 @@ - - L2_0: l2-cache0 { - compatible = "cache"; -+ cache-level = <2>; - }; - }; - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi -@@ -50,6 +50,7 @@ - }; - L2_0: l2-cache0 { - compatible = "cache"; -+ cache-level = <2>; - }; - }; - ---- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi -+++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi -@@ -79,6 +79,7 @@ - - CLUSTER0_L2: l2-cache@0 { - compatible = "cache"; -+ cache-level = <2>; - }; - }; - ---- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi -+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi -@@ -108,18 +108,22 @@ - - CLUSTER0_L2: l2-cache@0 { - compatible = "cache"; -+ cache-level = <2>; - }; - - CLUSTER1_L2: l2-cache@100 { - compatible = "cache"; -+ cache-level = <2>; - }; - - CLUSTER2_L2: l2-cache@200 { - compatible = "cache"; -+ cache-level = <2>; - }; - - CLUSTER3_L2: l2-cache@300 { - compatible = "cache"; -+ cache-level = <2>; - }; - }; - diff --git a/target/linux/bcm4908/patches-5.10/040-v6.1-mtd-parsers-add-Broadcom-s-U-Boot-parser.patch b/target/linux/bcm4908/patches-5.10/040-v6.1-mtd-parsers-add-Broadcom-s-U-Boot-parser.patch deleted file mode 100644 index 4d4059b17f..0000000000 --- a/target/linux/bcm4908/patches-5.10/040-v6.1-mtd-parsers-add-Broadcom-s-U-Boot-parser.patch +++ /dev/null @@ -1,137 +0,0 @@ -From 002181f5b150e60c77f21de7ad4dd10e4614cd91 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Mon, 11 Jul 2022 17:30:41 +0200 -Subject: [PATCH] mtd: parsers: add Broadcom's U-Boot parser -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Broadcom stores environment variables blocks inside U-Boot partition -itself. This driver finds & registers them. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> -Link: https://lore.kernel.org/linux-mtd/20220711153041.6036-2-zajec5@gmail.com ---- - drivers/mtd/parsers/Kconfig | 10 ++++ - drivers/mtd/parsers/Makefile | 1 + - drivers/mtd/parsers/brcm_u-boot.c | 84 +++++++++++++++++++++++++++++++ - 3 files changed, 95 insertions(+) - create mode 100644 drivers/mtd/parsers/brcm_u-boot.c - ---- a/drivers/mtd/parsers/Kconfig -+++ b/drivers/mtd/parsers/Kconfig -@@ -20,6 +20,16 @@ config MTD_BCM63XX_PARTS - This provides partition parsing for BCM63xx devices with CFE - bootloaders. - -+config MTD_BRCM_U_BOOT -+ tristate "Broadcom's U-Boot partition parser" -+ depends on ARCH_BCM4908 || COMPILE_TEST -+ help -+ Broadcom uses a custom way of storing U-Boot environment variables. -+ They are placed inside U-Boot partition itself at unspecified offset. -+ It's possible to locate them by looking for a custom header with a -+ magic value. This driver does that and creates subpartitions for -+ each found environment variables block. -+ - config MTD_CMDLINE_PARTS - tristate "Command line partition table parsing" - depends on MTD ---- a/drivers/mtd/parsers/Makefile -+++ b/drivers/mtd/parsers/Makefile -@@ -2,6 +2,7 @@ - obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o - obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o - obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o -+obj-$(CONFIG_MTD_BRCM_U_BOOT) += brcm_u-boot.o - obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o - obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o - obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o ---- /dev/null -+++ b/drivers/mtd/parsers/brcm_u-boot.c -@@ -0,0 +1,84 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* -+ * Copyright © 2022 Rafał Miłecki <rafal@milecki.pl> -+ */ -+ -+#include <linux/module.h> -+#include <linux/kernel.h> -+#include <linux/slab.h> -+#include <linux/mtd/mtd.h> -+#include <linux/mtd/partitions.h> -+ -+#define BRCM_U_BOOT_MAX_OFFSET 0x200000 -+#define BRCM_U_BOOT_STEP 0x1000 -+ -+#define BRCM_U_BOOT_MAX_PARTS 2 -+ -+#define BRCM_U_BOOT_MAGIC 0x75456e76 /* uEnv */ -+ -+struct brcm_u_boot_header { -+ __le32 magic; -+ __le32 length; -+} __packed; -+ -+static const char *names[BRCM_U_BOOT_MAX_PARTS] = { -+ "u-boot-env", -+ "u-boot-env-backup", -+}; -+ -+static int brcm_u_boot_parse(struct mtd_info *mtd, -+ const struct mtd_partition **pparts, -+ struct mtd_part_parser_data *data) -+{ -+ struct brcm_u_boot_header header; -+ struct mtd_partition *parts; -+ size_t bytes_read; -+ size_t offset; -+ int err; -+ int i = 0; -+ -+ parts = kcalloc(BRCM_U_BOOT_MAX_PARTS, sizeof(*parts), GFP_KERNEL); -+ if (!parts) -+ return -ENOMEM; -+ -+ for (offset = 0; -+ offset < min_t(size_t, mtd->size, BRCM_U_BOOT_MAX_OFFSET); -+ offset += BRCM_U_BOOT_STEP) { -+ err = mtd_read(mtd, offset, sizeof(header), &bytes_read, (uint8_t *)&header); -+ if (err && !mtd_is_bitflip(err)) { -+ pr_err("Failed to read from %s at 0x%zx: %d\n", mtd->name, offset, err); -+ continue; -+ } -+ -+ if (le32_to_cpu(header.magic) != BRCM_U_BOOT_MAGIC) -+ continue; -+ -+ parts[i].name = names[i]; -+ parts[i].offset = offset; -+ parts[i].size = sizeof(header) + le32_to_cpu(header.length); -+ i++; -+ pr_info("offset:0x%zx magic:0x%08x BINGO\n", offset, header.magic); -+ -+ if (i == BRCM_U_BOOT_MAX_PARTS) -+ break; -+ } -+ -+ *pparts = parts; -+ -+ return i; -+}; -+ -+static const struct of_device_id brcm_u_boot_of_match_table[] = { -+ { .compatible = "brcm,u-boot" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, brcm_u_boot_of_match_table); -+ -+static struct mtd_part_parser brcm_u_boot_mtd_parser = { -+ .parse_fn = brcm_u_boot_parse, -+ .name = "brcm_u-boot", -+ .of_match_table = brcm_u_boot_of_match_table, -+}; -+module_mtd_part_parser(brcm_u_boot_mtd_parser); -+ -+MODULE_LICENSE("GPL"); diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0001-arm64-dts-broadcom-bcmbca-Add-spi-controller-node.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0001-arm64-dts-broadcom-bcmbca-Add-spi-controller-node.patch deleted file mode 100644 index e8e1228179..0000000000 --- a/target/linux/bcm4908/patches-5.10/040-v6.4-0001-arm64-dts-broadcom-bcmbca-Add-spi-controller-node.patch +++ /dev/null @@ -1,367 +0,0 @@ -From f5d83b714e304d5f3229da434af2eeea033c4f5d Mon Sep 17 00:00:00 2001 -From: William Zhang <william.zhang@broadcom.com> -Date: Mon, 6 Feb 2023 22:58:15 -0800 -Subject: [PATCH] arm64: dts: broadcom: bcmbca: Add spi controller node - -Add support for HSSPI controller in ARMv8 chip dts files. - -Signed-off-by: William Zhang <william.zhang@broadcom.com> -Link: https://lore.kernel.org/r/20230207065826.285013-5-william.zhang@broadcom.com -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../boot/dts/broadcom/bcmbca/bcm4908.dtsi | 18 +++++++++++++++++ - .../boot/dts/broadcom/bcmbca/bcm4912.dtsi | 20 +++++++++++++++++++ - .../boot/dts/broadcom/bcmbca/bcm63146.dtsi | 19 ++++++++++++++++++ - .../boot/dts/broadcom/bcmbca/bcm63158.dtsi | 19 ++++++++++++++++++ - .../boot/dts/broadcom/bcmbca/bcm6813.dtsi | 20 +++++++++++++++++++ - .../boot/dts/broadcom/bcmbca/bcm6856.dtsi | 18 +++++++++++++++++ - .../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 18 +++++++++++++++++ - .../boot/dts/broadcom/bcmbca/bcm94908.dts | 4 ++++ - .../boot/dts/broadcom/bcmbca/bcm94912.dts | 4 ++++ - .../boot/dts/broadcom/bcmbca/bcm963146.dts | 4 ++++ - .../boot/dts/broadcom/bcmbca/bcm963158.dts | 4 ++++ - .../boot/dts/broadcom/bcmbca/bcm96813.dts | 4 ++++ - .../boot/dts/broadcom/bcmbca/bcm96856.dts | 4 ++++ - .../boot/dts/broadcom/bcmbca/bcm96858.dts | 4 ++++ - 14 files changed, 160 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -@@ -107,6 +107,12 @@ - clock-frequency = <50000000>; - clock-output-names = "periph"; - }; -+ -+ hsspi_pll: hsspi-pll { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <400000000>; -+ }; - }; - - soc { -@@ -531,6 +537,18 @@ - #size-cells = <0>; - }; - -+ hsspi: spi@1000{ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "brcm,bcm4908-hsspi", "brcm,bcmbca-hsspi-v1.0"; -+ reg = <0x1000 0x600>; -+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&hsspi_pll &hsspi_pll>; -+ clock-names = "hsspi", "pll"; -+ num-cs = <8>; -+ status = "disabled"; -+ }; -+ - nand-controller@1800 { - #address-cells = <1>; - #size-cells = <0>; ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi -@@ -79,6 +79,7 @@ - #clock-cells = <0>; - clock-frequency = <200000000>; - }; -+ - uart_clk: uart-clk { - compatible = "fixed-factor-clock"; - #clock-cells = <0>; -@@ -86,6 +87,12 @@ - clock-div = <4>; - clock-mult = <1>; - }; -+ -+ hsspi_pll: hsspi-pll { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <200000000>; -+ }; - }; - - psci { -@@ -117,6 +124,19 @@ - #size-cells = <1>; - ranges = <0x0 0x0 0xff800000 0x800000>; - -+ hsspi: spi@1000 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "brcm,bcm4912-hsspi", "brcm,bcmbca-hsspi-v1.1"; -+ reg = <0x1000 0x600>, <0x2610 0x4>; -+ reg-names = "hsspi", "spim-ctrl"; -+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&hsspi_pll &hsspi_pll>; -+ clock-names = "hsspi", "pll"; -+ num-cs = <8>; -+ status = "disabled"; -+ }; -+ - uart0: serial@12000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x12000 0x1000>; ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi -@@ -60,6 +60,7 @@ - #clock-cells = <0>; - clock-frequency = <200000000>; - }; -+ - uart_clk: uart-clk { - compatible = "fixed-factor-clock"; - #clock-cells = <0>; -@@ -67,6 +68,12 @@ - clock-div = <4>; - clock-mult = <1>; - }; -+ -+ hsspi_pll: hsspi-pll { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <200000000>; -+ }; - }; - - psci { -@@ -99,6 +106,18 @@ - #size-cells = <1>; - ranges = <0x0 0x0 0xff800000 0x800000>; - -+ hsspi: spi@1000 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "brcm,bcm63146-hsspi", "brcm,bcmbca-hsspi-v1.0"; -+ reg = <0x1000 0x600>; -+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&hsspi_pll &hsspi_pll>; -+ clock-names = "hsspi", "pll"; -+ num-cs = <8>; -+ status = "disabled"; -+ }; -+ - uart0: serial@12000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x12000 0x1000>; ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi -@@ -79,6 +79,7 @@ - #clock-cells = <0>; - clock-frequency = <200000000>; - }; -+ - uart_clk: uart-clk { - compatible = "fixed-factor-clock"; - #clock-cells = <0>; -@@ -86,6 +87,12 @@ - clock-div = <4>; - clock-mult = <1>; - }; -+ -+ hsspi_pll: hsspi-pll { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <400000000>; -+ }; - }; - - psci { -@@ -117,6 +124,18 @@ - #size-cells = <1>; - ranges = <0x0 0x0 0xff800000 0x800000>; - -+ hsspi: spi@1000 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "brcm,bcm63158-hsspi", "brcm,bcmbca-hsspi-v1.0"; -+ reg = <0x1000 0x600>; -+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&hsspi_pll &hsspi_pll>; -+ clock-names = "hsspi", "pll"; -+ num-cs = <8>; -+ status = "disabled"; -+ }; -+ - uart0: serial@12000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x12000 0x1000>; ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi -@@ -79,6 +79,7 @@ - #clock-cells = <0>; - clock-frequency = <200000000>; - }; -+ - uart_clk: uart-clk { - compatible = "fixed-factor-clock"; - #clock-cells = <0>; -@@ -86,6 +87,12 @@ - clock-div = <4>; - clock-mult = <1>; - }; -+ -+ hsspi_pll: hsspi-pll { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <200000000>; -+ }; - }; - - psci { -@@ -117,6 +124,19 @@ - #size-cells = <1>; - ranges = <0x0 0x0 0xff800000 0x800000>; - -+ hsspi: spi@1000 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "brcm,bcm6813-hsspi", "brcm,bcmbca-hsspi-v1.1"; -+ reg = <0x1000 0x600>, <0x2610 0x4>; -+ reg-names = "hsspi", "spim-ctrl"; -+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&hsspi_pll &hsspi_pll>; -+ clock-names = "hsspi", "pll"; -+ num-cs = <8>; -+ status = "disabled"; -+ }; -+ - uart0: serial@12000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x12000 0x1000>; ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi -@@ -60,6 +60,12 @@ - #clock-cells = <0>; - clock-frequency = <200000000>; - }; -+ -+ hsspi_pll: hsspi-pll { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <400000000>; -+ }; - }; - - psci { -@@ -100,5 +106,17 @@ - clock-names = "refclk"; - status = "disabled"; - }; -+ -+ hsspi: spi@1000 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "brcm,bcm6856-hsspi", "brcm,bcmbca-hsspi-v1.0"; -+ reg = <0x1000 0x600>; -+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&hsspi_pll &hsspi_pll>; -+ clock-names = "hsspi", "pll"; -+ num-cs = <8>; -+ status = "disabled"; -+ }; - }; - }; ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi -@@ -78,6 +78,12 @@ - #clock-cells = <0>; - clock-frequency = <200000000>; - }; -+ -+ hsspi_pll: hsspi-pll { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <400000000>; -+ }; - }; - - psci { -@@ -137,5 +143,17 @@ - clock-names = "refclk"; - status = "disabled"; - }; -+ -+ hsspi: spi@1000 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "brcm,bcm6858-hsspi", "brcm,bcmbca-hsspi-v1.0"; -+ reg = <0x1000 0x600>; -+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&hsspi_pll &hsspi_pll>; -+ clock-names = "hsspi", "pll"; -+ num-cs = <8>; -+ status = "disabled"; -+ }; - }; - }; ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts -@@ -28,3 +28,7 @@ - &uart0 { - status = "okay"; - }; -+ -+&hsspi { -+ status = "okay"; -+}; ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts -@@ -28,3 +28,7 @@ - &uart0 { - status = "okay"; - }; -+ -+&hsspi { -+ status = "okay"; -+}; ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts -@@ -28,3 +28,7 @@ - &uart0 { - status = "okay"; - }; -+ -+&hsspi { -+ status = "okay"; -+}; ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts -@@ -28,3 +28,7 @@ - &uart0 { - status = "okay"; - }; -+ -+&hsspi { -+ status = "okay"; -+}; ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts -@@ -28,3 +28,7 @@ - &uart0 { - status = "okay"; - }; -+ -+&hsspi { -+ status = "okay"; -+}; ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts -@@ -28,3 +28,7 @@ - &uart0 { - status = "okay"; - }; -+ -+&hsspi { -+ status = "okay"; -+}; ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts -@@ -28,3 +28,7 @@ - &uart0 { - status = "okay"; - }; -+ -+&hsspi { -+ status = "okay"; -+}; diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0002-arm64-dts-broadcom-bcmbca-bcm4908-fix-NAND-interrupt.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0002-arm64-dts-broadcom-bcmbca-bcm4908-fix-NAND-interrupt.patch deleted file mode 100644 index b121200a25..0000000000 --- a/target/linux/bcm4908/patches-5.10/040-v6.4-0002-arm64-dts-broadcom-bcmbca-bcm4908-fix-NAND-interrupt.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 5cca02449490e767289bda38db1577e2c375c084 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 28 Feb 2023 15:43:58 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: fix NAND interrupt - name -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This fixes: -arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dtb: nand-controller@1800: interrupt-names:0: 'nand_ctlrdy' was expected - From schema: Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml -arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dtb: nand-controller@1800: Unevaluated properties are not allowed ('interrupt-names' was unexpected) - From schema: Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/all/20230228144400.21689-1-zajec5@gmail.com/ -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -@@ -556,7 +556,7 @@ - reg = <0x1800 0x600>, <0x2000 0x10>; - reg-names = "nand", "nand-int-base"; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; -- interrupt-names = "nand"; -+ interrupt-names = "nand_ctlrdy"; - status = "okay"; - - nandcs: nand@0 { diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0003-arm64-dts-broadcom-bcmbca-bcm4908-fix-LED-nodenames.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0003-arm64-dts-broadcom-bcmbca-bcm4908-fix-LED-nodenames.patch deleted file mode 100644 index 7ce17c1870..0000000000 --- a/target/linux/bcm4908/patches-5.10/040-v6.4-0003-arm64-dts-broadcom-bcmbca-bcm4908-fix-LED-nodenames.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 23be9f68f933adee8163b8efc9c6bff71410cc7c Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 28 Feb 2023 15:43:59 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: fix LED nodenames -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This fixes: -arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dtb: leds@800: 'led-lan@19', 'led-power@11', 'led-wan-red@12', 'led-wan-white@15', 'led-wps@14' do not match any of the regexes: '^led@[a-f0-9]+$', 'pinctrl-[0-9]+' - From schema: Documentation/devicetree/bindings/leds/leds-bcm63138.yaml - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/all/20230228144400.21689-2-zajec5@gmail.com/ -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts -@@ -120,7 +120,7 @@ - }; - - &leds { -- led-power@11 { -+ led@11 { - reg = <0x11>; - function = LED_FUNCTION_POWER; - color = <LED_COLOR_ID_WHITE>; -@@ -130,7 +130,7 @@ - pinctrl-0 = <&pins_led_17_a>; - }; - -- led-wan-red@12 { -+ led@12 { - reg = <0x12>; - function = LED_FUNCTION_WAN; - color = <LED_COLOR_ID_RED>; -@@ -139,7 +139,7 @@ - pinctrl-0 = <&pins_led_18_a>; - }; - -- led-wps@14 { -+ led@14 { - reg = <0x14>; - function = LED_FUNCTION_WPS; - color = <LED_COLOR_ID_WHITE>; -@@ -148,7 +148,7 @@ - pinctrl-0 = <&pins_led_20_a>; - }; - -- led-wan-white@15 { -+ led@15 { - reg = <0x15>; - function = LED_FUNCTION_WAN; - color = <LED_COLOR_ID_WHITE>; -@@ -157,7 +157,7 @@ - pinctrl-0 = <&pins_led_21_a>; - }; - -- led-lan@19 { -+ led@19 { - reg = <0x19>; - function = LED_FUNCTION_LAN; - color = <LED_COLOR_ID_WHITE>; diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0004-arm64-dts-broadcom-bcmbca-bcm4908-fix-procmon-nodena.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0004-arm64-dts-broadcom-bcmbca-bcm4908-fix-procmon-nodena.patch deleted file mode 100644 index a469a32a2c..0000000000 --- a/target/linux/bcm4908/patches-5.10/040-v6.4-0004-arm64-dts-broadcom-bcmbca-bcm4908-fix-procmon-nodena.patch +++ /dev/null @@ -1,30 +0,0 @@ -From f16a8294dd7a02c7ad042cd2e3acc5ea06698dc1 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 28 Feb 2023 15:44:00 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: fix procmon nodename -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This fixes: -arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dtb: syscon@280000: $nodename:0: 'syscon@280000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$' - From schema: schemas/simple-bus.yaml - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/all/20230228144400.21689-3-zajec5@gmail.com/ -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -@@ -260,7 +260,7 @@ - }; - }; - -- procmon: syscon@280000 { -+ procmon: bus@280000 { - compatible = "simple-bus"; - reg = <0x280000 0x1000>; - ranges; diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0005-arm64-dts-broadcom-bcmbca-bcm4908-add-on-SoC-USB-por.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0005-arm64-dts-broadcom-bcmbca-bcm4908-add-on-SoC-USB-por.patch deleted file mode 100644 index 47b2455ae6..0000000000 --- a/target/linux/bcm4908/patches-5.10/040-v6.4-0005-arm64-dts-broadcom-bcmbca-bcm4908-add-on-SoC-USB-por.patch +++ /dev/null @@ -1,81 +0,0 @@ -From 477cad715de1dfc256a20da3ed83b62f3cb2944d Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 28 Feb 2023 15:45:18 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: add on-SoC USB ports -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 has 3 USB controllers each with 2 USB ports. Home routers often -have LEDs indicating state of selected USB ports. Describe those SoC USB -ports to allow using them as LED trigger sources. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/all/20230228144520.21816-1-zajec5@gmail.com/ -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../boot/dts/broadcom/bcmbca/bcm4908.dtsi | 39 +++++++++++++++++++ - 1 file changed, 39 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -@@ -148,6 +148,19 @@ - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - phys = <&usb_phy PHY_TYPE_USB2>; - status = "disabled"; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ehci_port1: port@1 { -+ reg = <1>; -+ #trigger-source-cells = <0>; -+ }; -+ -+ ehci_port2: port@2 { -+ reg = <2>; -+ #trigger-source-cells = <0>; -+ }; - }; - - ohci: usb@c400 { -@@ -156,6 +169,19 @@ - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; - phys = <&usb_phy PHY_TYPE_USB2>; - status = "disabled"; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ohci_port1: port@1 { -+ reg = <1>; -+ #trigger-source-cells = <0>; -+ }; -+ -+ ohci_port2: port@2 { -+ reg = <2>; -+ #trigger-source-cells = <0>; -+ }; - }; - - xhci: usb@d000 { -@@ -164,6 +190,19 @@ - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; - phys = <&usb_phy PHY_TYPE_USB3>; - status = "disabled"; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ xhci_port1: port@1 { -+ reg = <1>; -+ #trigger-source-cells = <0>; -+ }; -+ -+ xhci_port2: port@2 { -+ reg = <2>; -+ #trigger-source-cells = <0>; -+ }; - }; - - bus@80000 { diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0006-arm64-dts-broadcom-bcmbca-bcm4908-add-Netgear-R8000P.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0006-arm64-dts-broadcom-bcmbca-bcm4908-add-Netgear-R8000P.patch deleted file mode 100644 index 3e210d68e1..0000000000 --- a/target/linux/bcm4908/patches-5.10/040-v6.4-0006-arm64-dts-broadcom-bcmbca-bcm4908-add-Netgear-R8000P.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 889e53ccccc29ff4bf8d4c89cca34e8768845747 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 28 Feb 2023 15:45:19 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: add Netgear R8000P USB - LED triggers -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This device has 2 USB LEDs meant to be triggered by devices in relevant -USB ports. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/all/20230228144520.21816-2-zajec5@gmail.com/ -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts -@@ -58,12 +58,16 @@ - function = "usb2"; - color = <LED_COLOR_ID_WHITE>; - gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; -+ trigger-sources = <&ohci_port1>, <&ehci_port1>; -+ linux,default-trigger = "usbport"; - }; - - led-usb3 { - function = "usb3"; - color = <LED_COLOR_ID_WHITE>; - gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; -+ trigger-sources = <&ohci_port2>, <&ehci_port2>, <&xhci_port2>; -+ linux,default-trigger = "usbport"; - }; - - led-wifi { diff --git a/target/linux/bcm4908/patches-5.10/040-v6.4-0007-arm64-dts-broadcom-bcmbca-bcm4908-add-TP-Link-C2300-.patch b/target/linux/bcm4908/patches-5.10/040-v6.4-0007-arm64-dts-broadcom-bcmbca-bcm4908-add-TP-Link-C2300-.patch deleted file mode 100644 index 959ccd4fa3..0000000000 --- a/target/linux/bcm4908/patches-5.10/040-v6.4-0007-arm64-dts-broadcom-bcmbca-bcm4908-add-TP-Link-C2300-.patch +++ /dev/null @@ -1,41 +0,0 @@ -From e6d356b146b75f1f77621aab7950a1eb550859f9 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 28 Feb 2023 15:45:20 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: add TP-Link C2300 USB - LED triggers -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This device has 2 USB LEDs meant to be triggered by devices in relevant -USB ports. - -While at it fix typo in USB LED name. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/all/20230228144520.21816-3-zajec5@gmail.com/ -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts -@@ -64,12 +64,16 @@ - function = "usb2"; - color = <LED_COLOR_ID_BLUE>; - gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; -+ trigger-sources = <&ohci_port1>, <&ehci_port1>; -+ linux,default-trigger = "usbport"; - }; - - led-usb3 { -- function = "usbd3"; -+ function = "usb3"; - color = <LED_COLOR_ID_BLUE>; - gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; -+ trigger-sources = <&ohci_port2>, <&ehci_port2>, <&xhci_port2>; -+ linux,default-trigger = "usbport"; - }; - - led-brightness { diff --git a/target/linux/bcm4908/patches-5.10/071-v5.12-0001-net-dsa-bcm_sf2-support-BCM4908-s-integrated-switch.patch b/target/linux/bcm4908/patches-5.10/071-v5.12-0001-net-dsa-bcm_sf2-support-BCM4908-s-integrated-switch.patch deleted file mode 100644 index 344093c548..0000000000 --- a/target/linux/bcm4908/patches-5.10/071-v5.12-0001-net-dsa-bcm_sf2-support-BCM4908-s-integrated-switch.patch +++ /dev/null @@ -1,141 +0,0 @@ -From 73b7a6047971aa6ce4a70fc4901964d14f077171 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 6 Jan 2021 22:32:02 +0100 -Subject: [PATCH] net: dsa: bcm_sf2: support BCM4908's integrated switch -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 family SoCs come with integrated Starfighter 2 switch. Its -registers layout it a mix of BCM7278 and BCM7445. It has 5 integrated -PHYs and 8 ports. It also supports RGMII and SerDes. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Link: https://lore.kernel.org/r/20210106213202.17459-3-zajec5@gmail.com -Signed-off-by: Jakub Kicinski <kuba@kernel.org> ---- - drivers/net/dsa/b53/b53_common.c | 14 +++++++++++++ - drivers/net/dsa/b53/b53_priv.h | 1 + - drivers/net/dsa/bcm_sf2.c | 36 +++++++++++++++++++++++++++++--- - drivers/net/dsa/bcm_sf2_regs.h | 1 + - 4 files changed, 49 insertions(+), 3 deletions(-) - ---- a/drivers/net/dsa/b53/b53_common.c -+++ b/drivers/net/dsa/b53/b53_common.c -@@ -2493,6 +2493,22 @@ static const struct b53_chip_data b53_sw - .jumbo_pm_reg = B53_JUMBO_PORT_MASK, - .jumbo_size_reg = B53_JUMBO_MAX_SIZE, - }, -+ /* Starfighter 2 */ -+ { -+ .chip_id = BCM4908_DEVICE_ID, -+ .dev_name = "BCM4908", -+ .vlans = 4096, -+ .enabled_ports = 0x1bf, -+#if 0 -+ .arl_bins = 4, -+ .arl_buckets = 256, -+#endif -+ .cpu_port = 8, /* TODO: ports 4, 5, 8 */ -+ .vta_regs = B53_VTA_REGS, -+ .duplex_reg = B53_DUPLEX_STAT_GE, -+ .jumbo_pm_reg = B53_JUMBO_PORT_MASK, -+ .jumbo_size_reg = B53_JUMBO_MAX_SIZE, -+ }, - { - .chip_id = BCM7445_DEVICE_ID, - .dev_name = "BCM7445", ---- a/drivers/net/dsa/b53/b53_priv.h -+++ b/drivers/net/dsa/b53/b53_priv.h -@@ -64,6 +64,7 @@ struct b53_io_ops { - #define B53_INVALID_LANE 0xff - - enum { -+ BCM4908_DEVICE_ID = 0x4908, - BCM5325_DEVICE_ID = 0x25, - BCM5365_DEVICE_ID = 0x65, - BCM5389_DEVICE_ID = 0x89, ---- a/drivers/net/dsa/bcm_sf2.c -+++ b/drivers/net/dsa/bcm_sf2.c -@@ -105,7 +105,8 @@ static void bcm_sf2_imp_setup(struct dsa - b53_brcm_hdr_setup(ds, port); - - if (port == 8) { -- if (priv->type == BCM7445_DEVICE_ID) -+ if (priv->type == BCM4908_DEVICE_ID || -+ priv->type == BCM7445_DEVICE_ID) - offset = CORE_STS_OVERRIDE_IMP; - else - offset = CORE_STS_OVERRIDE_IMP2; -@@ -714,7 +715,8 @@ static void bcm_sf2_sw_mac_link_down(str - return; - - if (port != core_readl(priv, CORE_IMP0_PRT_ID)) { -- if (priv->type == BCM7445_DEVICE_ID) -+ if (priv->type == BCM4908_DEVICE_ID || -+ priv->type == BCM7445_DEVICE_ID) - offset = CORE_STS_OVERRIDE_GMIIP_PORT(port); - else - offset = CORE_STS_OVERRIDE_GMIIP2_PORT(port); -@@ -741,7 +743,8 @@ static void bcm_sf2_sw_mac_link_up(struc - bcm_sf2_sw_mac_link_set(ds, port, interface, true); - - if (port != core_readl(priv, CORE_IMP0_PRT_ID)) { -- if (priv->type == BCM7445_DEVICE_ID) -+ if (priv->type == BCM4908_DEVICE_ID || -+ priv->type == BCM7445_DEVICE_ID) - offset = CORE_STS_OVERRIDE_GMIIP_PORT(port); - else - offset = CORE_STS_OVERRIDE_GMIIP2_PORT(port); -@@ -1139,6 +1142,30 @@ struct bcm_sf2_of_data { - unsigned int num_cfp_rules; - }; - -+static const u16 bcm_sf2_4908_reg_offsets[] = { -+ [REG_SWITCH_CNTRL] = 0x00, -+ [REG_SWITCH_STATUS] = 0x04, -+ [REG_DIR_DATA_WRITE] = 0x08, -+ [REG_DIR_DATA_READ] = 0x0c, -+ [REG_SWITCH_REVISION] = 0x10, -+ [REG_PHY_REVISION] = 0x14, -+ [REG_SPHY_CNTRL] = 0x24, -+ [REG_CROSSBAR] = 0xc8, -+ [REG_RGMII_0_CNTRL] = 0xe0, -+ [REG_RGMII_1_CNTRL] = 0xec, -+ [REG_RGMII_2_CNTRL] = 0xf8, -+ [REG_LED_0_CNTRL] = 0x40, -+ [REG_LED_1_CNTRL] = 0x4c, -+ [REG_LED_2_CNTRL] = 0x58, -+}; -+ -+static const struct bcm_sf2_of_data bcm_sf2_4908_data = { -+ .type = BCM4908_DEVICE_ID, -+ .core_reg_align = 0, -+ .reg_offsets = bcm_sf2_4908_reg_offsets, -+ .num_cfp_rules = 0, /* FIXME */ -+}; -+ - /* Register offsets for the SWITCH_REG_* block */ - static const u16 bcm_sf2_7445_reg_offsets[] = { - [REG_SWITCH_CNTRL] = 0x00, -@@ -1187,6 +1214,9 @@ static const struct bcm_sf2_of_data bcm_ - }; - - static const struct of_device_id bcm_sf2_of_match[] = { -+ { .compatible = "brcm,bcm4908-switch", -+ .data = &bcm_sf2_4908_data -+ }, - { .compatible = "brcm,bcm7445-switch-v4.0", - .data = &bcm_sf2_7445_data - }, ---- a/drivers/net/dsa/bcm_sf2_regs.h -+++ b/drivers/net/dsa/bcm_sf2_regs.h -@@ -17,6 +17,7 @@ enum bcm_sf2_reg_offs { - REG_SWITCH_REVISION, - REG_PHY_REVISION, - REG_SPHY_CNTRL, -+ REG_CROSSBAR, - REG_RGMII_0_CNTRL, - REG_RGMII_1_CNTRL, - REG_RGMII_2_CNTRL, diff --git a/target/linux/bcm4908/patches-5.10/071-v5.12-0002-net-dsa-bcm_sf2-use-2-Gbps-IMP-port-link-on-BCM4908.patch b/target/linux/bcm4908/patches-5.10/071-v5.12-0002-net-dsa-bcm_sf2-use-2-Gbps-IMP-port-link-on-BCM4908.patch deleted file mode 100644 index 7785e0c036..0000000000 --- a/target/linux/bcm4908/patches-5.10/071-v5.12-0002-net-dsa-bcm_sf2-use-2-Gbps-IMP-port-link-on-BCM4908.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 8373a0fe9c7160a55482effa8a3f725efd3f8434 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 10 Mar 2021 13:51:59 +0100 -Subject: [PATCH] net: dsa: bcm_sf2: use 2 Gbps IMP port link on BCM4908 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 uses 2 Gbps link between switch and the Ethernet interface. -Without this BCM4908 devices were able to achieve only 2 x ~895 Mb/s. -This allows handling e.g. NAT traffic with 940 Mb/s. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/dsa/bcm_sf2.c | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - ---- a/drivers/net/dsa/bcm_sf2.c -+++ b/drivers/net/dsa/bcm_sf2.c -@@ -114,7 +114,10 @@ static void bcm_sf2_imp_setup(struct dsa - /* Force link status for IMP port */ - reg = core_readl(priv, offset); - reg |= (MII_SW_OR | LINK_STS); -- reg &= ~GMII_SPEED_UP_2G; -+ if (priv->type == BCM4908_DEVICE_ID) -+ reg |= GMII_SPEED_UP_2G; -+ else -+ reg &= ~GMII_SPEED_UP_2G; - core_writel(priv, reg, offset); - - /* Enable Broadcast, Multicast, Unicast forwarding to IMP port */ diff --git a/target/linux/bcm4908/patches-5.10/072-v5.12-0001-dt-bindings-net-document-BCM4908-Ethernet-controller.patch b/target/linux/bcm4908/patches-5.10/072-v5.12-0001-dt-bindings-net-document-BCM4908-Ethernet-controller.patch deleted file mode 100644 index 8c60b9706e..0000000000 --- a/target/linux/bcm4908/patches-5.10/072-v5.12-0001-dt-bindings-net-document-BCM4908-Ethernet-controller.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 387d1c1819790aa8398c7cffab587f9a050a0d1a Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Sun, 7 Feb 2021 23:26:31 +0100 -Subject: [PATCH] dt-bindings: net: document BCM4908 Ethernet controller -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 is a family of SoCs with integrated Ethernet controller. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - .../bindings/net/brcm,bcm4908enet.yaml | 45 +++++++++++++++++++ - 1 file changed, 45 insertions(+) - create mode 100644 Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml - ---- /dev/null -+++ b/Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml -@@ -0,0 +1,45 @@ -+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/net/brcm,bcm4908enet.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Broadcom BCM4908 Ethernet controller -+ -+description: Broadcom's Ethernet controller integrated into BCM4908 family SoCs -+ -+maintainers: -+ - Rafał Miłecki <rafal@milecki.pl> -+ -+properties: -+ compatible: -+ const: brcm,bcm4908enet -+ -+ reg: -+ maxItems: 1 -+ -+ interrupts: -+ description: RX interrupt -+ -+ interrupt-names: -+ const: rx -+ -+required: -+ - reg -+ - interrupts -+ - interrupt-names -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include <dt-bindings/interrupt-controller/irq.h> -+ #include <dt-bindings/interrupt-controller/arm-gic.h> -+ -+ ethernet@80002000 { -+ compatible = "brcm,bcm4908enet"; -+ reg = <0x80002000 0x1000>; -+ -+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "rx"; -+ }; diff --git a/target/linux/bcm4908/patches-5.10/072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch b/target/linux/bcm4908/patches-5.10/072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch deleted file mode 100644 index 958ef85f9e..0000000000 --- a/target/linux/bcm4908/patches-5.10/072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch +++ /dev/null @@ -1,847 +0,0 @@ -From 4feffeadbcb2e5b11cbbf191a33c245b74a5837b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Sun, 7 Feb 2021 23:26:32 +0100 -Subject: [PATCH] net: broadcom: bcm4908enet: add BCM4908 controller driver -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 SoCs family uses Ethernel controller that includes UniMAC but -uses different DMA engine (than other controllers) and requires -different programming. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - MAINTAINERS | 9 + - drivers/net/ethernet/broadcom/Kconfig | 8 + - drivers/net/ethernet/broadcom/Makefile | 1 + - drivers/net/ethernet/broadcom/bcm4908enet.c | 676 ++++++++++++++++++++ - drivers/net/ethernet/broadcom/bcm4908enet.h | 96 +++ - 5 files changed, 790 insertions(+) - create mode 100644 drivers/net/ethernet/broadcom/bcm4908enet.c - create mode 100644 drivers/net/ethernet/broadcom/bcm4908enet.h - ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -3427,6 +3427,15 @@ F: Documentation/devicetree/bindings/mip - F: arch/mips/bcm47xx/* - F: arch/mips/include/asm/mach-bcm47xx/* - -+BROADCOM BCM4908 ETHERNET DRIVER -+M: Rafał Miłecki <rafal@milecki.pl> -+M: bcm-kernel-feedback-list@broadcom.com -+L: netdev@vger.kernel.org -+S: Maintained -+F: Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml -+F: drivers/net/ethernet/broadcom/bcm4908enet.* -+F: drivers/net/ethernet/broadcom/unimac.h -+ - BROADCOM BCM5301X ARM ARCHITECTURE - M: Hauke Mehrtens <hauke@hauke-m.de> - M: Rafał Miłecki <zajec5@gmail.com> ---- a/drivers/net/ethernet/broadcom/Kconfig -+++ b/drivers/net/ethernet/broadcom/Kconfig -@@ -51,6 +51,14 @@ config B44_PCI - depends on B44_PCI_AUTOSELECT && B44_PCICORE_AUTOSELECT - default y - -+config BCM4908ENET -+ tristate "Broadcom BCM4908 internal mac support" -+ depends on ARCH_BCM4908 || COMPILE_TEST -+ default y -+ help -+ This driver supports Ethernet controller integrated into Broadcom -+ BCM4908 family SoCs. -+ - config BCM63XX_ENET - tristate "Broadcom 63xx internal mac support" - depends on BCM63XX ---- a/drivers/net/ethernet/broadcom/Makefile -+++ b/drivers/net/ethernet/broadcom/Makefile -@@ -4,6 +4,7 @@ - # - - obj-$(CONFIG_B44) += b44.o -+obj-$(CONFIG_BCM4908ENET) += bcm4908enet.o - obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o - obj-$(CONFIG_BCMGENET) += genet/ - obj-$(CONFIG_BNX2) += bnx2.o ---- /dev/null -+++ b/drivers/net/ethernet/broadcom/bcm4908enet.c -@@ -0,0 +1,676 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* -+ * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl> -+ */ -+ -+#include <linux/delay.h> -+#include <linux/etherdevice.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/of.h> -+#include <linux/platform_device.h> -+#include <linux/slab.h> -+#include <linux/string.h> -+ -+#include "bcm4908enet.h" -+#include "unimac.h" -+ -+#define ENET_DMA_CH_RX_CFG ENET_DMA_CH0_CFG -+#define ENET_DMA_CH_TX_CFG ENET_DMA_CH1_CFG -+#define ENET_DMA_CH_RX_STATE_RAM ENET_DMA_CH0_STATE_RAM -+#define ENET_DMA_CH_TX_STATE_RAM ENET_DMA_CH1_STATE_RAM -+ -+#define ENET_TX_BDS_NUM 200 -+#define ENET_RX_BDS_NUM 200 -+#define ENET_RX_BDS_NUM_MAX 8192 -+ -+#define ENET_DMA_INT_DEFAULTS (ENET_DMA_CH_CFG_INT_DONE | \ -+ ENET_DMA_CH_CFG_INT_NO_DESC | \ -+ ENET_DMA_CH_CFG_INT_BUFF_DONE) -+#define ENET_DMA_MAX_BURST_LEN 8 /* in 64 bit words */ -+ -+#define ENET_MTU_MIN 60 -+#define ENET_MTU_MAX 1500 /* Is it possible to support 2044? */ -+#define ENET_MTU_MAX_EXTRA_SIZE 32 /* L2 */ -+ -+struct bcm4908enet_dma_ring_bd { -+ __le32 ctl; -+ __le32 addr; -+} __packed; -+ -+struct bcm4908enet_dma_ring_slot { -+ struct sk_buff *skb; -+ unsigned int len; -+ dma_addr_t dma_addr; -+}; -+ -+struct bcm4908enet_dma_ring { -+ int is_tx; -+ int read_idx; -+ int write_idx; -+ int length; -+ u16 cfg_block; -+ u16 st_ram_block; -+ -+ union { -+ void *cpu_addr; -+ struct bcm4908enet_dma_ring_bd *buf_desc; -+ }; -+ dma_addr_t dma_addr; -+ -+ struct bcm4908enet_dma_ring_slot *slots; -+}; -+ -+struct bcm4908enet { -+ struct device *dev; -+ struct net_device *netdev; -+ struct napi_struct napi; -+ void __iomem *base; -+ -+ struct bcm4908enet_dma_ring tx_ring; -+ struct bcm4908enet_dma_ring rx_ring; -+}; -+ -+/*** -+ * R/W ops -+ */ -+ -+static inline u32 enet_read(struct bcm4908enet *enet, u16 offset) -+{ -+ return readl(enet->base + offset); -+} -+ -+static inline void enet_write(struct bcm4908enet *enet, u16 offset, u32 value) -+{ -+ writel(value, enet->base + offset); -+} -+ -+static inline void enet_maskset(struct bcm4908enet *enet, u16 offset, u32 mask, u32 set) -+{ -+ u32 val; -+ -+ WARN_ON(set & ~mask); -+ -+ val = enet_read(enet, offset); -+ val = (val & ~mask) | (set & mask); -+ enet_write(enet, offset, val); -+} -+ -+static inline void enet_set(struct bcm4908enet *enet, u16 offset, u32 set) -+{ -+ enet_maskset(enet, offset, set, set); -+} -+ -+static inline u32 enet_umac_read(struct bcm4908enet *enet, u16 offset) -+{ -+ return enet_read(enet, ENET_UNIMAC + offset); -+} -+ -+static inline void enet_umac_write(struct bcm4908enet *enet, u16 offset, u32 value) -+{ -+ enet_write(enet, ENET_UNIMAC + offset, value); -+} -+ -+static inline void enet_umac_maskset(struct bcm4908enet *enet, u16 offset, u32 mask, u32 set) -+{ -+ enet_maskset(enet, ENET_UNIMAC + offset, mask, set); -+} -+ -+static inline void enet_umac_set(struct bcm4908enet *enet, u16 offset, u32 set) -+{ -+ enet_set(enet, ENET_UNIMAC + offset, set); -+} -+ -+/*** -+ * Helpers -+ */ -+ -+static void bcm4908enet_intrs_on(struct bcm4908enet *enet) -+{ -+ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS); -+} -+ -+static void bcm4908enet_intrs_off(struct bcm4908enet *enet) -+{ -+ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, 0); -+} -+ -+static void bcm4908enet_intrs_ack(struct bcm4908enet *enet) -+{ -+ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS); -+} -+ -+/*** -+ * DMA -+ */ -+ -+static int bcm4908_dma_alloc_buf_descs(struct bcm4908enet *enet, struct bcm4908enet_dma_ring *ring) -+{ -+ int size = ring->length * sizeof(struct bcm4908enet_dma_ring_bd); -+ struct device *dev = enet->dev; -+ -+ ring->cpu_addr = dma_alloc_coherent(dev, size, &ring->dma_addr, GFP_KERNEL); -+ if (!ring->cpu_addr) -+ return -ENOMEM; -+ -+ if (((uintptr_t)ring->cpu_addr) & (0x40 - 1)) { -+ dev_err(dev, "Invalid DMA ring alignment\n"); -+ goto err_free_buf_descs; -+ } -+ -+ ring->slots = kzalloc(ring->length * sizeof(*ring->slots), GFP_KERNEL); -+ if (!ring->slots) -+ goto err_free_buf_descs; -+ -+ memset(ring->cpu_addr, 0, size); -+ -+ ring->read_idx = 0; -+ ring->write_idx = 0; -+ -+ return 0; -+ -+err_free_buf_descs: -+ dma_free_coherent(dev, size, ring->cpu_addr, ring->dma_addr); -+ return -ENOMEM; -+} -+ -+static void bcm4908enet_dma_free(struct bcm4908enet *enet) -+{ -+ struct bcm4908enet_dma_ring *tx_ring = &enet->tx_ring; -+ struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; -+ struct device *dev = enet->dev; -+ int size; -+ -+ size = rx_ring->length * sizeof(struct bcm4908enet_dma_ring_bd); -+ if (rx_ring->cpu_addr) -+ dma_free_coherent(dev, size, rx_ring->cpu_addr, rx_ring->dma_addr); -+ kfree(rx_ring->slots); -+ -+ size = tx_ring->length * sizeof(struct bcm4908enet_dma_ring_bd); -+ if (tx_ring->cpu_addr) -+ dma_free_coherent(dev, size, tx_ring->cpu_addr, tx_ring->dma_addr); -+ kfree(tx_ring->slots); -+} -+ -+static int bcm4908enet_dma_alloc(struct bcm4908enet *enet) -+{ -+ struct bcm4908enet_dma_ring *tx_ring = &enet->tx_ring; -+ struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; -+ struct device *dev = enet->dev; -+ int err; -+ -+ tx_ring->length = ENET_TX_BDS_NUM; -+ tx_ring->is_tx = 1; -+ tx_ring->cfg_block = ENET_DMA_CH_TX_CFG; -+ tx_ring->st_ram_block = ENET_DMA_CH_TX_STATE_RAM; -+ err = bcm4908_dma_alloc_buf_descs(enet, tx_ring); -+ if (err) { -+ dev_err(dev, "Failed to alloc TX buf descriptors: %d\n", err); -+ return err; -+ } -+ -+ rx_ring->length = ENET_RX_BDS_NUM; -+ rx_ring->is_tx = 0; -+ rx_ring->cfg_block = ENET_DMA_CH_RX_CFG; -+ rx_ring->st_ram_block = ENET_DMA_CH_RX_STATE_RAM; -+ err = bcm4908_dma_alloc_buf_descs(enet, rx_ring); -+ if (err) { -+ dev_err(dev, "Failed to alloc RX buf descriptors: %d\n", err); -+ bcm4908enet_dma_free(enet); -+ return err; -+ } -+ -+ return 0; -+} -+ -+static void bcm4908enet_dma_reset(struct bcm4908enet *enet) -+{ -+ struct bcm4908enet_dma_ring *rings[] = { &enet->rx_ring, &enet->tx_ring }; -+ int i; -+ -+ /* Disable the DMA controller and channel */ -+ for (i = 0; i < ARRAY_SIZE(rings); i++) -+ enet_write(enet, rings[i]->cfg_block + ENET_DMA_CH_CFG, 0); -+ enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN, 0); -+ -+ /* Reset channels state */ -+ for (i = 0; i < ARRAY_SIZE(rings); i++) { -+ struct bcm4908enet_dma_ring *ring = rings[i]; -+ -+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, 0); -+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_STATE_DATA, 0); -+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS, 0); -+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR, 0); -+ } -+} -+ -+static int bcm4908enet_dma_alloc_rx_buf(struct bcm4908enet *enet, unsigned int idx) -+{ -+ struct bcm4908enet_dma_ring_bd *buf_desc = &enet->rx_ring.buf_desc[idx]; -+ struct bcm4908enet_dma_ring_slot *slot = &enet->rx_ring.slots[idx]; -+ struct device *dev = enet->dev; -+ u32 tmp; -+ int err; -+ -+ slot->len = ENET_MTU_MAX + ENET_MTU_MAX_EXTRA_SIZE; -+ -+ slot->skb = netdev_alloc_skb(enet->netdev, slot->len); -+ if (!slot->skb) -+ return -ENOMEM; -+ -+ slot->dma_addr = dma_map_single(dev, slot->skb->data, slot->len, DMA_FROM_DEVICE); -+ err = dma_mapping_error(dev, slot->dma_addr); -+ if (err) { -+ dev_err(dev, "Failed to map DMA buffer: %d\n", err); -+ kfree_skb(slot->skb); -+ slot->skb = NULL; -+ return err; -+ } -+ -+ tmp = slot->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; -+ tmp |= DMA_CTL_STATUS_OWN; -+ if (idx == enet->rx_ring.length - 1) -+ tmp |= DMA_CTL_STATUS_WRAP; -+ buf_desc->ctl = cpu_to_le32(tmp); -+ buf_desc->addr = cpu_to_le32(slot->dma_addr); -+ -+ return 0; -+} -+ -+static void bcm4908enet_dma_ring_init(struct bcm4908enet *enet, -+ struct bcm4908enet_dma_ring *ring) -+{ -+ int reset_channel = 0; /* We support only 1 main channel (with TX and RX) */ -+ int reset_subch = ring->is_tx ? 1 : 0; -+ -+ /* Reset the DMA channel */ -+ enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, BIT(reset_channel * 2 + reset_subch)); -+ enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, 0); -+ -+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0); -+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_MAX_BURST, ENET_DMA_MAX_BURST_LEN); -+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0); -+ -+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, -+ (uint32_t)ring->dma_addr); -+} -+ -+static void bcm4908enet_dma_uninit(struct bcm4908enet *enet) -+{ -+ struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; -+ struct bcm4908enet_dma_ring_slot *slot; -+ struct device *dev = enet->dev; -+ int i; -+ -+ for (i = rx_ring->length - 1; i >= 0; i--) { -+ slot = &rx_ring->slots[i]; -+ if (!slot->skb) -+ continue; -+ dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_FROM_DEVICE); -+ kfree_skb(slot->skb); -+ slot->skb = NULL; -+ } -+} -+ -+static int bcm4908enet_dma_init(struct bcm4908enet *enet) -+{ -+ struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; -+ struct device *dev = enet->dev; -+ int err; -+ int i; -+ -+ for (i = 0; i < rx_ring->length; i++) { -+ err = bcm4908enet_dma_alloc_rx_buf(enet, i); -+ if (err) { -+ dev_err(dev, "Failed to alloc RX buffer: %d\n", err); -+ bcm4908enet_dma_uninit(enet); -+ return err; -+ } -+ } -+ -+ bcm4908enet_dma_ring_init(enet, &enet->tx_ring); -+ bcm4908enet_dma_ring_init(enet, &enet->rx_ring); -+ -+ return 0; -+} -+ -+static void bcm4908enet_dma_tx_ring_ensable(struct bcm4908enet *enet, -+ struct bcm4908enet_dma_ring *ring) -+{ -+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); -+} -+ -+static void bcm4908enet_dma_tx_ring_disable(struct bcm4908enet *enet, -+ struct bcm4908enet_dma_ring *ring) -+{ -+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0); -+} -+ -+static void bcm4908enet_dma_rx_ring_enable(struct bcm4908enet *enet, -+ struct bcm4908enet_dma_ring *ring) -+{ -+ enet_set(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); -+} -+ -+static void bcm4908enet_dma_rx_ring_disable(struct bcm4908enet *enet, -+ struct bcm4908enet_dma_ring *ring) -+{ -+ unsigned long deadline; -+ u32 tmp; -+ -+ enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0); -+ -+ deadline = jiffies + usecs_to_jiffies(2000); -+ do { -+ tmp = enet_read(enet, ring->cfg_block + ENET_DMA_CH_CFG); -+ if (!(tmp & ENET_DMA_CH_CFG_ENABLE)) -+ return; -+ enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0); -+ usleep_range(10, 30); -+ } while (!time_after_eq(jiffies, deadline)); -+ -+ dev_warn(enet->dev, "Timeout waiting for DMA TX stop\n"); -+} -+ -+/*** -+ * Ethernet driver -+ */ -+ -+static void bcm4908enet_gmac_init(struct bcm4908enet *enet) -+{ -+ u32 cmd; -+ -+ cmd = enet_umac_read(enet, UMAC_CMD); -+ enet_umac_write(enet, UMAC_CMD, cmd | CMD_SW_RESET); -+ enet_umac_write(enet, UMAC_CMD, cmd & ~CMD_SW_RESET); -+ -+ enet_set(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH); -+ enet_maskset(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH, 0); -+ -+ enet_set(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB); -+ enet_maskset(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB, 0); -+ -+ cmd = enet_umac_read(enet, UMAC_CMD); -+ cmd &= ~(CMD_SPEED_MASK << CMD_SPEED_SHIFT); -+ cmd &= ~CMD_TX_EN; -+ cmd &= ~CMD_RX_EN; -+ cmd |= CMD_SPEED_1000 << CMD_SPEED_SHIFT; -+ enet_umac_write(enet, UMAC_CMD, cmd); -+ -+ enet_maskset(enet, ENET_GMAC_STATUS, -+ ENET_GMAC_STATUS_ETH_SPEED_MASK | -+ ENET_GMAC_STATUS_HD | -+ ENET_GMAC_STATUS_AUTO_CFG_EN | -+ ENET_GMAC_STATUS_LINK_UP, -+ ENET_GMAC_STATUS_ETH_SPEED_1000 | -+ ENET_GMAC_STATUS_AUTO_CFG_EN | -+ ENET_GMAC_STATUS_LINK_UP); -+} -+ -+static irqreturn_t bcm4908enet_irq_handler(int irq, void *dev_id) -+{ -+ struct bcm4908enet *enet = dev_id; -+ -+ bcm4908enet_intrs_off(enet); -+ bcm4908enet_intrs_ack(enet); -+ -+ napi_schedule(&enet->napi); -+ -+ return IRQ_HANDLED; -+} -+ -+static int bcm4908enet_open(struct net_device *netdev) -+{ -+ struct bcm4908enet *enet = netdev_priv(netdev); -+ struct device *dev = enet->dev; -+ int err; -+ -+ err = request_irq(netdev->irq, bcm4908enet_irq_handler, 0, "enet", enet); -+ if (err) { -+ dev_err(dev, "Failed to request IRQ %d: %d\n", netdev->irq, err); -+ return err; -+ } -+ -+ bcm4908enet_gmac_init(enet); -+ bcm4908enet_dma_reset(enet); -+ bcm4908enet_dma_init(enet); -+ -+ enet_umac_set(enet, UMAC_CMD, CMD_TX_EN | CMD_RX_EN); -+ -+ enet_set(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN); -+ enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_FLOWC_CH1_EN, 0); -+ bcm4908enet_dma_rx_ring_enable(enet, &enet->rx_ring); -+ -+ napi_enable(&enet->napi); -+ netif_carrier_on(netdev); -+ netif_start_queue(netdev); -+ -+ bcm4908enet_intrs_ack(enet); -+ bcm4908enet_intrs_on(enet); -+ -+ return 0; -+} -+ -+static int bcm4908enet_stop(struct net_device *netdev) -+{ -+ struct bcm4908enet *enet = netdev_priv(netdev); -+ -+ netif_stop_queue(netdev); -+ netif_carrier_off(netdev); -+ napi_disable(&enet->napi); -+ -+ bcm4908enet_dma_rx_ring_disable(enet, &enet->rx_ring); -+ bcm4908enet_dma_tx_ring_disable(enet, &enet->tx_ring); -+ -+ bcm4908enet_dma_uninit(enet); -+ -+ free_irq(enet->netdev->irq, enet); -+ -+ return 0; -+} -+ -+static int bcm4908enet_start_xmit(struct sk_buff *skb, struct net_device *netdev) -+{ -+ struct bcm4908enet *enet = netdev_priv(netdev); -+ struct bcm4908enet_dma_ring *ring = &enet->tx_ring; -+ struct bcm4908enet_dma_ring_slot *slot; -+ struct device *dev = enet->dev; -+ struct bcm4908enet_dma_ring_bd *buf_desc; -+ int free_buf_descs; -+ u32 tmp; -+ -+ /* Free transmitted skbs */ -+ while (ring->read_idx != ring->write_idx) { -+ buf_desc = &ring->buf_desc[ring->read_idx]; -+ if (buf_desc->ctl & DMA_CTL_STATUS_OWN) -+ break; -+ slot = &ring->slots[ring->read_idx]; -+ -+ dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE); -+ dev_kfree_skb(slot->skb); -+ if (++ring->read_idx == ring->length) -+ ring->read_idx = 0; -+ } -+ -+ /* Don't use the last empty buf descriptor */ -+ if (ring->read_idx <= ring->write_idx) -+ free_buf_descs = ring->read_idx - ring->write_idx + ring->length; -+ else -+ free_buf_descs = ring->read_idx - ring->write_idx; -+ if (free_buf_descs < 2) -+ return NETDEV_TX_BUSY; -+ -+ /* Hardware removes OWN bit after sending data */ -+ buf_desc = &ring->buf_desc[ring->write_idx]; -+ if (unlikely(le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN)) { -+ netif_stop_queue(netdev); -+ return NETDEV_TX_BUSY; -+ } -+ -+ slot = &ring->slots[ring->write_idx]; -+ slot->skb = skb; -+ slot->len = skb->len; -+ slot->dma_addr = dma_map_single(dev, skb->data, skb->len, DMA_TO_DEVICE); -+ if (unlikely(dma_mapping_error(dev, slot->dma_addr))) -+ return NETDEV_TX_BUSY; -+ -+ tmp = skb->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; -+ tmp |= DMA_CTL_STATUS_OWN; -+ tmp |= DMA_CTL_STATUS_SOP; -+ tmp |= DMA_CTL_STATUS_EOP; -+ tmp |= DMA_CTL_STATUS_APPEND_CRC; -+ if (ring->write_idx + 1 == ring->length - 1) -+ tmp |= DMA_CTL_STATUS_WRAP; -+ -+ buf_desc->addr = cpu_to_le32((uint32_t)slot->dma_addr); -+ buf_desc->ctl = cpu_to_le32(tmp); -+ -+ bcm4908enet_dma_tx_ring_ensable(enet, &enet->tx_ring); -+ -+ if (++ring->write_idx == ring->length - 1) -+ ring->write_idx = 0; -+ enet->netdev->stats.tx_bytes += skb->len; -+ enet->netdev->stats.tx_packets++; -+ -+ return NETDEV_TX_OK; -+} -+ -+static int bcm4908enet_poll(struct napi_struct *napi, int weight) -+{ -+ struct bcm4908enet *enet = container_of(napi, struct bcm4908enet, napi); -+ struct device *dev = enet->dev; -+ int handled = 0; -+ -+ while (handled < weight) { -+ struct bcm4908enet_dma_ring_bd *buf_desc; -+ struct bcm4908enet_dma_ring_slot slot; -+ u32 ctl; -+ int len; -+ int err; -+ -+ buf_desc = &enet->rx_ring.buf_desc[enet->rx_ring.read_idx]; -+ ctl = le32_to_cpu(buf_desc->ctl); -+ if (ctl & DMA_CTL_STATUS_OWN) -+ break; -+ -+ slot = enet->rx_ring.slots[enet->rx_ring.read_idx]; -+ -+ /* Provide new buffer before unpinning the old one */ -+ err = bcm4908enet_dma_alloc_rx_buf(enet, enet->rx_ring.read_idx); -+ if (err) -+ break; -+ -+ if (++enet->rx_ring.read_idx == enet->rx_ring.length) -+ enet->rx_ring.read_idx = 0; -+ -+ len = (ctl & DMA_CTL_LEN_DESC_BUFLENGTH) >> DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; -+ -+ if (len < ENET_MTU_MIN || -+ (ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) { -+ enet->netdev->stats.rx_dropped++; -+ break; -+ } -+ -+ dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE); -+ -+ skb_put(slot.skb, len - 4 + 2); -+ slot.skb->protocol = eth_type_trans(slot.skb, enet->netdev); -+ netif_receive_skb(slot.skb); -+ -+ enet->netdev->stats.rx_packets++; -+ enet->netdev->stats.rx_bytes += len; -+ } -+ -+ if (handled < weight) { -+ napi_complete_done(napi, handled); -+ bcm4908enet_intrs_on(enet); -+ } -+ -+ return handled; -+} -+ -+static const struct net_device_ops bcm96xx_netdev_ops = { -+ .ndo_open = bcm4908enet_open, -+ .ndo_stop = bcm4908enet_stop, -+ .ndo_start_xmit = bcm4908enet_start_xmit, -+ .ndo_set_mac_address = eth_mac_addr, -+}; -+ -+static int bcm4908enet_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct net_device *netdev; -+ struct bcm4908enet *enet; -+ int err; -+ -+ netdev = devm_alloc_etherdev(dev, sizeof(*enet)); -+ if (!netdev) -+ return -ENOMEM; -+ -+ enet = netdev_priv(netdev); -+ enet->dev = dev; -+ enet->netdev = netdev; -+ -+ enet->base = devm_platform_ioremap_resource(pdev, 0); -+ if (IS_ERR(enet->base)) { -+ dev_err(dev, "Failed to map registers: %ld\n", PTR_ERR(enet->base)); -+ return PTR_ERR(enet->base); -+ } -+ -+ netdev->irq = platform_get_irq_byname(pdev, "rx"); -+ if (netdev->irq < 0) -+ return netdev->irq; -+ -+ dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); -+ -+ err = bcm4908enet_dma_alloc(enet); -+ if (err) -+ return err; -+ -+ SET_NETDEV_DEV(netdev, &pdev->dev); -+ eth_hw_addr_random(netdev); -+ netdev->netdev_ops = &bcm96xx_netdev_ops; -+ netdev->min_mtu = ETH_ZLEN; -+ netdev->mtu = ENET_MTU_MAX; -+ netdev->max_mtu = ENET_MTU_MAX; -+ netif_napi_add(netdev, &enet->napi, bcm4908enet_poll, 64); -+ -+ err = register_netdev(netdev); -+ if (err) { -+ bcm4908enet_dma_free(enet); -+ return err; -+ } -+ -+ platform_set_drvdata(pdev, enet); -+ -+ return 0; -+} -+ -+static int bcm4908enet_remove(struct platform_device *pdev) -+{ -+ struct bcm4908enet *enet = platform_get_drvdata(pdev); -+ -+ unregister_netdev(enet->netdev); -+ netif_napi_del(&enet->napi); -+ bcm4908enet_dma_free(enet); -+ -+ return 0; -+} -+ -+static const struct of_device_id bcm4908enet_of_match[] = { -+ { .compatible = "brcm,bcm4908enet"}, -+ {}, -+}; -+ -+static struct platform_driver bcm4908enet_driver = { -+ .driver = { -+ .name = "bcm4908enet", -+ .of_match_table = bcm4908enet_of_match, -+ }, -+ .probe = bcm4908enet_probe, -+ .remove = bcm4908enet_remove, -+}; -+module_platform_driver(bcm4908enet_driver); -+ -+MODULE_LICENSE("GPL v2"); -+MODULE_DEVICE_TABLE(of, bcm4908enet_of_match); ---- /dev/null -+++ b/drivers/net/ethernet/broadcom/bcm4908enet.h -@@ -0,0 +1,96 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+#ifndef __BCM4908ENET_H -+#define __BCM4908ENET_H -+ -+#define ENET_CONTROL 0x000 -+#define ENET_MIB_CTRL 0x004 -+#define ENET_MIB_CTRL_CLR_MIB 0x00000001 -+#define ENET_RX_ERR_MASK 0x008 -+#define ENET_MIB_MAX_PKT_SIZE 0x00C -+#define ENET_MIB_MAX_PKT_SIZE_VAL 0x00003fff -+#define ENET_DIAG_OUT 0x01c -+#define ENET_ENABLE_DROP_PKT 0x020 -+#define ENET_IRQ_ENABLE 0x024 -+#define ENET_IRQ_ENABLE_OVFL 0x00000001 -+#define ENET_GMAC_STATUS 0x028 -+#define ENET_GMAC_STATUS_ETH_SPEED_MASK 0x00000003 -+#define ENET_GMAC_STATUS_ETH_SPEED_10 0x00000000 -+#define ENET_GMAC_STATUS_ETH_SPEED_100 0x00000001 -+#define ENET_GMAC_STATUS_ETH_SPEED_1000 0x00000002 -+#define ENET_GMAC_STATUS_HD 0x00000004 -+#define ENET_GMAC_STATUS_AUTO_CFG_EN 0x00000008 -+#define ENET_GMAC_STATUS_LINK_UP 0x00000010 -+#define ENET_IRQ_STATUS 0x02c -+#define ENET_IRQ_STATUS_OVFL 0x00000001 -+#define ENET_OVERFLOW_COUNTER 0x030 -+#define ENET_FLUSH 0x034 -+#define ENET_FLUSH_RXFIFO_FLUSH 0x00000001 -+#define ENET_FLUSH_TXFIFO_FLUSH 0x00000002 -+#define ENET_RSV_SELECT 0x038 -+#define ENET_BP_FORCE 0x03c -+#define ENET_BP_FORCE_FORCE 0x00000001 -+#define ENET_DMA_RX_OK_TO_SEND_COUNT 0x040 -+#define ENET_DMA_RX_OK_TO_SEND_COUNT_VAL 0x0000000f -+#define ENET_TX_CRC_CTRL 0x044 -+#define ENET_MIB 0x200 -+#define ENET_UNIMAC 0x400 -+#define ENET_DMA 0x800 -+#define ENET_DMA_CONTROLLER_CFG 0x800 -+#define ENET_DMA_CTRL_CFG_MASTER_EN 0x00000001 -+#define ENET_DMA_CTRL_CFG_FLOWC_CH1_EN 0x00000002 -+#define ENET_DMA_CTRL_CFG_FLOWC_CH3_EN 0x00000004 -+#define ENET_DMA_FLOWCTL_CH1_THRESH_LO 0x804 -+#define ENET_DMA_FLOWCTL_CH1_THRESH_HI 0x808 -+#define ENET_DMA_FLOWCTL_CH1_ALLOC 0x80c -+#define ENET_DMA_FLOWCTL_CH1_ALLOC_FORCE 0x80000000 -+#define ENET_DMA_FLOWCTL_CH3_THRESH_LO 0x810 -+#define ENET_DMA_FLOWCTL_CH3_THRESH_HI 0x814 -+#define ENET_DMA_FLOWCTL_CH3_ALLOC 0x818 -+#define ENET_DMA_FLOWCTL_CH5_THRESH_LO 0x81C -+#define ENET_DMA_FLOWCTL_CH5_THRESH_HI 0x820 -+#define ENET_DMA_FLOWCTL_CH5_ALLOC 0x824 -+#define ENET_DMA_FLOWCTL_CH7_THRESH_LO 0x828 -+#define ENET_DMA_FLOWCTL_CH7_THRESH_HI 0x82C -+#define ENET_DMA_FLOWCTL_CH7_ALLOC 0x830 -+#define ENET_DMA_CTRL_CHANNEL_RESET 0x834 -+#define ENET_DMA_CTRL_CHANNEL_DEBUG 0x838 -+#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_STATUS 0x840 -+#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_MASK 0x844 -+#define ENET_DMA_CH0_CFG 0xa00 /* RX */ -+#define ENET_DMA_CH1_CFG 0xa10 /* TX */ -+#define ENET_DMA_CH0_STATE_RAM 0xc00 /* RX */ -+#define ENET_DMA_CH1_STATE_RAM 0xc10 /* TX */ -+ -+#define ENET_DMA_CH_CFG 0x00 /* assorted configuration */ -+#define ENET_DMA_CH_CFG_ENABLE 0x00000001 /* set to enable channel */ -+#define ENET_DMA_CH_CFG_PKT_HALT 0x00000002 /* idle after an EOP flag is detected */ -+#define ENET_DMA_CH_CFG_BURST_HALT 0x00000004 /* idle after finish current memory burst */ -+#define ENET_DMA_CH_CFG_INT_STAT 0x04 /* interrupts control and status */ -+#define ENET_DMA_CH_CFG_INT_MASK 0x08 /* interrupts mask */ -+#define ENET_DMA_CH_CFG_INT_BUFF_DONE 0x00000001 /* buffer done */ -+#define ENET_DMA_CH_CFG_INT_DONE 0x00000002 /* packet xfer complete */ -+#define ENET_DMA_CH_CFG_INT_NO_DESC 0x00000004 /* no valid descriptors */ -+#define ENET_DMA_CH_CFG_INT_RX_ERROR 0x00000008 /* rxdma detect client protocol error */ -+#define ENET_DMA_CH_CFG_MAX_BURST 0x0c /* max burst length permitted */ -+#define ENET_DMA_CH_CFG_MAX_BURST_DESCSIZE_SEL 0x00040000 /* DMA Descriptor Size Selection */ -+#define ENET_DMA_CH_CFG_SIZE 0x10 -+ -+#define ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR 0x00 /* descriptor ring start address */ -+#define ENET_DMA_CH_STATE_RAM_STATE_DATA 0x04 /* state/bytes done/ring offset */ -+#define ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS 0x08 /* buffer descriptor status and len */ -+#define ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR 0x0c /* buffer descrpitor current processing */ -+#define ENET_DMA_CH_STATE_RAM_SIZE 0x10 -+ -+#define DMA_CTL_STATUS_APPEND_CRC 0x00000100 -+#define DMA_CTL_STATUS_APPEND_BRCM_TAG 0x00000200 -+#define DMA_CTL_STATUS_PRIO 0x00000C00 /* Prio for Tx */ -+#define DMA_CTL_STATUS_WRAP 0x00001000 /* */ -+#define DMA_CTL_STATUS_SOP 0x00002000 /* first buffer in packet */ -+#define DMA_CTL_STATUS_EOP 0x00004000 /* last buffer in packet */ -+#define DMA_CTL_STATUS_OWN 0x00008000 /* cleared by DMA, set by SW */ -+#define DMA_CTL_LEN_DESC_BUFLENGTH 0x0fff0000 -+#define DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT 16 -+#define DMA_CTL_LEN_DESC_MULTICAST 0x40000000 -+#define DMA_CTL_LEN_DESC_USEFPM 0x80000000 -+ -+#endif diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0001-dt-bindings-net-rename-BCM4908-Ethernet-binding.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0001-dt-bindings-net-rename-BCM4908-Ethernet-binding.patch deleted file mode 100644 index dd297bcf9b..0000000000 --- a/target/linux/bcm4908/patches-5.10/073-v5.12-0001-dt-bindings-net-rename-BCM4908-Ethernet-binding.patch +++ /dev/null @@ -1,128 +0,0 @@ -From 6710c5b0674f8811f7d8fbfc526684e7ed77f765 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 11 Feb 2021 13:12:32 +0100 -Subject: [PATCH] dt-bindings: net: rename BCM4908 Ethernet binding -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Rob pointed out that a normal convention is "brcm,bcm4908-enet" so -update whole binding to match it. - -Suggested-by: Rob Herring <robh@kernel.org> -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - .../net/{brcm,bcm4908enet.yaml => brcm,bcm4908-enet.yaml} | 6 +++--- - MAINTAINERS | 2 +- - 2 files changed, 4 insertions(+), 4 deletions(-) - rename Documentation/devicetree/bindings/net/{brcm,bcm4908enet.yaml => brcm,bcm4908-enet.yaml} (85%) - ---- a/Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml -+++ /dev/null -@@ -1,45 +0,0 @@ --# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause --%YAML 1.2 ----- --$id: http://devicetree.org/schemas/net/brcm,bcm4908enet.yaml# --$schema: http://devicetree.org/meta-schemas/core.yaml# -- --title: Broadcom BCM4908 Ethernet controller -- --description: Broadcom's Ethernet controller integrated into BCM4908 family SoCs -- --maintainers: -- - Rafał Miłecki <rafal@milecki.pl> -- --properties: -- compatible: -- const: brcm,bcm4908enet -- -- reg: -- maxItems: 1 -- -- interrupts: -- description: RX interrupt -- -- interrupt-names: -- const: rx -- --required: -- - reg -- - interrupts -- - interrupt-names -- --additionalProperties: false -- --examples: -- - | -- #include <dt-bindings/interrupt-controller/irq.h> -- #include <dt-bindings/interrupt-controller/arm-gic.h> -- -- ethernet@80002000 { -- compatible = "brcm,bcm4908enet"; -- reg = <0x80002000 0x1000>; -- -- interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; -- interrupt-names = "rx"; -- }; ---- /dev/null -+++ b/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml -@@ -0,0 +1,45 @@ -+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/net/brcm,bcm4908-enet.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Broadcom BCM4908 Ethernet controller -+ -+description: Broadcom's Ethernet controller integrated into BCM4908 family SoCs -+ -+maintainers: -+ - Rafał Miłecki <rafal@milecki.pl> -+ -+properties: -+ compatible: -+ const: brcm,bcm4908-enet -+ -+ reg: -+ maxItems: 1 -+ -+ interrupts: -+ description: RX interrupt -+ -+ interrupt-names: -+ const: rx -+ -+required: -+ - reg -+ - interrupts -+ - interrupt-names -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include <dt-bindings/interrupt-controller/irq.h> -+ #include <dt-bindings/interrupt-controller/arm-gic.h> -+ -+ ethernet@80002000 { -+ compatible = "brcm,bcm4908-enet"; -+ reg = <0x80002000 0x1000>; -+ -+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "rx"; -+ }; ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -3432,7 +3432,7 @@ M: Rafał Miłecki <rafal@milecki.pl> - M: bcm-kernel-feedback-list@broadcom.com - L: netdev@vger.kernel.org - S: Maintained --F: Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml -+F: Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml - F: drivers/net/ethernet/broadcom/bcm4908enet.* - F: drivers/net/ethernet/broadcom/unimac.h - diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0002-dt-bindings-net-bcm4908-enet-include-ethernet-contro.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0002-dt-bindings-net-bcm4908-enet-include-ethernet-contro.patch deleted file mode 100644 index a4409a818a..0000000000 --- a/target/linux/bcm4908/patches-5.10/073-v5.12-0002-dt-bindings-net-bcm4908-enet-include-ethernet-contro.patch +++ /dev/null @@ -1,32 +0,0 @@ -From f08b5cf1eb1f2aefc6fe4a89c8c757ba94721d0b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 11 Feb 2021 13:12:33 +0100 -Subject: [PATCH] dt-bindings: net: bcm4908-enet: include - ethernet-controller.yaml -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It should be /included/ by every Ethernet controller binding. It adds -support for various generic properties. - -Suggested-by: Rob Herring <robh@kernel.org> -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml -+++ b/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml -@@ -11,6 +11,9 @@ description: Broadcom's Ethernet control - maintainers: - - Rafał Miłecki <rafal@milecki.pl> - -+allOf: -+ - $ref: ethernet-controller.yaml# -+ - properties: - compatible: - const: brcm,bcm4908-enet diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0003-net-broadcom-rename-BCM4908-driver-update-DT-binding.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0003-net-broadcom-rename-BCM4908-driver-update-DT-binding.patch deleted file mode 100644 index 3d22d0e042..0000000000 --- a/target/linux/bcm4908/patches-5.10/073-v5.12-0003-net-broadcom-rename-BCM4908-driver-update-DT-binding.patch +++ /dev/null @@ -1,1614 +0,0 @@ -From 9d61d138ab30bbfe4a8609853c81e881c4054a0b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 11 Feb 2021 13:12:34 +0100 -Subject: [PATCH] net: broadcom: rename BCM4908 driver & update DT binding -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -compatible string was updated to match normal naming convention so -update driver as well - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - MAINTAINERS | 2 +- - drivers/net/ethernet/broadcom/Kconfig | 2 +- - drivers/net/ethernet/broadcom/Makefile | 2 +- - .../{bcm4908enet.c => bcm4908_enet.c} | 215 +++++++++--------- - .../{bcm4908enet.h => bcm4908_enet.h} | 4 +- - 5 files changed, 113 insertions(+), 112 deletions(-) - rename drivers/net/ethernet/broadcom/{bcm4908enet.c => bcm4908_enet.c} (68%) - rename drivers/net/ethernet/broadcom/{bcm4908enet.h => bcm4908_enet.h} (98%) - ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -3433,7 +3433,7 @@ M: bcm-kernel-feedback-list@broadcom.com - L: netdev@vger.kernel.org - S: Maintained - F: Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml --F: drivers/net/ethernet/broadcom/bcm4908enet.* -+F: drivers/net/ethernet/broadcom/bcm4908_enet.* - F: drivers/net/ethernet/broadcom/unimac.h - - BROADCOM BCM5301X ARM ARCHITECTURE ---- a/drivers/net/ethernet/broadcom/Kconfig -+++ b/drivers/net/ethernet/broadcom/Kconfig -@@ -51,7 +51,7 @@ config B44_PCI - depends on B44_PCI_AUTOSELECT && B44_PCICORE_AUTOSELECT - default y - --config BCM4908ENET -+config BCM4908_ENET - tristate "Broadcom BCM4908 internal mac support" - depends on ARCH_BCM4908 || COMPILE_TEST - default y ---- a/drivers/net/ethernet/broadcom/Makefile -+++ b/drivers/net/ethernet/broadcom/Makefile -@@ -4,7 +4,7 @@ - # - - obj-$(CONFIG_B44) += b44.o --obj-$(CONFIG_BCM4908ENET) += bcm4908enet.o -+obj-$(CONFIG_BCM4908_ENET) += bcm4908_enet.o - obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o - obj-$(CONFIG_BCMGENET) += genet/ - obj-$(CONFIG_BNX2) += bnx2.o ---- a/drivers/net/ethernet/broadcom/bcm4908enet.c -+++ /dev/null -@@ -1,676 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0-only --/* -- * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl> -- */ -- --#include <linux/delay.h> --#include <linux/etherdevice.h> --#include <linux/interrupt.h> --#include <linux/module.h> --#include <linux/of.h> --#include <linux/platform_device.h> --#include <linux/slab.h> --#include <linux/string.h> -- --#include "bcm4908enet.h" --#include "unimac.h" -- --#define ENET_DMA_CH_RX_CFG ENET_DMA_CH0_CFG --#define ENET_DMA_CH_TX_CFG ENET_DMA_CH1_CFG --#define ENET_DMA_CH_RX_STATE_RAM ENET_DMA_CH0_STATE_RAM --#define ENET_DMA_CH_TX_STATE_RAM ENET_DMA_CH1_STATE_RAM -- --#define ENET_TX_BDS_NUM 200 --#define ENET_RX_BDS_NUM 200 --#define ENET_RX_BDS_NUM_MAX 8192 -- --#define ENET_DMA_INT_DEFAULTS (ENET_DMA_CH_CFG_INT_DONE | \ -- ENET_DMA_CH_CFG_INT_NO_DESC | \ -- ENET_DMA_CH_CFG_INT_BUFF_DONE) --#define ENET_DMA_MAX_BURST_LEN 8 /* in 64 bit words */ -- --#define ENET_MTU_MIN 60 --#define ENET_MTU_MAX 1500 /* Is it possible to support 2044? */ --#define ENET_MTU_MAX_EXTRA_SIZE 32 /* L2 */ -- --struct bcm4908enet_dma_ring_bd { -- __le32 ctl; -- __le32 addr; --} __packed; -- --struct bcm4908enet_dma_ring_slot { -- struct sk_buff *skb; -- unsigned int len; -- dma_addr_t dma_addr; --}; -- --struct bcm4908enet_dma_ring { -- int is_tx; -- int read_idx; -- int write_idx; -- int length; -- u16 cfg_block; -- u16 st_ram_block; -- -- union { -- void *cpu_addr; -- struct bcm4908enet_dma_ring_bd *buf_desc; -- }; -- dma_addr_t dma_addr; -- -- struct bcm4908enet_dma_ring_slot *slots; --}; -- --struct bcm4908enet { -- struct device *dev; -- struct net_device *netdev; -- struct napi_struct napi; -- void __iomem *base; -- -- struct bcm4908enet_dma_ring tx_ring; -- struct bcm4908enet_dma_ring rx_ring; --}; -- --/*** -- * R/W ops -- */ -- --static inline u32 enet_read(struct bcm4908enet *enet, u16 offset) --{ -- return readl(enet->base + offset); --} -- --static inline void enet_write(struct bcm4908enet *enet, u16 offset, u32 value) --{ -- writel(value, enet->base + offset); --} -- --static inline void enet_maskset(struct bcm4908enet *enet, u16 offset, u32 mask, u32 set) --{ -- u32 val; -- -- WARN_ON(set & ~mask); -- -- val = enet_read(enet, offset); -- val = (val & ~mask) | (set & mask); -- enet_write(enet, offset, val); --} -- --static inline void enet_set(struct bcm4908enet *enet, u16 offset, u32 set) --{ -- enet_maskset(enet, offset, set, set); --} -- --static inline u32 enet_umac_read(struct bcm4908enet *enet, u16 offset) --{ -- return enet_read(enet, ENET_UNIMAC + offset); --} -- --static inline void enet_umac_write(struct bcm4908enet *enet, u16 offset, u32 value) --{ -- enet_write(enet, ENET_UNIMAC + offset, value); --} -- --static inline void enet_umac_maskset(struct bcm4908enet *enet, u16 offset, u32 mask, u32 set) --{ -- enet_maskset(enet, ENET_UNIMAC + offset, mask, set); --} -- --static inline void enet_umac_set(struct bcm4908enet *enet, u16 offset, u32 set) --{ -- enet_set(enet, ENET_UNIMAC + offset, set); --} -- --/*** -- * Helpers -- */ -- --static void bcm4908enet_intrs_on(struct bcm4908enet *enet) --{ -- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS); --} -- --static void bcm4908enet_intrs_off(struct bcm4908enet *enet) --{ -- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, 0); --} -- --static void bcm4908enet_intrs_ack(struct bcm4908enet *enet) --{ -- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS); --} -- --/*** -- * DMA -- */ -- --static int bcm4908_dma_alloc_buf_descs(struct bcm4908enet *enet, struct bcm4908enet_dma_ring *ring) --{ -- int size = ring->length * sizeof(struct bcm4908enet_dma_ring_bd); -- struct device *dev = enet->dev; -- -- ring->cpu_addr = dma_alloc_coherent(dev, size, &ring->dma_addr, GFP_KERNEL); -- if (!ring->cpu_addr) -- return -ENOMEM; -- -- if (((uintptr_t)ring->cpu_addr) & (0x40 - 1)) { -- dev_err(dev, "Invalid DMA ring alignment\n"); -- goto err_free_buf_descs; -- } -- -- ring->slots = kzalloc(ring->length * sizeof(*ring->slots), GFP_KERNEL); -- if (!ring->slots) -- goto err_free_buf_descs; -- -- memset(ring->cpu_addr, 0, size); -- -- ring->read_idx = 0; -- ring->write_idx = 0; -- -- return 0; -- --err_free_buf_descs: -- dma_free_coherent(dev, size, ring->cpu_addr, ring->dma_addr); -- return -ENOMEM; --} -- --static void bcm4908enet_dma_free(struct bcm4908enet *enet) --{ -- struct bcm4908enet_dma_ring *tx_ring = &enet->tx_ring; -- struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; -- struct device *dev = enet->dev; -- int size; -- -- size = rx_ring->length * sizeof(struct bcm4908enet_dma_ring_bd); -- if (rx_ring->cpu_addr) -- dma_free_coherent(dev, size, rx_ring->cpu_addr, rx_ring->dma_addr); -- kfree(rx_ring->slots); -- -- size = tx_ring->length * sizeof(struct bcm4908enet_dma_ring_bd); -- if (tx_ring->cpu_addr) -- dma_free_coherent(dev, size, tx_ring->cpu_addr, tx_ring->dma_addr); -- kfree(tx_ring->slots); --} -- --static int bcm4908enet_dma_alloc(struct bcm4908enet *enet) --{ -- struct bcm4908enet_dma_ring *tx_ring = &enet->tx_ring; -- struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; -- struct device *dev = enet->dev; -- int err; -- -- tx_ring->length = ENET_TX_BDS_NUM; -- tx_ring->is_tx = 1; -- tx_ring->cfg_block = ENET_DMA_CH_TX_CFG; -- tx_ring->st_ram_block = ENET_DMA_CH_TX_STATE_RAM; -- err = bcm4908_dma_alloc_buf_descs(enet, tx_ring); -- if (err) { -- dev_err(dev, "Failed to alloc TX buf descriptors: %d\n", err); -- return err; -- } -- -- rx_ring->length = ENET_RX_BDS_NUM; -- rx_ring->is_tx = 0; -- rx_ring->cfg_block = ENET_DMA_CH_RX_CFG; -- rx_ring->st_ram_block = ENET_DMA_CH_RX_STATE_RAM; -- err = bcm4908_dma_alloc_buf_descs(enet, rx_ring); -- if (err) { -- dev_err(dev, "Failed to alloc RX buf descriptors: %d\n", err); -- bcm4908enet_dma_free(enet); -- return err; -- } -- -- return 0; --} -- --static void bcm4908enet_dma_reset(struct bcm4908enet *enet) --{ -- struct bcm4908enet_dma_ring *rings[] = { &enet->rx_ring, &enet->tx_ring }; -- int i; -- -- /* Disable the DMA controller and channel */ -- for (i = 0; i < ARRAY_SIZE(rings); i++) -- enet_write(enet, rings[i]->cfg_block + ENET_DMA_CH_CFG, 0); -- enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN, 0); -- -- /* Reset channels state */ -- for (i = 0; i < ARRAY_SIZE(rings); i++) { -- struct bcm4908enet_dma_ring *ring = rings[i]; -- -- enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, 0); -- enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_STATE_DATA, 0); -- enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS, 0); -- enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR, 0); -- } --} -- --static int bcm4908enet_dma_alloc_rx_buf(struct bcm4908enet *enet, unsigned int idx) --{ -- struct bcm4908enet_dma_ring_bd *buf_desc = &enet->rx_ring.buf_desc[idx]; -- struct bcm4908enet_dma_ring_slot *slot = &enet->rx_ring.slots[idx]; -- struct device *dev = enet->dev; -- u32 tmp; -- int err; -- -- slot->len = ENET_MTU_MAX + ENET_MTU_MAX_EXTRA_SIZE; -- -- slot->skb = netdev_alloc_skb(enet->netdev, slot->len); -- if (!slot->skb) -- return -ENOMEM; -- -- slot->dma_addr = dma_map_single(dev, slot->skb->data, slot->len, DMA_FROM_DEVICE); -- err = dma_mapping_error(dev, slot->dma_addr); -- if (err) { -- dev_err(dev, "Failed to map DMA buffer: %d\n", err); -- kfree_skb(slot->skb); -- slot->skb = NULL; -- return err; -- } -- -- tmp = slot->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; -- tmp |= DMA_CTL_STATUS_OWN; -- if (idx == enet->rx_ring.length - 1) -- tmp |= DMA_CTL_STATUS_WRAP; -- buf_desc->ctl = cpu_to_le32(tmp); -- buf_desc->addr = cpu_to_le32(slot->dma_addr); -- -- return 0; --} -- --static void bcm4908enet_dma_ring_init(struct bcm4908enet *enet, -- struct bcm4908enet_dma_ring *ring) --{ -- int reset_channel = 0; /* We support only 1 main channel (with TX and RX) */ -- int reset_subch = ring->is_tx ? 1 : 0; -- -- /* Reset the DMA channel */ -- enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, BIT(reset_channel * 2 + reset_subch)); -- enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, 0); -- -- enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0); -- enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_MAX_BURST, ENET_DMA_MAX_BURST_LEN); -- enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0); -- -- enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, -- (uint32_t)ring->dma_addr); --} -- --static void bcm4908enet_dma_uninit(struct bcm4908enet *enet) --{ -- struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; -- struct bcm4908enet_dma_ring_slot *slot; -- struct device *dev = enet->dev; -- int i; -- -- for (i = rx_ring->length - 1; i >= 0; i--) { -- slot = &rx_ring->slots[i]; -- if (!slot->skb) -- continue; -- dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_FROM_DEVICE); -- kfree_skb(slot->skb); -- slot->skb = NULL; -- } --} -- --static int bcm4908enet_dma_init(struct bcm4908enet *enet) --{ -- struct bcm4908enet_dma_ring *rx_ring = &enet->rx_ring; -- struct device *dev = enet->dev; -- int err; -- int i; -- -- for (i = 0; i < rx_ring->length; i++) { -- err = bcm4908enet_dma_alloc_rx_buf(enet, i); -- if (err) { -- dev_err(dev, "Failed to alloc RX buffer: %d\n", err); -- bcm4908enet_dma_uninit(enet); -- return err; -- } -- } -- -- bcm4908enet_dma_ring_init(enet, &enet->tx_ring); -- bcm4908enet_dma_ring_init(enet, &enet->rx_ring); -- -- return 0; --} -- --static void bcm4908enet_dma_tx_ring_ensable(struct bcm4908enet *enet, -- struct bcm4908enet_dma_ring *ring) --{ -- enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); --} -- --static void bcm4908enet_dma_tx_ring_disable(struct bcm4908enet *enet, -- struct bcm4908enet_dma_ring *ring) --{ -- enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0); --} -- --static void bcm4908enet_dma_rx_ring_enable(struct bcm4908enet *enet, -- struct bcm4908enet_dma_ring *ring) --{ -- enet_set(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); --} -- --static void bcm4908enet_dma_rx_ring_disable(struct bcm4908enet *enet, -- struct bcm4908enet_dma_ring *ring) --{ -- unsigned long deadline; -- u32 tmp; -- -- enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0); -- -- deadline = jiffies + usecs_to_jiffies(2000); -- do { -- tmp = enet_read(enet, ring->cfg_block + ENET_DMA_CH_CFG); -- if (!(tmp & ENET_DMA_CH_CFG_ENABLE)) -- return; -- enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0); -- usleep_range(10, 30); -- } while (!time_after_eq(jiffies, deadline)); -- -- dev_warn(enet->dev, "Timeout waiting for DMA TX stop\n"); --} -- --/*** -- * Ethernet driver -- */ -- --static void bcm4908enet_gmac_init(struct bcm4908enet *enet) --{ -- u32 cmd; -- -- cmd = enet_umac_read(enet, UMAC_CMD); -- enet_umac_write(enet, UMAC_CMD, cmd | CMD_SW_RESET); -- enet_umac_write(enet, UMAC_CMD, cmd & ~CMD_SW_RESET); -- -- enet_set(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH); -- enet_maskset(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH, 0); -- -- enet_set(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB); -- enet_maskset(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB, 0); -- -- cmd = enet_umac_read(enet, UMAC_CMD); -- cmd &= ~(CMD_SPEED_MASK << CMD_SPEED_SHIFT); -- cmd &= ~CMD_TX_EN; -- cmd &= ~CMD_RX_EN; -- cmd |= CMD_SPEED_1000 << CMD_SPEED_SHIFT; -- enet_umac_write(enet, UMAC_CMD, cmd); -- -- enet_maskset(enet, ENET_GMAC_STATUS, -- ENET_GMAC_STATUS_ETH_SPEED_MASK | -- ENET_GMAC_STATUS_HD | -- ENET_GMAC_STATUS_AUTO_CFG_EN | -- ENET_GMAC_STATUS_LINK_UP, -- ENET_GMAC_STATUS_ETH_SPEED_1000 | -- ENET_GMAC_STATUS_AUTO_CFG_EN | -- ENET_GMAC_STATUS_LINK_UP); --} -- --static irqreturn_t bcm4908enet_irq_handler(int irq, void *dev_id) --{ -- struct bcm4908enet *enet = dev_id; -- -- bcm4908enet_intrs_off(enet); -- bcm4908enet_intrs_ack(enet); -- -- napi_schedule(&enet->napi); -- -- return IRQ_HANDLED; --} -- --static int bcm4908enet_open(struct net_device *netdev) --{ -- struct bcm4908enet *enet = netdev_priv(netdev); -- struct device *dev = enet->dev; -- int err; -- -- err = request_irq(netdev->irq, bcm4908enet_irq_handler, 0, "enet", enet); -- if (err) { -- dev_err(dev, "Failed to request IRQ %d: %d\n", netdev->irq, err); -- return err; -- } -- -- bcm4908enet_gmac_init(enet); -- bcm4908enet_dma_reset(enet); -- bcm4908enet_dma_init(enet); -- -- enet_umac_set(enet, UMAC_CMD, CMD_TX_EN | CMD_RX_EN); -- -- enet_set(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN); -- enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_FLOWC_CH1_EN, 0); -- bcm4908enet_dma_rx_ring_enable(enet, &enet->rx_ring); -- -- napi_enable(&enet->napi); -- netif_carrier_on(netdev); -- netif_start_queue(netdev); -- -- bcm4908enet_intrs_ack(enet); -- bcm4908enet_intrs_on(enet); -- -- return 0; --} -- --static int bcm4908enet_stop(struct net_device *netdev) --{ -- struct bcm4908enet *enet = netdev_priv(netdev); -- -- netif_stop_queue(netdev); -- netif_carrier_off(netdev); -- napi_disable(&enet->napi); -- -- bcm4908enet_dma_rx_ring_disable(enet, &enet->rx_ring); -- bcm4908enet_dma_tx_ring_disable(enet, &enet->tx_ring); -- -- bcm4908enet_dma_uninit(enet); -- -- free_irq(enet->netdev->irq, enet); -- -- return 0; --} -- --static int bcm4908enet_start_xmit(struct sk_buff *skb, struct net_device *netdev) --{ -- struct bcm4908enet *enet = netdev_priv(netdev); -- struct bcm4908enet_dma_ring *ring = &enet->tx_ring; -- struct bcm4908enet_dma_ring_slot *slot; -- struct device *dev = enet->dev; -- struct bcm4908enet_dma_ring_bd *buf_desc; -- int free_buf_descs; -- u32 tmp; -- -- /* Free transmitted skbs */ -- while (ring->read_idx != ring->write_idx) { -- buf_desc = &ring->buf_desc[ring->read_idx]; -- if (buf_desc->ctl & DMA_CTL_STATUS_OWN) -- break; -- slot = &ring->slots[ring->read_idx]; -- -- dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE); -- dev_kfree_skb(slot->skb); -- if (++ring->read_idx == ring->length) -- ring->read_idx = 0; -- } -- -- /* Don't use the last empty buf descriptor */ -- if (ring->read_idx <= ring->write_idx) -- free_buf_descs = ring->read_idx - ring->write_idx + ring->length; -- else -- free_buf_descs = ring->read_idx - ring->write_idx; -- if (free_buf_descs < 2) -- return NETDEV_TX_BUSY; -- -- /* Hardware removes OWN bit after sending data */ -- buf_desc = &ring->buf_desc[ring->write_idx]; -- if (unlikely(le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN)) { -- netif_stop_queue(netdev); -- return NETDEV_TX_BUSY; -- } -- -- slot = &ring->slots[ring->write_idx]; -- slot->skb = skb; -- slot->len = skb->len; -- slot->dma_addr = dma_map_single(dev, skb->data, skb->len, DMA_TO_DEVICE); -- if (unlikely(dma_mapping_error(dev, slot->dma_addr))) -- return NETDEV_TX_BUSY; -- -- tmp = skb->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; -- tmp |= DMA_CTL_STATUS_OWN; -- tmp |= DMA_CTL_STATUS_SOP; -- tmp |= DMA_CTL_STATUS_EOP; -- tmp |= DMA_CTL_STATUS_APPEND_CRC; -- if (ring->write_idx + 1 == ring->length - 1) -- tmp |= DMA_CTL_STATUS_WRAP; -- -- buf_desc->addr = cpu_to_le32((uint32_t)slot->dma_addr); -- buf_desc->ctl = cpu_to_le32(tmp); -- -- bcm4908enet_dma_tx_ring_ensable(enet, &enet->tx_ring); -- -- if (++ring->write_idx == ring->length - 1) -- ring->write_idx = 0; -- enet->netdev->stats.tx_bytes += skb->len; -- enet->netdev->stats.tx_packets++; -- -- return NETDEV_TX_OK; --} -- --static int bcm4908enet_poll(struct napi_struct *napi, int weight) --{ -- struct bcm4908enet *enet = container_of(napi, struct bcm4908enet, napi); -- struct device *dev = enet->dev; -- int handled = 0; -- -- while (handled < weight) { -- struct bcm4908enet_dma_ring_bd *buf_desc; -- struct bcm4908enet_dma_ring_slot slot; -- u32 ctl; -- int len; -- int err; -- -- buf_desc = &enet->rx_ring.buf_desc[enet->rx_ring.read_idx]; -- ctl = le32_to_cpu(buf_desc->ctl); -- if (ctl & DMA_CTL_STATUS_OWN) -- break; -- -- slot = enet->rx_ring.slots[enet->rx_ring.read_idx]; -- -- /* Provide new buffer before unpinning the old one */ -- err = bcm4908enet_dma_alloc_rx_buf(enet, enet->rx_ring.read_idx); -- if (err) -- break; -- -- if (++enet->rx_ring.read_idx == enet->rx_ring.length) -- enet->rx_ring.read_idx = 0; -- -- len = (ctl & DMA_CTL_LEN_DESC_BUFLENGTH) >> DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; -- -- if (len < ENET_MTU_MIN || -- (ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) { -- enet->netdev->stats.rx_dropped++; -- break; -- } -- -- dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE); -- -- skb_put(slot.skb, len - 4 + 2); -- slot.skb->protocol = eth_type_trans(slot.skb, enet->netdev); -- netif_receive_skb(slot.skb); -- -- enet->netdev->stats.rx_packets++; -- enet->netdev->stats.rx_bytes += len; -- } -- -- if (handled < weight) { -- napi_complete_done(napi, handled); -- bcm4908enet_intrs_on(enet); -- } -- -- return handled; --} -- --static const struct net_device_ops bcm96xx_netdev_ops = { -- .ndo_open = bcm4908enet_open, -- .ndo_stop = bcm4908enet_stop, -- .ndo_start_xmit = bcm4908enet_start_xmit, -- .ndo_set_mac_address = eth_mac_addr, --}; -- --static int bcm4908enet_probe(struct platform_device *pdev) --{ -- struct device *dev = &pdev->dev; -- struct net_device *netdev; -- struct bcm4908enet *enet; -- int err; -- -- netdev = devm_alloc_etherdev(dev, sizeof(*enet)); -- if (!netdev) -- return -ENOMEM; -- -- enet = netdev_priv(netdev); -- enet->dev = dev; -- enet->netdev = netdev; -- -- enet->base = devm_platform_ioremap_resource(pdev, 0); -- if (IS_ERR(enet->base)) { -- dev_err(dev, "Failed to map registers: %ld\n", PTR_ERR(enet->base)); -- return PTR_ERR(enet->base); -- } -- -- netdev->irq = platform_get_irq_byname(pdev, "rx"); -- if (netdev->irq < 0) -- return netdev->irq; -- -- dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); -- -- err = bcm4908enet_dma_alloc(enet); -- if (err) -- return err; -- -- SET_NETDEV_DEV(netdev, &pdev->dev); -- eth_hw_addr_random(netdev); -- netdev->netdev_ops = &bcm96xx_netdev_ops; -- netdev->min_mtu = ETH_ZLEN; -- netdev->mtu = ENET_MTU_MAX; -- netdev->max_mtu = ENET_MTU_MAX; -- netif_napi_add(netdev, &enet->napi, bcm4908enet_poll, 64); -- -- err = register_netdev(netdev); -- if (err) { -- bcm4908enet_dma_free(enet); -- return err; -- } -- -- platform_set_drvdata(pdev, enet); -- -- return 0; --} -- --static int bcm4908enet_remove(struct platform_device *pdev) --{ -- struct bcm4908enet *enet = platform_get_drvdata(pdev); -- -- unregister_netdev(enet->netdev); -- netif_napi_del(&enet->napi); -- bcm4908enet_dma_free(enet); -- -- return 0; --} -- --static const struct of_device_id bcm4908enet_of_match[] = { -- { .compatible = "brcm,bcm4908enet"}, -- {}, --}; -- --static struct platform_driver bcm4908enet_driver = { -- .driver = { -- .name = "bcm4908enet", -- .of_match_table = bcm4908enet_of_match, -- }, -- .probe = bcm4908enet_probe, -- .remove = bcm4908enet_remove, --}; --module_platform_driver(bcm4908enet_driver); -- --MODULE_LICENSE("GPL v2"); --MODULE_DEVICE_TABLE(of, bcm4908enet_of_match); ---- /dev/null -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -0,0 +1,677 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* -+ * Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl> -+ */ -+ -+#include <linux/delay.h> -+#include <linux/etherdevice.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/of.h> -+#include <linux/platform_device.h> -+#include <linux/slab.h> -+#include <linux/string.h> -+ -+#include "bcm4908_enet.h" -+#include "unimac.h" -+ -+#define ENET_DMA_CH_RX_CFG ENET_DMA_CH0_CFG -+#define ENET_DMA_CH_TX_CFG ENET_DMA_CH1_CFG -+#define ENET_DMA_CH_RX_STATE_RAM ENET_DMA_CH0_STATE_RAM -+#define ENET_DMA_CH_TX_STATE_RAM ENET_DMA_CH1_STATE_RAM -+ -+#define ENET_TX_BDS_NUM 200 -+#define ENET_RX_BDS_NUM 200 -+#define ENET_RX_BDS_NUM_MAX 8192 -+ -+#define ENET_DMA_INT_DEFAULTS (ENET_DMA_CH_CFG_INT_DONE | \ -+ ENET_DMA_CH_CFG_INT_NO_DESC | \ -+ ENET_DMA_CH_CFG_INT_BUFF_DONE) -+#define ENET_DMA_MAX_BURST_LEN 8 /* in 64 bit words */ -+ -+#define ENET_MTU_MIN 60 -+#define ENET_MTU_MAX 1500 /* Is it possible to support 2044? */ -+#define ENET_MTU_MAX_EXTRA_SIZE 32 /* L2 */ -+ -+struct bcm4908_enet_dma_ring_bd { -+ __le32 ctl; -+ __le32 addr; -+} __packed; -+ -+struct bcm4908_enet_dma_ring_slot { -+ struct sk_buff *skb; -+ unsigned int len; -+ dma_addr_t dma_addr; -+}; -+ -+struct bcm4908_enet_dma_ring { -+ int is_tx; -+ int read_idx; -+ int write_idx; -+ int length; -+ u16 cfg_block; -+ u16 st_ram_block; -+ -+ union { -+ void *cpu_addr; -+ struct bcm4908_enet_dma_ring_bd *buf_desc; -+ }; -+ dma_addr_t dma_addr; -+ -+ struct bcm4908_enet_dma_ring_slot *slots; -+}; -+ -+struct bcm4908_enet { -+ struct device *dev; -+ struct net_device *netdev; -+ struct napi_struct napi; -+ void __iomem *base; -+ -+ struct bcm4908_enet_dma_ring tx_ring; -+ struct bcm4908_enet_dma_ring rx_ring; -+}; -+ -+/*** -+ * R/W ops -+ */ -+ -+static inline u32 enet_read(struct bcm4908_enet *enet, u16 offset) -+{ -+ return readl(enet->base + offset); -+} -+ -+static inline void enet_write(struct bcm4908_enet *enet, u16 offset, u32 value) -+{ -+ writel(value, enet->base + offset); -+} -+ -+static inline void enet_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set) -+{ -+ u32 val; -+ -+ WARN_ON(set & ~mask); -+ -+ val = enet_read(enet, offset); -+ val = (val & ~mask) | (set & mask); -+ enet_write(enet, offset, val); -+} -+ -+static inline void enet_set(struct bcm4908_enet *enet, u16 offset, u32 set) -+{ -+ enet_maskset(enet, offset, set, set); -+} -+ -+static inline u32 enet_umac_read(struct bcm4908_enet *enet, u16 offset) -+{ -+ return enet_read(enet, ENET_UNIMAC + offset); -+} -+ -+static inline void enet_umac_write(struct bcm4908_enet *enet, u16 offset, u32 value) -+{ -+ enet_write(enet, ENET_UNIMAC + offset, value); -+} -+ -+static inline void enet_umac_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set) -+{ -+ enet_maskset(enet, ENET_UNIMAC + offset, mask, set); -+} -+ -+static inline void enet_umac_set(struct bcm4908_enet *enet, u16 offset, u32 set) -+{ -+ enet_set(enet, ENET_UNIMAC + offset, set); -+} -+ -+/*** -+ * Helpers -+ */ -+ -+static void bcm4908_enet_intrs_on(struct bcm4908_enet *enet) -+{ -+ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS); -+} -+ -+static void bcm4908_enet_intrs_off(struct bcm4908_enet *enet) -+{ -+ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, 0); -+} -+ -+static void bcm4908_enet_intrs_ack(struct bcm4908_enet *enet) -+{ -+ enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS); -+} -+ -+/*** -+ * DMA -+ */ -+ -+static int bcm4908_dma_alloc_buf_descs(struct bcm4908_enet *enet, -+ struct bcm4908_enet_dma_ring *ring) -+{ -+ int size = ring->length * sizeof(struct bcm4908_enet_dma_ring_bd); -+ struct device *dev = enet->dev; -+ -+ ring->cpu_addr = dma_alloc_coherent(dev, size, &ring->dma_addr, GFP_KERNEL); -+ if (!ring->cpu_addr) -+ return -ENOMEM; -+ -+ if (((uintptr_t)ring->cpu_addr) & (0x40 - 1)) { -+ dev_err(dev, "Invalid DMA ring alignment\n"); -+ goto err_free_buf_descs; -+ } -+ -+ ring->slots = kzalloc(ring->length * sizeof(*ring->slots), GFP_KERNEL); -+ if (!ring->slots) -+ goto err_free_buf_descs; -+ -+ memset(ring->cpu_addr, 0, size); -+ -+ ring->read_idx = 0; -+ ring->write_idx = 0; -+ -+ return 0; -+ -+err_free_buf_descs: -+ dma_free_coherent(dev, size, ring->cpu_addr, ring->dma_addr); -+ return -ENOMEM; -+} -+ -+static void bcm4908_enet_dma_free(struct bcm4908_enet *enet) -+{ -+ struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring; -+ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring; -+ struct device *dev = enet->dev; -+ int size; -+ -+ size = rx_ring->length * sizeof(struct bcm4908_enet_dma_ring_bd); -+ if (rx_ring->cpu_addr) -+ dma_free_coherent(dev, size, rx_ring->cpu_addr, rx_ring->dma_addr); -+ kfree(rx_ring->slots); -+ -+ size = tx_ring->length * sizeof(struct bcm4908_enet_dma_ring_bd); -+ if (tx_ring->cpu_addr) -+ dma_free_coherent(dev, size, tx_ring->cpu_addr, tx_ring->dma_addr); -+ kfree(tx_ring->slots); -+} -+ -+static int bcm4908_enet_dma_alloc(struct bcm4908_enet *enet) -+{ -+ struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring; -+ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring; -+ struct device *dev = enet->dev; -+ int err; -+ -+ tx_ring->length = ENET_TX_BDS_NUM; -+ tx_ring->is_tx = 1; -+ tx_ring->cfg_block = ENET_DMA_CH_TX_CFG; -+ tx_ring->st_ram_block = ENET_DMA_CH_TX_STATE_RAM; -+ err = bcm4908_dma_alloc_buf_descs(enet, tx_ring); -+ if (err) { -+ dev_err(dev, "Failed to alloc TX buf descriptors: %d\n", err); -+ return err; -+ } -+ -+ rx_ring->length = ENET_RX_BDS_NUM; -+ rx_ring->is_tx = 0; -+ rx_ring->cfg_block = ENET_DMA_CH_RX_CFG; -+ rx_ring->st_ram_block = ENET_DMA_CH_RX_STATE_RAM; -+ err = bcm4908_dma_alloc_buf_descs(enet, rx_ring); -+ if (err) { -+ dev_err(dev, "Failed to alloc RX buf descriptors: %d\n", err); -+ bcm4908_enet_dma_free(enet); -+ return err; -+ } -+ -+ return 0; -+} -+ -+static void bcm4908_enet_dma_reset(struct bcm4908_enet *enet) -+{ -+ struct bcm4908_enet_dma_ring *rings[] = { &enet->rx_ring, &enet->tx_ring }; -+ int i; -+ -+ /* Disable the DMA controller and channel */ -+ for (i = 0; i < ARRAY_SIZE(rings); i++) -+ enet_write(enet, rings[i]->cfg_block + ENET_DMA_CH_CFG, 0); -+ enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN, 0); -+ -+ /* Reset channels state */ -+ for (i = 0; i < ARRAY_SIZE(rings); i++) { -+ struct bcm4908_enet_dma_ring *ring = rings[i]; -+ -+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, 0); -+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_STATE_DATA, 0); -+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS, 0); -+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR, 0); -+ } -+} -+ -+static int bcm4908_enet_dma_alloc_rx_buf(struct bcm4908_enet *enet, unsigned int idx) -+{ -+ struct bcm4908_enet_dma_ring_bd *buf_desc = &enet->rx_ring.buf_desc[idx]; -+ struct bcm4908_enet_dma_ring_slot *slot = &enet->rx_ring.slots[idx]; -+ struct device *dev = enet->dev; -+ u32 tmp; -+ int err; -+ -+ slot->len = ENET_MTU_MAX + ENET_MTU_MAX_EXTRA_SIZE; -+ -+ slot->skb = netdev_alloc_skb(enet->netdev, slot->len); -+ if (!slot->skb) -+ return -ENOMEM; -+ -+ slot->dma_addr = dma_map_single(dev, slot->skb->data, slot->len, DMA_FROM_DEVICE); -+ err = dma_mapping_error(dev, slot->dma_addr); -+ if (err) { -+ dev_err(dev, "Failed to map DMA buffer: %d\n", err); -+ kfree_skb(slot->skb); -+ slot->skb = NULL; -+ return err; -+ } -+ -+ tmp = slot->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; -+ tmp |= DMA_CTL_STATUS_OWN; -+ if (idx == enet->rx_ring.length - 1) -+ tmp |= DMA_CTL_STATUS_WRAP; -+ buf_desc->ctl = cpu_to_le32(tmp); -+ buf_desc->addr = cpu_to_le32(slot->dma_addr); -+ -+ return 0; -+} -+ -+static void bcm4908_enet_dma_ring_init(struct bcm4908_enet *enet, -+ struct bcm4908_enet_dma_ring *ring) -+{ -+ int reset_channel = 0; /* We support only 1 main channel (with TX and RX) */ -+ int reset_subch = ring->is_tx ? 1 : 0; -+ -+ /* Reset the DMA channel */ -+ enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, BIT(reset_channel * 2 + reset_subch)); -+ enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, 0); -+ -+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0); -+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_MAX_BURST, ENET_DMA_MAX_BURST_LEN); -+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0); -+ -+ enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, -+ (uint32_t)ring->dma_addr); -+} -+ -+static void bcm4908_enet_dma_uninit(struct bcm4908_enet *enet) -+{ -+ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring; -+ struct bcm4908_enet_dma_ring_slot *slot; -+ struct device *dev = enet->dev; -+ int i; -+ -+ for (i = rx_ring->length - 1; i >= 0; i--) { -+ slot = &rx_ring->slots[i]; -+ if (!slot->skb) -+ continue; -+ dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_FROM_DEVICE); -+ kfree_skb(slot->skb); -+ slot->skb = NULL; -+ } -+} -+ -+static int bcm4908_enet_dma_init(struct bcm4908_enet *enet) -+{ -+ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring; -+ struct device *dev = enet->dev; -+ int err; -+ int i; -+ -+ for (i = 0; i < rx_ring->length; i++) { -+ err = bcm4908_enet_dma_alloc_rx_buf(enet, i); -+ if (err) { -+ dev_err(dev, "Failed to alloc RX buffer: %d\n", err); -+ bcm4908_enet_dma_uninit(enet); -+ return err; -+ } -+ } -+ -+ bcm4908_enet_dma_ring_init(enet, &enet->tx_ring); -+ bcm4908_enet_dma_ring_init(enet, &enet->rx_ring); -+ -+ return 0; -+} -+ -+static void bcm4908_enet_dma_tx_ring_ensable(struct bcm4908_enet *enet, -+ struct bcm4908_enet_dma_ring *ring) -+{ -+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); -+} -+ -+static void bcm4908_enet_dma_tx_ring_disable(struct bcm4908_enet *enet, -+ struct bcm4908_enet_dma_ring *ring) -+{ -+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0); -+} -+ -+static void bcm4908_enet_dma_rx_ring_enable(struct bcm4908_enet *enet, -+ struct bcm4908_enet_dma_ring *ring) -+{ -+ enet_set(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); -+} -+ -+static void bcm4908_enet_dma_rx_ring_disable(struct bcm4908_enet *enet, -+ struct bcm4908_enet_dma_ring *ring) -+{ -+ unsigned long deadline; -+ u32 tmp; -+ -+ enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0); -+ -+ deadline = jiffies + usecs_to_jiffies(2000); -+ do { -+ tmp = enet_read(enet, ring->cfg_block + ENET_DMA_CH_CFG); -+ if (!(tmp & ENET_DMA_CH_CFG_ENABLE)) -+ return; -+ enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0); -+ usleep_range(10, 30); -+ } while (!time_after_eq(jiffies, deadline)); -+ -+ dev_warn(enet->dev, "Timeout waiting for DMA TX stop\n"); -+} -+ -+/*** -+ * Ethernet driver -+ */ -+ -+static void bcm4908_enet_gmac_init(struct bcm4908_enet *enet) -+{ -+ u32 cmd; -+ -+ cmd = enet_umac_read(enet, UMAC_CMD); -+ enet_umac_write(enet, UMAC_CMD, cmd | CMD_SW_RESET); -+ enet_umac_write(enet, UMAC_CMD, cmd & ~CMD_SW_RESET); -+ -+ enet_set(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH); -+ enet_maskset(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH, 0); -+ -+ enet_set(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB); -+ enet_maskset(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB, 0); -+ -+ cmd = enet_umac_read(enet, UMAC_CMD); -+ cmd &= ~(CMD_SPEED_MASK << CMD_SPEED_SHIFT); -+ cmd &= ~CMD_TX_EN; -+ cmd &= ~CMD_RX_EN; -+ cmd |= CMD_SPEED_1000 << CMD_SPEED_SHIFT; -+ enet_umac_write(enet, UMAC_CMD, cmd); -+ -+ enet_maskset(enet, ENET_GMAC_STATUS, -+ ENET_GMAC_STATUS_ETH_SPEED_MASK | -+ ENET_GMAC_STATUS_HD | -+ ENET_GMAC_STATUS_AUTO_CFG_EN | -+ ENET_GMAC_STATUS_LINK_UP, -+ ENET_GMAC_STATUS_ETH_SPEED_1000 | -+ ENET_GMAC_STATUS_AUTO_CFG_EN | -+ ENET_GMAC_STATUS_LINK_UP); -+} -+ -+static irqreturn_t bcm4908_enet_irq_handler(int irq, void *dev_id) -+{ -+ struct bcm4908_enet *enet = dev_id; -+ -+ bcm4908_enet_intrs_off(enet); -+ bcm4908_enet_intrs_ack(enet); -+ -+ napi_schedule(&enet->napi); -+ -+ return IRQ_HANDLED; -+} -+ -+static int bcm4908_enet_open(struct net_device *netdev) -+{ -+ struct bcm4908_enet *enet = netdev_priv(netdev); -+ struct device *dev = enet->dev; -+ int err; -+ -+ err = request_irq(netdev->irq, bcm4908_enet_irq_handler, 0, "enet", enet); -+ if (err) { -+ dev_err(dev, "Failed to request IRQ %d: %d\n", netdev->irq, err); -+ return err; -+ } -+ -+ bcm4908_enet_gmac_init(enet); -+ bcm4908_enet_dma_reset(enet); -+ bcm4908_enet_dma_init(enet); -+ -+ enet_umac_set(enet, UMAC_CMD, CMD_TX_EN | CMD_RX_EN); -+ -+ enet_set(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN); -+ enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_FLOWC_CH1_EN, 0); -+ bcm4908_enet_dma_rx_ring_enable(enet, &enet->rx_ring); -+ -+ napi_enable(&enet->napi); -+ netif_carrier_on(netdev); -+ netif_start_queue(netdev); -+ -+ bcm4908_enet_intrs_ack(enet); -+ bcm4908_enet_intrs_on(enet); -+ -+ return 0; -+} -+ -+static int bcm4908_enet_stop(struct net_device *netdev) -+{ -+ struct bcm4908_enet *enet = netdev_priv(netdev); -+ -+ netif_stop_queue(netdev); -+ netif_carrier_off(netdev); -+ napi_disable(&enet->napi); -+ -+ bcm4908_enet_dma_rx_ring_disable(enet, &enet->rx_ring); -+ bcm4908_enet_dma_tx_ring_disable(enet, &enet->tx_ring); -+ -+ bcm4908_enet_dma_uninit(enet); -+ -+ free_irq(enet->netdev->irq, enet); -+ -+ return 0; -+} -+ -+static int bcm4908_enet_start_xmit(struct sk_buff *skb, struct net_device *netdev) -+{ -+ struct bcm4908_enet *enet = netdev_priv(netdev); -+ struct bcm4908_enet_dma_ring *ring = &enet->tx_ring; -+ struct bcm4908_enet_dma_ring_slot *slot; -+ struct device *dev = enet->dev; -+ struct bcm4908_enet_dma_ring_bd *buf_desc; -+ int free_buf_descs; -+ u32 tmp; -+ -+ /* Free transmitted skbs */ -+ while (ring->read_idx != ring->write_idx) { -+ buf_desc = &ring->buf_desc[ring->read_idx]; -+ if (buf_desc->ctl & DMA_CTL_STATUS_OWN) -+ break; -+ slot = &ring->slots[ring->read_idx]; -+ -+ dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE); -+ dev_kfree_skb(slot->skb); -+ if (++ring->read_idx == ring->length) -+ ring->read_idx = 0; -+ } -+ -+ /* Don't use the last empty buf descriptor */ -+ if (ring->read_idx <= ring->write_idx) -+ free_buf_descs = ring->read_idx - ring->write_idx + ring->length; -+ else -+ free_buf_descs = ring->read_idx - ring->write_idx; -+ if (free_buf_descs < 2) -+ return NETDEV_TX_BUSY; -+ -+ /* Hardware removes OWN bit after sending data */ -+ buf_desc = &ring->buf_desc[ring->write_idx]; -+ if (unlikely(le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN)) { -+ netif_stop_queue(netdev); -+ return NETDEV_TX_BUSY; -+ } -+ -+ slot = &ring->slots[ring->write_idx]; -+ slot->skb = skb; -+ slot->len = skb->len; -+ slot->dma_addr = dma_map_single(dev, skb->data, skb->len, DMA_TO_DEVICE); -+ if (unlikely(dma_mapping_error(dev, slot->dma_addr))) -+ return NETDEV_TX_BUSY; -+ -+ tmp = skb->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; -+ tmp |= DMA_CTL_STATUS_OWN; -+ tmp |= DMA_CTL_STATUS_SOP; -+ tmp |= DMA_CTL_STATUS_EOP; -+ tmp |= DMA_CTL_STATUS_APPEND_CRC; -+ if (ring->write_idx + 1 == ring->length - 1) -+ tmp |= DMA_CTL_STATUS_WRAP; -+ -+ buf_desc->addr = cpu_to_le32((uint32_t)slot->dma_addr); -+ buf_desc->ctl = cpu_to_le32(tmp); -+ -+ bcm4908_enet_dma_tx_ring_ensable(enet, &enet->tx_ring); -+ -+ if (++ring->write_idx == ring->length - 1) -+ ring->write_idx = 0; -+ enet->netdev->stats.tx_bytes += skb->len; -+ enet->netdev->stats.tx_packets++; -+ -+ return NETDEV_TX_OK; -+} -+ -+static int bcm4908_enet_poll(struct napi_struct *napi, int weight) -+{ -+ struct bcm4908_enet *enet = container_of(napi, struct bcm4908_enet, napi); -+ struct device *dev = enet->dev; -+ int handled = 0; -+ -+ while (handled < weight) { -+ struct bcm4908_enet_dma_ring_bd *buf_desc; -+ struct bcm4908_enet_dma_ring_slot slot; -+ u32 ctl; -+ int len; -+ int err; -+ -+ buf_desc = &enet->rx_ring.buf_desc[enet->rx_ring.read_idx]; -+ ctl = le32_to_cpu(buf_desc->ctl); -+ if (ctl & DMA_CTL_STATUS_OWN) -+ break; -+ -+ slot = enet->rx_ring.slots[enet->rx_ring.read_idx]; -+ -+ /* Provide new buffer before unpinning the old one */ -+ err = bcm4908_enet_dma_alloc_rx_buf(enet, enet->rx_ring.read_idx); -+ if (err) -+ break; -+ -+ if (++enet->rx_ring.read_idx == enet->rx_ring.length) -+ enet->rx_ring.read_idx = 0; -+ -+ len = (ctl & DMA_CTL_LEN_DESC_BUFLENGTH) >> DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; -+ -+ if (len < ENET_MTU_MIN || -+ (ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) { -+ enet->netdev->stats.rx_dropped++; -+ break; -+ } -+ -+ dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE); -+ -+ skb_put(slot.skb, len - 4 + 2); -+ slot.skb->protocol = eth_type_trans(slot.skb, enet->netdev); -+ netif_receive_skb(slot.skb); -+ -+ enet->netdev->stats.rx_packets++; -+ enet->netdev->stats.rx_bytes += len; -+ } -+ -+ if (handled < weight) { -+ napi_complete_done(napi, handled); -+ bcm4908_enet_intrs_on(enet); -+ } -+ -+ return handled; -+} -+ -+static const struct net_device_ops bcm96xx_netdev_ops = { -+ .ndo_open = bcm4908_enet_open, -+ .ndo_stop = bcm4908_enet_stop, -+ .ndo_start_xmit = bcm4908_enet_start_xmit, -+ .ndo_set_mac_address = eth_mac_addr, -+}; -+ -+static int bcm4908_enet_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct net_device *netdev; -+ struct bcm4908_enet *enet; -+ int err; -+ -+ netdev = devm_alloc_etherdev(dev, sizeof(*enet)); -+ if (!netdev) -+ return -ENOMEM; -+ -+ enet = netdev_priv(netdev); -+ enet->dev = dev; -+ enet->netdev = netdev; -+ -+ enet->base = devm_platform_ioremap_resource(pdev, 0); -+ if (IS_ERR(enet->base)) { -+ dev_err(dev, "Failed to map registers: %ld\n", PTR_ERR(enet->base)); -+ return PTR_ERR(enet->base); -+ } -+ -+ netdev->irq = platform_get_irq_byname(pdev, "rx"); -+ if (netdev->irq < 0) -+ return netdev->irq; -+ -+ dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); -+ -+ err = bcm4908_enet_dma_alloc(enet); -+ if (err) -+ return err; -+ -+ SET_NETDEV_DEV(netdev, &pdev->dev); -+ eth_hw_addr_random(netdev); -+ netdev->netdev_ops = &bcm96xx_netdev_ops; -+ netdev->min_mtu = ETH_ZLEN; -+ netdev->mtu = ENET_MTU_MAX; -+ netdev->max_mtu = ENET_MTU_MAX; -+ netif_napi_add(netdev, &enet->napi, bcm4908_enet_poll, 64); -+ -+ err = register_netdev(netdev); -+ if (err) { -+ bcm4908_enet_dma_free(enet); -+ return err; -+ } -+ -+ platform_set_drvdata(pdev, enet); -+ -+ return 0; -+} -+ -+static int bcm4908_enet_remove(struct platform_device *pdev) -+{ -+ struct bcm4908_enet *enet = platform_get_drvdata(pdev); -+ -+ unregister_netdev(enet->netdev); -+ netif_napi_del(&enet->napi); -+ bcm4908_enet_dma_free(enet); -+ -+ return 0; -+} -+ -+static const struct of_device_id bcm4908_enet_of_match[] = { -+ { .compatible = "brcm,bcm4908-enet"}, -+ {}, -+}; -+ -+static struct platform_driver bcm4908_enet_driver = { -+ .driver = { -+ .name = "bcm4908_enet", -+ .of_match_table = bcm4908_enet_of_match, -+ }, -+ .probe = bcm4908_enet_probe, -+ .remove = bcm4908_enet_remove, -+}; -+module_platform_driver(bcm4908_enet_driver); -+ -+MODULE_LICENSE("GPL v2"); -+MODULE_DEVICE_TABLE(of, bcm4908_enet_of_match); ---- a/drivers/net/ethernet/broadcom/bcm4908enet.h -+++ /dev/null -@@ -1,96 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0-only */ --#ifndef __BCM4908ENET_H --#define __BCM4908ENET_H -- --#define ENET_CONTROL 0x000 --#define ENET_MIB_CTRL 0x004 --#define ENET_MIB_CTRL_CLR_MIB 0x00000001 --#define ENET_RX_ERR_MASK 0x008 --#define ENET_MIB_MAX_PKT_SIZE 0x00C --#define ENET_MIB_MAX_PKT_SIZE_VAL 0x00003fff --#define ENET_DIAG_OUT 0x01c --#define ENET_ENABLE_DROP_PKT 0x020 --#define ENET_IRQ_ENABLE 0x024 --#define ENET_IRQ_ENABLE_OVFL 0x00000001 --#define ENET_GMAC_STATUS 0x028 --#define ENET_GMAC_STATUS_ETH_SPEED_MASK 0x00000003 --#define ENET_GMAC_STATUS_ETH_SPEED_10 0x00000000 --#define ENET_GMAC_STATUS_ETH_SPEED_100 0x00000001 --#define ENET_GMAC_STATUS_ETH_SPEED_1000 0x00000002 --#define ENET_GMAC_STATUS_HD 0x00000004 --#define ENET_GMAC_STATUS_AUTO_CFG_EN 0x00000008 --#define ENET_GMAC_STATUS_LINK_UP 0x00000010 --#define ENET_IRQ_STATUS 0x02c --#define ENET_IRQ_STATUS_OVFL 0x00000001 --#define ENET_OVERFLOW_COUNTER 0x030 --#define ENET_FLUSH 0x034 --#define ENET_FLUSH_RXFIFO_FLUSH 0x00000001 --#define ENET_FLUSH_TXFIFO_FLUSH 0x00000002 --#define ENET_RSV_SELECT 0x038 --#define ENET_BP_FORCE 0x03c --#define ENET_BP_FORCE_FORCE 0x00000001 --#define ENET_DMA_RX_OK_TO_SEND_COUNT 0x040 --#define ENET_DMA_RX_OK_TO_SEND_COUNT_VAL 0x0000000f --#define ENET_TX_CRC_CTRL 0x044 --#define ENET_MIB 0x200 --#define ENET_UNIMAC 0x400 --#define ENET_DMA 0x800 --#define ENET_DMA_CONTROLLER_CFG 0x800 --#define ENET_DMA_CTRL_CFG_MASTER_EN 0x00000001 --#define ENET_DMA_CTRL_CFG_FLOWC_CH1_EN 0x00000002 --#define ENET_DMA_CTRL_CFG_FLOWC_CH3_EN 0x00000004 --#define ENET_DMA_FLOWCTL_CH1_THRESH_LO 0x804 --#define ENET_DMA_FLOWCTL_CH1_THRESH_HI 0x808 --#define ENET_DMA_FLOWCTL_CH1_ALLOC 0x80c --#define ENET_DMA_FLOWCTL_CH1_ALLOC_FORCE 0x80000000 --#define ENET_DMA_FLOWCTL_CH3_THRESH_LO 0x810 --#define ENET_DMA_FLOWCTL_CH3_THRESH_HI 0x814 --#define ENET_DMA_FLOWCTL_CH3_ALLOC 0x818 --#define ENET_DMA_FLOWCTL_CH5_THRESH_LO 0x81C --#define ENET_DMA_FLOWCTL_CH5_THRESH_HI 0x820 --#define ENET_DMA_FLOWCTL_CH5_ALLOC 0x824 --#define ENET_DMA_FLOWCTL_CH7_THRESH_LO 0x828 --#define ENET_DMA_FLOWCTL_CH7_THRESH_HI 0x82C --#define ENET_DMA_FLOWCTL_CH7_ALLOC 0x830 --#define ENET_DMA_CTRL_CHANNEL_RESET 0x834 --#define ENET_DMA_CTRL_CHANNEL_DEBUG 0x838 --#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_STATUS 0x840 --#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_MASK 0x844 --#define ENET_DMA_CH0_CFG 0xa00 /* RX */ --#define ENET_DMA_CH1_CFG 0xa10 /* TX */ --#define ENET_DMA_CH0_STATE_RAM 0xc00 /* RX */ --#define ENET_DMA_CH1_STATE_RAM 0xc10 /* TX */ -- --#define ENET_DMA_CH_CFG 0x00 /* assorted configuration */ --#define ENET_DMA_CH_CFG_ENABLE 0x00000001 /* set to enable channel */ --#define ENET_DMA_CH_CFG_PKT_HALT 0x00000002 /* idle after an EOP flag is detected */ --#define ENET_DMA_CH_CFG_BURST_HALT 0x00000004 /* idle after finish current memory burst */ --#define ENET_DMA_CH_CFG_INT_STAT 0x04 /* interrupts control and status */ --#define ENET_DMA_CH_CFG_INT_MASK 0x08 /* interrupts mask */ --#define ENET_DMA_CH_CFG_INT_BUFF_DONE 0x00000001 /* buffer done */ --#define ENET_DMA_CH_CFG_INT_DONE 0x00000002 /* packet xfer complete */ --#define ENET_DMA_CH_CFG_INT_NO_DESC 0x00000004 /* no valid descriptors */ --#define ENET_DMA_CH_CFG_INT_RX_ERROR 0x00000008 /* rxdma detect client protocol error */ --#define ENET_DMA_CH_CFG_MAX_BURST 0x0c /* max burst length permitted */ --#define ENET_DMA_CH_CFG_MAX_BURST_DESCSIZE_SEL 0x00040000 /* DMA Descriptor Size Selection */ --#define ENET_DMA_CH_CFG_SIZE 0x10 -- --#define ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR 0x00 /* descriptor ring start address */ --#define ENET_DMA_CH_STATE_RAM_STATE_DATA 0x04 /* state/bytes done/ring offset */ --#define ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS 0x08 /* buffer descriptor status and len */ --#define ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR 0x0c /* buffer descrpitor current processing */ --#define ENET_DMA_CH_STATE_RAM_SIZE 0x10 -- --#define DMA_CTL_STATUS_APPEND_CRC 0x00000100 --#define DMA_CTL_STATUS_APPEND_BRCM_TAG 0x00000200 --#define DMA_CTL_STATUS_PRIO 0x00000C00 /* Prio for Tx */ --#define DMA_CTL_STATUS_WRAP 0x00001000 /* */ --#define DMA_CTL_STATUS_SOP 0x00002000 /* first buffer in packet */ --#define DMA_CTL_STATUS_EOP 0x00004000 /* last buffer in packet */ --#define DMA_CTL_STATUS_OWN 0x00008000 /* cleared by DMA, set by SW */ --#define DMA_CTL_LEN_DESC_BUFLENGTH 0x0fff0000 --#define DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT 16 --#define DMA_CTL_LEN_DESC_MULTICAST 0x40000000 --#define DMA_CTL_LEN_DESC_USEFPM 0x80000000 -- --#endif ---- /dev/null -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.h -@@ -0,0 +1,96 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+#ifndef __BCM4908_ENET_H -+#define __BCM4908_ENET_H -+ -+#define ENET_CONTROL 0x000 -+#define ENET_MIB_CTRL 0x004 -+#define ENET_MIB_CTRL_CLR_MIB 0x00000001 -+#define ENET_RX_ERR_MASK 0x008 -+#define ENET_MIB_MAX_PKT_SIZE 0x00C -+#define ENET_MIB_MAX_PKT_SIZE_VAL 0x00003fff -+#define ENET_DIAG_OUT 0x01c -+#define ENET_ENABLE_DROP_PKT 0x020 -+#define ENET_IRQ_ENABLE 0x024 -+#define ENET_IRQ_ENABLE_OVFL 0x00000001 -+#define ENET_GMAC_STATUS 0x028 -+#define ENET_GMAC_STATUS_ETH_SPEED_MASK 0x00000003 -+#define ENET_GMAC_STATUS_ETH_SPEED_10 0x00000000 -+#define ENET_GMAC_STATUS_ETH_SPEED_100 0x00000001 -+#define ENET_GMAC_STATUS_ETH_SPEED_1000 0x00000002 -+#define ENET_GMAC_STATUS_HD 0x00000004 -+#define ENET_GMAC_STATUS_AUTO_CFG_EN 0x00000008 -+#define ENET_GMAC_STATUS_LINK_UP 0x00000010 -+#define ENET_IRQ_STATUS 0x02c -+#define ENET_IRQ_STATUS_OVFL 0x00000001 -+#define ENET_OVERFLOW_COUNTER 0x030 -+#define ENET_FLUSH 0x034 -+#define ENET_FLUSH_RXFIFO_FLUSH 0x00000001 -+#define ENET_FLUSH_TXFIFO_FLUSH 0x00000002 -+#define ENET_RSV_SELECT 0x038 -+#define ENET_BP_FORCE 0x03c -+#define ENET_BP_FORCE_FORCE 0x00000001 -+#define ENET_DMA_RX_OK_TO_SEND_COUNT 0x040 -+#define ENET_DMA_RX_OK_TO_SEND_COUNT_VAL 0x0000000f -+#define ENET_TX_CRC_CTRL 0x044 -+#define ENET_MIB 0x200 -+#define ENET_UNIMAC 0x400 -+#define ENET_DMA 0x800 -+#define ENET_DMA_CONTROLLER_CFG 0x800 -+#define ENET_DMA_CTRL_CFG_MASTER_EN 0x00000001 -+#define ENET_DMA_CTRL_CFG_FLOWC_CH1_EN 0x00000002 -+#define ENET_DMA_CTRL_CFG_FLOWC_CH3_EN 0x00000004 -+#define ENET_DMA_FLOWCTL_CH1_THRESH_LO 0x804 -+#define ENET_DMA_FLOWCTL_CH1_THRESH_HI 0x808 -+#define ENET_DMA_FLOWCTL_CH1_ALLOC 0x80c -+#define ENET_DMA_FLOWCTL_CH1_ALLOC_FORCE 0x80000000 -+#define ENET_DMA_FLOWCTL_CH3_THRESH_LO 0x810 -+#define ENET_DMA_FLOWCTL_CH3_THRESH_HI 0x814 -+#define ENET_DMA_FLOWCTL_CH3_ALLOC 0x818 -+#define ENET_DMA_FLOWCTL_CH5_THRESH_LO 0x81C -+#define ENET_DMA_FLOWCTL_CH5_THRESH_HI 0x820 -+#define ENET_DMA_FLOWCTL_CH5_ALLOC 0x824 -+#define ENET_DMA_FLOWCTL_CH7_THRESH_LO 0x828 -+#define ENET_DMA_FLOWCTL_CH7_THRESH_HI 0x82C -+#define ENET_DMA_FLOWCTL_CH7_ALLOC 0x830 -+#define ENET_DMA_CTRL_CHANNEL_RESET 0x834 -+#define ENET_DMA_CTRL_CHANNEL_DEBUG 0x838 -+#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_STATUS 0x840 -+#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_MASK 0x844 -+#define ENET_DMA_CH0_CFG 0xa00 /* RX */ -+#define ENET_DMA_CH1_CFG 0xa10 /* TX */ -+#define ENET_DMA_CH0_STATE_RAM 0xc00 /* RX */ -+#define ENET_DMA_CH1_STATE_RAM 0xc10 /* TX */ -+ -+#define ENET_DMA_CH_CFG 0x00 /* assorted configuration */ -+#define ENET_DMA_CH_CFG_ENABLE 0x00000001 /* set to enable channel */ -+#define ENET_DMA_CH_CFG_PKT_HALT 0x00000002 /* idle after an EOP flag is detected */ -+#define ENET_DMA_CH_CFG_BURST_HALT 0x00000004 /* idle after finish current memory burst */ -+#define ENET_DMA_CH_CFG_INT_STAT 0x04 /* interrupts control and status */ -+#define ENET_DMA_CH_CFG_INT_MASK 0x08 /* interrupts mask */ -+#define ENET_DMA_CH_CFG_INT_BUFF_DONE 0x00000001 /* buffer done */ -+#define ENET_DMA_CH_CFG_INT_DONE 0x00000002 /* packet xfer complete */ -+#define ENET_DMA_CH_CFG_INT_NO_DESC 0x00000004 /* no valid descriptors */ -+#define ENET_DMA_CH_CFG_INT_RX_ERROR 0x00000008 /* rxdma detect client protocol error */ -+#define ENET_DMA_CH_CFG_MAX_BURST 0x0c /* max burst length permitted */ -+#define ENET_DMA_CH_CFG_MAX_BURST_DESCSIZE_SEL 0x00040000 /* DMA Descriptor Size Selection */ -+#define ENET_DMA_CH_CFG_SIZE 0x10 -+ -+#define ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR 0x00 /* descriptor ring start address */ -+#define ENET_DMA_CH_STATE_RAM_STATE_DATA 0x04 /* state/bytes done/ring offset */ -+#define ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS 0x08 /* buffer descriptor status and len */ -+#define ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR 0x0c /* buffer descrpitor current processing */ -+#define ENET_DMA_CH_STATE_RAM_SIZE 0x10 -+ -+#define DMA_CTL_STATUS_APPEND_CRC 0x00000100 -+#define DMA_CTL_STATUS_APPEND_BRCM_TAG 0x00000200 -+#define DMA_CTL_STATUS_PRIO 0x00000C00 /* Prio for Tx */ -+#define DMA_CTL_STATUS_WRAP 0x00001000 /* */ -+#define DMA_CTL_STATUS_SOP 0x00002000 /* first buffer in packet */ -+#define DMA_CTL_STATUS_EOP 0x00004000 /* last buffer in packet */ -+#define DMA_CTL_STATUS_OWN 0x00008000 /* cleared by DMA, set by SW */ -+#define DMA_CTL_LEN_DESC_BUFLENGTH 0x0fff0000 -+#define DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT 16 -+#define DMA_CTL_LEN_DESC_MULTICAST 0x40000000 -+#define DMA_CTL_LEN_DESC_USEFPM 0x80000000 -+ -+#endif diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0004-net-broadcom-bcm4908_enet-drop-unneeded-memset.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0004-net-broadcom-bcm4908_enet-drop-unneeded-memset.patch deleted file mode 100644 index 561f045b75..0000000000 --- a/target/linux/bcm4908/patches-5.10/073-v5.12-0004-net-broadcom-bcm4908_enet-drop-unneeded-memset.patch +++ /dev/null @@ -1,30 +0,0 @@ -From af263af64683f018be9ce3c309edfa9903f5109a Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 11 Feb 2021 13:12:35 +0100 -Subject: [PATCH] net: broadcom: bcm4908_enet: drop unneeded memset() -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -dma_alloc_coherent takes care of zeroing allocated memory - -Suggested-by: Andrew Lunn <andrew@lunn.ch> -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Andrew Lunn <andrew@lunn.ch> -Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 2 -- - 1 file changed, 2 deletions(-) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -163,8 +163,6 @@ static int bcm4908_dma_alloc_buf_descs(s - if (!ring->slots) - goto err_free_buf_descs; - -- memset(ring->cpu_addr, 0, size); -- - ring->read_idx = 0; - ring->write_idx = 0; - diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0005-net-broadcom-bcm4908_enet-drop-inline-from-C-functio.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0005-net-broadcom-bcm4908_enet-drop-inline-from-C-functio.patch deleted file mode 100644 index a8c188f30d..0000000000 --- a/target/linux/bcm4908/patches-5.10/073-v5.12-0005-net-broadcom-bcm4908_enet-drop-inline-from-C-functio.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 7b778ae4eb9cd6e1518e4e47902a104b13ae8929 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 11 Feb 2021 13:12:36 +0100 -Subject: [PATCH] net: broadcom: bcm4908_enet: drop "inline" from C functions -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It seems preferred to let compiler optimize code if applicable. -While at it drop unused enet_umac_maskset(). - -Suggested-by: Andrew Lunn <andrew@lunn.ch> -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Andrew Lunn <andrew@lunn.ch> -Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 19 +++++++------------ - 1 file changed, 7 insertions(+), 12 deletions(-) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -75,17 +75,17 @@ struct bcm4908_enet { - * R/W ops - */ - --static inline u32 enet_read(struct bcm4908_enet *enet, u16 offset) -+static u32 enet_read(struct bcm4908_enet *enet, u16 offset) - { - return readl(enet->base + offset); - } - --static inline void enet_write(struct bcm4908_enet *enet, u16 offset, u32 value) -+static void enet_write(struct bcm4908_enet *enet, u16 offset, u32 value) - { - writel(value, enet->base + offset); - } - --static inline void enet_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set) -+static void enet_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set) - { - u32 val; - -@@ -96,27 +96,22 @@ static inline void enet_maskset(struct b - enet_write(enet, offset, val); - } - --static inline void enet_set(struct bcm4908_enet *enet, u16 offset, u32 set) -+static void enet_set(struct bcm4908_enet *enet, u16 offset, u32 set) - { - enet_maskset(enet, offset, set, set); - } - --static inline u32 enet_umac_read(struct bcm4908_enet *enet, u16 offset) -+static u32 enet_umac_read(struct bcm4908_enet *enet, u16 offset) - { - return enet_read(enet, ENET_UNIMAC + offset); - } - --static inline void enet_umac_write(struct bcm4908_enet *enet, u16 offset, u32 value) -+static void enet_umac_write(struct bcm4908_enet *enet, u16 offset, u32 value) - { - enet_write(enet, ENET_UNIMAC + offset, value); - } - --static inline void enet_umac_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set) --{ -- enet_maskset(enet, ENET_UNIMAC + offset, mask, set); --} -- --static inline void enet_umac_set(struct bcm4908_enet *enet, u16 offset, u32 set) -+static void enet_umac_set(struct bcm4908_enet *enet, u16 offset, u32 set) - { - enet_set(enet, ENET_UNIMAC + offset, set); - } diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0006-net-broadcom-bcm4908_enet-fix-minor-typos.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0006-net-broadcom-bcm4908_enet-fix-minor-typos.patch deleted file mode 100644 index 1aacb1c8cf..0000000000 --- a/target/linux/bcm4908/patches-5.10/073-v5.12-0006-net-broadcom-bcm4908_enet-fix-minor-typos.patch +++ /dev/null @@ -1,60 +0,0 @@ -From e3948811720341f99cd5cb4a8a650473400ec4f8 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 11 Feb 2021 13:12:37 +0100 -Subject: [PATCH] net: broadcom: bcm4908_enet: fix minor typos -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -1. Fix "ensable" typo noticed by Andrew -2. Fix chipset name in the struct net_device_ops variable - -Suggested-by: Andrew Lunn <andrew@lunn.ch> -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Andrew Lunn <andrew@lunn.ch> -Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -328,8 +328,8 @@ static int bcm4908_enet_dma_init(struct - return 0; - } - --static void bcm4908_enet_dma_tx_ring_ensable(struct bcm4908_enet *enet, -- struct bcm4908_enet_dma_ring *ring) -+static void bcm4908_enet_dma_tx_ring_enable(struct bcm4908_enet *enet, -+ struct bcm4908_enet_dma_ring *ring) - { - enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE); - } -@@ -519,7 +519,7 @@ static int bcm4908_enet_start_xmit(struc - buf_desc->addr = cpu_to_le32((uint32_t)slot->dma_addr); - buf_desc->ctl = cpu_to_le32(tmp); - -- bcm4908_enet_dma_tx_ring_ensable(enet, &enet->tx_ring); -+ bcm4908_enet_dma_tx_ring_enable(enet, &enet->tx_ring); - - if (++ring->write_idx == ring->length - 1) - ring->write_idx = 0; -@@ -583,7 +583,7 @@ static int bcm4908_enet_poll(struct napi - return handled; - } - --static const struct net_device_ops bcm96xx_netdev_ops = { -+static const struct net_device_ops bcm4908_enet_netdev_ops = { - .ndo_open = bcm4908_enet_open, - .ndo_stop = bcm4908_enet_stop, - .ndo_start_xmit = bcm4908_enet_start_xmit, -@@ -623,7 +623,7 @@ static int bcm4908_enet_probe(struct pla - - SET_NETDEV_DEV(netdev, &pdev->dev); - eth_hw_addr_random(netdev); -- netdev->netdev_ops = &bcm96xx_netdev_ops; -+ netdev->netdev_ops = &bcm4908_enet_netdev_ops; - netdev->min_mtu = ETH_ZLEN; - netdev->mtu = ENET_MTU_MAX; - netdev->max_mtu = ENET_MTU_MAX; diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0007-net-broadcom-bcm4908_enet-fix-received-skb-length.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0007-net-broadcom-bcm4908_enet-fix-received-skb-length.patch deleted file mode 100644 index 1b51979d71..0000000000 --- a/target/linux/bcm4908/patches-5.10/073-v5.12-0007-net-broadcom-bcm4908_enet-fix-received-skb-length.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 195e2d9febfbeef1d09701c387925e5c2f5cb038 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 11 Feb 2021 13:12:38 +0100 -Subject: [PATCH] net: broadcom: bcm4908_enet: fix received skb length -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Use ETH_FCS_LEN instead of magic value and drop incorrect + 2 - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -567,7 +567,7 @@ static int bcm4908_enet_poll(struct napi - - dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE); - -- skb_put(slot.skb, len - 4 + 2); -+ skb_put(slot.skb, len - ETH_FCS_LEN); - slot.skb->protocol = eth_type_trans(slot.skb, enet->netdev); - netif_receive_skb(slot.skb); - diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0008-net-broadcom-bcm4908_enet-fix-endianness-in-xmit-cod.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0008-net-broadcom-bcm4908_enet-fix-endianness-in-xmit-cod.patch deleted file mode 100644 index eda0bf482e..0000000000 --- a/target/linux/bcm4908/patches-5.10/073-v5.12-0008-net-broadcom-bcm4908_enet-fix-endianness-in-xmit-cod.patch +++ /dev/null @@ -1,28 +0,0 @@ -From bdd70b997799099597fc0952fb0ec1bd80505bc4 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 11 Feb 2021 13:12:39 +0100 -Subject: [PATCH] net: broadcom: bcm4908_enet: fix endianness in xmit code -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Use le32_to_cpu() for reading __le32 struct field filled by hw. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -476,7 +476,7 @@ static int bcm4908_enet_start_xmit(struc - /* Free transmitted skbs */ - while (ring->read_idx != ring->write_idx) { - buf_desc = &ring->buf_desc[ring->read_idx]; -- if (buf_desc->ctl & DMA_CTL_STATUS_OWN) -+ if (le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN) - break; - slot = &ring->slots[ring->read_idx]; - diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0009-net-broadcom-bcm4908_enet-set-MTU-on-open-on-request.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0009-net-broadcom-bcm4908_enet-set-MTU-on-open-on-request.patch deleted file mode 100644 index 0201bfeda3..0000000000 --- a/target/linux/bcm4908/patches-5.10/073-v5.12-0009-net-broadcom-bcm4908_enet-set-MTU-on-open-on-request.patch +++ /dev/null @@ -1,119 +0,0 @@ -From 14b3b46a67f78ade99eafcbf320105615e948569 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 12 Feb 2021 16:21:35 +0100 -Subject: [PATCH] net: broadcom: bcm4908_enet: set MTU on open & on request -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Hardware comes up with default max frame size set to 1518. When using it -with switch it results in actual Ethernet MTU 1492: -1518 - 14 (Ethernet header) - 4 (Broadcom's tag) - 4 (802.1q) - 4 (FCS) - -Above means hardware in its default state can't handle standard Ethernet -traffic (MTU 1500). - -Define maximum possible Ethernet overhead and always set MAC max frame -length accordingly. This change fixes handling Ethernet frames of length -1506 - 1514. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 31 ++++++++++++++++---- - 1 file changed, 25 insertions(+), 6 deletions(-) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -5,6 +5,7 @@ - - #include <linux/delay.h> - #include <linux/etherdevice.h> -+#include <linux/if_vlan.h> - #include <linux/interrupt.h> - #include <linux/module.h> - #include <linux/of.h> -@@ -29,9 +30,10 @@ - ENET_DMA_CH_CFG_INT_BUFF_DONE) - #define ENET_DMA_MAX_BURST_LEN 8 /* in 64 bit words */ - --#define ENET_MTU_MIN 60 --#define ENET_MTU_MAX 1500 /* Is it possible to support 2044? */ --#define ENET_MTU_MAX_EXTRA_SIZE 32 /* L2 */ -+#define ENET_MTU_MAX ETH_DATA_LEN /* Is it possible to support 2044? */ -+#define BRCM_MAX_TAG_LEN 6 -+#define ENET_MAX_ETH_OVERHEAD (ETH_HLEN + BRCM_MAX_TAG_LEN + VLAN_HLEN + \ -+ ETH_FCS_LEN + 4) /* 32 */ - - struct bcm4908_enet_dma_ring_bd { - __le32 ctl; -@@ -135,6 +137,11 @@ static void bcm4908_enet_intrs_ack(struc - enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS); - } - -+static void bcm4908_enet_set_mtu(struct bcm4908_enet *enet, int mtu) -+{ -+ enet_umac_write(enet, UMAC_MAX_FRAME_LEN, mtu + ENET_MAX_ETH_OVERHEAD); -+} -+ - /*** - * DMA - */ -@@ -246,7 +253,7 @@ static int bcm4908_enet_dma_alloc_rx_buf - u32 tmp; - int err; - -- slot->len = ENET_MTU_MAX + ENET_MTU_MAX_EXTRA_SIZE; -+ slot->len = ENET_MTU_MAX + ENET_MAX_ETH_OVERHEAD; - - slot->skb = netdev_alloc_skb(enet->netdev, slot->len); - if (!slot->skb) -@@ -374,6 +381,8 @@ static void bcm4908_enet_gmac_init(struc - { - u32 cmd; - -+ bcm4908_enet_set_mtu(enet, enet->netdev->mtu); -+ - cmd = enet_umac_read(enet, UMAC_CMD); - enet_umac_write(enet, UMAC_CMD, cmd | CMD_SW_RESET); - enet_umac_write(enet, UMAC_CMD, cmd & ~CMD_SW_RESET); -@@ -559,7 +568,7 @@ static int bcm4908_enet_poll(struct napi - - len = (ctl & DMA_CTL_LEN_DESC_BUFLENGTH) >> DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; - -- if (len < ENET_MTU_MIN || -+ if (len < ETH_ZLEN || - (ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) { - enet->netdev->stats.rx_dropped++; - break; -@@ -583,11 +592,21 @@ static int bcm4908_enet_poll(struct napi - return handled; - } - -+static int bcm4908_enet_change_mtu(struct net_device *netdev, int new_mtu) -+{ -+ struct bcm4908_enet *enet = netdev_priv(netdev); -+ -+ bcm4908_enet_set_mtu(enet, new_mtu); -+ -+ return 0; -+} -+ - static const struct net_device_ops bcm4908_enet_netdev_ops = { - .ndo_open = bcm4908_enet_open, - .ndo_stop = bcm4908_enet_stop, - .ndo_start_xmit = bcm4908_enet_start_xmit, - .ndo_set_mac_address = eth_mac_addr, -+ .ndo_change_mtu = bcm4908_enet_change_mtu, - }; - - static int bcm4908_enet_probe(struct platform_device *pdev) -@@ -625,7 +644,7 @@ static int bcm4908_enet_probe(struct pla - eth_hw_addr_random(netdev); - netdev->netdev_ops = &bcm4908_enet_netdev_ops; - netdev->min_mtu = ETH_ZLEN; -- netdev->mtu = ENET_MTU_MAX; -+ netdev->mtu = ETH_DATA_LEN; - netdev->max_mtu = ENET_MTU_MAX; - netif_napi_add(netdev, &enet->napi, bcm4908_enet_poll, 64); - diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0010-net-broadcom-bcm4908_enet-fix-RX-path-possible-mem-l.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0010-net-broadcom-bcm4908_enet-fix-RX-path-possible-mem-l.patch deleted file mode 100644 index 8a24324122..0000000000 --- a/target/linux/bcm4908/patches-5.10/073-v5.12-0010-net-broadcom-bcm4908_enet-fix-RX-path-possible-mem-l.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 4dc7f09b8becfa35a55430a49d95acf19f996e6b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 24 Feb 2021 16:18:41 +0100 -Subject: [PATCH] net: broadcom: bcm4908_enet: fix RX path possible mem leak -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -After filling RX ring slot with new skb it's required to free old skb. -Immediately on error or later in the net subsystem. - -Fixes: 4feffeadbcb2 ("net: broadcom: bcm4908enet: add BCM4908 controller driver") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Link: https://lore.kernel.org/r/20210224151842.2419-1-zajec5@gmail.com -Signed-off-by: Jakub Kicinski <kuba@kernel.org> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -570,6 +570,7 @@ static int bcm4908_enet_poll(struct napi - - if (len < ETH_ZLEN || - (ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) { -+ kfree_skb(slot.skb); - enet->netdev->stats.rx_dropped++; - break; - } diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0011-net-broadcom-bcm4908_enet-fix-NAPI-poll-returned-val.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0011-net-broadcom-bcm4908_enet-fix-NAPI-poll-returned-val.patch deleted file mode 100644 index d4cf84e4b6..0000000000 --- a/target/linux/bcm4908/patches-5.10/073-v5.12-0011-net-broadcom-bcm4908_enet-fix-NAPI-poll-returned-val.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 4d9274cee40b6a20dd6148c6c81c6733c2678cbc Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 24 Feb 2021 16:18:42 +0100 -Subject: [PATCH] net: broadcom: bcm4908_enet: fix NAPI poll returned value -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Missing increment was resulting in poll function always returning 0 -instead of amount of processed packets. - -Fixes: 4feffeadbcb2 ("net: broadcom: bcm4908enet: add BCM4908 controller driver") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Link: https://lore.kernel.org/r/20210224151842.2419-2-zajec5@gmail.com -Signed-off-by: Jakub Kicinski <kuba@kernel.org> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -583,6 +583,8 @@ static int bcm4908_enet_poll(struct napi - - enet->netdev->stats.rx_packets++; - enet->netdev->stats.rx_bytes += len; -+ -+ handled++; - } - - if (handled < weight) { diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0012-net-broadcom-bcm4908_enet-enable-RX-after-processing.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0012-net-broadcom-bcm4908_enet-enable-RX-after-processing.patch deleted file mode 100644 index ad1bebf3ec..0000000000 --- a/target/linux/bcm4908/patches-5.10/073-v5.12-0012-net-broadcom-bcm4908_enet-enable-RX-after-processing.patch +++ /dev/null @@ -1,34 +0,0 @@ -From d313d16bbaea0f11a2e98f04a6c678b43c208915 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 26 Feb 2021 14:20:38 +0100 -Subject: [PATCH] net: broadcom: bcm4908_enet: enable RX after processing - packets -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -When receiving a lot of packets hardware may run out of free -descriptiors and stop RX ring. Enable it every time after handling -received packets. - -Fixes: 4feffeadbcb2 ("net: broadcom: bcm4908enet: add BCM4908 controller driver") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Link: https://lore.kernel.org/r/20210226132038.29849-1-zajec5@gmail.com -Signed-off-by: Jakub Kicinski <kuba@kernel.org> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -592,6 +592,9 @@ static int bcm4908_enet_poll(struct napi - bcm4908_enet_intrs_on(enet); - } - -+ /* Hardware could disable ring if it run out of descriptors */ -+ bcm4908_enet_dma_rx_ring_enable(enet, &enet->rx_ring); -+ - return handled; - } - diff --git a/target/linux/bcm4908/patches-5.10/073-v5.12-0013-net-broadcom-BCM4908_ENET-should-not-default-to-y-un.patch b/target/linux/bcm4908/patches-5.10/073-v5.12-0013-net-broadcom-BCM4908_ENET-should-not-default-to-y-un.patch deleted file mode 100644 index 43e5ee01bf..0000000000 --- a/target/linux/bcm4908/patches-5.10/073-v5.12-0013-net-broadcom-BCM4908_ENET-should-not-default-to-y-un.patch +++ /dev/null @@ -1,33 +0,0 @@ -From a3bc483216650a7232559bf0a1debfbabff3e12c Mon Sep 17 00:00:00 2001 -From: Geert Uytterhoeven <geert+renesas@glider.be> -Date: Tue, 16 Mar 2021 15:03:41 +0100 -Subject: [PATCH] net: broadcom: BCM4908_ENET should not default to y, - unconditionally -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Merely enabling compile-testing should not enable additional code. -To fix this, restrict the automatic enabling of BCM4908_ENET to -ARCH_BCM4908. - -Fixes: 4feffeadbcb2e5b1 ("net: broadcom: bcm4908enet: add BCM4908 controller driver") -Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Acked-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/ethernet/broadcom/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/ethernet/broadcom/Kconfig -+++ b/drivers/net/ethernet/broadcom/Kconfig -@@ -54,7 +54,7 @@ config B44_PCI - config BCM4908_ENET - tristate "Broadcom BCM4908 internal mac support" - depends on ARCH_BCM4908 || COMPILE_TEST -- default y -+ default y if ARCH_BCM4908 - help - This driver supports Ethernet controller integrated into Broadcom - BCM4908 family SoCs. diff --git a/target/linux/bcm4908/patches-5.10/074-v5.13-0001-net-broadcom-bcm4908_enet-read-MAC-from-OF.patch b/target/linux/bcm4908/patches-5.10/074-v5.13-0001-net-broadcom-bcm4908_enet-read-MAC-from-OF.patch deleted file mode 100644 index c4f336e671..0000000000 --- a/target/linux/bcm4908/patches-5.10/074-v5.13-0001-net-broadcom-bcm4908_enet-read-MAC-from-OF.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 3559c1ea4336636c886002996d50805365d3055c Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 10 Mar 2021 09:48:13 +0100 -Subject: [PATCH] net: broadcom: bcm4908_enet: read MAC from OF -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 devices have MAC address accessible using NVMEM so it's needed -to use OF helper for reading it. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 8 +++++++- - 1 file changed, 7 insertions(+), 1 deletion(-) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -9,6 +9,7 @@ - #include <linux/interrupt.h> - #include <linux/module.h> - #include <linux/of.h> -+#include <linux/of_net.h> - #include <linux/platform_device.h> - #include <linux/slab.h> - #include <linux/string.h> -@@ -647,7 +648,9 @@ static int bcm4908_enet_probe(struct pla - return err; - - SET_NETDEV_DEV(netdev, &pdev->dev); -- eth_hw_addr_random(netdev); -+ of_get_mac_address(dev->of_node, netdev->dev_addr); -+ if (!is_valid_ether_addr(netdev->dev_addr)) -+ eth_hw_addr_random(netdev); - netdev->netdev_ops = &bcm4908_enet_netdev_ops; - netdev->min_mtu = ETH_ZLEN; - netdev->mtu = ETH_DATA_LEN; diff --git a/target/linux/bcm4908/patches-5.10/074-v5.13-0002-dt-bindings-net-bcm4908-enet-add-optional-TX-interru.patch b/target/linux/bcm4908/patches-5.10/074-v5.13-0002-dt-bindings-net-bcm4908-enet-add-optional-TX-interru.patch deleted file mode 100644 index b61437a2de..0000000000 --- a/target/linux/bcm4908/patches-5.10/074-v5.13-0002-dt-bindings-net-bcm4908-enet-add-optional-TX-interru.patch +++ /dev/null @@ -1,50 +0,0 @@ -From ab4dda7a8cb7e55ea3d92fd5e249cf6f5396028c Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 11 Mar 2021 13:35:20 +0100 -Subject: [PATCH] dt-bindings: net: bcm4908-enet: add optional TX interrupt -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -I discovered that hardware actually supports two interrupts, one per DMA -channel (RX and TX). - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - .../bindings/net/brcm,bcm4908-enet.yaml | 17 +++++++++++++---- - 1 file changed, 13 insertions(+), 4 deletions(-) - ---- a/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml -+++ b/Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml -@@ -22,10 +22,18 @@ properties: - maxItems: 1 - - interrupts: -- description: RX interrupt -+ minItems: 1 -+ maxItems: 2 -+ items: -+ - description: RX interrupt -+ - description: TX interrupt - - interrupt-names: -- const: rx -+ minItems: 1 -+ maxItems: 2 -+ items: -+ - const: rx -+ - const: tx - - required: - - reg -@@ -43,6 +51,7 @@ examples: - compatible = "brcm,bcm4908-enet"; - reg = <0x80002000 0x1000>; - -- interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; -- interrupt-names = "rx"; -+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "rx", "tx"; - }; diff --git a/target/linux/bcm4908/patches-5.10/074-v5.13-0003-net-broadcom-bcm4908_enet-support-TX-interrupt.patch b/target/linux/bcm4908/patches-5.10/074-v5.13-0003-net-broadcom-bcm4908_enet-support-TX-interrupt.patch deleted file mode 100644 index 03ac4b07bf..0000000000 --- a/target/linux/bcm4908/patches-5.10/074-v5.13-0003-net-broadcom-bcm4908_enet-support-TX-interrupt.patch +++ /dev/null @@ -1,300 +0,0 @@ -From 12bb508bfe5a564c36864b12253db23cac83bfa1 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 11 Mar 2021 13:35:21 +0100 -Subject: [PATCH] net: broadcom: bcm4908_enet: support TX interrupt -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It appears that each DMA channel has its own interrupt and both rings -can be configured (the same way) to handle interrupts. - -1. Make ring interrupts code generic (make it operate on given ring) -2. Move napi to ring (so each has its own) -3. Make IRQ handler generic (match ring against received IRQ number) -4. Add (optional) support for TX interrupt - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 138 ++++++++++++++----- - 1 file changed, 103 insertions(+), 35 deletions(-) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -54,6 +54,7 @@ struct bcm4908_enet_dma_ring { - int length; - u16 cfg_block; - u16 st_ram_block; -+ struct napi_struct napi; - - union { - void *cpu_addr; -@@ -67,8 +68,8 @@ struct bcm4908_enet_dma_ring { - struct bcm4908_enet { - struct device *dev; - struct net_device *netdev; -- struct napi_struct napi; - void __iomem *base; -+ int irq_tx; - - struct bcm4908_enet_dma_ring tx_ring; - struct bcm4908_enet_dma_ring rx_ring; -@@ -123,24 +124,31 @@ static void enet_umac_set(struct bcm4908 - * Helpers - */ - --static void bcm4908_enet_intrs_on(struct bcm4908_enet *enet) -+static void bcm4908_enet_set_mtu(struct bcm4908_enet *enet, int mtu) - { -- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS); -+ enet_umac_write(enet, UMAC_MAX_FRAME_LEN, mtu + ENET_MAX_ETH_OVERHEAD); - } - --static void bcm4908_enet_intrs_off(struct bcm4908_enet *enet) -+/*** -+ * DMA ring ops -+ */ -+ -+static void bcm4908_enet_dma_ring_intrs_on(struct bcm4908_enet *enet, -+ struct bcm4908_enet_dma_ring *ring) - { -- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, 0); -+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS); - } - --static void bcm4908_enet_intrs_ack(struct bcm4908_enet *enet) -+static void bcm4908_enet_dma_ring_intrs_off(struct bcm4908_enet *enet, -+ struct bcm4908_enet_dma_ring *ring) - { -- enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS); -+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0); - } - --static void bcm4908_enet_set_mtu(struct bcm4908_enet *enet, int mtu) -+static void bcm4908_enet_dma_ring_intrs_ack(struct bcm4908_enet *enet, -+ struct bcm4908_enet_dma_ring *ring) - { -- enet_umac_write(enet, UMAC_MAX_FRAME_LEN, mtu + ENET_MAX_ETH_OVERHEAD); -+ enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS); - } - - /*** -@@ -414,11 +422,14 @@ static void bcm4908_enet_gmac_init(struc - static irqreturn_t bcm4908_enet_irq_handler(int irq, void *dev_id) - { - struct bcm4908_enet *enet = dev_id; -+ struct bcm4908_enet_dma_ring *ring; - -- bcm4908_enet_intrs_off(enet); -- bcm4908_enet_intrs_ack(enet); -+ ring = (irq == enet->irq_tx) ? &enet->tx_ring : &enet->rx_ring; - -- napi_schedule(&enet->napi); -+ bcm4908_enet_dma_ring_intrs_off(enet, ring); -+ bcm4908_enet_dma_ring_intrs_ack(enet, ring); -+ -+ napi_schedule(&ring->napi); - - return IRQ_HANDLED; - } -@@ -426,6 +437,8 @@ static irqreturn_t bcm4908_enet_irq_hand - static int bcm4908_enet_open(struct net_device *netdev) - { - struct bcm4908_enet *enet = netdev_priv(netdev); -+ struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring; -+ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring; - struct device *dev = enet->dev; - int err; - -@@ -435,6 +448,17 @@ static int bcm4908_enet_open(struct net_ - return err; - } - -+ if (enet->irq_tx > 0) { -+ err = request_irq(enet->irq_tx, bcm4908_enet_irq_handler, 0, -+ "tx", enet); -+ if (err) { -+ dev_err(dev, "Failed to request IRQ %d: %d\n", -+ enet->irq_tx, err); -+ free_irq(netdev->irq, enet); -+ return err; -+ } -+ } -+ - bcm4908_enet_gmac_init(enet); - bcm4908_enet_dma_reset(enet); - bcm4908_enet_dma_init(enet); -@@ -443,14 +467,19 @@ static int bcm4908_enet_open(struct net_ - - enet_set(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN); - enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_FLOWC_CH1_EN, 0); -- bcm4908_enet_dma_rx_ring_enable(enet, &enet->rx_ring); - -- napi_enable(&enet->napi); -+ if (enet->irq_tx > 0) { -+ napi_enable(&tx_ring->napi); -+ bcm4908_enet_dma_ring_intrs_ack(enet, tx_ring); -+ bcm4908_enet_dma_ring_intrs_on(enet, tx_ring); -+ } -+ -+ bcm4908_enet_dma_rx_ring_enable(enet, rx_ring); -+ napi_enable(&rx_ring->napi); - netif_carrier_on(netdev); - netif_start_queue(netdev); -- -- bcm4908_enet_intrs_ack(enet); -- bcm4908_enet_intrs_on(enet); -+ bcm4908_enet_dma_ring_intrs_ack(enet, rx_ring); -+ bcm4908_enet_dma_ring_intrs_on(enet, rx_ring); - - return 0; - } -@@ -458,16 +487,20 @@ static int bcm4908_enet_open(struct net_ - static int bcm4908_enet_stop(struct net_device *netdev) - { - struct bcm4908_enet *enet = netdev_priv(netdev); -+ struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring; -+ struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring; - - netif_stop_queue(netdev); - netif_carrier_off(netdev); -- napi_disable(&enet->napi); -+ napi_disable(&rx_ring->napi); -+ napi_disable(&tx_ring->napi); - - bcm4908_enet_dma_rx_ring_disable(enet, &enet->rx_ring); - bcm4908_enet_dma_tx_ring_disable(enet, &enet->tx_ring); - - bcm4908_enet_dma_uninit(enet); - -+ free_irq(enet->irq_tx, enet); - free_irq(enet->netdev->irq, enet); - - return 0; -@@ -484,25 +517,19 @@ static int bcm4908_enet_start_xmit(struc - u32 tmp; - - /* Free transmitted skbs */ -- while (ring->read_idx != ring->write_idx) { -- buf_desc = &ring->buf_desc[ring->read_idx]; -- if (le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN) -- break; -- slot = &ring->slots[ring->read_idx]; -- -- dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE); -- dev_kfree_skb(slot->skb); -- if (++ring->read_idx == ring->length) -- ring->read_idx = 0; -- } -+ if (enet->irq_tx < 0 && -+ !(le32_to_cpu(ring->buf_desc[ring->read_idx].ctl) & DMA_CTL_STATUS_OWN)) -+ napi_schedule(&enet->tx_ring.napi); - - /* Don't use the last empty buf descriptor */ - if (ring->read_idx <= ring->write_idx) - free_buf_descs = ring->read_idx - ring->write_idx + ring->length; - else - free_buf_descs = ring->read_idx - ring->write_idx; -- if (free_buf_descs < 2) -+ if (free_buf_descs < 2) { -+ netif_stop_queue(netdev); - return NETDEV_TX_BUSY; -+ } - - /* Hardware removes OWN bit after sending data */ - buf_desc = &ring->buf_desc[ring->write_idx]; -@@ -539,9 +566,10 @@ static int bcm4908_enet_start_xmit(struc - return NETDEV_TX_OK; - } - --static int bcm4908_enet_poll(struct napi_struct *napi, int weight) -+static int bcm4908_enet_poll_rx(struct napi_struct *napi, int weight) - { -- struct bcm4908_enet *enet = container_of(napi, struct bcm4908_enet, napi); -+ struct bcm4908_enet_dma_ring *rx_ring = container_of(napi, struct bcm4908_enet_dma_ring, napi); -+ struct bcm4908_enet *enet = container_of(rx_ring, struct bcm4908_enet, rx_ring); - struct device *dev = enet->dev; - int handled = 0; - -@@ -590,7 +618,7 @@ static int bcm4908_enet_poll(struct napi - - if (handled < weight) { - napi_complete_done(napi, handled); -- bcm4908_enet_intrs_on(enet); -+ bcm4908_enet_dma_ring_intrs_on(enet, rx_ring); - } - - /* Hardware could disable ring if it run out of descriptors */ -@@ -599,6 +627,42 @@ static int bcm4908_enet_poll(struct napi - return handled; - } - -+static int bcm4908_enet_poll_tx(struct napi_struct *napi, int weight) -+{ -+ struct bcm4908_enet_dma_ring *tx_ring = container_of(napi, struct bcm4908_enet_dma_ring, napi); -+ struct bcm4908_enet *enet = container_of(tx_ring, struct bcm4908_enet, tx_ring); -+ struct bcm4908_enet_dma_ring_bd *buf_desc; -+ struct bcm4908_enet_dma_ring_slot *slot; -+ struct device *dev = enet->dev; -+ unsigned int bytes = 0; -+ int handled = 0; -+ -+ while (handled < weight && tx_ring->read_idx != tx_ring->write_idx) { -+ buf_desc = &tx_ring->buf_desc[tx_ring->read_idx]; -+ if (le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN) -+ break; -+ slot = &tx_ring->slots[tx_ring->read_idx]; -+ -+ dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE); -+ dev_kfree_skb(slot->skb); -+ bytes += slot->len; -+ if (++tx_ring->read_idx == tx_ring->length) -+ tx_ring->read_idx = 0; -+ -+ handled++; -+ } -+ -+ if (handled < weight) { -+ napi_complete_done(napi, handled); -+ bcm4908_enet_dma_ring_intrs_on(enet, tx_ring); -+ } -+ -+ if (netif_queue_stopped(enet->netdev)) -+ netif_wake_queue(enet->netdev); -+ -+ return handled; -+} -+ - static int bcm4908_enet_change_mtu(struct net_device *netdev, int new_mtu) - { - struct bcm4908_enet *enet = netdev_priv(netdev); -@@ -641,6 +705,8 @@ static int bcm4908_enet_probe(struct pla - if (netdev->irq < 0) - return netdev->irq; - -+ enet->irq_tx = platform_get_irq_byname(pdev, "tx"); -+ - dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); - - err = bcm4908_enet_dma_alloc(enet); -@@ -655,7 +721,8 @@ static int bcm4908_enet_probe(struct pla - netdev->min_mtu = ETH_ZLEN; - netdev->mtu = ETH_DATA_LEN; - netdev->max_mtu = ENET_MTU_MAX; -- netif_napi_add(netdev, &enet->napi, bcm4908_enet_poll, 64); -+ netif_tx_napi_add(netdev, &enet->tx_ring.napi, bcm4908_enet_poll_tx, NAPI_POLL_WEIGHT); -+ netif_napi_add(netdev, &enet->rx_ring.napi, bcm4908_enet_poll_rx, NAPI_POLL_WEIGHT); - - err = register_netdev(netdev); - if (err) { -@@ -673,7 +740,8 @@ static int bcm4908_enet_remove(struct pl - struct bcm4908_enet *enet = platform_get_drvdata(pdev); - - unregister_netdev(enet->netdev); -- netif_napi_del(&enet->napi); -+ netif_napi_del(&enet->rx_ring.napi); -+ netif_napi_del(&enet->tx_ring.napi); - bcm4908_enet_dma_free(enet); - - return 0; diff --git a/target/linux/bcm4908/patches-5.10/075-v5.13-0001-net-dsa-bcm_sf2-store-PHY-interface-mode-in-port-str.patch b/target/linux/bcm4908/patches-5.10/075-v5.13-0001-net-dsa-bcm_sf2-store-PHY-interface-mode-in-port-str.patch deleted file mode 100644 index 9b3a831773..0000000000 --- a/target/linux/bcm4908/patches-5.10/075-v5.13-0001-net-dsa-bcm_sf2-store-PHY-interface-mode-in-port-str.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 01488a0ccd9abe15565bed50a45afcddbb0fe199 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 12 Mar 2021 11:41:07 +0100 -Subject: [PATCH] net: dsa: bcm_sf2: store PHY interface/mode in port structure -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's needed later for proper switch / crossbar setup. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/dsa/bcm_sf2.c | 16 ++++++++++++---- - drivers/net/dsa/bcm_sf2.h | 1 + - 2 files changed, 13 insertions(+), 4 deletions(-) - ---- a/drivers/net/dsa/bcm_sf2.c -+++ b/drivers/net/dsa/bcm_sf2.c -@@ -446,10 +446,11 @@ static void bcm_sf2_intr_disable(struct - static void bcm_sf2_identify_ports(struct bcm_sf2_priv *priv, - struct device_node *dn) - { -+ struct device *dev = priv->dev->ds->dev; -+ struct bcm_sf2_port_status *port_st; - struct device_node *port; - unsigned int port_num; - struct property *prop; -- phy_interface_t mode; - int err; - - priv->moca_port = -1; -@@ -458,19 +459,26 @@ static void bcm_sf2_identify_ports(struc - if (of_property_read_u32(port, "reg", &port_num)) - continue; - -+ if (port_num >= DSA_MAX_PORTS) { -+ dev_err(dev, "Invalid port number %d\n", port_num); -+ continue; -+ } -+ -+ port_st = &priv->port_sts[port_num]; -+ - /* Internal PHYs get assigned a specific 'phy-mode' property - * value: "internal" to help flag them before MDIO probing - * has completed, since they might be turned off at that - * time - */ -- err = of_get_phy_mode(port, &mode); -+ err = of_get_phy_mode(port, &port_st->mode); - if (err) - continue; - -- if (mode == PHY_INTERFACE_MODE_INTERNAL) -+ if (port_st->mode == PHY_INTERFACE_MODE_INTERNAL) - priv->int_phy_mask |= 1 << port_num; - -- if (mode == PHY_INTERFACE_MODE_MOCA) -+ if (port_st->mode == PHY_INTERFACE_MODE_MOCA) - priv->moca_port = port_num; - - if (of_property_read_bool(port, "brcm,use-bcm-hdr")) ---- a/drivers/net/dsa/bcm_sf2.h -+++ b/drivers/net/dsa/bcm_sf2.h -@@ -44,6 +44,7 @@ struct bcm_sf2_hw_params { - #define BCM_SF2_REGS_NUM 6 - - struct bcm_sf2_port_status { -+ phy_interface_t mode; - unsigned int link; - bool enabled; - }; diff --git a/target/linux/bcm4908/patches-5.10/075-v5.13-0002-net-dsa-bcm_sf2-setup-BCM4908-internal-crossbar.patch b/target/linux/bcm4908/patches-5.10/075-v5.13-0002-net-dsa-bcm_sf2-setup-BCM4908-internal-crossbar.patch deleted file mode 100644 index 8230648301..0000000000 --- a/target/linux/bcm4908/patches-5.10/075-v5.13-0002-net-dsa-bcm_sf2-setup-BCM4908-internal-crossbar.patch +++ /dev/null @@ -1,152 +0,0 @@ -From a9349f08ec6c1251d41ef167d27a15cc39bc5b97 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 12 Mar 2021 11:41:08 +0100 -Subject: [PATCH] net: dsa: bcm_sf2: setup BCM4908 internal crossbar -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -On some SoCs (e.g. BCM4908, BCM631[345]8) SF2 has an integrated -crossbar. It allows connecting its selected external ports to internal -ports. It's used by vendors to handle custom Ethernet setups. - -BCM4908 has following 3x2 crossbar. On Asus GT-AC5300 rgmii is used for -connecting external BCM53134S switch. GPHY4 is usually used for WAN -port. More fancy devices use SerDes for 2.5 Gbps Ethernet. - - ┌──────────┐ -SerDes ─── 0 ─┤ │ - │ 3x2 ├─ 0 ─── switch port 7 - GPHY4 ─── 1 ─┤ │ - │ crossbar ├─ 1 ─── runner (accelerator) - rgmii ─── 2 ─┤ │ - └──────────┘ - -Use setup data based on DT info to configure BCM4908's switch port 7. -Right now only GPHY and rgmii variants are supported. Handling SerDes -can be implemented later. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/dsa/bcm_sf2.c | 45 ++++++++++++++++++++++++++++++++++ - drivers/net/dsa/bcm_sf2.h | 1 + - drivers/net/dsa/bcm_sf2_regs.h | 7 ++++++ - 3 files changed, 53 insertions(+) - ---- a/drivers/net/dsa/bcm_sf2.c -+++ b/drivers/net/dsa/bcm_sf2.c -@@ -435,6 +435,44 @@ static int bcm_sf2_sw_rst(struct bcm_sf2 - return 0; - } - -+static void bcm_sf2_crossbar_setup(struct bcm_sf2_priv *priv) -+{ -+ struct device *dev = priv->dev->ds->dev; -+ int shift; -+ u32 mask; -+ u32 reg; -+ int i; -+ -+ mask = BIT(priv->num_crossbar_int_ports) - 1; -+ -+ reg = reg_readl(priv, REG_CROSSBAR); -+ switch (priv->type) { -+ case BCM4908_DEVICE_ID: -+ shift = CROSSBAR_BCM4908_INT_P7 * priv->num_crossbar_int_ports; -+ reg &= ~(mask << shift); -+ if (0) /* FIXME */ -+ reg |= CROSSBAR_BCM4908_EXT_SERDES << shift; -+ else if (priv->int_phy_mask & BIT(7)) -+ reg |= CROSSBAR_BCM4908_EXT_GPHY4 << shift; -+ else if (phy_interface_mode_is_rgmii(priv->port_sts[7].mode)) -+ reg |= CROSSBAR_BCM4908_EXT_RGMII << shift; -+ else if (WARN(1, "Invalid port mode\n")) -+ return; -+ break; -+ default: -+ return; -+ } -+ reg_writel(priv, reg, REG_CROSSBAR); -+ -+ reg = reg_readl(priv, REG_CROSSBAR); -+ for (i = 0; i < priv->num_crossbar_int_ports; i++) { -+ shift = i * priv->num_crossbar_int_ports; -+ -+ dev_dbg(dev, "crossbar int port #%d - ext port #%d\n", i, -+ (reg >> shift) & mask); -+ } -+} -+ - static void bcm_sf2_intr_disable(struct bcm_sf2_priv *priv) - { - intrl2_0_mask_set(priv, 0xffffffff); -@@ -880,6 +918,8 @@ static int bcm_sf2_sw_resume(struct dsa_ - return ret; - } - -+ bcm_sf2_crossbar_setup(priv); -+ - ret = bcm_sf2_cfp_resume(ds); - if (ret) - return ret; -@@ -1151,6 +1191,7 @@ struct bcm_sf2_of_data { - const u16 *reg_offsets; - unsigned int core_reg_align; - unsigned int num_cfp_rules; -+ unsigned int num_crossbar_int_ports; - }; - - static const u16 bcm_sf2_4908_reg_offsets[] = { -@@ -1175,6 +1216,7 @@ static const struct bcm_sf2_of_data bcm_ - .core_reg_align = 0, - .reg_offsets = bcm_sf2_4908_reg_offsets, - .num_cfp_rules = 0, /* FIXME */ -+ .num_crossbar_int_ports = 2, - }; - - /* Register offsets for the SWITCH_REG_* block */ -@@ -1285,6 +1327,7 @@ static int bcm_sf2_sw_probe(struct platf - priv->reg_offsets = data->reg_offsets; - priv->core_reg_align = data->core_reg_align; - priv->num_cfp_rules = data->num_cfp_rules; -+ priv->num_crossbar_int_ports = data->num_crossbar_int_ports; - - priv->rcdev = devm_reset_control_get_optional_exclusive(&pdev->dev, - "switch"); -@@ -1358,6 +1401,8 @@ static int bcm_sf2_sw_probe(struct platf - goto out_clk_mdiv; - } - -+ bcm_sf2_crossbar_setup(priv); -+ - bcm_sf2_gphy_enable_set(priv->dev->ds, true); - - ret = bcm_sf2_mdio_register(ds); ---- a/drivers/net/dsa/bcm_sf2.h -+++ b/drivers/net/dsa/bcm_sf2.h -@@ -74,6 +74,7 @@ struct bcm_sf2_priv { - const u16 *reg_offsets; - unsigned int core_reg_align; - unsigned int num_cfp_rules; -+ unsigned int num_crossbar_int_ports; - - /* spinlock protecting access to the indirect registers */ - spinlock_t indir_lock; ---- a/drivers/net/dsa/bcm_sf2_regs.h -+++ b/drivers/net/dsa/bcm_sf2_regs.h -@@ -48,6 +48,13 @@ enum bcm_sf2_reg_offs { - #define PHY_PHYAD_SHIFT 8 - #define PHY_PHYAD_MASK 0x1F - -+/* Relative to REG_CROSSBAR */ -+#define CROSSBAR_BCM4908_INT_P7 0 -+#define CROSSBAR_BCM4908_INT_RUNNER 1 -+#define CROSSBAR_BCM4908_EXT_SERDES 0 -+#define CROSSBAR_BCM4908_EXT_GPHY4 1 -+#define CROSSBAR_BCM4908_EXT_RGMII 2 -+ - #define REG_RGMII_CNTRL_P(x) (REG_RGMII_0_CNTRL + (x)) - - /* Relative to REG_RGMII_CNTRL */ diff --git a/target/linux/bcm4908/patches-5.10/075-v5.13-0003-net-dsa-bcm_sf2-Fill-in-BCM4908-CFP-entries.patch b/target/linux/bcm4908/patches-5.10/075-v5.13-0003-net-dsa-bcm_sf2-Fill-in-BCM4908-CFP-entries.patch deleted file mode 100644 index dc8479b479..0000000000 --- a/target/linux/bcm4908/patches-5.10/075-v5.13-0003-net-dsa-bcm_sf2-Fill-in-BCM4908-CFP-entries.patch +++ /dev/null @@ -1,25 +0,0 @@ -From f4e6d7cdbfae502788bc468295b232dec76ee57e Mon Sep 17 00:00:00 2001 -From: Florian Fainelli <f.fainelli@gmail.com> -Date: Fri, 12 Mar 2021 13:11:01 -0800 -Subject: [PATCH] net: dsa: bcm_sf2: Fill in BCM4908 CFP entries - -The BCM4908 switch has 256 CFP entrie, update that setting so CFP can be -used. - -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/dsa/bcm_sf2.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/dsa/bcm_sf2.c -+++ b/drivers/net/dsa/bcm_sf2.c -@@ -1215,7 +1215,7 @@ static const struct bcm_sf2_of_data bcm_ - .type = BCM4908_DEVICE_ID, - .core_reg_align = 0, - .reg_offsets = bcm_sf2_4908_reg_offsets, -- .num_cfp_rules = 0, /* FIXME */ -+ .num_cfp_rules = 256, - .num_crossbar_int_ports = 2, - }; - diff --git a/target/linux/bcm4908/patches-5.10/075-v5.13-0004-net-dsa-bcm_sf2-add-function-finding-RGMII-register.patch b/target/linux/bcm4908/patches-5.10/075-v5.13-0004-net-dsa-bcm_sf2-add-function-finding-RGMII-register.patch deleted file mode 100644 index 281a8bbcda..0000000000 --- a/target/linux/bcm4908/patches-5.10/075-v5.13-0004-net-dsa-bcm_sf2-add-function-finding-RGMII-register.patch +++ /dev/null @@ -1,161 +0,0 @@ -From 55cfeb396965c3906a84d09a9c487d065e37773b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 18 Mar 2021 09:01:42 +0100 -Subject: [PATCH 1/2] net: dsa: bcm_sf2: add function finding RGMII register -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Simple macro like REG_RGMII_CNTRL_P() is insufficient as: -1. It doesn't validate port argument -2. It doesn't support chipsets with non-lineral RGMII regs layout - -Missing port validation could result in getting register offset from out -of array. Random memory -> random offset -> random reads/writes. It -affected e.g. BCM4908 for REG_RGMII_CNTRL_P(7). - -Fixes: a78e86ed586d ("net: dsa: bcm_sf2: Prepare for different register layouts") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/dsa/bcm_sf2.c | 49 +++++++++++++++++++++++++++++----- - drivers/net/dsa/bcm_sf2_regs.h | 2 -- - 2 files changed, 42 insertions(+), 9 deletions(-) - ---- a/drivers/net/dsa/bcm_sf2.c -+++ b/drivers/net/dsa/bcm_sf2.c -@@ -75,6 +75,31 @@ static void bcm_sf2_recalc_clock(struct - clk_set_rate(priv->clk_mdiv, new_rate); - } - -+static u16 bcm_sf2_reg_rgmii_cntrl(struct bcm_sf2_priv *priv, int port) -+{ -+ switch (priv->type) { -+ case BCM4908_DEVICE_ID: -+ /* TODO */ -+ break; -+ default: -+ switch (port) { -+ case 0: -+ return REG_RGMII_0_CNTRL; -+ case 1: -+ return REG_RGMII_1_CNTRL; -+ case 2: -+ return REG_RGMII_2_CNTRL; -+ default: -+ break; -+ } -+ } -+ -+ WARN_ONCE(1, "Unsupported port %d\n", port); -+ -+ /* RO fallback reg */ -+ return REG_SWITCH_STATUS; -+} -+ - static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port) - { - struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds); -@@ -696,6 +721,7 @@ static void bcm_sf2_sw_mac_config(struct - { - struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds); - u32 id_mode_dis = 0, port_mode; -+ u32 reg_rgmii_ctrl; - u32 reg; - - if (port == core_readl(priv, CORE_IMP0_PRT_ID)) -@@ -719,10 +745,12 @@ static void bcm_sf2_sw_mac_config(struct - return; - } - -+ reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port); -+ - /* Clear id_mode_dis bit, and the existing port mode, let - * RGMII_MODE_EN bet set by mac_link_{up,down} - */ -- reg = reg_readl(priv, REG_RGMII_CNTRL_P(port)); -+ reg = reg_readl(priv, reg_rgmii_ctrl); - reg &= ~ID_MODE_DIS; - reg &= ~(PORT_MODE_MASK << PORT_MODE_SHIFT); - -@@ -730,13 +758,14 @@ static void bcm_sf2_sw_mac_config(struct - if (id_mode_dis) - reg |= ID_MODE_DIS; - -- reg_writel(priv, reg, REG_RGMII_CNTRL_P(port)); -+ reg_writel(priv, reg, reg_rgmii_ctrl); - } - - static void bcm_sf2_sw_mac_link_set(struct dsa_switch *ds, int port, - phy_interface_t interface, bool link) - { - struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds); -+ u32 reg_rgmii_ctrl; - u32 reg; - - if (!phy_interface_mode_is_rgmii(interface) && -@@ -744,13 +773,15 @@ static void bcm_sf2_sw_mac_link_set(stru - interface != PHY_INTERFACE_MODE_REVMII) - return; - -+ reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port); -+ - /* If the link is down, just disable the interface to conserve power */ -- reg = reg_readl(priv, REG_RGMII_CNTRL_P(port)); -+ reg = reg_readl(priv, reg_rgmii_ctrl); - if (link) - reg |= RGMII_MODE_EN; - else - reg &= ~RGMII_MODE_EN; -- reg_writel(priv, reg, REG_RGMII_CNTRL_P(port)); -+ reg_writel(priv, reg, reg_rgmii_ctrl); - } - - static void bcm_sf2_sw_mac_link_down(struct dsa_switch *ds, int port, -@@ -787,11 +818,15 @@ static void bcm_sf2_sw_mac_link_up(struc - { - struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds); - struct ethtool_eee *p = &priv->dev->ports[port].eee; -- u32 reg, offset; - - bcm_sf2_sw_mac_link_set(ds, port, interface, true); - - if (port != core_readl(priv, CORE_IMP0_PRT_ID)) { -+ u32 reg_rgmii_ctrl; -+ u32 reg, offset; -+ -+ reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port); -+ - if (priv->type == BCM4908_DEVICE_ID || - priv->type == BCM7445_DEVICE_ID) - offset = CORE_STS_OVERRIDE_GMIIP_PORT(port); -@@ -802,7 +837,7 @@ static void bcm_sf2_sw_mac_link_up(struc - interface == PHY_INTERFACE_MODE_RGMII_TXID || - interface == PHY_INTERFACE_MODE_MII || - interface == PHY_INTERFACE_MODE_REVMII) { -- reg = reg_readl(priv, REG_RGMII_CNTRL_P(port)); -+ reg = reg_readl(priv, reg_rgmii_ctrl); - reg &= ~(RX_PAUSE_EN | TX_PAUSE_EN); - - if (tx_pause) -@@ -810,7 +845,7 @@ static void bcm_sf2_sw_mac_link_up(struc - if (rx_pause) - reg |= RX_PAUSE_EN; - -- reg_writel(priv, reg, REG_RGMII_CNTRL_P(port)); -+ reg_writel(priv, reg, reg_rgmii_ctrl); - } - - reg = SW_OVERRIDE | LINK_STS; ---- a/drivers/net/dsa/bcm_sf2_regs.h -+++ b/drivers/net/dsa/bcm_sf2_regs.h -@@ -55,8 +55,6 @@ enum bcm_sf2_reg_offs { - #define CROSSBAR_BCM4908_EXT_GPHY4 1 - #define CROSSBAR_BCM4908_EXT_RGMII 2 - --#define REG_RGMII_CNTRL_P(x) (REG_RGMII_0_CNTRL + (x)) -- - /* Relative to REG_RGMII_CNTRL */ - #define RGMII_MODE_EN (1 << 0) - #define ID_MODE_DIS (1 << 1) diff --git a/target/linux/bcm4908/patches-5.10/075-v5.13-0005-net-dsa-bcm_sf2-fix-BCM4908-RGMII-reg-s.patch b/target/linux/bcm4908/patches-5.10/075-v5.13-0005-net-dsa-bcm_sf2-fix-BCM4908-RGMII-reg-s.patch deleted file mode 100644 index cf1c36c527..0000000000 --- a/target/linux/bcm4908/patches-5.10/075-v5.13-0005-net-dsa-bcm_sf2-fix-BCM4908-RGMII-reg-s.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 6859d91549341c2ad769d482de58129f080c0f04 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 18 Mar 2021 09:01:43 +0100 -Subject: [PATCH 2/2] net: dsa: bcm_sf2: fix BCM4908 RGMII reg(s) -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 has only 1 RGMII reg for controlling port 7. - -Fixes: 73b7a6047971 ("net: dsa: bcm_sf2: support BCM4908's integrated switch") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/dsa/bcm_sf2.c | 11 +++++++---- - drivers/net/dsa/bcm_sf2_regs.h | 1 + - 2 files changed, 8 insertions(+), 4 deletions(-) - ---- a/drivers/net/dsa/bcm_sf2.c -+++ b/drivers/net/dsa/bcm_sf2.c -@@ -79,7 +79,12 @@ static u16 bcm_sf2_reg_rgmii_cntrl(struc - { - switch (priv->type) { - case BCM4908_DEVICE_ID: -- /* TODO */ -+ switch (port) { -+ case 7: -+ return REG_RGMII_11_CNTRL; -+ default: -+ break; -+ } - break; - default: - switch (port) { -@@ -1238,9 +1243,7 @@ static const u16 bcm_sf2_4908_reg_offset - [REG_PHY_REVISION] = 0x14, - [REG_SPHY_CNTRL] = 0x24, - [REG_CROSSBAR] = 0xc8, -- [REG_RGMII_0_CNTRL] = 0xe0, -- [REG_RGMII_1_CNTRL] = 0xec, -- [REG_RGMII_2_CNTRL] = 0xf8, -+ [REG_RGMII_11_CNTRL] = 0x014c, - [REG_LED_0_CNTRL] = 0x40, - [REG_LED_1_CNTRL] = 0x4c, - [REG_LED_2_CNTRL] = 0x58, ---- a/drivers/net/dsa/bcm_sf2_regs.h -+++ b/drivers/net/dsa/bcm_sf2_regs.h -@@ -21,6 +21,7 @@ enum bcm_sf2_reg_offs { - REG_RGMII_0_CNTRL, - REG_RGMII_1_CNTRL, - REG_RGMII_2_CNTRL, -+ REG_RGMII_11_CNTRL, - REG_LED_0_CNTRL, - REG_LED_1_CNTRL, - REG_LED_2_CNTRL, diff --git a/target/linux/bcm4908/patches-5.10/075-v5.13-0006-net-dsa-bcm_sf2-Fix-bcm_sf2_reg_rgmii_cntrl-call-for.patch b/target/linux/bcm4908/patches-5.10/075-v5.13-0006-net-dsa-bcm_sf2-Fix-bcm_sf2_reg_rgmii_cntrl-call-for.patch deleted file mode 100644 index f7e9bcb5a2..0000000000 --- a/target/linux/bcm4908/patches-5.10/075-v5.13-0006-net-dsa-bcm_sf2-Fix-bcm_sf2_reg_rgmii_cntrl-call-for.patch +++ /dev/null @@ -1,46 +0,0 @@ -From fc516d3a6aa2c6ffe27d0da8818d13839e023e7e Mon Sep 17 00:00:00 2001 -From: Florian Fainelli <f.fainelli@gmail.com> -Date: Fri, 21 May 2021 10:46:14 -0700 -Subject: [PATCH] net: dsa: bcm_sf2: Fix bcm_sf2_reg_rgmii_cntrl() call for - non-RGMII port -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -We cannot call bcm_sf2_reg_rgmii_cntrl() for a port that is not RGMII, -yet we do that in bcm_sf2_sw_mac_link_up() irrespective of the port's -interface. Move that read until we have properly qualified the PHY -interface mode. This avoids triggering a warning on 7278 platforms that -have GMII ports. - -Fixes: 55cfeb396965 ("net: dsa: bcm_sf2: add function finding RGMII register") -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> -Acked-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/dsa/bcm_sf2.c | 5 ++--- - 1 file changed, 2 insertions(+), 3 deletions(-) - ---- a/drivers/net/dsa/bcm_sf2.c -+++ b/drivers/net/dsa/bcm_sf2.c -@@ -827,11 +827,9 @@ static void bcm_sf2_sw_mac_link_up(struc - bcm_sf2_sw_mac_link_set(ds, port, interface, true); - - if (port != core_readl(priv, CORE_IMP0_PRT_ID)) { -- u32 reg_rgmii_ctrl; -+ u32 reg_rgmii_ctrl = 0; - u32 reg, offset; - -- reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port); -- - if (priv->type == BCM4908_DEVICE_ID || - priv->type == BCM7445_DEVICE_ID) - offset = CORE_STS_OVERRIDE_GMIIP_PORT(port); -@@ -842,6 +840,7 @@ static void bcm_sf2_sw_mac_link_up(struc - interface == PHY_INTERFACE_MODE_RGMII_TXID || - interface == PHY_INTERFACE_MODE_MII || - interface == PHY_INTERFACE_MODE_REVMII) { -+ reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port); - reg = reg_readl(priv, reg_rgmii_ctrl); - reg &= ~(RX_PAUSE_EN | TX_PAUSE_EN); - diff --git a/target/linux/bcm4908/patches-5.10/076-v5.17-net-dsa-bcm_sf2-refactor-LED-regs-access.patch b/target/linux/bcm4908/patches-5.10/076-v5.17-net-dsa-bcm_sf2-refactor-LED-regs-access.patch deleted file mode 100644 index df8dcd8a2c..0000000000 --- a/target/linux/bcm4908/patches-5.10/076-v5.17-net-dsa-bcm_sf2-refactor-LED-regs-access.patch +++ /dev/null @@ -1,209 +0,0 @@ -From af30f8eaa8fe4ff1987280f716309711997bd979 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 29 Dec 2021 18:16:42 +0100 -Subject: [PATCH] net: dsa: bcm_sf2: refactor LED regs access -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -1. Define more regs. Some switches (e.g. BCM4908) have up to 6 regs. -2. Add helper for handling non-lineral port <-> reg mappings. -3. Add support for 12 B LED reg blocks on BCM4908 (different layout) - -Complete support for LEDs setup will be implemented once Linux receives -a proper design & implementation for "hardware" LEDs. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Link: https://lore.kernel.org/r/20211229171642.22942-1-zajec5@gmail.com -Signed-off-by: Jakub Kicinski <kuba@kernel.org> ---- - drivers/net/dsa/bcm_sf2.c | 54 ++++++++++++++++++++++++---- - drivers/net/dsa/bcm_sf2.h | 10 ++++++ - drivers/net/dsa/bcm_sf2_regs.h | 65 +++++++++++++++++++++++++++++++--- - 3 files changed, 119 insertions(+), 10 deletions(-) - ---- a/drivers/net/dsa/bcm_sf2.c -+++ b/drivers/net/dsa/bcm_sf2.c -@@ -32,6 +32,38 @@ - #include "b53/b53_priv.h" - #include "b53/b53_regs.h" - -+static u16 bcm_sf2_reg_led_base(struct bcm_sf2_priv *priv, int port) -+{ -+ switch (port) { -+ case 0: -+ return REG_LED_0_CNTRL; -+ case 1: -+ return REG_LED_1_CNTRL; -+ case 2: -+ return REG_LED_2_CNTRL; -+ } -+ -+ switch (priv->type) { -+ case BCM4908_DEVICE_ID: -+ switch (port) { -+ case 3: -+ return REG_LED_3_CNTRL; -+ case 7: -+ return REG_LED_4_CNTRL; -+ default: -+ break; -+ } -+ break; -+ default: -+ break; -+ } -+ -+ WARN_ONCE(1, "Unsupported port %d\n", port); -+ -+ /* RO fallback reg */ -+ return REG_SWITCH_STATUS; -+} -+ - /* Return the number of active ports, not counting the IMP (CPU) port */ - static unsigned int bcm_sf2_num_active_ports(struct dsa_switch *ds) - { -@@ -187,9 +219,14 @@ static void bcm_sf2_gphy_enable_set(stru - - /* Use PHY-driven LED signaling */ - if (!enable) { -- reg = reg_readl(priv, REG_LED_CNTRL(0)); -- reg |= SPDLNK_SRC_SEL; -- reg_writel(priv, reg, REG_LED_CNTRL(0)); -+ u16 led_ctrl = bcm_sf2_reg_led_base(priv, 0); -+ -+ if (priv->type == BCM7278_DEVICE_ID || -+ priv->type == BCM7445_DEVICE_ID) { -+ reg = reg_led_readl(priv, led_ctrl, 0); -+ reg |= LED_CNTRL_SPDLNK_SRC_SEL; -+ reg_led_writel(priv, reg, led_ctrl, 0); -+ } - } - } - -@@ -1243,9 +1280,14 @@ static const u16 bcm_sf2_4908_reg_offset - [REG_SPHY_CNTRL] = 0x24, - [REG_CROSSBAR] = 0xc8, - [REG_RGMII_11_CNTRL] = 0x014c, -- [REG_LED_0_CNTRL] = 0x40, -- [REG_LED_1_CNTRL] = 0x4c, -- [REG_LED_2_CNTRL] = 0x58, -+ [REG_LED_0_CNTRL] = 0x40, -+ [REG_LED_1_CNTRL] = 0x4c, -+ [REG_LED_2_CNTRL] = 0x58, -+ [REG_LED_3_CNTRL] = 0x64, -+ [REG_LED_4_CNTRL] = 0x88, -+ [REG_LED_5_CNTRL] = 0xa0, -+ [REG_LED_AGGREGATE_CTRL] = 0xb8, -+ - }; - - static const struct bcm_sf2_of_data bcm_sf2_4908_data = { ---- a/drivers/net/dsa/bcm_sf2.h -+++ b/drivers/net/dsa/bcm_sf2.h -@@ -210,6 +210,16 @@ SF2_IO_MACRO(acb); - SWITCH_INTR_L2(0); - SWITCH_INTR_L2(1); - -+static inline u32 reg_led_readl(struct bcm_sf2_priv *priv, u16 off, u16 reg) -+{ -+ return readl_relaxed(priv->reg + priv->reg_offsets[off] + reg); -+} -+ -+static inline void reg_led_writel(struct bcm_sf2_priv *priv, u32 val, u16 off, u16 reg) -+{ -+ writel_relaxed(val, priv->reg + priv->reg_offsets[off] + reg); -+} -+ - /* RXNFC */ - int bcm_sf2_get_rxnfc(struct dsa_switch *ds, int port, - struct ethtool_rxnfc *nfc, u32 *rule_locs); ---- a/drivers/net/dsa/bcm_sf2_regs.h -+++ b/drivers/net/dsa/bcm_sf2_regs.h -@@ -25,6 +25,10 @@ enum bcm_sf2_reg_offs { - REG_LED_0_CNTRL, - REG_LED_1_CNTRL, - REG_LED_2_CNTRL, -+ REG_LED_3_CNTRL, -+ REG_LED_4_CNTRL, -+ REG_LED_5_CNTRL, -+ REG_LED_AGGREGATE_CTRL, - REG_SWITCH_REG_MAX, - }; - -@@ -56,6 +60,63 @@ enum bcm_sf2_reg_offs { - #define CROSSBAR_BCM4908_EXT_GPHY4 1 - #define CROSSBAR_BCM4908_EXT_RGMII 2 - -+/* Relative to REG_LED_*_CNTRL (BCM7278, BCM7445) */ -+#define LED_CNTRL_NO_LINK_ENCODE_SHIFT 0 -+#define LED_CNTRL_M10_ENCODE_SHIFT 2 -+#define LED_CNTRL_M100_ENCODE_SHIFT 4 -+#define LED_CNTRL_M1000_ENCODE_SHIFT 6 -+#define LED_CNTRL_SEL_NO_LINK_ENCODE_SHIFT 8 -+#define LED_CNTRL_SEL_10M_ENCODE_SHIFT 10 -+#define LED_CNTRL_SEL_100M_ENCODE_SHIFT 12 -+#define LED_CNTRL_SEL_1000M_ENCODE_SHIFT 14 -+#define LED_CNTRL_RX_DV_EN (1 << 16) -+#define LED_CNTRL_TX_EN_EN (1 << 17) -+#define LED_CNTRL_SPDLNK_LED0_ACT_SEL_SHIFT 18 -+#define LED_CNTRL_SPDLNK_LED1_ACT_SEL_SHIFT 20 -+#define LED_CNTRL_ACT_LED_ACT_SEL_SHIFT 22 -+#define LED_CNTRL_SPDLNK_SRC_SEL (1 << 24) -+#define LED_CNTRL_SPDLNK_LED0_ACT_POL_SEL (1 << 25) -+#define LED_CNTRL_SPDLNK_LED1_ACT_POL_SEL (1 << 26) -+#define LED_CNTRL_ACT_LED_POL_SEL (1 << 27) -+#define LED_CNTRL_MASK 0x3 -+ -+/* Register relative to REG_LED_*_CNTRL (BCM4908) */ -+#define REG_LED_CTRL 0x0 -+#define LED_CTRL_RX_ACT_EN 0x00000001 -+#define LED_CTRL_TX_ACT_EN 0x00000002 -+#define LED_CTRL_SPDLNK_LED0_ACT_SEL 0x00000004 -+#define LED_CTRL_SPDLNK_LED1_ACT_SEL 0x00000008 -+#define LED_CTRL_SPDLNK_LED2_ACT_SEL 0x00000010 -+#define LED_CTRL_ACT_LED_ACT_SEL 0x00000020 -+#define LED_CTRL_SPDLNK_LED0_ACT_POL_SEL 0x00000040 -+#define LED_CTRL_SPDLNK_LED1_ACT_POL_SEL 0x00000080 -+#define LED_CTRL_SPDLNK_LED2_ACT_POL_SEL 0x00000100 -+#define LED_CTRL_ACT_LED_POL_SEL 0x00000200 -+#define LED_CTRL_LED_SPD_OVRD 0x00001c00 -+#define LED_CTRL_LNK_STATUS_OVRD 0x00002000 -+#define LED_CTRL_SPD_OVRD_EN 0x00004000 -+#define LED_CTRL_LNK_OVRD_EN 0x00008000 -+ -+/* Register relative to REG_LED_*_CNTRL (BCM4908) */ -+#define REG_LED_LINK_SPEED_ENC_SEL 0x4 -+#define LED_LINK_SPEED_ENC_SEL_NO_LINK_SHIFT 0 -+#define LED_LINK_SPEED_ENC_SEL_10M_SHIFT 3 -+#define LED_LINK_SPEED_ENC_SEL_100M_SHIFT 6 -+#define LED_LINK_SPEED_ENC_SEL_1000M_SHIFT 9 -+#define LED_LINK_SPEED_ENC_SEL_2500M_SHIFT 12 -+#define LED_LINK_SPEED_ENC_SEL_10G_SHIFT 15 -+#define LED_LINK_SPEED_ENC_SEL_MASK 0x7 -+ -+/* Register relative to REG_LED_*_CNTRL (BCM4908) */ -+#define REG_LED_LINK_SPEED_ENC 0x8 -+#define LED_LINK_SPEED_ENC_NO_LINK_SHIFT 0 -+#define LED_LINK_SPEED_ENC_M10_SHIFT 3 -+#define LED_LINK_SPEED_ENC_M100_SHIFT 6 -+#define LED_LINK_SPEED_ENC_M1000_SHIFT 9 -+#define LED_LINK_SPEED_ENC_M2500_SHIFT 12 -+#define LED_LINK_SPEED_ENC_M10G_SHIFT 15 -+#define LED_LINK_SPEED_ENC_MASK 0x7 -+ - /* Relative to REG_RGMII_CNTRL */ - #define RGMII_MODE_EN (1 << 0) - #define ID_MODE_DIS (1 << 1) -@@ -73,10 +134,6 @@ enum bcm_sf2_reg_offs { - #define LPI_COUNT_SHIFT 9 - #define LPI_COUNT_MASK 0x3F - --#define REG_LED_CNTRL(x) (REG_LED_0_CNTRL + (x)) -- --#define SPDLNK_SRC_SEL (1 << 24) -- - /* Register set relative to 'INTRL2_0' and 'INTRL2_1' */ - #define INTRL2_CPU_STATUS 0x00 - #define INTRL2_CPU_SET 0x04 diff --git a/target/linux/bcm4908/patches-5.10/077-v5.14-net-broadcom-bcm4908_enet-reset-DMA-rings-sw-indexes.patch b/target/linux/bcm4908/patches-5.10/077-v5.14-net-broadcom-bcm4908_enet-reset-DMA-rings-sw-indexes.patch deleted file mode 100644 index 02290c8e64..0000000000 --- a/target/linux/bcm4908/patches-5.10/077-v5.14-net-broadcom-bcm4908_enet-reset-DMA-rings-sw-indexes.patch +++ /dev/null @@ -1,45 +0,0 @@ -From ddeacc4f6494e07cbb6f033627926623f3e7a9d0 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 22 Jun 2021 07:24:15 +0200 -Subject: [PATCH] net: broadcom: bcm4908_enet: reset DMA rings sw indexes - properly -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Resetting software indexes in bcm4908_dma_alloc_buf_descs() is not -enough as it's called during device probe only. Driver resets DMA on -every .ndo_open callback and it's required to reset indexes then. - -This fixes inconsistent rings state and stalled traffic after interface -down & up sequence. - -Fixes: 4feffeadbcb2 ("net: broadcom: bcm4908enet: add BCM4908 controller driver") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -174,9 +174,6 @@ static int bcm4908_dma_alloc_buf_descs(s - if (!ring->slots) - goto err_free_buf_descs; - -- ring->read_idx = 0; -- ring->write_idx = 0; -- - return 0; - - err_free_buf_descs: -@@ -303,6 +300,9 @@ static void bcm4908_enet_dma_ring_init(s - - enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, - (uint32_t)ring->dma_addr); -+ -+ ring->read_idx = 0; -+ ring->write_idx = 0; - } - - static void bcm4908_enet_dma_uninit(struct bcm4908_enet *enet) diff --git a/target/linux/bcm4908/patches-5.10/077-v5.17-net-broadcom-bcm4908enet-remove-redundant-variable-b.patch b/target/linux/bcm4908/patches-5.10/077-v5.17-net-broadcom-bcm4908enet-remove-redundant-variable-b.patch deleted file mode 100644 index 03e546cb5f..0000000000 --- a/target/linux/bcm4908/patches-5.10/077-v5.17-net-broadcom-bcm4908enet-remove-redundant-variable-b.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 62a3106697f3c6f9af64a2cd0f9ff58552010dc8 Mon Sep 17 00:00:00 2001 -From: Colin Ian King <colin.i.king@gmail.com> -Date: Wed, 22 Dec 2021 00:39:37 +0000 -Subject: [PATCH] net: broadcom: bcm4908enet: remove redundant variable bytes - -The variable bytes is being used to summate slot lengths, -however the value is never used afterwards. The summation -is redundant so remove variable bytes. - -Signed-off-by: Colin Ian King <colin.i.king@gmail.com> -Link: https://lore.kernel.org/r/20211222003937.727325-1-colin.i.king@gmail.com -Signed-off-by: Jakub Kicinski <kuba@kernel.org> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 2 -- - 1 file changed, 2 deletions(-) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -634,7 +634,6 @@ static int bcm4908_enet_poll_tx(struct n - struct bcm4908_enet_dma_ring_bd *buf_desc; - struct bcm4908_enet_dma_ring_slot *slot; - struct device *dev = enet->dev; -- unsigned int bytes = 0; - int handled = 0; - - while (handled < weight && tx_ring->read_idx != tx_ring->write_idx) { -@@ -645,7 +644,6 @@ static int bcm4908_enet_poll_tx(struct n - - dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE); - dev_kfree_skb(slot->skb); -- bytes += slot->len; - if (++tx_ring->read_idx == tx_ring->length) - tx_ring->read_idx = 0; - diff --git a/target/linux/bcm4908/patches-5.10/078-v6.1-0001-net-broadcom-bcm4908_enet-handle-EPROBE_DEFER-when-g.patch b/target/linux/bcm4908/patches-5.10/078-v6.1-0001-net-broadcom-bcm4908_enet-handle-EPROBE_DEFER-when-g.patch deleted file mode 100644 index a6eba111f9..0000000000 --- a/target/linux/bcm4908/patches-5.10/078-v6.1-0001-net-broadcom-bcm4908_enet-handle-EPROBE_DEFER-when-g.patch +++ /dev/null @@ -1,55 +0,0 @@ -From e93a766da57fff3273bcb618edf5dfca1fb86b89 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 15 Sep 2022 15:30:13 +0200 -Subject: [PATCH] net: broadcom: bcm4908_enet: handle -EPROBE_DEFER when - getting MAC -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Reading MAC from OF may return -EPROBE_DEFER if underlaying NVMEM device -isn't ready yet. In such case pass that error code up and "wait" to be -probed later. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/r/20220915133013.2243-1-zajec5@gmail.com -Signed-off-by: Jakub Kicinski <kuba@kernel.org> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 13 +++++++++---- - 1 file changed, 9 insertions(+), 4 deletions(-) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -712,7 +712,9 @@ static int bcm4908_enet_probe(struct pla - return err; - - SET_NETDEV_DEV(netdev, &pdev->dev); -- of_get_mac_address(dev->of_node, netdev->dev_addr); -+ err = of_get_mac_address(dev->of_node, netdev->dev_addr); -+ if (err == -EPROBE_DEFER) -+ goto err_dma_free; - if (!is_valid_ether_addr(netdev->dev_addr)) - eth_hw_addr_random(netdev); - netdev->netdev_ops = &bcm4908_enet_netdev_ops; -@@ -723,14 +725,17 @@ static int bcm4908_enet_probe(struct pla - netif_napi_add(netdev, &enet->rx_ring.napi, bcm4908_enet_poll_rx, NAPI_POLL_WEIGHT); - - err = register_netdev(netdev); -- if (err) { -- bcm4908_enet_dma_free(enet); -- return err; -- } -+ if (err) -+ goto err_dma_free; - - platform_set_drvdata(pdev, enet); - - return 0; -+ -+err_dma_free: -+ bcm4908_enet_dma_free(enet); -+ -+ return err; - } - - static int bcm4908_enet_remove(struct platform_device *pdev) diff --git a/target/linux/bcm4908/patches-5.10/078-v6.1-0002-net-broadcom-bcm4908_enet-update-TX-stats-after-actu.patch b/target/linux/bcm4908/patches-5.10/078-v6.1-0002-net-broadcom-bcm4908_enet-update-TX-stats-after-actu.patch deleted file mode 100644 index 29cf3742f4..0000000000 --- a/target/linux/bcm4908/patches-5.10/078-v6.1-0002-net-broadcom-bcm4908_enet-update-TX-stats-after-actu.patch +++ /dev/null @@ -1,65 +0,0 @@ -From ef3556ee16c68735ec69bd08df41d1cd83b14ad3 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 27 Oct 2022 13:24:30 +0200 -Subject: [PATCH] net: broadcom: bcm4908_enet: update TX stats after actual - transmission -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Queueing packets doesn't guarantee their transmission. Update TX stats -after hardware confirms consuming submitted data. - -This also fixes a possible race and NULL dereference. -bcm4908_enet_start_xmit() could try to access skb after freeing it in -the bcm4908_enet_poll_tx(). - -Reported-by: Florian Fainelli <f.fainelli@gmail.com> -Fixes: 4feffeadbcb2e ("net: broadcom: bcm4908enet: add BCM4908 controller driver") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -Link: https://lore.kernel.org/r/20221027112430.8696-1-zajec5@gmail.com -Signed-off-by: Jakub Kicinski <kuba@kernel.org> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 12 ++++++++---- - 1 file changed, 8 insertions(+), 4 deletions(-) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -560,8 +560,6 @@ static int bcm4908_enet_start_xmit(struc - - if (++ring->write_idx == ring->length - 1) - ring->write_idx = 0; -- enet->netdev->stats.tx_bytes += skb->len; -- enet->netdev->stats.tx_packets++; - - return NETDEV_TX_OK; - } -@@ -634,6 +632,7 @@ static int bcm4908_enet_poll_tx(struct n - struct bcm4908_enet_dma_ring_bd *buf_desc; - struct bcm4908_enet_dma_ring_slot *slot; - struct device *dev = enet->dev; -+ unsigned int bytes = 0; - int handled = 0; - - while (handled < weight && tx_ring->read_idx != tx_ring->write_idx) { -@@ -644,12 +643,17 @@ static int bcm4908_enet_poll_tx(struct n - - dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE); - dev_kfree_skb(slot->skb); -- if (++tx_ring->read_idx == tx_ring->length) -- tx_ring->read_idx = 0; - - handled++; -+ bytes += slot->len; -+ -+ if (++tx_ring->read_idx == tx_ring->length) -+ tx_ring->read_idx = 0; - } - -+ enet->netdev->stats.tx_packets += handled; -+ enet->netdev->stats.tx_bytes += bytes; -+ - if (handled < weight) { - napi_complete_done(napi, handled); - bcm4908_enet_dma_ring_intrs_on(enet, tx_ring); diff --git a/target/linux/bcm4908/patches-5.10/079-v6.2-0001-net-broadcom-bcm4908_enet-use-build_skb.patch b/target/linux/bcm4908/patches-5.10/079-v6.2-0001-net-broadcom-bcm4908_enet-use-build_skb.patch deleted file mode 100644 index 834973f5c7..0000000000 --- a/target/linux/bcm4908/patches-5.10/079-v6.2-0001-net-broadcom-bcm4908_enet-use-build_skb.patch +++ /dev/null @@ -1,152 +0,0 @@ -From 3a1cc23a75abcd9cea585eb84846507363d58397 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 25 Oct 2022 15:22:45 +0200 -Subject: [PATCH] net: broadcom: bcm4908_enet: use build_skb() -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -RX code can be more efficient with the build_skb(). Allocating actual -SKB around eth packet buffer - right before passing it up - results in -a better cache usage. - -Without RPS (echo 0 > rps_cpus) BCM4908 NAT masq performance "jumps" -between two speeds: ~900 Mbps and 940 Mbps (it's a 4 CPUs SoC). This -change bumps the lower speed from 905 Mb/s to 918 Mb/s (tested using -single stream iperf 2.0.5 traffic). - -There are more optimizations to consider. One obvious to try is GRO -however as BCM4908 doesn't do hw csum is may actually lower performance. -Sometimes. Some early testing: - -┌─────────────────────────────────┬─────────────────────┬────────────────────┐ -│ │ netif_receive_skb() │ napi_gro_receive() │ -├─────────────────────────────────┼─────────────────────┼────────────────────┤ -│ netdev_alloc_skb() │ 905 Mb/s │ 892 Mb/s │ -│ napi_alloc_frag() + build_skb() │ 918 Mb/s │ 917 Mb/s │ -└─────────────────────────────────┴─────────────────────┴────────────────────┘ - -Another ideas: -1. napi_build_skb() -2. skb_copy_from_linear_data() for small packets - -Those need proper testing first though. That can be done later. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/r/20221025132245.22871-1-zajec5@gmail.com -Signed-off-by: Paolo Abeni <pabeni@redhat.com> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 53 +++++++++++++------- - 1 file changed, 36 insertions(+), 17 deletions(-) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -36,13 +36,24 @@ - #define ENET_MAX_ETH_OVERHEAD (ETH_HLEN + BRCM_MAX_TAG_LEN + VLAN_HLEN + \ - ETH_FCS_LEN + 4) /* 32 */ - -+#define ENET_RX_SKB_BUF_SIZE (NET_SKB_PAD + NET_IP_ALIGN + \ -+ ETH_HLEN + BRCM_MAX_TAG_LEN + VLAN_HLEN + \ -+ ENET_MTU_MAX + ETH_FCS_LEN + 4) -+#define ENET_RX_SKB_BUF_ALLOC_SIZE (SKB_DATA_ALIGN(ENET_RX_SKB_BUF_SIZE) + \ -+ SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) -+#define ENET_RX_BUF_DMA_OFFSET (NET_SKB_PAD + NET_IP_ALIGN) -+#define ENET_RX_BUF_DMA_SIZE (ENET_RX_SKB_BUF_SIZE - ENET_RX_BUF_DMA_OFFSET) -+ - struct bcm4908_enet_dma_ring_bd { - __le32 ctl; - __le32 addr; - } __packed; - - struct bcm4908_enet_dma_ring_slot { -- struct sk_buff *skb; -+ union { -+ void *buf; /* RX */ -+ struct sk_buff *skb; /* TX */ -+ }; - unsigned int len; - dma_addr_t dma_addr; - }; -@@ -259,22 +270,21 @@ static int bcm4908_enet_dma_alloc_rx_buf - u32 tmp; - int err; - -- slot->len = ENET_MTU_MAX + ENET_MAX_ETH_OVERHEAD; -- -- slot->skb = netdev_alloc_skb(enet->netdev, slot->len); -- if (!slot->skb) -+ slot->buf = napi_alloc_frag(ENET_RX_SKB_BUF_ALLOC_SIZE); -+ if (!slot->buf) - return -ENOMEM; - -- slot->dma_addr = dma_map_single(dev, slot->skb->data, slot->len, DMA_FROM_DEVICE); -+ slot->dma_addr = dma_map_single(dev, slot->buf + ENET_RX_BUF_DMA_OFFSET, -+ ENET_RX_BUF_DMA_SIZE, DMA_FROM_DEVICE); - err = dma_mapping_error(dev, slot->dma_addr); - if (err) { - dev_err(dev, "Failed to map DMA buffer: %d\n", err); -- kfree_skb(slot->skb); -- slot->skb = NULL; -+ skb_free_frag(slot->buf); -+ slot->buf = NULL; - return err; - } - -- tmp = slot->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; -+ tmp = ENET_RX_BUF_DMA_SIZE << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT; - tmp |= DMA_CTL_STATUS_OWN; - if (idx == enet->rx_ring.length - 1) - tmp |= DMA_CTL_STATUS_WRAP; -@@ -314,11 +324,11 @@ static void bcm4908_enet_dma_uninit(stru - - for (i = rx_ring->length - 1; i >= 0; i--) { - slot = &rx_ring->slots[i]; -- if (!slot->skb) -+ if (!slot->buf) - continue; - dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_FROM_DEVICE); -- kfree_skb(slot->skb); -- slot->skb = NULL; -+ skb_free_frag(slot->buf); -+ slot->buf = NULL; - } - } - -@@ -574,6 +584,7 @@ static int bcm4908_enet_poll_rx(struct n - while (handled < weight) { - struct bcm4908_enet_dma_ring_bd *buf_desc; - struct bcm4908_enet_dma_ring_slot slot; -+ struct sk_buff *skb; - u32 ctl; - int len; - int err; -@@ -597,16 +608,24 @@ static int bcm4908_enet_poll_rx(struct n - - if (len < ETH_ZLEN || - (ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) { -- kfree_skb(slot.skb); -+ skb_free_frag(slot.buf); - enet->netdev->stats.rx_dropped++; - break; - } - -- dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE); -+ dma_unmap_single(dev, slot.dma_addr, ENET_RX_BUF_DMA_SIZE, DMA_FROM_DEVICE); -+ -+ skb = build_skb(slot.buf, ENET_RX_SKB_BUF_ALLOC_SIZE); -+ if (unlikely(!skb)) { -+ skb_free_frag(slot.buf); -+ enet->netdev->stats.rx_dropped++; -+ break; -+ } -+ skb_reserve(skb, ENET_RX_BUF_DMA_OFFSET); -+ skb_put(skb, len - ETH_FCS_LEN); -+ skb->protocol = eth_type_trans(skb, enet->netdev); - -- skb_put(slot.skb, len - ETH_FCS_LEN); -- slot.skb->protocol = eth_type_trans(slot.skb, enet->netdev); -- netif_receive_skb(slot.skb); -+ netif_receive_skb(skb); - - enet->netdev->stats.rx_packets++; - enet->netdev->stats.rx_bytes += len; diff --git a/target/linux/bcm4908/patches-5.10/079-v6.2-0002-net-broadcom-bcm4908_enet-report-queued-and-transmit.patch b/target/linux/bcm4908/patches-5.10/079-v6.2-0002-net-broadcom-bcm4908_enet-report-queued-and-transmit.patch deleted file mode 100644 index 9f85a77b76..0000000000 --- a/target/linux/bcm4908/patches-5.10/079-v6.2-0002-net-broadcom-bcm4908_enet-report-queued-and-transmit.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 471ef777ec79baadc5cd9773d08f95f49cf5e2b1 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Mon, 31 Oct 2022 11:48:56 +0100 -Subject: [PATCH] net: broadcom: bcm4908_enet: report queued and transmitted - bytes -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This allows BQL to operate avoiding buffer bloat and reducing latency. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/r/20221031104856.32388-1-zajec5@gmail.com -Signed-off-by: Jakub Kicinski <kuba@kernel.org> ---- - drivers/net/ethernet/broadcom/bcm4908_enet.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/net/ethernet/broadcom/bcm4908_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c -@@ -504,6 +504,7 @@ static int bcm4908_enet_stop(struct net_ - netif_carrier_off(netdev); - napi_disable(&rx_ring->napi); - napi_disable(&tx_ring->napi); -+ netdev_reset_queue(netdev); - - bcm4908_enet_dma_rx_ring_disable(enet, &enet->rx_ring); - bcm4908_enet_dma_tx_ring_disable(enet, &enet->tx_ring); -@@ -563,6 +564,8 @@ static int bcm4908_enet_start_xmit(struc - if (ring->write_idx + 1 == ring->length - 1) - tmp |= DMA_CTL_STATUS_WRAP; - -+ netdev_sent_queue(enet->netdev, skb->len); -+ - buf_desc->addr = cpu_to_le32((uint32_t)slot->dma_addr); - buf_desc->ctl = cpu_to_le32(tmp); - -@@ -670,6 +673,7 @@ static int bcm4908_enet_poll_tx(struct n - tx_ring->read_idx = 0; - } - -+ netdev_completed_queue(enet->netdev, handled, bytes); - enet->netdev->stats.tx_packets += handled; - enet->netdev->stats.tx_bytes += bytes; - diff --git a/target/linux/bcm4908/patches-5.10/080-v5.11-tty-serial-bcm63xx-lower-driver-dependencies.patch b/target/linux/bcm4908/patches-5.10/080-v5.11-tty-serial-bcm63xx-lower-driver-dependencies.patch deleted file mode 100644 index 38e3d056b9..0000000000 --- a/target/linux/bcm4908/patches-5.10/080-v5.11-tty-serial-bcm63xx-lower-driver-dependencies.patch +++ /dev/null @@ -1,31 +0,0 @@ -From f35a07f92616700733636c06dd6e5b6cdc807fe4 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 25 Nov 2020 10:06:08 +0100 -Subject: [PATCH] tty: serial: bcm63xx: lower driver dependencies -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Hardware supported by bcm63xx is also used by BCM4908 SoCs family that -is ARM64. In future more architectures may need it as well. There is -nothing arch specific breaking compilation so just stick to requiring -COMMON_CLK. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Link: https://lore.kernel.org/r/20201125090608.28442-1-zajec5@gmail.com -Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> ---- - drivers/tty/serial/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/tty/serial/Kconfig -+++ b/drivers/tty/serial/Kconfig -@@ -1133,7 +1133,7 @@ config SERIAL_TIMBERDALE - config SERIAL_BCM63XX - tristate "Broadcom BCM63xx/BCM33xx UART support" - select SERIAL_CORE -- depends on MIPS || ARM || COMPILE_TEST -+ depends on COMMON_CLK - help - This enables the driver for the onchip UART core found on - the following chipsets: diff --git a/target/linux/bcm4908/patches-5.10/081-v5.12-reset-simple-add-BCM4908-MISC-PCIe-reset-controller-.patch b/target/linux/bcm4908/patches-5.10/081-v5.12-reset-simple-add-BCM4908-MISC-PCIe-reset-controller-.patch deleted file mode 100644 index 28702c9d0e..0000000000 --- a/target/linux/bcm4908/patches-5.10/081-v5.12-reset-simple-add-BCM4908-MISC-PCIe-reset-controller-.patch +++ /dev/null @@ -1,40 +0,0 @@ -From def26913b66fd94e431afecf28e09c08e8c02a35 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 27 Nov 2020 12:14:42 +0100 -Subject: [PATCH] reset: simple: add BCM4908 MISC PCIe reset controller support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's a trivial reset controller. One register with bit per PCIe core. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> ---- - drivers/reset/Kconfig | 2 +- - drivers/reset/reset-simple.c | 2 ++ - 2 files changed, 3 insertions(+), 1 deletion(-) - ---- a/drivers/reset/Kconfig -+++ b/drivers/reset/Kconfig -@@ -167,7 +167,7 @@ config RESET_SCMI - - config RESET_SIMPLE - bool "Simple Reset Controller Driver" if COMPILE_TEST -- default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC -+ default ARCH_AGILEX || ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC - help - This enables a simple reset controller driver for reset lines that - that can be asserted and deasserted by toggling bits in a contiguous, ---- a/drivers/reset/reset-simple.c -+++ b/drivers/reset/reset-simple.c -@@ -146,6 +146,8 @@ static const struct of_device_id reset_s - { .compatible = "aspeed,ast2500-lpc-reset" }, - { .compatible = "bitmain,bm1880-reset", - .data = &reset_simple_active_low }, -+ { .compatible = "brcm,bcm4908-misc-pcie-reset", -+ .data = &reset_simple_active_low }, - { .compatible = "snps,dw-high-reset" }, - { .compatible = "snps,dw-low-reset", - .data = &reset_simple_active_low }, diff --git a/target/linux/bcm4908/patches-5.10/082-v5.12-0001-dt-bindings-power-document-Broadcom-s-PMB-binding.patch b/target/linux/bcm4908/patches-5.10/082-v5.12-0001-dt-bindings-power-document-Broadcom-s-PMB-binding.patch deleted file mode 100644 index c5c1a5dc7e..0000000000 --- a/target/linux/bcm4908/patches-5.10/082-v5.12-0001-dt-bindings-power-document-Broadcom-s-PMB-binding.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 82853543057f78d8a331272b70bc3f1e8cb0cbf4 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Mon, 14 Dec 2020 19:07:42 +0100 -Subject: [PATCH] dt-bindings: power: document Broadcom's PMB binding -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Broadcom's PMB is power controller used for disabling and enabling SoC -devices. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Rob Herring <robh@kernel.org> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Acked-by: Ulf Hansson <ulf.hansson@linaro.org> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - .../bindings/power/brcm,bcm-pmb.yaml | 50 +++++++++++++++++++ - include/dt-bindings/soc/bcm-pmb.h | 11 ++++ - 2 files changed, 61 insertions(+) - create mode 100644 Documentation/devicetree/bindings/power/brcm,bcm-pmb.yaml - create mode 100644 include/dt-bindings/soc/bcm-pmb.h - ---- /dev/null -+++ b/Documentation/devicetree/bindings/power/brcm,bcm-pmb.yaml -@@ -0,0 +1,50 @@ -+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/power/brcm,bcm-pmb.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Broadcom PMB (Power Management Bus) controller -+ -+description: This document describes Broadcom's PMB controller. It supports -+ powering various types of connected devices (e.g. PCIe, USB, SATA). -+ -+maintainers: -+ - Rafał Miłecki <rafal@milecki.pl> -+ -+properties: -+ compatible: -+ enum: -+ - brcm,bcm4908-pmb -+ -+ reg: -+ description: register space of one or more buses -+ maxItems: 1 -+ -+ big-endian: -+ $ref: /schemas/types.yaml#/definitions/flag -+ description: Flag to use for block working in big endian mode. -+ -+ "#power-domain-cells": -+ description: cell specifies device ID (see bcm-pmb.h) -+ const: 1 -+ -+required: -+ - reg -+ - "#power-domain-cells" -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include <dt-bindings/soc/bcm-pmb.h> -+ -+ pmb: power-controller@802800e0 { -+ compatible = "brcm,bcm4908-pmb"; -+ reg = <0x802800e0 0x40>; -+ #power-domain-cells = <1>; -+ }; -+ -+ foo { -+ power-domains = <&pmb BCM_PMB_PCIE0>; -+ }; ---- /dev/null -+++ b/include/dt-bindings/soc/bcm-pmb.h -@@ -0,0 +1,11 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT */ -+ -+#ifndef __DT_BINDINGS_SOC_BCM_PMB_H -+#define __DT_BINDINGS_SOC_BCM_PMB_H -+ -+#define BCM_PMB_PCIE0 0x01 -+#define BCM_PMB_PCIE1 0x02 -+#define BCM_PMB_PCIE2 0x03 -+#define BCM_PMB_HOST_USB 0x04 -+ -+#endif diff --git a/target/linux/bcm4908/patches-5.10/082-v5.12-0002-soc-bcm-add-PM-driver-for-Broadcom-s-PMB.patch b/target/linux/bcm4908/patches-5.10/082-v5.12-0002-soc-bcm-add-PM-driver-for-Broadcom-s-PMB.patch deleted file mode 100644 index 8cbf33f5a9..0000000000 --- a/target/linux/bcm4908/patches-5.10/082-v5.12-0002-soc-bcm-add-PM-driver-for-Broadcom-s-PMB.patch +++ /dev/null @@ -1,409 +0,0 @@ -From 8bcac4011ebe0dbdd46fd55b036ee855c95702d3 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Mon, 14 Dec 2020 19:07:43 +0100 -Subject: [PATCH] soc: bcm: add PM driver for Broadcom's PMB -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -PMB originally comes from BCM63138 but can be also found on many other -chipsets (e.g. BCM4908). It's needed to power on and off SoC blocks like -PCIe, SATA, USB. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Ulf Hansson <ulf.hansson@linaro.org> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - MAINTAINERS | 10 + - drivers/soc/bcm/Makefile | 2 +- - drivers/soc/bcm/bcm63xx/Kconfig | 9 + - drivers/soc/bcm/bcm63xx/Makefile | 1 + - drivers/soc/bcm/bcm63xx/bcm-pmb.c | 333 ++++++++++++++++++++++++++++++ - 5 files changed, 354 insertions(+), 1 deletion(-) - create mode 100644 drivers/soc/bcm/bcm63xx/bcm-pmb.c - ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -3674,6 +3674,16 @@ L: linux-mips@vger.kernel.org - S: Maintained - F: drivers/firmware/broadcom/* - -+BROADCOM PMB (POWER MANAGEMENT BUS) DRIVER -+M: Rafał Miłecki <rafal@milecki.pl> -+M: Florian Fainelli <f.fainelli@gmail.com> -+M: bcm-kernel-feedback-list@broadcom.com -+L: linux-pm@vger.kernel.org -+S: Maintained -+T: git git://github.com/broadcom/stblinux.git -+F: drivers/soc/bcm/bcm-pmb.c -+F: include/dt-bindings/soc/bcm-pmb.h -+ - BROADCOM SPECIFIC AMBA DRIVER (BCMA) - M: Rafał Miłecki <zajec5@gmail.com> - L: linux-wireless@vger.kernel.org ---- a/drivers/soc/bcm/Makefile -+++ b/drivers/soc/bcm/Makefile -@@ -1,5 +1,5 @@ - # SPDX-License-Identifier: GPL-2.0-only - obj-$(CONFIG_BCM2835_POWER) += bcm2835-power.o - obj-$(CONFIG_RASPBERRYPI_POWER) += raspberrypi-power.o --obj-$(CONFIG_SOC_BCM63XX) += bcm63xx/ -+obj-y += bcm63xx/ - obj-$(CONFIG_SOC_BRCMSTB) += brcmstb/ ---- a/drivers/soc/bcm/bcm63xx/Kconfig -+++ b/drivers/soc/bcm/bcm63xx/Kconfig -@@ -10,3 +10,12 @@ config BCM63XX_POWER - BCM6318, BCM6328, BCM6362 and BCM63268 SoCs. - - endif # SOC_BCM63XX -+ -+config BCM_PMB -+ bool "Broadcom PMB (Power Management Bus) driver" -+ depends on ARCH_BCM4908 || (COMPILE_TEST && OF) -+ default ARCH_BCM4908 -+ select PM_GENERIC_DOMAINS if PM -+ help -+ This enables support for the Broadcom's PMB (Power Management Bus) that -+ is used for disabling and enabling SoC devices. ---- a/drivers/soc/bcm/bcm63xx/Makefile -+++ b/drivers/soc/bcm/bcm63xx/Makefile -@@ -1,2 +1,3 @@ - # SPDX-License-Identifier: GPL-2.0-only - obj-$(CONFIG_BCM63XX_POWER) += bcm63xx-power.o -+obj-$(CONFIG_BCM_PMB) += bcm-pmb.o ---- /dev/null -+++ b/drivers/soc/bcm/bcm63xx/bcm-pmb.c -@@ -0,0 +1,333 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later -+/* -+ * Copyright (c) 2013 Broadcom -+ * Copyright (C) 2020 Rafał Miłecki <rafal@milecki.pl> -+ */ -+ -+#include <dt-bindings/soc/bcm-pmb.h> -+#include <linux/io.h> -+#include <linux/module.h> -+#include <linux/of.h> -+#include <linux/of_device.h> -+#include <linux/platform_device.h> -+#include <linux/pm_domain.h> -+#include <linux/reset/bcm63xx_pmb.h> -+ -+#define BPCM_ID_REG 0x00 -+#define BPCM_CAPABILITIES 0x04 -+#define BPCM_CAP_NUM_ZONES 0x000000ff -+#define BPCM_CAP_SR_REG_BITS 0x0000ff00 -+#define BPCM_CAP_PLLTYPE 0x00030000 -+#define BPCM_CAP_UBUS 0x00080000 -+#define BPCM_CONTROL 0x08 -+#define BPCM_STATUS 0x0c -+#define BPCM_ROSC_CONTROL 0x10 -+#define BPCM_ROSC_THRESH_H 0x14 -+#define BPCM_ROSC_THRESHOLD_BCM6838 0x14 -+#define BPCM_ROSC_THRESH_S 0x18 -+#define BPCM_ROSC_COUNT_BCM6838 0x18 -+#define BPCM_ROSC_COUNT 0x1c -+#define BPCM_PWD_CONTROL_BCM6838 0x1c -+#define BPCM_PWD_CONTROL 0x20 -+#define BPCM_SR_CONTROL_BCM6838 0x20 -+#define BPCM_PWD_ACCUM_CONTROL 0x24 -+#define BPCM_SR_CONTROL 0x28 -+#define BPCM_GLOBAL_CONTROL 0x2c -+#define BPCM_MISC_CONTROL 0x30 -+#define BPCM_MISC_CONTROL2 0x34 -+#define BPCM_SGPHY_CNTL 0x38 -+#define BPCM_SGPHY_STATUS 0x3c -+#define BPCM_ZONE0 0x40 -+#define BPCM_ZONE_CONTROL 0x00 -+#define BPCM_ZONE_CONTROL_MANUAL_CLK_EN 0x00000001 -+#define BPCM_ZONE_CONTROL_MANUAL_RESET_CTL 0x00000002 -+#define BPCM_ZONE_CONTROL_FREQ_SCALE_USED 0x00000004 /* R/O */ -+#define BPCM_ZONE_CONTROL_DPG_CAPABLE 0x00000008 /* R/O */ -+#define BPCM_ZONE_CONTROL_MANUAL_MEM_PWR 0x00000030 -+#define BPCM_ZONE_CONTROL_MANUAL_ISO_CTL 0x00000040 -+#define BPCM_ZONE_CONTROL_MANUAL_CTL 0x00000080 -+#define BPCM_ZONE_CONTROL_DPG_CTL_EN 0x00000100 -+#define BPCM_ZONE_CONTROL_PWR_DN_REQ 0x00000200 -+#define BPCM_ZONE_CONTROL_PWR_UP_REQ 0x00000400 -+#define BPCM_ZONE_CONTROL_MEM_PWR_CTL_EN 0x00000800 -+#define BPCM_ZONE_CONTROL_BLK_RESET_ASSERT 0x00001000 -+#define BPCM_ZONE_CONTROL_MEM_STBY 0x00002000 -+#define BPCM_ZONE_CONTROL_RESERVED 0x0007c000 -+#define BPCM_ZONE_CONTROL_PWR_CNTL_STATE 0x00f80000 -+#define BPCM_ZONE_CONTROL_FREQ_SCALAR_DYN_SEL 0x01000000 /* R/O */ -+#define BPCM_ZONE_CONTROL_PWR_OFF_STATE 0x02000000 /* R/O */ -+#define BPCM_ZONE_CONTROL_PWR_ON_STATE 0x04000000 /* R/O */ -+#define BPCM_ZONE_CONTROL_PWR_GOOD 0x08000000 /* R/O */ -+#define BPCM_ZONE_CONTROL_DPG_PWR_STATE 0x10000000 /* R/O */ -+#define BPCM_ZONE_CONTROL_MEM_PWR_STATE 0x20000000 /* R/O */ -+#define BPCM_ZONE_CONTROL_ISO_STATE 0x40000000 /* R/O */ -+#define BPCM_ZONE_CONTROL_RESET_STATE 0x80000000 /* R/O */ -+#define BPCM_ZONE_CONFIG1 0x04 -+#define BPCM_ZONE_CONFIG2 0x08 -+#define BPCM_ZONE_FREQ_SCALAR_CONTROL 0x0c -+#define BPCM_ZONE_SIZE 0x10 -+ -+struct bcm_pmb { -+ struct device *dev; -+ void __iomem *base; -+ spinlock_t lock; -+ bool little_endian; -+ struct genpd_onecell_data genpd_onecell_data; -+}; -+ -+struct bcm_pmb_pd_data { -+ const char * const name; -+ int id; -+ u8 bus; -+ u8 device; -+}; -+ -+struct bcm_pmb_pm_domain { -+ struct bcm_pmb *pmb; -+ const struct bcm_pmb_pd_data *data; -+ struct generic_pm_domain genpd; -+}; -+ -+static int bcm_pmb_bpcm_read(struct bcm_pmb *pmb, int bus, u8 device, -+ int offset, u32 *val) -+{ -+ void __iomem *base = pmb->base + bus * 0x20; -+ unsigned long flags; -+ int err; -+ -+ spin_lock_irqsave(&pmb->lock, flags); -+ err = bpcm_rd(base, device, offset, val); -+ spin_unlock_irqrestore(&pmb->lock, flags); -+ -+ if (!err) -+ *val = pmb->little_endian ? le32_to_cpu(*val) : be32_to_cpu(*val); -+ -+ return err; -+} -+ -+static int bcm_pmb_bpcm_write(struct bcm_pmb *pmb, int bus, u8 device, -+ int offset, u32 val) -+{ -+ void __iomem *base = pmb->base + bus * 0x20; -+ unsigned long flags; -+ int err; -+ -+ val = pmb->little_endian ? cpu_to_le32(val) : cpu_to_be32(val); -+ -+ spin_lock_irqsave(&pmb->lock, flags); -+ err = bpcm_wr(base, device, offset, val); -+ spin_unlock_irqrestore(&pmb->lock, flags); -+ -+ return err; -+} -+ -+static int bcm_pmb_power_off_zone(struct bcm_pmb *pmb, int bus, u8 device, -+ int zone) -+{ -+ int offset; -+ u32 val; -+ int err; -+ -+ offset = BPCM_ZONE0 + zone * BPCM_ZONE_SIZE + BPCM_ZONE_CONTROL; -+ -+ err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val); -+ if (err) -+ return err; -+ -+ val |= BPCM_ZONE_CONTROL_PWR_DN_REQ; -+ val &= ~BPCM_ZONE_CONTROL_PWR_UP_REQ; -+ -+ err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val); -+ -+ return err; -+} -+ -+static int bcm_pmb_power_on_zone(struct bcm_pmb *pmb, int bus, u8 device, -+ int zone) -+{ -+ int offset; -+ u32 val; -+ int err; -+ -+ offset = BPCM_ZONE0 + zone * BPCM_ZONE_SIZE + BPCM_ZONE_CONTROL; -+ -+ err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val); -+ if (err) -+ return err; -+ -+ if (!(val & BPCM_ZONE_CONTROL_PWR_ON_STATE)) { -+ val &= ~BPCM_ZONE_CONTROL_PWR_DN_REQ; -+ val |= BPCM_ZONE_CONTROL_DPG_CTL_EN; -+ val |= BPCM_ZONE_CONTROL_PWR_UP_REQ; -+ val |= BPCM_ZONE_CONTROL_MEM_PWR_CTL_EN; -+ val |= BPCM_ZONE_CONTROL_BLK_RESET_ASSERT; -+ -+ err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val); -+ } -+ -+ return err; -+} -+ -+static int bcm_pmb_power_off_device(struct bcm_pmb *pmb, int bus, u8 device) -+{ -+ int offset; -+ u32 val; -+ int err; -+ -+ /* Entire device can be powered off by powering off the 0th zone */ -+ offset = BPCM_ZONE0 + BPCM_ZONE_CONTROL; -+ -+ err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val); -+ if (err) -+ return err; -+ -+ if (!(val & BPCM_ZONE_CONTROL_PWR_OFF_STATE)) { -+ val = BPCM_ZONE_CONTROL_PWR_DN_REQ; -+ -+ err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val); -+ } -+ -+ return err; -+} -+ -+static int bcm_pmb_power_on_device(struct bcm_pmb *pmb, int bus, u8 device) -+{ -+ u32 val; -+ int err; -+ int i; -+ -+ err = bcm_pmb_bpcm_read(pmb, bus, device, BPCM_CAPABILITIES, &val); -+ if (err) -+ return err; -+ -+ for (i = 0; i < (val & BPCM_CAP_NUM_ZONES); i++) { -+ err = bcm_pmb_power_on_zone(pmb, bus, device, i); -+ if (err) -+ return err; -+ } -+ -+ return err; -+} -+ -+static int bcm_pmb_power_on(struct generic_pm_domain *genpd) -+{ -+ struct bcm_pmb_pm_domain *pd = container_of(genpd, struct bcm_pmb_pm_domain, genpd); -+ const struct bcm_pmb_pd_data *data = pd->data; -+ struct bcm_pmb *pmb = pd->pmb; -+ -+ switch (data->id) { -+ case BCM_PMB_PCIE0: -+ case BCM_PMB_PCIE1: -+ case BCM_PMB_PCIE2: -+ return bcm_pmb_power_on_zone(pmb, data->bus, data->device, 0); -+ case BCM_PMB_HOST_USB: -+ return bcm_pmb_power_on_device(pmb, data->bus, data->device); -+ default: -+ dev_err(pmb->dev, "unsupported device id: %d\n", data->id); -+ return -EINVAL; -+ } -+} -+ -+static int bcm_pmb_power_off(struct generic_pm_domain *genpd) -+{ -+ struct bcm_pmb_pm_domain *pd = container_of(genpd, struct bcm_pmb_pm_domain, genpd); -+ const struct bcm_pmb_pd_data *data = pd->data; -+ struct bcm_pmb *pmb = pd->pmb; -+ -+ switch (data->id) { -+ case BCM_PMB_PCIE0: -+ case BCM_PMB_PCIE1: -+ case BCM_PMB_PCIE2: -+ return bcm_pmb_power_off_zone(pmb, data->bus, data->device, 0); -+ case BCM_PMB_HOST_USB: -+ return bcm_pmb_power_off_device(pmb, data->bus, data->device); -+ default: -+ dev_err(pmb->dev, "unsupported device id: %d\n", data->id); -+ return -EINVAL; -+ } -+} -+ -+static int bcm_pmb_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ const struct bcm_pmb_pd_data *table; -+ const struct bcm_pmb_pd_data *e; -+ struct resource *res; -+ struct bcm_pmb *pmb; -+ int max_id; -+ int err; -+ -+ pmb = devm_kzalloc(dev, sizeof(*pmb), GFP_KERNEL); -+ if (!pmb) -+ return -ENOMEM; -+ -+ pmb->dev = dev; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ pmb->base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(pmb->base)) -+ return PTR_ERR(pmb->base); -+ -+ spin_lock_init(&pmb->lock); -+ -+ pmb->little_endian = !of_device_is_big_endian(dev->of_node); -+ -+ table = of_device_get_match_data(dev); -+ if (!table) -+ return -EINVAL; -+ -+ max_id = 0; -+ for (e = table; e->name; e++) -+ max_id = max(max_id, e->id); -+ -+ pmb->genpd_onecell_data.num_domains = max_id + 1; -+ pmb->genpd_onecell_data.domains = -+ devm_kcalloc(dev, pmb->genpd_onecell_data.num_domains, -+ sizeof(struct generic_pm_domain *), GFP_KERNEL); -+ if (!pmb->genpd_onecell_data.domains) -+ return -ENOMEM; -+ -+ for (e = table; e->name; e++) { -+ struct bcm_pmb_pm_domain *pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); -+ -+ pd->pmb = pmb; -+ pd->data = e; -+ pd->genpd.name = e->name; -+ pd->genpd.power_on = bcm_pmb_power_on; -+ pd->genpd.power_off = bcm_pmb_power_off; -+ -+ pm_genpd_init(&pd->genpd, NULL, true); -+ pmb->genpd_onecell_data.domains[e->id] = &pd->genpd; -+ } -+ -+ err = of_genpd_add_provider_onecell(dev->of_node, &pmb->genpd_onecell_data); -+ if (err) { -+ dev_err(dev, "failed to add genpd provider: %d\n", err); -+ return err; -+ } -+ -+ return 0; -+} -+ -+static const struct bcm_pmb_pd_data bcm_pmb_bcm4908_data[] = { -+ { .name = "pcie2", .id = BCM_PMB_PCIE2, .bus = 0, .device = 2, }, -+ { .name = "pcie0", .id = BCM_PMB_PCIE0, .bus = 1, .device = 14, }, -+ { .name = "pcie1", .id = BCM_PMB_PCIE1, .bus = 1, .device = 15, }, -+ { .name = "usb", .id = BCM_PMB_HOST_USB, .bus = 1, .device = 17, }, -+ { }, -+}; -+ -+static const struct of_device_id bcm_pmb_of_match[] = { -+ { .compatible = "brcm,bcm4908-pmb", .data = &bcm_pmb_bcm4908_data, }, -+ { }, -+}; -+ -+static struct platform_driver bcm_pmb_driver = { -+ .driver = { -+ .name = "bcm-pmb", -+ .of_match_table = bcm_pmb_of_match, -+ }, -+ .probe = bcm_pmb_probe, -+}; -+ -+builtin_platform_driver(bcm_pmb_driver); diff --git a/target/linux/bcm4908/patches-5.10/082-v5.12-0003-soc-bcm-brcmstb-add-stubs-for-getting-platform-IDs.patch b/target/linux/bcm4908/patches-5.10/082-v5.12-0003-soc-bcm-brcmstb-add-stubs-for-getting-platform-IDs.patch deleted file mode 100644 index aab65925b4..0000000000 --- a/target/linux/bcm4908/patches-5.10/082-v5.12-0003-soc-bcm-brcmstb-add-stubs-for-getting-platform-IDs.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 149ae80b1d50e7db5ac7df1cdf0820017b70e716 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 14 Jan 2021 11:53:18 +0100 -Subject: [PATCH] soc: bcm: brcmstb: add stubs for getting platform IDs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Some brcmstb drivers may be shared with other SoC families. E.g. the -same USB PHY block is shared by brcmstb and BCM4908. - -To avoid building brcmstb common code on non-brcmstb platforms we need -stubs for: -1. brcmstb_get_family_id() -2. brcmstb_get_product_id() -(to avoid "undefined reference to" errors). - -With this change PHY_BRCM_USB will not have to unconditionally select -SOC_BRCMSTB anymore. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> ---- - include/linux/soc/brcmstb/brcmstb.h | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - ---- a/include/linux/soc/brcmstb/brcmstb.h -+++ b/include/linux/soc/brcmstb/brcmstb.h -@@ -2,6 +2,8 @@ - #ifndef __BRCMSTB_SOC_H - #define __BRCMSTB_SOC_H - -+#include <linux/kconfig.h> -+ - static inline u32 BRCM_ID(u32 reg) - { - return reg >> 28 ? reg >> 16 : reg >> 8; -@@ -12,6 +14,8 @@ static inline u32 BRCM_REV(u32 reg) - return reg & 0xff; - } - -+#if IS_ENABLED(CONFIG_SOC_BRCMSTB) -+ - /* - * Helper functions for getting family or product id from the - * SoC driver. -@@ -19,4 +23,16 @@ static inline u32 BRCM_REV(u32 reg) - u32 brcmstb_get_family_id(void); - u32 brcmstb_get_product_id(void); - -+#else -+static inline u32 brcmstb_get_family_id(void) -+{ -+ return 0; -+} -+ -+static inline u32 brcmstb_get_product_id(void) -+{ -+ return 0; -+} -+#endif -+ - #endif /* __BRCMSTB_SOC_H */ diff --git a/target/linux/bcm4908/patches-5.10/085-v5.18-0001-dt-bindings-pinctrl-Add-binding-for-BCM4908-pinctrl.patch b/target/linux/bcm4908/patches-5.10/085-v5.18-0001-dt-bindings-pinctrl-Add-binding-for-BCM4908-pinctrl.patch deleted file mode 100644 index 0dcc112edb..0000000000 --- a/target/linux/bcm4908/patches-5.10/085-v5.18-0001-dt-bindings-pinctrl-Add-binding-for-BCM4908-pinctrl.patch +++ /dev/null @@ -1,111 +0,0 @@ -From 7b5730f0ff24b0d7d1cb660a482384a807618a46 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Mon, 24 Jan 2022 11:22:42 +0100 -Subject: [PATCH] dt-bindings: pinctrl: Add binding for BCM4908 pinctrl -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's hardware block that is part of every SoC from BCM4908 family. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Rob Herring <robh@kernel.org> -Link: https://lore.kernel.org/r/20220124102243.14912-1-zajec5@gmail.com -Signed-off-by: Linus Walleij <linus.walleij@linaro.org> ---- - .../pinctrl/brcm,bcm4908-pinctrl.yaml | 72 +++++++++++++++++++ - MAINTAINERS | 7 ++ - 2 files changed, 79 insertions(+) - create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml - ---- /dev/null -+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml -@@ -0,0 +1,72 @@ -+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/pinctrl/brcm,bcm4908-pinctrl.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Broadcom BCM4908 pin controller -+ -+maintainers: -+ - Rafał Miłecki <rafal@milecki.pl> -+ -+description: -+ Binding for pin controller present on BCM4908 family SoCs. -+ -+properties: -+ compatible: -+ const: brcm,bcm4908-pinctrl -+ -+ reg: -+ maxItems: 1 -+ -+patternProperties: -+ '-pins$': -+ type: object -+ $ref: pinmux-node.yaml# -+ -+ properties: -+ function: -+ enum: [ led_0, led_1, led_2, led_3, led_4, led_5, led_6, led_7, led_8, -+ led_9, led_10, led_11, led_12, led_13, led_14, led_15, led_16, -+ led_17, led_18, led_19, led_20, led_21, led_22, led_23, led_24, -+ led_25, led_26, led_27, led_28, led_29, led_30, led_31, -+ hs_uart, i2c, i2s, nand_ctrl, nand_data, emmc_ctrl, usb0_pwr, -+ usb1_pwr ] -+ -+ groups: -+ minItems: 1 -+ maxItems: 2 -+ items: -+ enum: [ led_0_grp_a, led_1_grp_a, led_2_grp_a, led_3_grp_a, -+ led_4_grp_a, led_5_grp_a, led_6_grp_a, led_7_grp_a, -+ led_8_grp_a, led_9_grp_a, led_10_grp_a, led_10_grp_b, -+ led_11_grp_a, led_11_grp_b, led_12_grp_a, led_12_grp_b, -+ led_13_grp_a, led_13_grp_b, led_14_grp_a, led_15_grp_a, -+ led_16_grp_a, led_17_grp_a, led_18_grp_a, led_19_grp_a, -+ led_20_grp_a, led_21_grp_a, led_22_grp_a, led_23_grp_a, -+ led_24_grp_a, led_25_grp_a, led_26_grp_a, led_27_grp_a, -+ led_28_grp_a, led_29_grp_a, led_30_grp_a, led_31_grp_a, -+ led_31_grp_b, hs_uart_grp, i2c_grp_a, i2c_grp_b, i2s_grp, -+ nand_ctrl_grp, nand_data_grp, emmc_ctrl_grp, usb0_pwr_grp, -+ usb1_pwr_grp ] -+ -+allOf: -+ - $ref: pinctrl.yaml# -+ -+required: -+ - compatible -+ - reg -+ -+unevaluatedProperties: false -+ -+examples: -+ - | -+ pinctrl@ff800560 { -+ compatible = "brcm,bcm4908-pinctrl"; -+ reg = <0xff800560 0x10>; -+ -+ led_0-a-pins { -+ function = "led_0"; -+ groups = "led_0_grp_a"; -+ }; -+ }; ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -3436,6 +3436,13 @@ F: Documentation/devicetree/bindings/net - F: drivers/net/ethernet/broadcom/bcm4908_enet.* - F: drivers/net/ethernet/broadcom/unimac.h - -+BROADCOM BCM4908 PINMUX DRIVER -+M: Rafał Miłecki <rafal@milecki.pl> -+M: bcm-kernel-feedback-list@broadcom.com -+L: linux-gpio@vger.kernel.org -+S: Maintained -+F: Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml -+ - BROADCOM BCM5301X ARM ARCHITECTURE - M: Hauke Mehrtens <hauke@hauke-m.de> - M: Rafał Miłecki <zajec5@gmail.com> diff --git a/target/linux/bcm4908/patches-5.10/085-v5.18-0002-pinctrl-bcm-add-driver-for-BCM4908-pinmux.patch b/target/linux/bcm4908/patches-5.10/085-v5.18-0002-pinctrl-bcm-add-driver-for-BCM4908-pinmux.patch deleted file mode 100644 index bb2ae459e9..0000000000 --- a/target/linux/bcm4908/patches-5.10/085-v5.18-0002-pinctrl-bcm-add-driver-for-BCM4908-pinmux.patch +++ /dev/null @@ -1,629 +0,0 @@ -From f7e322d99f1180270fb4a3e1ae992b3116cfcf34 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Mon, 24 Jan 2022 11:22:43 +0100 -Subject: [PATCH] pinctrl: bcm: add driver for BCM4908 pinmux -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 has its own pins layout so it needs a custom binding and a Linux -driver. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> -Link: https://lore.kernel.org/r/20220124102243.14912-2-zajec5@gmail.com -Signed-off-by: Linus Walleij <linus.walleij@linaro.org> ---- - MAINTAINERS | 1 + - drivers/pinctrl/bcm/Kconfig | 14 + - drivers/pinctrl/bcm/Makefile | 1 + - drivers/pinctrl/bcm/pinctrl-bcm4908.c | 563 ++++++++++++++++++++++++++ - 4 files changed, 579 insertions(+) - create mode 100644 drivers/pinctrl/bcm/pinctrl-bcm4908.c - ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -3442,6 +3442,7 @@ M: bcm-kernel-feedback-list@broadcom.com - L: linux-gpio@vger.kernel.org - S: Maintained - F: Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml -+F: drivers/pinctrl/bcm/pinctrl-bcm4908.c - - BROADCOM BCM5301X ARM ARCHITECTURE - M: Hauke Mehrtens <hauke@hauke-m.de> ---- a/drivers/pinctrl/bcm/Kconfig -+++ b/drivers/pinctrl/bcm/Kconfig -@@ -29,6 +29,20 @@ config PINCTRL_BCM2835 - help - Say Y here to enable the Broadcom BCM2835 GPIO driver. - -+config PINCTRL_BCM4908 -+ tristate "Broadcom BCM4908 pinmux driver" -+ depends on OF && (ARCH_BCM4908 || COMPILE_TEST) -+ select PINMUX -+ select PINCONF -+ select GENERIC_PINCONF -+ select GENERIC_PINCTRL_GROUPS -+ select GENERIC_PINMUX_FUNCTIONS -+ default ARCH_BCM4908 -+ help -+ Driver for BCM4908 family SoCs with integrated pin controller. -+ -+ If compiled as module it will be called pinctrl-bcm4908. -+ - config PINCTRL_IPROC_GPIO - bool "Broadcom iProc GPIO (with PINCONF) driver" - depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST) ---- a/drivers/pinctrl/bcm/Makefile -+++ b/drivers/pinctrl/bcm/Makefile -@@ -3,6 +3,7 @@ - - obj-$(CONFIG_PINCTRL_BCM281XX) += pinctrl-bcm281xx.o - obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o -+obj-$(CONFIG_PINCTRL_BCM4908) += pinctrl-bcm4908.o - obj-$(CONFIG_PINCTRL_IPROC_GPIO) += pinctrl-iproc-gpio.o - obj-$(CONFIG_PINCTRL_CYGNUS_MUX) += pinctrl-cygnus-mux.o - obj-$(CONFIG_PINCTRL_NS) += pinctrl-ns.o ---- /dev/null -+++ b/drivers/pinctrl/bcm/pinctrl-bcm4908.c -@@ -0,0 +1,560 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl> */ -+ -+#include <linux/err.h> -+#include <linux/io.h> -+#include <linux/mod_devicetable.h> -+#include <linux/module.h> -+#include <linux/pinctrl/pinconf-generic.h> -+#include <linux/pinctrl/pinctrl.h> -+#include <linux/pinctrl/pinmux.h> -+#include <linux/platform_device.h> -+#include <linux/slab.h> -+#include <linux/string_helpers.h> -+ -+#include "../core.h" -+#include "../pinmux.h" -+ -+#define BCM4908_NUM_PINS 86 -+ -+#define BCM4908_TEST_PORT_BLOCK_EN_LSB 0x00 -+#define BCM4908_TEST_PORT_BLOCK_DATA_MSB 0x04 -+#define BCM4908_TEST_PORT_BLOCK_DATA_LSB 0x08 -+#define BCM4908_TEST_PORT_LSB_PINMUX_DATA_SHIFT 12 -+#define BCM4908_TEST_PORT_COMMAND 0x0c -+#define BCM4908_TEST_PORT_CMD_LOAD_MUX_REG 0x00000021 -+ -+struct bcm4908_pinctrl { -+ struct device *dev; -+ void __iomem *base; -+ struct mutex mutex; -+ struct pinctrl_dev *pctldev; -+ struct pinctrl_desc pctldesc; -+}; -+ -+/* -+ * Groups -+ */ -+ -+struct bcm4908_pinctrl_pin_setup { -+ unsigned int number; -+ unsigned int function; -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_0_pins_a[] = { -+ { 0, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_1_pins_a[] = { -+ { 1, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_2_pins_a[] = { -+ { 2, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_3_pins_a[] = { -+ { 3, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_4_pins_a[] = { -+ { 4, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_5_pins_a[] = { -+ { 5, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_6_pins_a[] = { -+ { 6, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_7_pins_a[] = { -+ { 7, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_8_pins_a[] = { -+ { 8, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_9_pins_a[] = { -+ { 9, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_10_pins_a[] = { -+ { 10, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_11_pins_a[] = { -+ { 11, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_12_pins_a[] = { -+ { 12, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_13_pins_a[] = { -+ { 13, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_14_pins_a[] = { -+ { 14, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_15_pins_a[] = { -+ { 15, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_16_pins_a[] = { -+ { 16, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_17_pins_a[] = { -+ { 17, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_18_pins_a[] = { -+ { 18, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_19_pins_a[] = { -+ { 19, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_20_pins_a[] = { -+ { 20, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_21_pins_a[] = { -+ { 21, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_22_pins_a[] = { -+ { 22, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_23_pins_a[] = { -+ { 23, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_24_pins_a[] = { -+ { 24, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_25_pins_a[] = { -+ { 25, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_26_pins_a[] = { -+ { 26, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_27_pins_a[] = { -+ { 27, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_28_pins_a[] = { -+ { 28, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_29_pins_a[] = { -+ { 29, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_30_pins_a[] = { -+ { 30, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_31_pins_a[] = { -+ { 31, 3 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_10_pins_b[] = { -+ { 8, 2 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_11_pins_b[] = { -+ { 9, 2 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_12_pins_b[] = { -+ { 0, 2 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_13_pins_b[] = { -+ { 1, 2 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup led_31_pins_b[] = { -+ { 30, 2 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup hs_uart_pins[] = { -+ { 10, 0 }, /* CTS */ -+ { 11, 0 }, /* RTS */ -+ { 12, 0 }, /* RXD */ -+ { 13, 0 }, /* TXD */ -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup i2c_pins_a[] = { -+ { 18, 0 }, /* SDA */ -+ { 19, 0 }, /* SCL */ -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup i2c_pins_b[] = { -+ { 22, 0 }, /* SDA */ -+ { 23, 0 }, /* SCL */ -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup i2s_pins[] = { -+ { 27, 0 }, /* MCLK */ -+ { 28, 0 }, /* LRCK */ -+ { 29, 0 }, /* SDATA */ -+ { 30, 0 }, /* SCLK */ -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup nand_ctrl_pins[] = { -+ { 32, 0 }, -+ { 33, 0 }, -+ { 34, 0 }, -+ { 43, 0 }, -+ { 44, 0 }, -+ { 45, 0 }, -+ { 56, 1 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup nand_data_pins[] = { -+ { 35, 0 }, -+ { 36, 0 }, -+ { 37, 0 }, -+ { 38, 0 }, -+ { 39, 0 }, -+ { 40, 0 }, -+ { 41, 0 }, -+ { 42, 0 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup emmc_ctrl_pins[] = { -+ { 46, 0 }, -+ { 47, 0 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup usb0_pwr_pins[] = { -+ { 63, 0 }, -+ { 64, 0 }, -+}; -+ -+static const struct bcm4908_pinctrl_pin_setup usb1_pwr_pins[] = { -+ { 66, 0 }, -+ { 67, 0 }, -+}; -+ -+struct bcm4908_pinctrl_grp { -+ const char *name; -+ const struct bcm4908_pinctrl_pin_setup *pins; -+ const unsigned int num_pins; -+}; -+ -+static const struct bcm4908_pinctrl_grp bcm4908_pinctrl_grps[] = { -+ { "led_0_grp_a", led_0_pins_a, ARRAY_SIZE(led_0_pins_a) }, -+ { "led_1_grp_a", led_1_pins_a, ARRAY_SIZE(led_1_pins_a) }, -+ { "led_2_grp_a", led_2_pins_a, ARRAY_SIZE(led_2_pins_a) }, -+ { "led_3_grp_a", led_3_pins_a, ARRAY_SIZE(led_3_pins_a) }, -+ { "led_4_grp_a", led_4_pins_a, ARRAY_SIZE(led_4_pins_a) }, -+ { "led_5_grp_a", led_5_pins_a, ARRAY_SIZE(led_5_pins_a) }, -+ { "led_6_grp_a", led_6_pins_a, ARRAY_SIZE(led_6_pins_a) }, -+ { "led_7_grp_a", led_7_pins_a, ARRAY_SIZE(led_7_pins_a) }, -+ { "led_8_grp_a", led_8_pins_a, ARRAY_SIZE(led_8_pins_a) }, -+ { "led_9_grp_a", led_9_pins_a, ARRAY_SIZE(led_9_pins_a) }, -+ { "led_10_grp_a", led_10_pins_a, ARRAY_SIZE(led_10_pins_a) }, -+ { "led_11_grp_a", led_11_pins_a, ARRAY_SIZE(led_11_pins_a) }, -+ { "led_12_grp_a", led_12_pins_a, ARRAY_SIZE(led_12_pins_a) }, -+ { "led_13_grp_a", led_13_pins_a, ARRAY_SIZE(led_13_pins_a) }, -+ { "led_14_grp_a", led_14_pins_a, ARRAY_SIZE(led_14_pins_a) }, -+ { "led_15_grp_a", led_15_pins_a, ARRAY_SIZE(led_15_pins_a) }, -+ { "led_16_grp_a", led_16_pins_a, ARRAY_SIZE(led_16_pins_a) }, -+ { "led_17_grp_a", led_17_pins_a, ARRAY_SIZE(led_17_pins_a) }, -+ { "led_18_grp_a", led_18_pins_a, ARRAY_SIZE(led_18_pins_a) }, -+ { "led_19_grp_a", led_19_pins_a, ARRAY_SIZE(led_19_pins_a) }, -+ { "led_20_grp_a", led_20_pins_a, ARRAY_SIZE(led_20_pins_a) }, -+ { "led_21_grp_a", led_21_pins_a, ARRAY_SIZE(led_21_pins_a) }, -+ { "led_22_grp_a", led_22_pins_a, ARRAY_SIZE(led_22_pins_a) }, -+ { "led_23_grp_a", led_23_pins_a, ARRAY_SIZE(led_23_pins_a) }, -+ { "led_24_grp_a", led_24_pins_a, ARRAY_SIZE(led_24_pins_a) }, -+ { "led_25_grp_a", led_25_pins_a, ARRAY_SIZE(led_25_pins_a) }, -+ { "led_26_grp_a", led_26_pins_a, ARRAY_SIZE(led_26_pins_a) }, -+ { "led_27_grp_a", led_27_pins_a, ARRAY_SIZE(led_27_pins_a) }, -+ { "led_28_grp_a", led_28_pins_a, ARRAY_SIZE(led_28_pins_a) }, -+ { "led_29_grp_a", led_29_pins_a, ARRAY_SIZE(led_29_pins_a) }, -+ { "led_30_grp_a", led_30_pins_a, ARRAY_SIZE(led_30_pins_a) }, -+ { "led_31_grp_a", led_31_pins_a, ARRAY_SIZE(led_31_pins_a) }, -+ { "led_10_grp_b", led_10_pins_b, ARRAY_SIZE(led_10_pins_b) }, -+ { "led_11_grp_b", led_11_pins_b, ARRAY_SIZE(led_11_pins_b) }, -+ { "led_12_grp_b", led_12_pins_b, ARRAY_SIZE(led_12_pins_b) }, -+ { "led_13_grp_b", led_13_pins_b, ARRAY_SIZE(led_13_pins_b) }, -+ { "led_31_grp_b", led_31_pins_b, ARRAY_SIZE(led_31_pins_b) }, -+ { "hs_uart_grp", hs_uart_pins, ARRAY_SIZE(hs_uart_pins) }, -+ { "i2c_grp_a", i2c_pins_a, ARRAY_SIZE(i2c_pins_a) }, -+ { "i2c_grp_b", i2c_pins_b, ARRAY_SIZE(i2c_pins_b) }, -+ { "i2s_grp", i2s_pins, ARRAY_SIZE(i2s_pins) }, -+ { "nand_ctrl_grp", nand_ctrl_pins, ARRAY_SIZE(nand_ctrl_pins) }, -+ { "nand_data_grp", nand_data_pins, ARRAY_SIZE(nand_data_pins) }, -+ { "emmc_ctrl_grp", emmc_ctrl_pins, ARRAY_SIZE(emmc_ctrl_pins) }, -+ { "usb0_pwr_grp", usb0_pwr_pins, ARRAY_SIZE(usb0_pwr_pins) }, -+ { "usb1_pwr_grp", usb1_pwr_pins, ARRAY_SIZE(usb1_pwr_pins) }, -+}; -+ -+/* -+ * Functions -+ */ -+ -+struct bcm4908_pinctrl_function { -+ const char *name; -+ const char * const *groups; -+ const unsigned int num_groups; -+}; -+ -+static const char * const led_0_groups[] = { "led_0_grp_a" }; -+static const char * const led_1_groups[] = { "led_1_grp_a" }; -+static const char * const led_2_groups[] = { "led_2_grp_a" }; -+static const char * const led_3_groups[] = { "led_3_grp_a" }; -+static const char * const led_4_groups[] = { "led_4_grp_a" }; -+static const char * const led_5_groups[] = { "led_5_grp_a" }; -+static const char * const led_6_groups[] = { "led_6_grp_a" }; -+static const char * const led_7_groups[] = { "led_7_grp_a" }; -+static const char * const led_8_groups[] = { "led_8_grp_a" }; -+static const char * const led_9_groups[] = { "led_9_grp_a" }; -+static const char * const led_10_groups[] = { "led_10_grp_a", "led_10_grp_b" }; -+static const char * const led_11_groups[] = { "led_11_grp_a", "led_11_grp_b" }; -+static const char * const led_12_groups[] = { "led_12_grp_a", "led_12_grp_b" }; -+static const char * const led_13_groups[] = { "led_13_grp_a", "led_13_grp_b" }; -+static const char * const led_14_groups[] = { "led_14_grp_a" }; -+static const char * const led_15_groups[] = { "led_15_grp_a" }; -+static const char * const led_16_groups[] = { "led_16_grp_a" }; -+static const char * const led_17_groups[] = { "led_17_grp_a" }; -+static const char * const led_18_groups[] = { "led_18_grp_a" }; -+static const char * const led_19_groups[] = { "led_19_grp_a" }; -+static const char * const led_20_groups[] = { "led_20_grp_a" }; -+static const char * const led_21_groups[] = { "led_21_grp_a" }; -+static const char * const led_22_groups[] = { "led_22_grp_a" }; -+static const char * const led_23_groups[] = { "led_23_grp_a" }; -+static const char * const led_24_groups[] = { "led_24_grp_a" }; -+static const char * const led_25_groups[] = { "led_25_grp_a" }; -+static const char * const led_26_groups[] = { "led_26_grp_a" }; -+static const char * const led_27_groups[] = { "led_27_grp_a" }; -+static const char * const led_28_groups[] = { "led_28_grp_a" }; -+static const char * const led_29_groups[] = { "led_29_grp_a" }; -+static const char * const led_30_groups[] = { "led_30_grp_a" }; -+static const char * const led_31_groups[] = { "led_31_grp_a", "led_31_grp_b" }; -+static const char * const hs_uart_groups[] = { "hs_uart_grp" }; -+static const char * const i2c_groups[] = { "i2c_grp_a", "i2c_grp_b" }; -+static const char * const i2s_groups[] = { "i2s_grp" }; -+static const char * const nand_ctrl_groups[] = { "nand_ctrl_grp" }; -+static const char * const nand_data_groups[] = { "nand_data_grp" }; -+static const char * const emmc_ctrl_groups[] = { "emmc_ctrl_grp" }; -+static const char * const usb0_pwr_groups[] = { "usb0_pwr_grp" }; -+static const char * const usb1_pwr_groups[] = { "usb1_pwr_grp" }; -+ -+static const struct bcm4908_pinctrl_function bcm4908_pinctrl_functions[] = { -+ { "led_0", led_0_groups, ARRAY_SIZE(led_0_groups) }, -+ { "led_1", led_1_groups, ARRAY_SIZE(led_1_groups) }, -+ { "led_2", led_2_groups, ARRAY_SIZE(led_2_groups) }, -+ { "led_3", led_3_groups, ARRAY_SIZE(led_3_groups) }, -+ { "led_4", led_4_groups, ARRAY_SIZE(led_4_groups) }, -+ { "led_5", led_5_groups, ARRAY_SIZE(led_5_groups) }, -+ { "led_6", led_6_groups, ARRAY_SIZE(led_6_groups) }, -+ { "led_7", led_7_groups, ARRAY_SIZE(led_7_groups) }, -+ { "led_8", led_8_groups, ARRAY_SIZE(led_8_groups) }, -+ { "led_9", led_9_groups, ARRAY_SIZE(led_9_groups) }, -+ { "led_10", led_10_groups, ARRAY_SIZE(led_10_groups) }, -+ { "led_11", led_11_groups, ARRAY_SIZE(led_11_groups) }, -+ { "led_12", led_12_groups, ARRAY_SIZE(led_12_groups) }, -+ { "led_13", led_13_groups, ARRAY_SIZE(led_13_groups) }, -+ { "led_14", led_14_groups, ARRAY_SIZE(led_14_groups) }, -+ { "led_15", led_15_groups, ARRAY_SIZE(led_15_groups) }, -+ { "led_16", led_16_groups, ARRAY_SIZE(led_16_groups) }, -+ { "led_17", led_17_groups, ARRAY_SIZE(led_17_groups) }, -+ { "led_18", led_18_groups, ARRAY_SIZE(led_18_groups) }, -+ { "led_19", led_19_groups, ARRAY_SIZE(led_19_groups) }, -+ { "led_20", led_20_groups, ARRAY_SIZE(led_20_groups) }, -+ { "led_21", led_21_groups, ARRAY_SIZE(led_21_groups) }, -+ { "led_22", led_22_groups, ARRAY_SIZE(led_22_groups) }, -+ { "led_23", led_23_groups, ARRAY_SIZE(led_23_groups) }, -+ { "led_24", led_24_groups, ARRAY_SIZE(led_24_groups) }, -+ { "led_25", led_25_groups, ARRAY_SIZE(led_25_groups) }, -+ { "led_26", led_26_groups, ARRAY_SIZE(led_26_groups) }, -+ { "led_27", led_27_groups, ARRAY_SIZE(led_27_groups) }, -+ { "led_28", led_28_groups, ARRAY_SIZE(led_28_groups) }, -+ { "led_29", led_29_groups, ARRAY_SIZE(led_29_groups) }, -+ { "led_30", led_30_groups, ARRAY_SIZE(led_30_groups) }, -+ { "led_31", led_31_groups, ARRAY_SIZE(led_31_groups) }, -+ { "hs_uart", hs_uart_groups, ARRAY_SIZE(hs_uart_groups) }, -+ { "i2c", i2c_groups, ARRAY_SIZE(i2c_groups) }, -+ { "i2s", i2s_groups, ARRAY_SIZE(i2s_groups) }, -+ { "nand_ctrl", nand_ctrl_groups, ARRAY_SIZE(nand_ctrl_groups) }, -+ { "nand_data", nand_data_groups, ARRAY_SIZE(nand_data_groups) }, -+ { "emmc_ctrl", emmc_ctrl_groups, ARRAY_SIZE(emmc_ctrl_groups) }, -+ { "usb0_pwr", usb0_pwr_groups, ARRAY_SIZE(usb0_pwr_groups) }, -+ { "usb1_pwr", usb1_pwr_groups, ARRAY_SIZE(usb1_pwr_groups) }, -+}; -+ -+/* -+ * Groups code -+ */ -+ -+static const struct pinctrl_ops bcm4908_pinctrl_ops = { -+ .get_groups_count = pinctrl_generic_get_group_count, -+ .get_group_name = pinctrl_generic_get_group_name, -+ .get_group_pins = pinctrl_generic_get_group_pins, -+ .dt_node_to_map = pinconf_generic_dt_node_to_map_group, -+ .dt_free_map = pinconf_generic_dt_free_map, -+}; -+ -+/* -+ * Functions code -+ */ -+ -+static int bcm4908_pinctrl_set_mux(struct pinctrl_dev *pctrl_dev, -+ unsigned int func_selector, -+ unsigned int group_selector) -+{ -+ struct bcm4908_pinctrl *bcm4908_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); -+ const struct bcm4908_pinctrl_grp *group; -+ struct group_desc *group_desc; -+ int i; -+ -+ group_desc = pinctrl_generic_get_group(pctrl_dev, group_selector); -+ if (!group_desc) -+ return -EINVAL; -+ group = group_desc->data; -+ -+ mutex_lock(&bcm4908_pinctrl->mutex); -+ for (i = 0; i < group->num_pins; i++) { -+ u32 lsb = 0; -+ -+ lsb |= group->pins[i].number; -+ lsb |= group->pins[i].function << BCM4908_TEST_PORT_LSB_PINMUX_DATA_SHIFT; -+ -+ writel(0x0, bcm4908_pinctrl->base + BCM4908_TEST_PORT_BLOCK_DATA_MSB); -+ writel(lsb, bcm4908_pinctrl->base + BCM4908_TEST_PORT_BLOCK_DATA_LSB); -+ writel(BCM4908_TEST_PORT_CMD_LOAD_MUX_REG, -+ bcm4908_pinctrl->base + BCM4908_TEST_PORT_COMMAND); -+ } -+ mutex_unlock(&bcm4908_pinctrl->mutex); -+ -+ return 0; -+} -+ -+static const struct pinmux_ops bcm4908_pinctrl_pmxops = { -+ .get_functions_count = pinmux_generic_get_function_count, -+ .get_function_name = pinmux_generic_get_function_name, -+ .get_function_groups = pinmux_generic_get_function_groups, -+ .set_mux = bcm4908_pinctrl_set_mux, -+}; -+ -+/* -+ * Controller code -+ */ -+ -+static struct pinctrl_desc bcm4908_pinctrl_desc = { -+ .name = "bcm4908-pinctrl", -+ .pctlops = &bcm4908_pinctrl_ops, -+ .pmxops = &bcm4908_pinctrl_pmxops, -+}; -+ -+static const struct of_device_id bcm4908_pinctrl_of_match_table[] = { -+ { .compatible = "brcm,bcm4908-pinctrl", }, -+ { } -+}; -+ -+static int bcm4908_pinctrl_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct bcm4908_pinctrl *bcm4908_pinctrl; -+ struct pinctrl_desc *pctldesc; -+ struct pinctrl_pin_desc *pins; -+ int i; -+ -+ bcm4908_pinctrl = devm_kzalloc(dev, sizeof(*bcm4908_pinctrl), GFP_KERNEL); -+ if (!bcm4908_pinctrl) -+ return -ENOMEM; -+ pctldesc = &bcm4908_pinctrl->pctldesc; -+ platform_set_drvdata(pdev, bcm4908_pinctrl); -+ -+ /* Set basic properties */ -+ -+ bcm4908_pinctrl->dev = dev; -+ -+ bcm4908_pinctrl->base = devm_platform_ioremap_resource(pdev, 0); -+ if (IS_ERR(bcm4908_pinctrl->base)) -+ return PTR_ERR(bcm4908_pinctrl->base); -+ -+ mutex_init(&bcm4908_pinctrl->mutex); -+ -+ memcpy(pctldesc, &bcm4908_pinctrl_desc, sizeof(*pctldesc)); -+ -+ /* Set pinctrl properties */ -+ -+ pins = devm_kcalloc(dev, BCM4908_NUM_PINS, sizeof(*pins), GFP_KERNEL); -+ if (!pins) -+ return -ENOMEM; -+ for (i = 0; i < BCM4908_NUM_PINS; i++) { -+ pins[i].number = i; -+ pins[i].name = devm_kasprintf(dev, GFP_KERNEL, "pin-%d", i); -+ if (!pins[i].name) -+ return -ENOMEM; -+ } -+ pctldesc->pins = pins; -+ pctldesc->npins = BCM4908_NUM_PINS; -+ -+ /* Register */ -+ -+ bcm4908_pinctrl->pctldev = devm_pinctrl_register(dev, pctldesc, bcm4908_pinctrl); -+ if (IS_ERR(bcm4908_pinctrl->pctldev)) -+ return dev_err_probe(dev, PTR_ERR(bcm4908_pinctrl->pctldev), -+ "Failed to register pinctrl\n"); -+ -+ /* Groups */ -+ -+ for (i = 0; i < ARRAY_SIZE(bcm4908_pinctrl_grps); i++) { -+ const struct bcm4908_pinctrl_grp *group = &bcm4908_pinctrl_grps[i]; -+ int *pins; -+ int j; -+ -+ pins = devm_kcalloc(dev, group->num_pins, sizeof(*pins), GFP_KERNEL); -+ if (!pins) -+ return -ENOMEM; -+ for (j = 0; j < group->num_pins; j++) -+ pins[j] = group->pins[j].number; -+ -+ pinctrl_generic_add_group(bcm4908_pinctrl->pctldev, group->name, -+ pins, group->num_pins, (void *)group); -+ } -+ -+ /* Functions */ -+ -+ for (i = 0; i < ARRAY_SIZE(bcm4908_pinctrl_functions); i++) { -+ const struct bcm4908_pinctrl_function *function = &bcm4908_pinctrl_functions[i]; -+ -+ pinmux_generic_add_function(bcm4908_pinctrl->pctldev, -+ function->name, -+ function->groups, -+ function->num_groups, NULL); -+ } -+ -+ return 0; -+} -+ -+static struct platform_driver bcm4908_pinctrl_driver = { -+ .probe = bcm4908_pinctrl_probe, -+ .driver = { -+ .name = "bcm4908-pinctrl", -+ .of_match_table = bcm4908_pinctrl_of_match_table, -+ }, -+}; -+ -+module_platform_driver(bcm4908_pinctrl_driver); -+ -+MODULE_AUTHOR("Rafał Miłecki"); -+MODULE_LICENSE("GPL v2"); -+MODULE_DEVICE_TABLE(of, bcm4908_pinctrl_of_match_table); diff --git a/target/linux/bcm4908/patches-5.10/086-v5.12-0001-phy-phy-brcm-usb-improve-getting-OF-matching-data.patch b/target/linux/bcm4908/patches-5.10/086-v5.12-0001-phy-phy-brcm-usb-improve-getting-OF-matching-data.patch deleted file mode 100644 index ec9b1fea3d..0000000000 --- a/target/linux/bcm4908/patches-5.10/086-v5.12-0001-phy-phy-brcm-usb-improve-getting-OF-matching-data.patch +++ /dev/null @@ -1,49 +0,0 @@ -From d14f4cce9340a6586512a0eb6bc680dedeaaef14 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 16 Dec 2020 15:33:04 +0100 -Subject: [PATCH] phy: phy-brcm-usb: improve getting OF matching data -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -1. Use of_device_get_match_data() helper to simplify the code -2. Check for NULL as a good practice - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Link: https://lore.kernel.org/r/20201216143305.12179-1-zajec5@gmail.com -Signed-off-by: Vinod Koul <vkoul@kernel.org> ---- - drivers/phy/broadcom/phy-brcm-usb.c | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - ---- a/drivers/phy/broadcom/phy-brcm-usb.c -+++ b/drivers/phy/broadcom/phy-brcm-usb.c -@@ -11,6 +11,7 @@ - #include <linux/io.h> - #include <linux/module.h> - #include <linux/of.h> -+#include <linux/of_device.h> - #include <linux/phy/phy.h> - #include <linux/platform_device.h> - #include <linux/interrupt.h> -@@ -457,7 +458,6 @@ static int brcm_usb_phy_probe(struct pla - struct device_node *dn = pdev->dev.of_node; - int err; - const char *mode; -- const struct of_device_id *match; - void (*dvr_init)(struct brcm_usb_init_params *params); - const struct match_chip_info *info; - struct regmap *rmap; -@@ -471,8 +471,9 @@ static int brcm_usb_phy_probe(struct pla - priv->ini.family_id = brcmstb_get_family_id(); - priv->ini.product_id = brcmstb_get_product_id(); - -- match = of_match_node(brcm_usb_dt_ids, dev->of_node); -- info = match->data; -+ info = of_device_get_match_data(&pdev->dev); -+ if (!info) -+ return -ENOENT; - dvr_init = info->init_func; - (*dvr_init)(&priv->ini); - diff --git a/target/linux/bcm4908/patches-5.10/086-v5.12-0002-phy-phy-brcm-usb-specify-init-function-format-at-str.patch b/target/linux/bcm4908/patches-5.10/086-v5.12-0002-phy-phy-brcm-usb-specify-init-function-format-at-str.patch deleted file mode 100644 index ffb064f95f..0000000000 --- a/target/linux/bcm4908/patches-5.10/086-v5.12-0002-phy-phy-brcm-usb-specify-init-function-format-at-str.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 915f1d230e5292bc2156a9997bcb19d9e632f10b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 16 Dec 2020 15:33:05 +0100 -Subject: [PATCH] phy: phy-brcm-usb: specify init function format at struct - level -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This is slightly cleaner solution that assures noone assings a wrong -function to the pointer. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Link: https://lore.kernel.org/r/20201216143305.12179-2-zajec5@gmail.com -Signed-off-by: Vinod Koul <vkoul@kernel.org> ---- - drivers/phy/broadcom/phy-brcm-usb.c | 7 +++---- - 1 file changed, 3 insertions(+), 4 deletions(-) - ---- a/drivers/phy/broadcom/phy-brcm-usb.c -+++ b/drivers/phy/broadcom/phy-brcm-usb.c -@@ -36,7 +36,7 @@ struct value_to_name_map { - }; - - struct match_chip_info { -- void *init_func; -+ void (*init_func)(struct brcm_usb_init_params *params); - u8 required_regs[BRCM_REGS_MAX + 1]; - u8 optional_reg; - }; -@@ -458,7 +458,6 @@ static int brcm_usb_phy_probe(struct pla - struct device_node *dn = pdev->dev.of_node; - int err; - const char *mode; -- void (*dvr_init)(struct brcm_usb_init_params *params); - const struct match_chip_info *info; - struct regmap *rmap; - int x; -@@ -474,8 +473,8 @@ static int brcm_usb_phy_probe(struct pla - info = of_device_get_match_data(&pdev->dev); - if (!info) - return -ENOENT; -- dvr_init = info->init_func; -- (*dvr_init)(&priv->ini); -+ -+ info->init_func(&priv->ini); - - dev_dbg(dev, "Best mapping table is for %s\n", - priv->ini.family_name); diff --git a/target/linux/bcm4908/patches-5.10/086-v5.12-0003-dt-bindings-phy-brcm-brcmstb-usb-phy-convert-to-the-.patch b/target/linux/bcm4908/patches-5.10/086-v5.12-0003-dt-bindings-phy-brcm-brcmstb-usb-phy-convert-to-the-.patch deleted file mode 100644 index 1edd63ea5d..0000000000 --- a/target/linux/bcm4908/patches-5.10/086-v5.12-0003-dt-bindings-phy-brcm-brcmstb-usb-phy-convert-to-the-.patch +++ /dev/null @@ -1,315 +0,0 @@ -From b39069a482ade0c5e18c407c3218ba1aeed371b6 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 6 Jan 2021 21:58:36 +0100 -Subject: [PATCH] dt-bindings: phy: brcm, brcmstb-usb-phy: convert to the - json-schema -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Changes that require mentioning: -1. interrupt-names - Name "wakeup" was changed to the "wake". It matches example and what - Linux driver looks for in the first place -2. brcm,ipp and brcm,ioc - Both were described as booleans with 0 / 1 values. In examples they - were integers and Linux checks for int as well. Both got uint32. -3. Added minimal description - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -Reviewed-by: Rob Herring <robh@kernel.org> -Link: https://lore.kernel.org/r/20210106205838.10964-1-zajec5@gmail.com -Signed-off-by: Vinod Koul <vkoul@kernel.org> ---- - .../bindings/phy/brcm,brcmstb-usb-phy.txt | 86 -------- - .../bindings/phy/brcm,brcmstb-usb-phy.yaml | 193 ++++++++++++++++++ - 2 files changed, 193 insertions(+), 86 deletions(-) - delete mode 100644 Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt - create mode 100644 Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml - ---- a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt -+++ /dev/null -@@ -1,86 +0,0 @@ --Broadcom STB USB PHY -- --Required properties: --- compatible: should be one of -- "brcm,brcmstb-usb-phy" -- "brcm,bcm7216-usb-phy" -- "brcm,bcm7211-usb-phy" -- --- reg and reg-names properties requirements are specific to the -- compatible string. -- "brcm,brcmstb-usb-phy": -- - reg: 1 or 2 offset and length pairs. One for the base CTRL registers -- and an optional pair for systems with USB 3.x support -- - reg-names: not specified -- "brcm,bcm7216-usb-phy": -- - reg: 3 offset and length pairs for CTRL, XHCI_EC and XHCI_GBL -- registers -- - reg-names: "ctrl", "xhci_ec", "xhci_gbl" -- "brcm,bcm7211-usb-phy": -- - reg: 5 offset and length pairs for CTRL, XHCI_EC, XHCI_GBL, -- USB_PHY and USB_MDIO registers and an optional pair -- for the BDC registers -- - reg-names: "ctrl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio", "bdc_ec" -- --- #phy-cells: Shall be 1 as it expects one argument for setting -- the type of the PHY. Possible values are: -- - PHY_TYPE_USB2 for USB1.1/2.0 PHY -- - PHY_TYPE_USB3 for USB3.x PHY -- --Optional Properties: --- clocks : clock phandles. --- clock-names: String, clock name. --- interrupts: wakeup interrupt --- interrupt-names: "wakeup" --- brcm,ipp: Boolean, Invert Port Power. -- Possible values are: 0 (Don't invert), 1 (Invert) --- brcm,ioc: Boolean, Invert Over Current detection. -- Possible values are: 0 (Don't invert), 1 (Invert) --- dr_mode: String, PHY Device mode. -- Possible values are: "host", "peripheral ", "drd" or "typec-pd" -- If this property is not defined, the phy will default to "host" mode. --- brcm,syscon-piarbctl: phandle to syscon for handling config registers --NOTE: one or both of the following two properties must be set --- brcm,has-xhci: Boolean indicating the phy has an XHCI phy. --- brcm,has-eohci: Boolean indicating the phy has an EHCI/OHCI phy. -- -- --Example: -- --usbphy_0: usb-phy@f0470200 { -- reg = <0xf0470200 0xb8>, -- <0xf0471940 0x6c0>; -- compatible = "brcm,brcmstb-usb-phy"; -- #phy-cells = <1>; -- dr_mode = "host" -- brcm,ioc = <1>; -- brcm,ipp = <1>; -- brcm,has-xhci; -- brcm,has-eohci; -- clocks = <&usb20>, <&usb30>; -- clock-names = "sw_usb", "sw_usb3"; --}; -- --usb-phy@29f0200 { -- reg = <0x29f0200 0x200>, -- <0x29c0880 0x30>, -- <0x29cc100 0x534>, -- <0x2808000 0x24>, -- <0x2980080 0x8>; -- reg-names = "ctrl", -- "xhci_ec", -- "xhci_gbl", -- "usb_phy", -- "usb_mdio"; -- brcm,ioc = <0x0>; -- brcm,ipp = <0x0>; -- compatible = "brcm,bcm7211-usb-phy"; -- interrupts = <0x30>; -- interrupt-parent = <&vpu_intr1_nosec_intc>; -- interrupt-names = "wake"; -- #phy-cells = <0x1>; -- brcm,has-xhci; -- syscon-piarbctl = <&syscon_piarbctl>; -- clocks = <&scmi_clk 256>; -- clock-names = "sw_usb"; --}; ---- /dev/null -+++ b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml -@@ -0,0 +1,193 @@ -+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/phy/brcm,brcmstb-usb-phy.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Broadcom STB USB PHY -+ -+description: Broadcom's PHY that handles EHCI/OHCI and/or XHCI -+ -+maintainers: -+ - Al Cooper <alcooperx@gmail.com> -+ - Rafał Miłecki <rafal@milecki.pl> -+ -+properties: -+ compatible: -+ enum: -+ - brcm,bcm7211-usb-phy -+ - brcm,bcm7216-usb-phy -+ - brcm,brcmstb-usb-phy -+ -+ reg: -+ minItems: 1 -+ maxItems: 6 -+ items: -+ - description: the base CTRL register -+ - description: XHCI EC register -+ - description: XHCI GBL register -+ - description: USB PHY register -+ - description: USB MDIO register -+ - description: BDC register -+ -+ reg-names: -+ minItems: 1 -+ maxItems: 6 -+ items: -+ - const: ctrl -+ - const: xhci_ec -+ - const: xhci_gbl -+ - const: usb_phy -+ - const: usb_mdio -+ - const: bdc_ec -+ -+ clocks: -+ minItems: 1 -+ maxItems: 2 -+ -+ clock-names: -+ minItems: 1 -+ maxItems: 2 -+ items: -+ - const: sw_usb -+ - const: sw_usb3 -+ -+ interrupts: -+ description: wakeup interrupt -+ -+ interrupt-names: -+ const: wake -+ -+ brcm,ipp: -+ $ref: /schemas/types.yaml#/definitions/uint32 -+ description: Invert Port Power -+ minimum: 0 -+ maximum: 1 -+ -+ brcm,ioc: -+ $ref: /schemas/types.yaml#/definitions/uint32 -+ description: Invert Over Current detection -+ minimum: 0 -+ maximum: 1 -+ -+ dr_mode: -+ description: PHY Device mode. If this property is not defined, the PHY will -+ default to "host" mode. -+ enum: -+ - host -+ - peripheral -+ - drd -+ - typec-pd -+ -+ brcm,syscon-piarbctl: -+ description: phandle to syscon for handling config registers -+ $ref: /schemas/types.yaml#/definitions/phandle -+ -+ brcm,has-xhci: -+ description: Indicates the PHY has an XHCI PHY. -+ type: boolean -+ -+ brcm,has-eohci: -+ description: Indicates the PHY has an EHCI/OHCI PHY. -+ type: boolean -+ -+ "#phy-cells": -+ description: | -+ Cell allows setting the type of the PHY. Possible values are: -+ - PHY_TYPE_USB2 for USB1.1/2.0 PHY -+ - PHY_TYPE_USB3 for USB3.x PHY -+ const: 1 -+ -+required: -+ - reg -+ - "#phy-cells" -+ -+anyOf: -+ - required: -+ - brcm,has-xhci -+ - required: -+ - brcm,has-eohci -+ -+allOf: -+ - if: -+ properties: -+ compatible: -+ contains: -+ const: brcm,brcmstb-usb-phy -+ then: -+ properties: -+ reg: -+ minItems: 1 -+ maxItems: 2 -+ - if: -+ properties: -+ compatible: -+ contains: -+ const: brcm,bcm7211-usb-phy -+ then: -+ properties: -+ reg: -+ minItems: 5 -+ maxItems: 6 -+ reg-names: -+ minItems: 5 -+ maxItems: 6 -+ - if: -+ properties: -+ compatible: -+ contains: -+ const: brcm,bcm7216-usb-phy -+ then: -+ properties: -+ reg: -+ minItems: 3 -+ maxItems: 3 -+ reg-names: -+ minItems: 3 -+ maxItems: 3 -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include <dt-bindings/phy/phy.h> -+ -+ usb-phy@f0470200 { -+ compatible = "brcm,brcmstb-usb-phy"; -+ reg = <0xf0470200 0xb8>, -+ <0xf0471940 0x6c0>; -+ #phy-cells = <1>; -+ dr_mode = "host"; -+ brcm,ioc = <1>; -+ brcm,ipp = <1>; -+ brcm,has-xhci; -+ brcm,has-eohci; -+ clocks = <&usb20>, <&usb30>; -+ clock-names = "sw_usb", "sw_usb3"; -+ }; -+ - | -+ #include <dt-bindings/phy/phy.h> -+ -+ usb-phy@29f0200 { -+ compatible = "brcm,bcm7211-usb-phy"; -+ reg = <0x29f0200 0x200>, -+ <0x29c0880 0x30>, -+ <0x29cc100 0x534>, -+ <0x2808000 0x24>, -+ <0x2980080 0x8>; -+ reg-names = "ctrl", -+ "xhci_ec", -+ "xhci_gbl", -+ "usb_phy", -+ "usb_mdio"; -+ brcm,ioc = <0x0>; -+ brcm,ipp = <0x0>; -+ interrupts = <0x30>; -+ interrupt-parent = <&vpu_intr1_nosec_intc>; -+ interrupt-names = "wake"; -+ #phy-cells = <0x1>; -+ brcm,has-xhci; -+ brcm,syscon-piarbctl = <&syscon_piarbctl>; -+ clocks = <&scmi_clk 256>; -+ clock-names = "sw_usb"; -+ }; diff --git a/target/linux/bcm4908/patches-5.10/086-v5.12-0004-dt-bindings-phy-brcm-brcmstb-usb-phy-add-BCM4908-bin.patch b/target/linux/bcm4908/patches-5.10/086-v5.12-0004-dt-bindings-phy-brcm-brcmstb-usb-phy-add-BCM4908-bin.patch deleted file mode 100644 index 6127800a43..0000000000 --- a/target/linux/bcm4908/patches-5.10/086-v5.12-0004-dt-bindings-phy-brcm-brcmstb-usb-phy-add-BCM4908-bin.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 46b616c1574def7a1629bdeded3d44e76382f950 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 6 Jan 2021 21:58:37 +0100 -Subject: [PATCH] dt-bindings: phy: brcm, brcmstb-usb-phy: add BCM4908 binding -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 uses the same PHY and may require just a slightly different -programming. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Acked-by: Rob Herring <robh@kernel.org> -Link: https://lore.kernel.org/r/20210106205838.10964-2-zajec5@gmail.com -Signed-off-by: Vinod Koul <vkoul@kernel.org> ---- - .../devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - ---- a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml -+++ b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml -@@ -15,6 +15,7 @@ maintainers: - properties: - compatible: - enum: -+ - brcm,bcm4908-usb-phy - - brcm,bcm7211-usb-phy - - brcm,bcm7216-usb-phy - - brcm,brcmstb-usb-phy -@@ -113,7 +114,9 @@ allOf: - properties: - compatible: - contains: -- const: brcm,brcmstb-usb-phy -+ enum: -+ - const: brcm,bcm4908-usb-phy -+ - const: brcm,brcmstb-usb-phy - then: - properties: - reg: diff --git a/target/linux/bcm4908/patches-5.10/086-v5.12-0005-phy-phy-brcm-usb-support-PHY-on-the-BCM4908.patch b/target/linux/bcm4908/patches-5.10/086-v5.12-0005-phy-phy-brcm-usb-support-PHY-on-the-BCM4908.patch deleted file mode 100644 index 362738c802..0000000000 --- a/target/linux/bcm4908/patches-5.10/086-v5.12-0005-phy-phy-brcm-usb-support-PHY-on-the-BCM4908.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 4b402fa8e0b7817f3e3738d7828038f114e6899e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 6 Jan 2021 21:58:38 +0100 -Subject: [PATCH] phy: phy-brcm-usb: support PHY on the BCM4908 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 seems to have slightly different registers but works when -programmed just like the STB one. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Link: https://lore.kernel.org/r/20210106205838.10964-3-zajec5@gmail.com -Signed-off-by: Vinod Koul <vkoul@kernel.org> ---- - drivers/phy/broadcom/Kconfig | 3 ++- - drivers/phy/broadcom/phy-brcm-usb.c | 4 ++++ - 2 files changed, 6 insertions(+), 1 deletion(-) - ---- a/drivers/phy/broadcom/Kconfig -+++ b/drivers/phy/broadcom/Kconfig -@@ -91,10 +91,11 @@ config PHY_BRCM_SATA - - config PHY_BRCM_USB - tristate "Broadcom STB USB PHY driver" -- depends on ARCH_BRCMSTB || COMPILE_TEST -+ depends on ARCH_BCM4908 || ARCH_BRCMSTB || COMPILE_TEST - depends on OF - select GENERIC_PHY - select SOC_BRCMSTB -+ default ARCH_BCM4908 - default ARCH_BRCMSTB - help - Enable this to support the Broadcom STB USB PHY. ---- a/drivers/phy/broadcom/phy-brcm-usb.c -+++ b/drivers/phy/broadcom/phy-brcm-usb.c -@@ -317,6 +317,10 @@ static const struct match_chip_info chip - - static const struct of_device_id brcm_usb_dt_ids[] = { - { -+ .compatible = "brcm,bcm4908-usb-phy", -+ .data = &chip_info_7445, -+ }, -+ { - .compatible = "brcm,bcm7216-usb-phy", - .data = &chip_info_7216, - }, diff --git a/target/linux/bcm4908/patches-5.10/086-v5.13-0001-phy-phy-brcm-usb-select-SOC_BRCMSTB-on-brcmstb-only.patch b/target/linux/bcm4908/patches-5.10/086-v5.13-0001-phy-phy-brcm-usb-select-SOC_BRCMSTB-on-brcmstb-only.patch deleted file mode 100644 index 89ee4df78c..0000000000 --- a/target/linux/bcm4908/patches-5.10/086-v5.13-0001-phy-phy-brcm-usb-select-SOC_BRCMSTB-on-brcmstb-only.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 261ab1fd5c5d2d7ff7d5bab3f5db3c69c4bcea58 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 5 Mar 2021 16:24:06 +0100 -Subject: [PATCH] phy: phy-brcm-usb: select SOC_BRCMSTB on brcmstb only -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -phy-brcm-usb has some conditional init code required on selected brcmstb -devices. Execution of that code depends on family / product detected by -brcmstb soc code. - -For ARCH_BCM4908 brcmstb soc code always return 0 values as ids. Don't -bother selecting & compiling that redundant driver. - -Depends-on: 149ae80b1d50 ("soc: bcm: brcmstb: add stubs for getting platform IDs") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Link: https://lore.kernel.org/r/20210305152406.2588-1-zajec5@gmail.com -Signed-off-by: Vinod Koul <vkoul@kernel.org> ---- - drivers/phy/broadcom/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/phy/broadcom/Kconfig -+++ b/drivers/phy/broadcom/Kconfig -@@ -94,7 +94,7 @@ config PHY_BRCM_USB - depends on ARCH_BCM4908 || ARCH_BRCMSTB || COMPILE_TEST - depends on OF - select GENERIC_PHY -- select SOC_BRCMSTB -+ select SOC_BRCMSTB if ARCH_BRCMSTB - default ARCH_BCM4908 - default ARCH_BRCMSTB - help diff --git a/target/linux/bcm4908/patches-5.10/086-v5.13-0002-dt-bindings-phy-brcm-brcmstb-usb-phy-add-power-domai.patch b/target/linux/bcm4908/patches-5.10/086-v5.13-0002-dt-bindings-phy-brcm-brcmstb-usb-phy-add-power-domai.patch deleted file mode 100644 index 4db442c0ae..0000000000 --- a/target/linux/bcm4908/patches-5.10/086-v5.13-0002-dt-bindings-phy-brcm-brcmstb-usb-phy-add-power-domai.patch +++ /dev/null @@ -1,31 +0,0 @@ -From d9de0cbd5b1f6b51c92a40937945f26a35d848ff Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 9 Mar 2021 19:26:16 +0100 -Subject: [PATCH] dt-bindings: phy: brcm,brcmstb-usb-phy: add power-domains -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -On BCM4908 USB PHY is managed using power controller so it needs -describing properly using the power-domains. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Link: https://lore.kernel.org/r/20210309182616.25783-1-zajec5@gmail.com -Signed-off-by: Vinod Koul <vkoul@kernel.org> ---- - .../devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml -+++ b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml -@@ -42,6 +42,9 @@ properties: - - const: usb_mdio - - const: bdc_ec - -+ power-domains: -+ maxItems: 1 -+ - clocks: - minItems: 1 - maxItems: 2 diff --git a/target/linux/bcm4908/patches-5.10/087-v5.18-0001-i2c-brcmstb-allow-compiling-on-BCM4908.patch b/target/linux/bcm4908/patches-5.10/087-v5.18-0001-i2c-brcmstb-allow-compiling-on-BCM4908.patch deleted file mode 100644 index 246f249413..0000000000 --- a/target/linux/bcm4908/patches-5.10/087-v5.18-0001-i2c-brcmstb-allow-compiling-on-BCM4908.patch +++ /dev/null @@ -1,30 +0,0 @@ -From d0aee048d648ec2d9aa7af43b127ebf847d497d5 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 11 Feb 2022 11:58:06 +0100 -Subject: [PATCH] i2c: brcmstb: allow compiling on BCM4908 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 SoCs use the same I2C hardware block as STB and BCM63xx devices. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: Wolfram Sang <wsa@kernel.org> ---- - drivers/i2c/busses/Kconfig | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/i2c/busses/Kconfig -+++ b/drivers/i2c/busses/Kconfig -@@ -477,8 +477,8 @@ config I2C_BCM_KONA - - config I2C_BRCMSTB - tristate "BRCM Settop/DSL I2C controller" -- depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC || \ -- ARCH_BCM_63XX || COMPILE_TEST -+ depends on ARCH_BCM2835 || ARCH_BCM4908 || ARCH_BCM_63XX || \ -+ ARCH_BRCMSTB || BMIPS_GENERIC || COMPILE_TEST - default y - help - If you say yes to this option, support will be included for the diff --git a/target/linux/bcm4908/patches-5.10/088-v5.18-phy-phy-brcm-usb-fixup-BCM4908-support.patch b/target/linux/bcm4908/patches-5.10/088-v5.18-phy-phy-brcm-usb-fixup-BCM4908-support.patch deleted file mode 100644 index 4d39f646e1..0000000000 --- a/target/linux/bcm4908/patches-5.10/088-v5.18-phy-phy-brcm-usb-fixup-BCM4908-support.patch +++ /dev/null @@ -1,147 +0,0 @@ -From 32942d33d63d27714ed16a4176e5a99547adb6e0 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Fri, 18 Feb 2022 18:24:59 +0100 -Subject: [PATCH] phy: phy-brcm-usb: fixup BCM4908 support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Just like every other family BCM4908 should get its own enum value. That -is required to properly handle it in chipset conditional code. - -The real change is excluding BCM4908 from the PLL reprogramming code -(see brcmusb_usb3_pll_54mhz()). I'm not sure what's the BCM4908 -reference clock frequency but: -1. BCM4908 custom driver from Broadcom's SDK doesn't reprogram PLL -2. Doing that in Linux driver stopped PHY handling some USB 3.0 devices - -This change makes USB 3.0 PHY recognize e.g.: -1. 04e8:6860 - Samsung Electronics Co., Ltd Galaxy series, misc. (MTP mode) -2. 1058:259f - Western Digital My Passport 259F - -Broadcom's STB SoCs come with a set of SUN_TOP_CTRL_* registers that -allow reading chip family and product ids. Such a block & register is -missing on BCM4908 so this commit introduces "compatible" string -specific binding. - -Fixes: 4b402fa8e0b7 ("phy: phy-brcm-usb: support PHY on the BCM4908") -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -Link: https://lore.kernel.org/r/20220218172459.10431-1-zajec5@gmail.com -Signed-off-by: Vinod Koul <vkoul@kernel.org> ---- - drivers/phy/broadcom/phy-brcm-usb-init.c | 36 ++++++++++++++++++++++++ - drivers/phy/broadcom/phy-brcm-usb-init.h | 1 + - drivers/phy/broadcom/phy-brcm-usb.c | 11 +++++++- - 3 files changed, 47 insertions(+), 1 deletion(-) - ---- a/drivers/phy/broadcom/phy-brcm-usb-init.c -+++ b/drivers/phy/broadcom/phy-brcm-usb-init.c -@@ -79,6 +79,7 @@ - - enum brcm_family_type { - BRCM_FAMILY_3390A0, -+ BRCM_FAMILY_4908, - BRCM_FAMILY_7250B0, - BRCM_FAMILY_7271A0, - BRCM_FAMILY_7364A0, -@@ -96,6 +97,7 @@ enum brcm_family_type { - - static const char *family_names[BRCM_FAMILY_COUNT] = { - USB_BRCM_FAMILY(3390A0), -+ USB_BRCM_FAMILY(4908), - USB_BRCM_FAMILY(7250B0), - USB_BRCM_FAMILY(7271A0), - USB_BRCM_FAMILY(7364A0), -@@ -203,6 +205,27 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT - USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK, - ENDIAN_SETTINGS, /* USB_CTRL_SETUP ENDIAN bits */ - }, -+ /* 4908 */ -+ [BRCM_FAMILY_4908] = { -+ 0, /* USB_CTRL_SETUP_SCB1_EN_MASK */ -+ 0, /* USB_CTRL_SETUP_SCB2_EN_MASK */ -+ 0, /* USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK */ -+ 0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */ -+ 0, /* USB_CTRL_SETUP_OC3_DISABLE_MASK */ -+ 0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */ -+ 0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */ -+ USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK, -+ USB_CTRL_USB_PM_USB_PWRDN_MASK, -+ 0, /* USB_CTRL_USB30_CTL1_XHC_SOFT_RESETB_MASK */ -+ 0, /* USB_CTRL_USB30_CTL1_USB3_IOC_MASK */ -+ 0, /* USB_CTRL_USB30_CTL1_USB3_IPP_MASK */ -+ 0, /* USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK */ -+ 0, /* USB_CTRL_USB_PM_SOFT_RESET_MASK */ -+ 0, /* USB_CTRL_SETUP_CC_DRD_MODE_ENABLE_MASK */ -+ 0, /* USB_CTRL_SETUP_STRAP_CC_DRD_MODE_ENABLE_SEL_MASK */ -+ 0, /* USB_CTRL_USB_PM_USB20_HC_RESETB_VAR_MASK */ -+ 0, /* USB_CTRL_SETUP ENDIAN bits */ -+ }, - /* 7250b0 */ - [BRCM_FAMILY_7250B0] = { - USB_CTRL_SETUP_SCB1_EN_MASK, -@@ -559,6 +582,7 @@ static void brcmusb_usb3_pll_54mhz(struc - */ - switch (params->selected_family) { - case BRCM_FAMILY_3390A0: -+ case BRCM_FAMILY_4908: - case BRCM_FAMILY_7250B0: - case BRCM_FAMILY_7366C0: - case BRCM_FAMILY_74371A0: -@@ -1004,6 +1028,18 @@ static const struct brcm_usb_init_ops bc - .set_dual_select = usb_set_dual_select, - }; - -+void brcm_usb_dvr_init_4908(struct brcm_usb_init_params *params) -+{ -+ int fam; -+ -+ fam = BRCM_FAMILY_4908; -+ params->selected_family = fam; -+ params->usb_reg_bits_map = -+ &usb_reg_bits_map_table[fam][0]; -+ params->family_name = family_names[fam]; -+ params->ops = &bcm7445_ops; -+} -+ - void brcm_usb_dvr_init_7445(struct brcm_usb_init_params *params) - { - int fam; ---- a/drivers/phy/broadcom/phy-brcm-usb-init.h -+++ b/drivers/phy/broadcom/phy-brcm-usb-init.h -@@ -64,6 +64,7 @@ struct brcm_usb_init_params { - bool suspend_with_clocks; - }; - -+void brcm_usb_dvr_init_4908(struct brcm_usb_init_params *params); - void brcm_usb_dvr_init_7445(struct brcm_usb_init_params *params); - void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params); - void brcm_usb_dvr_init_7211b0(struct brcm_usb_init_params *params); ---- a/drivers/phy/broadcom/phy-brcm-usb.c -+++ b/drivers/phy/broadcom/phy-brcm-usb.c -@@ -283,6 +283,15 @@ static const struct attribute_group brcm - .attrs = brcm_usb_phy_attrs, - }; - -+static const struct match_chip_info chip_info_4908 = { -+ .init_func = &brcm_usb_dvr_init_4908, -+ .required_regs = { -+ BRCM_REGS_CTRL, -+ BRCM_REGS_XHCI_EC, -+ -1, -+ }, -+}; -+ - static const struct match_chip_info chip_info_7216 = { - .init_func = &brcm_usb_dvr_init_7216, - .required_regs = { -@@ -318,7 +327,7 @@ static const struct match_chip_info chip - static const struct of_device_id brcm_usb_dt_ids[] = { - { - .compatible = "brcm,bcm4908-usb-phy", -- .data = &chip_info_7445, -+ .data = &chip_info_4908, - }, - { - .compatible = "brcm,bcm7216-usb-phy", diff --git a/target/linux/bcm4908/patches-5.10/089-v5.18-watchdog-allow-building-BCM7038_WDT-for-BCM4908.patch b/target/linux/bcm4908/patches-5.10/089-v5.18-watchdog-allow-building-BCM7038_WDT-for-BCM4908.patch deleted file mode 100644 index ea75181a6e..0000000000 --- a/target/linux/bcm4908/patches-5.10/089-v5.18-watchdog-allow-building-BCM7038_WDT-for-BCM4908.patch +++ /dev/null @@ -1,32 +0,0 @@ -From cd91fb2776967b2b2dea27307a3f23ba3d9bbb32 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 9 Feb 2022 21:32:02 +0100 -Subject: [PATCH] watchdog: allow building BCM7038_WDT for BCM4908 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 is a SoCs family that shares a lot of hardware with BCM63xx -including the watchdog block. Allow building this driver for it. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Reviewed-by: Guenter Roeck <linux@roeck-us.net> -Link: https://lore.kernel.org/r/20220209203202.26395-1-zajec5@gmail.com -Signed-off-by: Guenter Roeck <linux@roeck-us.net> -Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> ---- - drivers/watchdog/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/watchdog/Kconfig -+++ b/drivers/watchdog/Kconfig -@@ -1800,7 +1800,7 @@ config BCM7038_WDT - tristate "BCM7038 Watchdog" - select WATCHDOG_CORE - depends on HAS_IOMEM -- depends on ARCH_BRCMSTB || BMIPS_GENERIC || COMPILE_TEST -+ depends on ARCH_BCM4908 || ARCH_BRCMSTB || BMIPS_GENERIC || COMPILE_TEST - help - Watchdog driver for the built-in hardware in Broadcom 7038 and - later SoCs used in set-top boxes. BCM7038 was made public diff --git a/target/linux/bcm4908/patches-5.10/090-v5.20-watchdog-bcm7038_wdt-Support-BCM6345-compatible-stri.patch b/target/linux/bcm4908/patches-5.10/090-v5.20-watchdog-bcm7038_wdt-Support-BCM6345-compatible-stri.patch deleted file mode 100644 index d6d2fd9ab6..0000000000 --- a/target/linux/bcm4908/patches-5.10/090-v5.20-watchdog-bcm7038_wdt-Support-BCM6345-compatible-stri.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 2dd441f16d6ad6104d85c4e5dfeb6dde4df26869 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Wed, 16 Feb 2022 07:34:08 +0100 -Subject: [PATCH] watchdog: bcm7038_wdt: Support BCM6345 compatible string -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -A new "compatible" value has been added in the commit 17fffe91ba36 -("dt-bindings: watchdog: Add BCM6345 compatible to BCM7038 binding"). -It's meant to be used for BCM63xx SoCs family but hardware block can be -programmed just like the 7038 one. - -Cc: Florian Fainelli <f.fainelli@gmail.com> -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> -Acked-by: Florian Fainelli <f.fainelli@gmail.com> -Reviewed-by: Guenter Roeck <linux@roeck-us.net> -Link: https://lore.kernel.org/r/20220216063408.23168-1-zajec5@gmail.com -Signed-off-by: Guenter Roeck <linux@roeck-us.net> -Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> ---- - drivers/watchdog/bcm7038_wdt.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/watchdog/bcm7038_wdt.c -+++ b/drivers/watchdog/bcm7038_wdt.c -@@ -193,6 +193,7 @@ static SIMPLE_DEV_PM_OPS(bcm7038_wdt_pm_ - bcm7038_wdt_resume); - - static const struct of_device_id bcm7038_wdt_match[] = { -+ { .compatible = "brcm,bcm6345-wdt" }, - { .compatible = "brcm,bcm7038-wdt" }, - {}, - }; diff --git a/target/linux/bcm4908/patches-5.10/300-arm64-dts-broadcom-bcmbca-bcm4908-limit-amount-of-GP.patch b/target/linux/bcm4908/patches-5.10/300-arm64-dts-broadcom-bcmbca-bcm4908-limit-amount-of-GP.patch deleted file mode 100644 index a7c6d0102f..0000000000 --- a/target/linux/bcm4908/patches-5.10/300-arm64-dts-broadcom-bcmbca-bcm4908-limit-amount-of-GP.patch +++ /dev/null @@ -1,23 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Mon, 15 Feb 2021 22:01:03 +0100 -Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: limit amount of GPIOs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Linux driver can't handle more than 64 GPIOs - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> ---- - ---- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi -@@ -343,7 +343,7 @@ - gpio0: gpio-controller@500 { - compatible = "brcm,bcm6345-gpio"; - reg-names = "dirout", "dat"; -- reg = <0x500 0x28>, <0x528 0x28>; -+ reg = <0x500 0x8>, <0x528 0x8>; - - #gpio-cells = <2>; - gpio-controller; diff --git a/target/linux/bcm4908/patches-5.10/400-mtd-rawnand-brcmnand-disable-WP-on-BCM4908.patch b/target/linux/bcm4908/patches-5.10/400-mtd-rawnand-brcmnand-disable-WP-on-BCM4908.patch deleted file mode 100644 index 74dddb7f48..0000000000 --- a/target/linux/bcm4908/patches-5.10/400-mtd-rawnand-brcmnand-disable-WP-on-BCM4908.patch +++ /dev/null @@ -1,34 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Thu, 21 Jan 2021 10:44:53 +0100 -Subject: [PATCH] mtd: rawnand: brcmnand: disable WP on BCM4908 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM4908 contains NAND controller version 0x0701 (v7.1). It means that -NAND_WP should be available. - -For some reason setting #WP on doesn't result in clearing NAND_STATUS_WP -status bit: -[ 1.077857] bcm63138_nand ff801800.nand: timeout on status poll (expected c0000040 got c00000c0) -[ 1.086832] bcm63138_nand ff801800.nand: nand #WP expected on - -For now try working without touching #WP. - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> ---- - ---- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c -+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c -@@ -37,7 +37,11 @@ - * 1: NAND_WP is set by default, cleared for erase/write operations - * 2: NAND_WP is always cleared - */ -+#if IS_ENABLED(CONFIG_ARCH_BCM4908) -+static int wp_on = 0; -+#else - static int wp_on = 1; -+#endif - module_param(wp_on, int, 0444); - - /*********************************************************************** diff --git a/target/linux/bcm4908/patches-5.10/700-net-dsa-bcm_sf2-enable-GPHY-for-switch-probing.patch b/target/linux/bcm4908/patches-5.10/700-net-dsa-bcm_sf2-enable-GPHY-for-switch-probing.patch deleted file mode 100644 index 5cdaa222c2..0000000000 --- a/target/linux/bcm4908/patches-5.10/700-net-dsa-bcm_sf2-enable-GPHY-for-switch-probing.patch +++ /dev/null @@ -1,46 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Mon, 15 Feb 2021 23:59:26 +0100 -Subject: [PATCH] net: dsa: bcm_sf2: enable GPHY for switch probing -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -GPHY needs to be enabled to succesfully probe & setup switch port -connected to it. Otherwise hardcoding PHY OUI would be required. - -Before: -brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL) -brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL) -brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL) -brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL) -brcm-sf2 80080000.switch wan (uninitialized): error -5 setting up PHY for tree 0, switch 0, port 7 - -After: -brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL) -brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL) -brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL) -brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL) -brcm-sf2 80080000.switch wan (uninitialized): PHY [800c05c0.mdio--1:0c] driver [Generic PHY] (irq=POLL) - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> ---- - drivers/net/dsa/bcm_sf2.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/net/dsa/bcm_sf2.c -+++ b/drivers/net/dsa/bcm_sf2.c -@@ -1540,10 +1540,14 @@ static int bcm_sf2_sw_probe(struct platf - rev = reg_readl(priv, REG_PHY_REVISION); - priv->hw_params.gphy_rev = rev & PHY_REVISION_MASK; - -+ bcm_sf2_gphy_enable_set(priv->dev->ds, true); -+ - ret = b53_switch_register(dev); - if (ret) - goto out_mdio; - -+ bcm_sf2_gphy_enable_set(priv->dev->ds, false); -+ - dev_info(&pdev->dev, - "Starfighter 2 top: %x.%02x, core: %x.%02x, IRQs: %d, %d\n", - priv->hw_params.top_rev >> 8, priv->hw_params.top_rev & 0xff, diff --git a/target/linux/bcm4908/patches-5.10/701-net-dsa-bcm_sf2-keep-GPHY-enabled-on-the-BCM4908.patch b/target/linux/bcm4908/patches-5.10/701-net-dsa-bcm_sf2-keep-GPHY-enabled-on-the-BCM4908.patch deleted file mode 100644 index 7659aa266b..0000000000 --- a/target/linux/bcm4908/patches-5.10/701-net-dsa-bcm_sf2-keep-GPHY-enabled-on-the-BCM4908.patch +++ /dev/null @@ -1,30 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> -Date: Tue, 16 Feb 2021 00:06:35 +0100 -Subject: [PATCH] net: dsa: bcm_sf2: keep GPHY enabled on the BCM4908 - -Trying to access disabled PHY results in MDIO_READ_FAIL and: -[ 11.962886] brcm-sf2 80080000.switch wan: configuring for phy/internal link mode -[ 11.972500] 8021q: adding VLAN 0 to HW filter on device wan -[ 11.980205] ------------[ cut here ]------------ -[ 11.984885] WARNING: CPU: 0 PID: 7 at phy_error+0x10/0x58 - -Signed-off-by: Rafał Miłecki <rafal@milecki.pl> ---- - drivers/net/dsa/bcm_sf2.c | 6 ++++++ - 1 file changed, 6 insertions(+) - ---- a/drivers/net/dsa/bcm_sf2.c -+++ b/drivers/net/dsa/bcm_sf2.c -@@ -1554,6 +1554,12 @@ static int bcm_sf2_sw_probe(struct platf - priv->hw_params.core_rev >> 8, priv->hw_params.core_rev & 0xff, - priv->irq0, priv->irq1); - -+ /* BCM4908 has 5 GPHYs which means bcm_sf2_port_setup() will not enable -+ * GPHY when needed. Leave it enabled here. -+ */ -+ if (priv->type == BCM4908_DEVICE_ID) -+ bcm_sf2_gphy_enable_set(priv->dev->ds, true); -+ - return 0; - - out_mdio: |