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authorÁlvaro Fernández Rojas <noltari@gmail.com>2021-02-18 18:04:33 +0100
committerÁlvaro Fernández Rojas <noltari@gmail.com>2021-02-19 07:17:21 +0100
commit62b7f5931c54e96fca56dd8761b0e466d355c881 (patch)
tree1258b392752379833a075df006c2f6d7ac4be51d /target/linux/bcm27xx/patches-5.4/950-1028-overlays-Add-PCF85063-and-PCF85063A-to-i2c-rtc.patch
parent76d1168d0d4b9d76e2ad78c0fc6b255561deb284 (diff)
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bcm27xx: import latest patches from the RPi foundation
bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> (cherry-picked from commit f07e572f64)
Diffstat (limited to 'target/linux/bcm27xx/patches-5.4/950-1028-overlays-Add-PCF85063-and-PCF85063A-to-i2c-rtc.patch')
-rw-r--r--target/linux/bcm27xx/patches-5.4/950-1028-overlays-Add-PCF85063-and-PCF85063A-to-i2c-rtc.patch339
1 files changed, 339 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.4/950-1028-overlays-Add-PCF85063-and-PCF85063A-to-i2c-rtc.patch b/target/linux/bcm27xx/patches-5.4/950-1028-overlays-Add-PCF85063-and-PCF85063A-to-i2c-rtc.patch
new file mode 100644
index 0000000000..f55f9f6836
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.4/950-1028-overlays-Add-PCF85063-and-PCF85063A-to-i2c-rtc.patch
@@ -0,0 +1,339 @@
+From ecfd415e5ae3fc05bf0c2b16a80f1d3e00447896 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Mon, 7 Dec 2020 08:49:53 +0000
+Subject: [PATCH] overlays: Add PCF85063 and PCF85063A to i2c-rtc
+
+Add support for the PCF85063 and PCF85063A RTC devices to the
+i2c-rtc overlay.
+
+Also enable the device to be used on i2c0 (i2c_vc) on GPIOs 0&1 (use
+parameter "i2c0") and GPIOs 44 & 45 (use parameter "i2c_csi_dsi").
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ arch/arm/boot/dts/overlays/README | 8 ++
+ .../arm/boot/dts/overlays/i2c-rtc-overlay.dts | 98 ++++++++++---------
+ 2 files changed, 61 insertions(+), 45 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -1243,6 +1243,10 @@ Params: abx80x Select o
+
+ pcf2129 Select the PCF2129 device
+
++ pcf85063 Select the PCF85363 device
++
++ pcf85063a Select the PCF85363A device
++
+ pcf8523 Select the PCF8523 device
+
+ pcf85363 Select the PCF85363 device
+@@ -1255,6 +1259,10 @@ Params: abx80x Select o
+
+ sd3078 Select the ZXW Shenzhen whwave SD3078 device
+
++ i2c0 Choose the I2C0 bus on GPIOs 0&1
++
++ i2c_csi_dsi Choose the I2C0 bus on GPIOs 44&45
++
+ addr Sets the address for the RTC. Note that the
+ device must be configured to use the specified
+ address.
+--- a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
++++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
+@@ -6,235 +6,238 @@
+ compatible = "brcm,bcm2835";
+
+ fragment@0 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ abx80x: abx80x@69 {
+ compatible = "abracon,abx80x";
+ reg = <0x69>;
+ abracon,tc-diode = "standard";
+ abracon,tc-resistor = <0>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@1 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ ds1307: ds1307@68 {
+ compatible = "dallas,ds1307";
+ reg = <0x68>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@2 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ ds1339: ds1339@68 {
+ compatible = "dallas,ds1339";
+ trickle-resistor-ohms = <0>;
+ reg = <0x68>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@3 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ ds3231: ds3231@68 {
+ compatible = "maxim,ds3231";
+ reg = <0x68>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@4 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ mcp7940x: mcp7940x@6f {
+ compatible = "microchip,mcp7940x";
+ reg = <0x6f>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@5 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ mcp7941x: mcp7941x@6f {
+ compatible = "microchip,mcp7941x";
+ reg = <0x6f>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@6 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ pcf2127@51 {
+ compatible = "nxp,pcf2127";
+ reg = <0x51>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@7 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ pcf8523: pcf8523@68 {
+ compatible = "nxp,pcf8523";
+ reg = <0x68>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@8 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ pcf8563: pcf8563@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@9 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ m41t62: m41t62@68 {
+ compatible = "st,m41t62";
+ reg = <0x68>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@10 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ rv3028: rv3028@52 {
+ compatible = "microcrystal,rv3028";
+ reg = <0x52>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@11 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ pcf2129@51 {
+ compatible = "nxp,pcf2129";
+ reg = <0x51>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@12 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ pcf85363@51 {
+ compatible = "nxp,pcf85363";
+ reg = <0x51>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@13 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ rv1805: rv1805@69 {
+ compatible = "microcrystal,rv1805";
+ reg = <0x69>;
+ abracon,tc-diode = "standard";
+ abracon,tc-resistor = <0>;
+- status = "okay";
+ };
+ };
+ };
+
+ fragment@14 {
+- target = <&i2c_arm>;
++ target = <&i2cbus>;
+ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- status = "okay";
+
+ sd3078: sd3078@32 {
+ compatible = "whwave,sd3078";
+ reg = <0x32>;
+- status = "okay";
+ };
+ };
+ };
+
++ fragment@15 {
++ target = <&i2cbus>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ pcf85063@51 {
++ compatible = "nxp,pcf85063";
++ reg = <0x51>;
++ };
++ };
++ };
++
++ fragment@16 {
++ target = <&i2cbus>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ pcf85063a@51 {
++ compatible = "nxp,pcf85063a";
++ reg = <0x51>;
++ };
++ };
++ };
++
++ frag100: fragment@100 {
++ target = <&i2c_arm>;
++ i2cbus: __overlay__ {
++ status = "okay";
++ };
++ };
++
+ __overrides__ {
+ abx80x = <0>,"+0";
+ ds1307 = <0>,"+1";
+@@ -251,6 +254,11 @@
+ pcf85363 = <0>,"+12";
+ rv1805 = <0>,"+13";
+ sd3078 = <0>,"+14";
++ pcf85063 = <0>,"+15";
++ pcf85063a = <0>,"+16";
++
++ i2c0 = <&frag100>, "target:0=",<&i2c0>;
++ i2c_csi_dsi = <&frag100>, "target:0=",<&i2c_csi_dsi>;
+
+ addr = <&abx80x>, "reg:0",
+ <&ds1307>, "reg:0",