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author | Álvaro Fernández Rojas <noltari@gmail.com> | 2021-02-18 18:04:33 +0100 |
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committer | Álvaro Fernández Rojas <noltari@gmail.com> | 2021-02-18 23:42:32 +0100 |
commit | f07e572f6447465d8938679533d604e402b0f066 (patch) | |
tree | cb333bd2a67e59e7c07659514850a0fd55fc825e /target/linux/bcm27xx/patches-5.4/950-0528-clk-bcm-rpi-Split-pllb-clock-hooks.patch | |
parent | 5d3a6fd970619dfc55f8259035c3027d7613a2a6 (diff) | |
download | upstream-f07e572f6447465d8938679533d604e402b0f066.tar.gz upstream-f07e572f6447465d8938679533d604e402b0f066.tar.bz2 upstream-f07e572f6447465d8938679533d604e402b0f066.zip |
bcm27xx: import latest patches from the RPi foundation
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'target/linux/bcm27xx/patches-5.4/950-0528-clk-bcm-rpi-Split-pllb-clock-hooks.patch')
-rw-r--r-- | target/linux/bcm27xx/patches-5.4/950-0528-clk-bcm-rpi-Split-pllb-clock-hooks.patch | 80 |
1 files changed, 0 insertions, 80 deletions
diff --git a/target/linux/bcm27xx/patches-5.4/950-0528-clk-bcm-rpi-Split-pllb-clock-hooks.patch b/target/linux/bcm27xx/patches-5.4/950-0528-clk-bcm-rpi-Split-pllb-clock-hooks.patch deleted file mode 100644 index 38720b89bd..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0528-clk-bcm-rpi-Split-pllb-clock-hooks.patch +++ /dev/null @@ -1,80 +0,0 @@ -From e2537b383e247198347e7124876b9ead531dbeef Mon Sep 17 00:00:00 2001 -From: Maxime Ripard <maxime@cerno.tech> -Date: Fri, 7 Feb 2020 16:14:18 +0100 -Subject: [PATCH] clk: bcm: rpi: Split pllb clock hooks - -The driver only supports the pllb for now and all the clock framework hooks -are a mix of the generic firmware interface and the specifics of the pllb. -Since we will support more clocks in the future let's split the generic and -specific hooks - -Cc: Michael Turquette <mturquette@baylibre.com> -Cc: linux-clk@vger.kernel.org -Reviewed-by: Stephen Boyd <sboyd@kernel.org> -Signed-off-by: Maxime Ripard <maxime@cerno.tech> ---- - drivers/clk/bcm/clk-raspberrypi.c | 30 ++++++++++++++++++++++-------- - 1 file changed, 22 insertions(+), 8 deletions(-) - ---- a/drivers/clk/bcm/clk-raspberrypi.c -+++ b/drivers/clk/bcm/clk-raspberrypi.c -@@ -104,8 +104,8 @@ static int raspberrypi_fw_is_prepared(st - } - - --static unsigned long raspberrypi_fw_pll_get_rate(struct clk_hw *hw, -- unsigned long parent_rate) -+static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw, -+ unsigned long parent_rate) - { - struct raspberrypi_clk_data *data = - container_of(hw, struct raspberrypi_clk_data, hw); -@@ -118,21 +118,27 @@ static unsigned long raspberrypi_fw_pll_ - if (ret) - return ret; - -- return val * RPI_FIRMWARE_PLLB_ARM_DIV_RATE; -+ return val; - } - --static int raspberrypi_fw_pll_set_rate(struct clk_hw *hw, unsigned long rate, -- unsigned long parent_rate) -+static unsigned long raspberrypi_fw_pll_get_rate(struct clk_hw *hw, -+ unsigned long parent_rate) -+{ -+ return raspberrypi_fw_get_rate(hw, parent_rate) * -+ RPI_FIRMWARE_PLLB_ARM_DIV_RATE; -+} -+ -+static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long parent_rate) - { - struct raspberrypi_clk_data *data = - container_of(hw, struct raspberrypi_clk_data, hw); - struct raspberrypi_clk *rpi = data->rpi; -- u32 new_rate = rate / RPI_FIRMWARE_PLLB_ARM_DIV_RATE; -+ u32 _rate = rate; - int ret; - - ret = raspberrypi_clock_property(rpi->firmware, data, -- RPI_FIRMWARE_SET_CLOCK_RATE, -- &new_rate); -+ RPI_FIRMWARE_SET_CLOCK_RATE, &_rate); - if (ret) - dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d", - clk_hw_get_name(hw), ret); -@@ -140,6 +146,14 @@ static int raspberrypi_fw_pll_set_rate(s - return ret; - } - -+static int raspberrypi_fw_pll_set_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long parent_rate) -+{ -+ u32 new_rate = rate / RPI_FIRMWARE_PLLB_ARM_DIV_RATE; -+ -+ return raspberrypi_fw_set_rate(hw, new_rate, parent_rate); -+} -+ - /* - * Sadly there is no firmware rate rounding interface. We borrowed it from - * clk-bcm2835. |