bcm27xx: import latest patches from the RPi foundation

bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

1 files changed, 0 insertions, 71 deletions

diff --git a/target/linux/bcm27xx/patches-5.4/950-0220-clk-bcm2835-Allow-reparenting-leaf-clocks-while-they.patch b/target/linux/bcm27xx/patches-5.4/950-0220-clk-bcm2835-Allow-reparenting-leaf-clocks-while-they.patch
deleted file mode 100644
index bae0f84e1a..0000000000
--- a/target/linux/bcm27xx/patches-5.4/950-0220-clk-bcm2835-Allow-reparenting-leaf-clocks-while-they.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 1ee90bb75979c183e241c14f7c31d72cdb4bcc9b Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Thu, 2 May 2019 15:24:04 -0700
-Subject: [PATCH] clk: bcm2835: Allow reparenting leaf clocks while
- they're running.
-
-This falls under the same "we can reprogram glitch-free as long as we
-pause generation" rule as updating the div/frac fields.  This can be
-used for runtime reclocking of V3D to manage power leakage.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/clk/bcm/clk-bcm2835.c | 19 ++++++++++++++++---
- 1 file changed, 16 insertions(+), 3 deletions(-)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1103,8 +1103,10 @@ static int bcm2835_clock_on(struct clk_h
- 	return 0;
- }
- 
--static int bcm2835_clock_set_rate(struct clk_hw *hw,
--				  unsigned long rate, unsigned long parent_rate)
-+static int bcm2835_clock_set_rate_and_parent(struct clk_hw *hw,
-+					     unsigned long rate,
-+					     unsigned long parent_rate,
-+					     u8 parent)
- {
- 	struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
- 	struct bcm2835_cprman *cprman = clock->cprman;
-@@ -1126,6 +1128,11 @@ static int bcm2835_clock_set_rate(struct
- 		bcm2835_clock_wait_busy(clock);
- 	}
- 
-+	if (parent != 0xff) {
-+		ctl &= ~(CM_SRC_MASK << CM_SRC_SHIFT);
-+		ctl |= parent << CM_SRC_SHIFT;
-+	}
-+
- 	ctl &= ~CM_FRAC;
- 	ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0;
- 	cprman_write(cprman, data->ctl_reg, ctl);
-@@ -1137,6 +1144,12 @@ static int bcm2835_clock_set_rate(struct
- 	return 0;
- }
- 
-+static int bcm2835_clock_set_rate(struct clk_hw *hw,
-+				  unsigned long rate, unsigned long parent_rate)
-+{
-+	return bcm2835_clock_set_rate_and_parent(hw, rate, parent_rate, 0xff);
-+}
-+
- static bool
- bcm2835_clk_is_pllc(struct clk_hw *hw)
- {
-@@ -1320,6 +1333,7 @@ static const struct clk_ops bcm2835_cloc
- 	.unprepare = bcm2835_clock_off,
- 	.recalc_rate = bcm2835_clock_get_rate,
- 	.set_rate = bcm2835_clock_set_rate,
-+	.set_rate_and_parent = bcm2835_clock_set_rate_and_parent,
- 	.determine_rate = bcm2835_clock_determine_rate,
- 	.set_parent = bcm2835_clock_set_parent,
- 	.get_parent = bcm2835_clock_get_parent,
-@@ -1498,7 +1512,6 @@ static struct clk_hw *bcm2835_register_c
- 		init.ops = &bcm2835_vpu_clock_clk_ops;
- 	} else {
- 		init.ops = &bcm2835_clock_clk_ops;
--		init.flags |= CLK_SET_PARENT_GATE;
- 
- 		/* If the clock wasn't actually enabled at boot, it's not
- 		 * critical.