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authorJonathan A. Kollasch <jakllsch@kollasch.net>2020-09-11 14:33:39 -0500
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>2021-06-07 00:25:11 +0200
commitf36990eae77c3a22842a2c418378c5dd40dec366 (patch)
tree117d4091fb4396abdc06ef88a79081efde67bf0d /target/linux/ath79
parent3e0387b3db86b35e101b147692d0af04c5083ca9 (diff)
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ath79: fix eth0 PLL registers on WD My Net Wi-Fi Range Extender
This replaces the register bits for RGMII delay on the MAC side in favor of having the RGMII delay on the PHY side by setting the phy-mode property to rgmii-id (RGMII internal delay), which is supported by the at803x driver. Speed 1000 is fixed as a result, so now all ethernet speeds function. Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-by: Michael Pratt <mcpratt@pm.me>
Diffstat (limited to 'target/linux/ath79')
-rw-r--r--target/linux/ath79/dts/ar9344_wd_mynet-wifi-rangeextender.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/ath79/dts/ar9344_wd_mynet-wifi-rangeextender.dts b/target/linux/ath79/dts/ar9344_wd_mynet-wifi-rangeextender.dts
index 575c72ee7c..7313e9acc2 100644
--- a/target/linux/ath79/dts/ar9344_wd_mynet-wifi-rangeextender.dts
+++ b/target/linux/ath79/dts/ar9344_wd_mynet-wifi-rangeextender.dts
@@ -144,10 +144,10 @@
&eth0 {
status = "okay";
- pll-data = <0x0e000000 0x3c000101 0x3c001313>;
+ pll-data = <0x02000000 0x00000101 0x00001313>;
/* ethernet MAC is stored in nvram */
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-handle = <&phy4>;
gmac-config {