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authorDavid Bauer <mail@david-bauer.net>2021-04-01 01:20:45 +0200
committerDavid Bauer <mail@david-bauer.net>2021-04-13 00:32:56 +0200
commitfbbad9a9a629b388626b477e6cd692c160f63fb3 (patch)
treea77dc9299ce39dab11a689bc27bd909e32646347 /target/linux/ath79/files
parente85180d90ed01ef4fb89675702622a9cabf3b092 (diff)
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ath79: force SGMII SerDes mode to MAC operation
The mode on the SGMII SerDes on the QCA9563 is 1000 Base-X by default. This only allows for 1000 Mbit/s links, however when used with an SGMII PHY in 100 Mbit/s link mode, the link remains dead. This strictly has nothing to do with the SerDes calibration, however it is done at the same point in the QCA reference U-Boot which is the blueprint for everything happening here. As the current state is more or less a hack, this should be fine. This fixes the issues outlined above on a TP-Link EAP-225 Outdoor. Reported-by: Tom Herbers <freifunk@tomherbers.de> Tested-by: Tom Herbers <freifunk@tomherbers.de> Signed-off-by: David Bauer <mail@david-bauer.net>
Diffstat (limited to 'target/linux/ath79/files')
-rw-r--r--target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
index abf7fc7d29..d060568593 100644
--- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
+++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
@@ -602,6 +602,11 @@ static void ag71xx_sgmii_serdes_init_qca956x(struct device_node *np)
goto err_iomap;
}
+ t = __raw_readl(gmac_base + QCA956X_GMAC_REG_SGMII_CONFIG);
+ t &= ~(QCA956X_SGMII_CONFIG_MODE_CTRL_MASK << QCA956X_SGMII_CONFIG_MODE_CTRL_SHIFT);
+ t |= QCA956X_SGMII_CONFIG_MODE_CTRL_SGMII_MAC;
+ __raw_writel(t, gmac_base + QCA956X_GMAC_REG_SGMII_CONFIG);
+
pr_debug("%pOF: fixup SERDES calibration to value %i\n",
np_dev, serdes_cal);
t = __raw_readl(gmac_base + QCA956X_GMAC_REG_SGMII_SERDES);