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authorPiotr Dymacz <pepe2k@gmail.com>2020-09-06 09:52:43 +0200
committerPiotr Dymacz <pepe2k@gmail.com>2020-09-28 01:28:37 +0200
commitc65c306d336418f3b6519693d892148f6e2eb38e (patch)
tree68aee8b3ab90159b5b709071c8ccc28b506b2771 /target/linux/ath79/dts
parent77598f19cc08a421f927979b3e85f7f18b8f9648 (diff)
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ath79: add support for Wallys DR531
Wallys DR531 is based on Qualcomm Atheros QCA9531 v2. Support for this device was first introduced in e767980eb8 (ar71xx target). Specifications: - Qualcomm/Atheros QCA9531 v2 - 550/400/200 MHz (CPU/DDR/AHB) - 2x 10/100 Mbps Ethernet - 64 MB of RAM (DDR2) - 8 MB of flash (SPI NOR) - 2T2R 2.4 GHz Wi-Fi, with external PA (SE2576L), up to 30 dBm - 2x MMCX connectors (optional IPEX/U.FL) - mini PCIe connector (PCIe/USB buses and mini SIM slot) - 7x LED, 1x button, 1x optional buzzer - UART, JTAG and LED headers on PCB Flash instruction (do it under U-Boot, using UART): tftpb 0x80060000 openwrt-ath79-...-dr531-squashfs-sysupgrade.bin erase 0x9f050000 +$filesize cp.b $fileaddr 0x9f050000 $filesize setenv bootcmd "bootm 0x9f050000" saveenv && reset Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Diffstat (limited to 'target/linux/ath79/dts')
-rw-r--r--target/linux/ath79/dts/qca9531_wallys_dr531.dts158
1 files changed, 158 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/qca9531_wallys_dr531.dts b/target/linux/ath79/dts/qca9531_wallys_dr531.dts
new file mode 100644
index 0000000000..a31e24b7cc
--- /dev/null
+++ b/target/linux/ath79/dts/qca9531_wallys_dr531.dts
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qca953x.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Wallys DR531";
+ compatible = "wallys,dr531", "qca,qca9531";
+
+ aliases {
+ label-mac-device = &eth1;
+ led-boot = &led_sig4;
+ led-failsafe = &led_sig4;
+ led-upgrade = &led_sig4;
+ };
+
+ gpio-export {
+ compatible = "gpio-export";
+
+ buzzer {
+ gpio-export,name = "buzzer";
+ gpio-export,output = <0>;
+ gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ lan {
+ label = "dr531:green:lan";
+ gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+ };
+
+ led_sig4: sig4 {
+ label = "dr531:green:sig4";
+ gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+ };
+
+ sig1 {
+ label = "dr531:green:sig1";
+ gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+ };
+
+ sig2 {
+ label = "dr531:green:sig2";
+ gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+ };
+
+ sig3 {
+ label = "dr531:green:sig3";
+ gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+ };
+
+ wan {
+ label = "dr531:green:wan";
+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&eth0 {
+ status = "okay";
+
+ phy-handle = <&swphy4>;
+ mtd-mac-address = <&env 0xf818>;
+};
+
+&eth1 {
+ /* Workaround: keep the Ethernet interfaces order/mapping correct
+ * (GMAC0 -> eth0, GMAC1 -> eth1, same as in old ar71xx target) */
+ compatible = "qca,qca9530-eth", "syscon", "simple-mfd";
+
+ mtd-mac-address = <&env 0xf810>;
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&spi {
+ status = "okay";
+
+ num-cs = <1>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x030000>;
+ read-only;
+ };
+
+ env: partition@30000 {
+ label = "u-boot-env";
+ reg = <0x030000 0x010000>;
+ };
+
+ partition@40000 {
+ label = "partition-table";
+ reg = <0x040000 0x010000>;
+ read-only;
+ };
+
+ partition@50000 {
+ compatible = "denx,uimage";
+ label = "firmware";
+ reg = <0x050000 0x7a0000>;
+ };
+
+ art: partition@7f0000 {
+ label = "art";
+ reg = <0x7f0000 0x010000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&uart {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&wmac {
+ status = "okay";
+
+ mtd-cal-data = <&art 0x1000>;
+};