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authorSebastian Schaper <openwrt@sebastianschaper.net>2020-09-09 20:42:53 +0200
committerHauke Mehrtens <hauke@hauke-m.de>2022-08-21 00:09:53 +0200
commit251ecfe37914919422d74dd32fab15a86f65e879 (patch)
tree5f147ce402f6750b3df709891f7f58634e38810d /target/linux/ath79/dts
parent3b2f19271cc2cd92a4f3c184f6362c2ec2793041 (diff)
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ath79: add support for ZyXEL NWA1121-NI
Specifications: * AR9342, 16 MiB Flash, 64 MiB RAM, 802.11n 2T2R, 2.4 GHz * 1x Gigabit Ethernet (AR8035), 802.3af PoE Installation: * OEM Web UI is at 192.168.1.2 login as `admin` with password `1234` * Flash factory-AABJ.bin The string `AABJ` needs to be present within the file name of the uploaded image to be accepted by the OEM Web-based updater, the factory image is named accordingly to save the user from the hassle of manual renaming. TFTP Recovery: * Open the case, connect to TTL UART port (this is the official method described by Zyxel, the reset button is useless during power-on) * Extract factory image (.tar.bz2), serve `vmlinux_mi124_f1e.lzma.uImage` and `mi124_f1e-jffs2` via tftp at 192.168.1.10 * Interrupt uboot countdown, execute commands `run lk` `run lf` to flash the kernel / filesystem accordingly MAC addresses as verified by OEM firmware: use address source LAN *:cc mib0 0x30 ('eth0mac'), art 0x1002 (label) 2g *:cd mib0 0x4b ('wifi0mac') Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
Diffstat (limited to 'target/linux/ath79/dts')
-rw-r--r--target/linux/ath79/dts/ar9342_zyxel_nwa1121-ni.dts31
-rw-r--r--target/linux/ath79/dts/ar9342_zyxel_nwa11xx.dtsi166
2 files changed, 197 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/ar9342_zyxel_nwa1121-ni.dts b/target/linux/ath79/dts/ar9342_zyxel_nwa1121-ni.dts
new file mode 100644
index 0000000000..65dc8c0440
--- /dev/null
+++ b/target/linux/ath79/dts/ar9342_zyxel_nwa1121-ni.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "ar9342_zyxel_nwa11xx.dtsi"
+
+/ {
+ compatible = "zyxel,nwa1121-ni", "qca,ar9342";
+ model = "Zyxel NWA1121-NI";
+
+ aliases {
+ label-mac-device = &eth0;
+ led-boot = &led_status_green;
+ led-failsafe = &led_status_amber;
+ led-running = &led_status_green;
+ led-upgrade = &led_status_amber;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_status_green: status_green {
+ label = "green:status";
+ gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ led_status_amber: status_amber {
+ label = "amber:status";
+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
diff --git a/target/linux/ath79/dts/ar9342_zyxel_nwa11xx.dtsi b/target/linux/ath79/dts/ar9342_zyxel_nwa11xx.dtsi
new file mode 100644
index 0000000000..7cc1bba3fc
--- /dev/null
+++ b/target/linux/ath79/dts/ar9342_zyxel_nwa11xx.dtsi
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "ar9344.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
+
+/ {
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ virtual_flash {
+ compatible = "mtd-concat";
+
+ devices = <&fwconcat0 &fwconcat1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ compatible = "openwrt,uimage", "denx,uimage";
+ openwrt,ih-magic = <IH_MAGIC_OKLI>;
+ label = "firmware";
+ reg = <0x0 0x0>;
+ };
+ };
+ };
+};
+
+&ref {
+ clock-frequency = <40000000>;
+};
+
+&spi {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x040000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "u-boot-env";
+ reg = <0x040000 0x010000>;
+ };
+
+ fwconcat0: partition@50000 {
+ label = "fwconcat0";
+ reg = <0x050000 0x800000>;
+ };
+
+ partition@850000 {
+ label = "loader";
+ reg = <0x850000 0x010000>;
+ read-only;
+ };
+
+ fwconcat1: partition@860000 {
+ label = "fwconcat1";
+ reg = <0x860000 0x740000>;
+ };
+
+ partition@fa0000 {
+ label = "config";
+ reg = <0xfa0000 0x040000>;
+ read-only;
+ };
+
+ partition@fe0000 {
+ label = "mib0";
+ reg = <0xfe0000 0x010000>;
+ read-only;
+
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_mib0_4b: macaddr@4b {
+ reg = <0x4b 0x11>;
+ };
+
+ macaddr_mib0_66: macaddr@66 {
+ reg = <0x66 0x11>;
+ };
+ };
+
+ art: partition@ff0000 {
+ label = "art";
+ reg = <0xff0000 0x010000>;
+ read-only;
+
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ calibration_ath9k: calibration@1000 {
+ reg = <0x1000 0x440>;
+ };
+
+ macaddr_art_1002: macaddr@1002 {
+ reg = <0x1002 0x6>;
+ };
+ };
+ };
+ };
+};
+
+&mdio0 {
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ phy-mode = "rgmii";
+ };
+};
+
+&eth0 {
+ status = "okay";
+
+ pll-data = <0x06000000 0x00000101 0x00001313>;
+
+ nvmem-cells = <&macaddr_art_1002>;
+ nvmem-cell-names = "mac-address";
+
+ phy-mode = "rgmii-id";
+ phy-handle = <&phy0>;
+
+ gmac-config {
+ device = <&gmac>;
+ rxdv-delay = <3>;
+ rxd-delay = <3>;
+ txen-delay = <3>;
+ txd-delay = <3>;
+ rgmii-gmac0 = <1>;
+ };
+};
+
+&wmac {
+ status = "okay";
+
+ ieee80211-freq-limit = <2402000 2482000>;
+
+ nvmem-cells = <&macaddr_mib0_4b>, <&calibration_ath9k>;
+ nvmem-cell-names = "mac-address-ascii", "calibration";
+};