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author | Paul Wassi <p.wassi@gmx.at> | 2019-01-04 22:38:17 +0100 |
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committer | Christian Lamparter <chunkeey@gmail.com> | 2019-02-14 16:56:14 +0100 |
commit | 78277ec162b06e859923936ee00d02920b4ccc6f (patch) | |
tree | 215a8e67e1c44da757cf6c0e594115aec2d93fe6 /target/linux/ath79/dts/ar9132_tplink_tl-wr941-v2.dts | |
parent | 341311f319b18b74d1d112709830979ceab11f67 (diff) | |
download | upstream-78277ec162b06e859923936ee00d02920b4ccc6f.tar.gz upstream-78277ec162b06e859923936ee00d02920b4ccc6f.tar.bz2 upstream-78277ec162b06e859923936ee00d02920b4ccc6f.zip |
ar71xx: fix TL-MR3220-v2 switch port order
Fix the switch port order for proper display on high
level interfaces.
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
Diffstat (limited to 'target/linux/ath79/dts/ar9132_tplink_tl-wr941-v2.dts')
0 files changed, 0 insertions, 0 deletions