diff options
author | John Crispin <john@phrozen.org> | 2018-08-09 15:59:41 +0200 |
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committer | John Crispin <john@phrozen.org> | 2018-08-22 08:09:00 +0200 |
commit | 318e19ba6755105bb6cc19937d8fff26cbd2cc6f (patch) | |
tree | 2f7c96140932a2770fb767141c7d1e93d29127b0 /target/linux/ar71xx/patches-4.14/505-MIPS-ath79-add-ath79_gpio_function_select.patch | |
parent | e5f56c07d7fab9a6f2201f4100b593349b8ef67d (diff) | |
download | upstream-318e19ba6755105bb6cc19937d8fff26cbd2cc6f.tar.gz upstream-318e19ba6755105bb6cc19937d8fff26cbd2cc6f.tar.bz2 upstream-318e19ba6755105bb6cc19937d8fff26cbd2cc6f.zip |
ar71xx: add v4.14 support
adds v4.14 patches for testing but leaves v4.9 as default for now.
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ar71xx/patches-4.14/505-MIPS-ath79-add-ath79_gpio_function_select.patch')
-rw-r--r-- | target/linux/ar71xx/patches-4.14/505-MIPS-ath79-add-ath79_gpio_function_select.patch | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-4.14/505-MIPS-ath79-add-ath79_gpio_function_select.patch b/target/linux/ar71xx/patches-4.14/505-MIPS-ath79-add-ath79_gpio_function_select.patch new file mode 100644 index 0000000000..278e781539 --- /dev/null +++ b/target/linux/ar71xx/patches-4.14/505-MIPS-ath79-add-ath79_gpio_function_select.patch @@ -0,0 +1,39 @@ +--- a/arch/mips/ath79/common.h ++++ b/arch/mips/ath79/common.h +@@ -27,6 +27,7 @@ void ath79_ddr_ctrl_init(void); + void ath79_gpio_function_enable(u32 mask); + void ath79_gpio_function_disable(u32 mask); + void ath79_gpio_function_setup(u32 set, u32 clear); ++void ath79_gpio_output_select(unsigned gpio, u8 val); + void ath79_gpio_init(void); + + #endif /* __ATH79_COMMON_H */ +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -57,3 +57,26 @@ void ath79_gpio_function_disable(u32 mas + { + ath79_gpio_function_setup(0, mask); + } ++ ++void __init ath79_gpio_output_select(unsigned gpio, u8 val) ++{ ++ void __iomem *base = ath79_gpio_base; ++ unsigned int reg; ++ u32 t, s; ++ ++ BUG_ON(!soc_is_ar934x()); ++ ++ if (gpio >= AR934X_GPIO_COUNT) ++ return; ++ ++ reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4); ++ s = 8 * (gpio % 4); ++ ++ t = __raw_readl(base + reg); ++ t &= ~(0xff << s); ++ t |= val << s; ++ __raw_writel(t, base + reg); ++ ++ /* flush write */ ++ (void) __raw_readl(base + reg); ++} |