aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ar71xx/patches-3.6/601-MIPS-ath79-add-more-register-defines.patch
diff options
context:
space:
mode:
authorGabor Juhos <juhosg@openwrt.org>2012-11-20 14:27:17 +0000
committerGabor Juhos <juhosg@openwrt.org>2012-11-20 14:27:17 +0000
commit674b91ce0ecbd470ac75452e5defc9fc0d4c5b0f (patch)
tree3fe6135c7746575406fbff43666029b80eefd39e /target/linux/ar71xx/patches-3.6/601-MIPS-ath79-add-more-register-defines.patch
parentd833ca527d16b07dfd9193bdfd4e65a34d406315 (diff)
downloadupstream-674b91ce0ecbd470ac75452e5defc9fc0d4c5b0f.tar.gz
upstream-674b91ce0ecbd470ac75452e5defc9fc0d4c5b0f.tar.bz2
upstream-674b91ce0ecbd470ac75452e5defc9fc0d4c5b0f.zip
ar71xx: fix GPIO function selection for AR934x
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 34275
Diffstat (limited to 'target/linux/ar71xx/patches-3.6/601-MIPS-ath79-add-more-register-defines.patch')
-rw-r--r--target/linux/ar71xx/patches-3.6/601-MIPS-ath79-add-more-register-defines.patch10
1 files changed, 4 insertions, 6 deletions
diff --git a/target/linux/ar71xx/patches-3.6/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-3.6/601-MIPS-ath79-add-more-register-defines.patch
index a59d92b6d5..511fc1fd8c 100644
--- a/target/linux/ar71xx/patches-3.6/601-MIPS-ath79-add-more-register-defines.patch
+++ b/target/linux/ar71xx/patches-3.6/601-MIPS-ath79-add-more-register-defines.patch
@@ -153,7 +153,7 @@
#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23)
-@@ -520,6 +582,14 @@
+@@ -520,6 +582,12 @@
#define AR71XX_GPIO_REG_INT_ENABLE 0x24
#define AR71XX_GPIO_REG_FUNC 0x28
@@ -163,12 +163,10 @@
+#define AR934X_GPIO_REG_OUT_FUNC3 0x38
+#define AR934X_GPIO_REG_OUT_FUNC4 0x3c
+#define AR934X_GPIO_REG_OUT_FUNC5 0x40
-+#define AR934X_GPIO_REG_FUNC 0x6c
-+
+ #define AR934X_GPIO_REG_FUNC 0x6c
+
#define AR71XX_GPIO_COUNT 16
- #define AR7240_GPIO_COUNT 18
- #define AR7241_GPIO_COUNT 20
-@@ -549,4 +619,133 @@
+@@ -551,4 +619,133 @@
#define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13
#define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7