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author张鹏 <sd20@qxwlan.com>2018-07-17 18:14:25 +0800
committerJohn Crispin <john@phrozen.org>2018-07-30 10:43:36 +0200
commit53a45020135b504cb4bee0fa8d98c8eaf6391066 (patch)
tree2cbde3c8b5b912e572871a9ca5b28a0e812e0640 /target/linux/ar71xx/files
parentac03d51a3f4daa2f6a2a83f041dcd71674a9f724 (diff)
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ar71xx:add support for E750G v8
Qxwlan E750G v8 is based on Qualcomm QCA9344. Specification: - 560/450/225 MHz (CPU/DDR/AHB) - 128 MB of RAM (DDR2) - 8/16 MB of FLASH (SPI NOR) - 2T2R 2.4G GHz (AR9344) - 2x 10/100 Mbps Ethernet (PoE support) - 2x 10/100/1000 Mbps Ethernet - 7x LED (6 driven by GPIO) - 1x button (reset) - 1x DC jack for main power input (9-48 V) - UART (J23) and LEDs (J2) headers on PCB Flash instruction (using U-Boot CLI and tftp server): - Configure PC with static IP 192.168.1.10 and tftp server. - Rename "sysupgrade" filename to "firmware.bin" and place it in tftp server directory. - Connect PC with one of RJ45 ports, power up the board and press "enter" key to access U-Boot CLI. - Use the following command to update the device to OpenWrt: "run lfw". Flash instruction (using U-Boot web-based recovery): - Configure PC with static IP 192.168.1.xxx(2-254)/24. - Connect PC with one of RJ45 ports, press the reset button, power up the board and keep button pressed for around 6-7 seconds, until LEDs start flashing. - Open your browser and enter 192.168.1.1, select "sysupgrade" image and click the upgrade button. Signed-off-by: 张鹏 <sd20@qxwlan.com>
Diffstat (limited to 'target/linux/ar71xx/files')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt11
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/Makefile1
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-e750g-v8.c151
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/machtypes.h1
4 files changed, 164 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
index db410b6607..a6903d2939 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
+++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
@@ -744,6 +744,17 @@ config ATH79_MACH_E750A_V4
select ATH79_DEV_USB
select ATH79_DEV_WMAC
+config ATH79_MACH_E750G_V8
+ bool "Qxwlan E750G v8 support"
+ select SOC_AR934X
+ select ATH79_DEV_AP9X_PCI if PCI
+ select ATH79_DEV_ETH
+ select ATH79_DEV_GPIO_BUTTONS
+ select ATH79_DEV_LEDS_GPIO
+ select ATH79_DEV_M25P80
+ select ATH79_DEV_USB
+ select ATH79_DEV_WMAC
+
config ATH79_MACH_ESR900
bool "EnGenius ESR900 board support"
select SOC_QCA955X
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Makefile b/target/linux/ar71xx/files/arch/mips/ath79/Makefile
index 4453e369a3..0a2fc9c17d 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/Makefile
+++ b/target/linux/ar71xx/files/arch/mips/ath79/Makefile
@@ -115,6 +115,7 @@ obj-$(CONFIG_ATH79_MACH_E1700AC_V2) += mach-e1700ac-v2.o
obj-$(CONFIG_ATH79_MACH_E558_V2) += mach-e558-v2.o
obj-$(CONFIG_ATH79_MACH_E600G_V2) += mach-e600g-v2.o
obj-$(CONFIG_ATH79_MACH_E750A_V4) += mach-e750a-v4.o
+obj-$(CONFIG_ATH79_MACH_E750G_V8) += mach-e750g-v8.o
obj-$(CONFIG_ATH79_MACH_EAP120) += mach-eap120.o
obj-$(CONFIG_ATH79_MACH_EAP300V2) += mach-eap300v2.o
obj-$(CONFIG_ATH79_MACH_EAP7660D) += mach-eap7660d.o
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-e750g-v8.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-e750g-v8.c
new file mode 100644
index 0000000000..72d1349123
--- /dev/null
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-e750g-v8.c
@@ -0,0 +1,151 @@
+/*
+ * Qxwlan E750G v8 board support
+ *
+ * Copyright (C) 2017 Peng Zhang <sd20@qxwlan.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "pci.h"
+#include "dev-ap9x-pci.h"
+#include "dev-gpio-buttons.h"
+#include "dev-eth.h"
+#include "dev-usb.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define E750G_V8_GPIO_LED_SYS 14
+#define E750G_V8_GPIO_LED_DS20 15
+#define E750G_V8_GPIO_LED_DS10 20
+#define E750G_V8_GPIO_LED_WLAN 21
+
+#define E750G_V8_GPIO_BTN_RESET 12
+
+#define E750G_V8_KEYS_POLL_INTERVAL 20 /* msecs */
+#define E750G_V8_KEYS_DEBOUNCE_INTERVAL (3 * E750G_V8_KEYS_POLL_INTERVAL)
+
+static struct gpio_led e750g_v8_leds_gpio[] __initdata = {
+ {
+ .name = "e750g-v8:green:system",
+ .gpio = E750G_V8_GPIO_LED_SYS,
+ .active_low = 1,
+ },
+ {
+ .name = "e750g-v8:green:ds10",
+ .gpio = E750G_V8_GPIO_LED_DS10,
+ .active_low = 1,
+ },
+ {
+ .name = "e750g-v8:green:ds20",
+ .gpio = E750G_V8_GPIO_LED_DS20,
+ .active_low = 1,
+ },
+ {
+ .name = "e750g-v8:green:wlan",
+ .gpio = E750G_V8_GPIO_LED_WLAN,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_button e750g_v8_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = E750G_V8_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = E750G_V8_GPIO_BTN_RESET,
+ .active_low = 1,
+ },
+};
+
+static const struct ar8327_led_info e750g_v8_leds_qca8334[] = {
+ AR8327_LED_INFO(PHY1_0, HW, "e750g-v8:green:lan"),
+ AR8327_LED_INFO(PHY2_0, HW, "e750g-v8:green:wan"),
+};
+
+static struct ar8327_pad_cfg e750g_v8_ar8327_pad0_cfg = {
+ .mode = AR8327_PAD_MAC_RGMII,
+ .txclk_delay_en = true,
+ .rxclk_delay_en = true,
+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+ .mac06_exchange_dis = true,
+};
+
+static struct ar8327_led_cfg e750g_v8_ar8327_led_cfg = {
+ .led_ctrl0 = 0x00000000,
+ .led_ctrl1 = 0xc737c737,
+ .led_ctrl2 = 0x00000000,
+ .led_ctrl3 = 0x00c30c00,
+ .open_drain = true,
+};
+
+static struct ar8327_platform_data e750g_v8_ar8327_data = {
+ .pad0_cfg = &e750g_v8_ar8327_pad0_cfg,
+ .port0_cfg = {
+ .force_link = 1,
+ .speed = AR8327_PORT_SPEED_1000,
+ .duplex = 1,
+ .txpause = 1,
+ .rxpause = 1,
+ },
+ .led_cfg = &e750g_v8_ar8327_led_cfg,
+ .leds = e750g_v8_leds_qca8334,
+ .num_leds = ARRAY_SIZE(e750g_v8_leds_qca8334),
+};
+
+static struct mdio_board_info e750g_v8_mdio0_info[] = {
+ {
+ .bus_id = "ag71xx-mdio.0",
+ .phy_addr = 0,
+ .platform_data = &e750g_v8_ar8327_data,
+ },
+};
+
+static void __init e750g_v8_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f050400);
+ u8 *art = (u8 *) KSEG1ADDR(0x1f061000);
+
+ ath79_register_m25p80(NULL);
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(e750g_v8_leds_gpio),
+ e750g_v8_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, E750G_V8_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(e750g_v8_gpio_keys),
+ e750g_v8_gpio_keys);
+
+ mdiobus_register_board_info(e750g_v8_mdio0_info,
+ ARRAY_SIZE(e750g_v8_mdio0_info));
+
+ ath79_register_mdio(0, 0x0);
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
+ AR934X_ETH_CFG_SW_ONLY_MODE);
+
+ /* GMAC0 is connected to an AR8327 switch */
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.phy_mask = BIT(0);
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+ ath79_eth0_pll_data.pll_1000 = 0x06000000;
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
+ ath79_register_eth(0);
+
+ ath79_register_pci();
+ ath79_register_usb();
+ ath79_register_wmac(art, NULL);
+}
+
+MIPS_MACHINE(ATH79_MACH_E750G_V8, "E750G-V8", "Qxwlan E750G v8",
+ e750g_v8_setup);
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
index d304b9eb80..8328a6febc 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
+++ b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
@@ -109,6 +109,7 @@ enum ath79_mach_type {
ATH79_MACH_E600G_V2, /* Qxwlan E600G v2 */
ATH79_MACH_E600GAC_V2, /* Qxwlan E600GAC v2 */
ATH79_MACH_E750A_V4, /* Qxwlan E750A v4 */
+ ATH79_MACH_E750G_V8, /* Qxwlan E750G v8 */
ATH79_MACH_EAP120, /* TP-LINK EAP120 */
ATH79_MACH_EAP300V2, /* EnGenius EAP300 v2 */
ATH79_MACH_EAP7660D, /* Senao EAP7660D */