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authorGabor Juhos <juhosg@openwrt.org>2012-03-19 11:11:20 +0000
committerGabor Juhos <juhosg@openwrt.org>2012-03-19 11:11:20 +0000
commite9b45ebaba6dbc17bfc0cd8085e53828216c1457 (patch)
treeeaa166c9eae111aa22b67dc30e03bfcfc95c2024 /target/linux/ar71xx/files/arch
parent6028889727533f0115f384dfe6e965890bf3a201 (diff)
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ar71xx: add AR934x specific interface speed setup for ge0
SVN-Revision: 31017
Diffstat (limited to 'target/linux/ar71xx/files/arch')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
index 2a55d33d82..d9880e0803 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
@@ -303,7 +303,12 @@ static void ar91xx_set_speed_ge1(int speed)
static void ar934x_set_speed_ge0(int speed)
{
- /* TODO */
+ void __iomem *base;
+ u32 val = ath79_get_eth_pll(0, speed);
+
+ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
+ __raw_writel(val, base + AR934X_PLL_ETH_XMII_CONTROL_REG);
+ iounmap(base);
}
static void ath79_set_speed_dummy(int speed)
@@ -432,9 +437,9 @@ struct ag71xx_switch_platform_data ath79_switch_data;
#define AR933X_PLL_VAL_100 0x00001099
#define AR933X_PLL_VAL_10 0x00991099
-#define AR934X_PLL_VAL_1000 0x00110000
-#define AR934X_PLL_VAL_100 0x00001099
-#define AR934X_PLL_VAL_10 0x00991099
+#define AR934X_PLL_VAL_1000 0x16000000
+#define AR934X_PLL_VAL_100 0x00000101
+#define AR934X_PLL_VAL_10 0x00001616
static void __init ath79_init_eth_pll_data(unsigned int id)
{