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author张鹏 <sd20@qxwlan.com>2018-07-17 18:08:10 +0800
committerJohn Crispin <john@phrozen.org>2018-07-30 10:43:36 +0200
commitb74f63f81d6121b5eace3f0c0c87399f7e0fde92 (patch)
tree2d45b29da178ec23a45436fabfa79c6d80e2af9d /target/linux/ar71xx/files/arch
parent0aaa65075508035bdf6c8fc8fa9a79b94dc5eadc (diff)
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ar71xx:add support for E558 v2
Qxwlan E558 v2 is based on Qualcomm QCA9558 + AR8327. Specification: - 720/600/200 MHz (CPU/DDR/AHB) - 128 MB of RAM (DDR2) - 8/16 MB of FLASH (SPI NOR) - 2T2R 2.4 GHz (QCA9558) - 3x 10/100/1000 Mbps Ethernet (one port with PoE support) - 4x miniPCIe slot (USB 2.0 bus only) - 1x microSIM slot - 5x LED (4 driven by GPIO) - 1x button (reset) - 1x 3-pos switch - 1x DC jack for main power input (9-48 V) - UART (JP5) and LEDs (J8) headers on PCB Flash instruction (using U-Boot CLI and tftp server): - Configure PC with static IP 192.168.1.10 and tftp server. - Rename "sysupgrade" filename to "firmware.bin" and place it in tftp server directory. - Connect PC with one of RJ45 ports, power up the board and press "enter" key to access U-Boot CLI. - Use the following command to update the device to OpenWrt: "run lfw". Flash instruction (using U-Boot web-based recovery): - Configure PC with static IP 192.168.1.xxx(2-254)/24. - Connect PC with one of RJ45 ports, press the reset button, power up the board and keep button pressed for around 6-7 seconds, until LEDs start flashing. - Open your browser and enter 192.168.1.1, select "sysupgrade" image and click the upgrade button. Signed-off-by: 张鹏 <sd20@qxwlan.com>
Diffstat (limited to 'target/linux/ar71xx/files/arch')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt11
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/Makefile1
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-e558-v2.c170
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/machtypes.h1
4 files changed, 183 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
index 4ae6e6dcc8..3cd90a446b 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
+++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
@@ -711,6 +711,17 @@ config ATH79_MACH_E2100L
select ATH79_DEV_WMAC
select ATH79_NVRAM
+config ATH79_MACH_E558_V2
+ bool "Qxwlan E558 v2 support"
+ select SOC_QCA955X
+ select ATH79_DEV_AP9X_PCI if PCI
+ select ATH79_DEV_ETH
+ select ATH79_DEV_GPIO_BUTTONS
+ select ATH79_DEV_LEDS_GPIO
+ select ATH79_DEV_M25P80
+ select ATH79_DEV_USB
+ select ATH79_DEV_WMAC
+
config ATH79_MACH_E600G_V2
bool "Qxwlan E600G/E600GAC v2 support"
select SOC_QCA953X
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Makefile b/target/linux/ar71xx/files/arch/mips/ath79/Makefile
index 996fd4c68a..690738e1e6 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/Makefile
+++ b/target/linux/ar71xx/files/arch/mips/ath79/Makefile
@@ -112,6 +112,7 @@ obj-$(CONFIG_ATH79_MACH_DR344) += mach-dr344.o
obj-$(CONFIG_ATH79_MACH_DR531) += mach-dr531.o
obj-$(CONFIG_ATH79_MACH_DRAGINO2) += mach-dragino2.o
obj-$(CONFIG_ATH79_MACH_E1700AC_V2) += mach-e1700ac-v2.o
+obj-$(CONFIG_ATH79_MACH_E558_V2) += mach-e558-v2.o
obj-$(CONFIG_ATH79_MACH_E600G_V2) += mach-e600g-v2.o
obj-$(CONFIG_ATH79_MACH_EAP120) += mach-eap120.o
obj-$(CONFIG_ATH79_MACH_EAP300V2) += mach-eap300v2.o
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-e558-v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-e558-v2.c
new file mode 100644
index 0000000000..c067d58bbb
--- /dev/null
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-e558-v2.c
@@ -0,0 +1,170 @@
+/*
+ * Qxwlan E558 v2 board support
+ *
+ * Copyright (C) 2017 Peng Zhang <sd20@qxwlan.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/phy.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-ap9x-pci.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+#include "pci.h"
+
+#define E558_V2_GPIO_LED_WLAN 13
+#define E558_V2_GPIO_LED_SYSTEM 14
+#define E558_V2_GPIO_LED_QSS 15
+
+#define E558_V2_GPIO_BTN_RESET 16
+
+#define E558_V2_KEYS_POLL_INTERVAL 20 /* msecs */
+#define E558_V2_KEYS_DEBOUNCE_INTERVAL (3 * E558_V2_KEYS_POLL_INTERVAL)
+
+static struct gpio_led e558_v2_leds_gpio[] __initdata = {
+ {
+ .name = "e558-v2:green:qss",
+ .gpio = E558_V2_GPIO_LED_QSS,
+ .active_low = 1,
+ },
+ {
+ .name = "e558-v2:green:system",
+ .gpio = E558_V2_GPIO_LED_SYSTEM,
+ .active_low = 1,
+ },
+ {
+ .name = "e558-v2:green:wlan",
+ .gpio = E558_V2_GPIO_LED_WLAN,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_button e558_v2_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = E558_V2_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = E558_V2_GPIO_BTN_RESET,
+ .active_low = 1,
+ },
+};
+
+/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
+static struct ar8327_pad_cfg e558_v2_ar8327_pad0_cfg = {
+ .mode = AR8327_PAD_MAC_SGMII,
+ .sgmii_delay_en = true,
+};
+
+/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */
+static struct ar8327_pad_cfg e558_v2_ar8327_pad6_cfg = {
+ .mode = AR8327_PAD_MAC_RGMII,
+ .txclk_delay_en = true,
+ .rxclk_delay_en = true,
+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+};
+
+static const struct ar8327_led_info e558_v2_leds_qca8334[] = {
+ AR8327_LED_INFO(PHY2_0, HW, "e558-v2:green:wan"),
+ AR8327_LED_INFO(PHY3_0, HW, "e558-v2:green:lan1"),
+ AR8327_LED_INFO(PHY4_0, HW, "e558-v2:green:lan2"),
+};
+
+static struct ar8327_led_cfg e558_v2_ar8327_led_cfg = {
+ .led_ctrl0 = 0xc737c737,
+ .led_ctrl1 = 0x00000000,
+ .led_ctrl2 = 0x00000000,
+ .led_ctrl3 = 0x0030c300,
+ .open_drain = false,
+};
+
+static struct ar8327_platform_data e558_v2_ar8327_data = {
+ .pad0_cfg = &e558_v2_ar8327_pad0_cfg,
+ .pad6_cfg = &e558_v2_ar8327_pad6_cfg,
+ .port0_cfg = {
+ .force_link = 1,
+ .speed = AR8327_PORT_SPEED_1000,
+ .duplex = 1,
+ .txpause = 1,
+ .rxpause = 1,
+ },
+ .port6_cfg = {
+ .force_link = 1,
+ .speed = AR8327_PORT_SPEED_1000,
+ .duplex = 1,
+ .txpause = 1,
+ .rxpause = 1,
+ },
+ .led_cfg = &e558_v2_ar8327_led_cfg,
+ .leds = e558_v2_leds_qca8334,
+ .num_leds = ARRAY_SIZE(e558_v2_leds_qca8334),
+};
+
+static struct mdio_board_info e558_v2_mdio0_info[] = {
+ {
+ .bus_id = "ag71xx-mdio.0",
+ .phy_addr = 0,
+ .platform_data = &e558_v2_ar8327_data,
+ },
+};
+
+static void __init e558_v2_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f050400);
+ u8 *art = (u8 *) KSEG1ADDR(0x1f061000);
+
+ ath79_register_m25p80(NULL);
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(e558_v2_leds_gpio),
+ e558_v2_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1, E558_V2_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(e558_v2_gpio_keys),
+ e558_v2_gpio_keys);
+
+ ath79_register_mdio(0, 0x0);
+ mdiobus_register_board_info(e558_v2_mdio0_info,
+ ARRAY_SIZE(e558_v2_mdio0_info));
+
+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
+
+ /* GMAC0 is connected to the RMGII interface */
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.phy_mask = BIT(0);
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+ ath79_eth0_pll_data.pll_1000 = 0x56000000;
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
+ ath79_register_eth(0);
+
+ /* GMAC1 is connected to the SGMII interface */
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
+ ath79_eth1_data.speed = SPEED_1000;
+ ath79_eth1_data.duplex = DUPLEX_FULL;
+ ath79_eth1_pll_data.pll_1000 = 0x03000101;
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
+ ath79_register_eth(1);
+
+ ath79_register_pci();
+ ath79_register_usb();
+ ath79_register_wmac(art, NULL);
+}
+
+MIPS_MACHINE(ATH79_MACH_E558_V2, "E558-V2", "Qxwlan E558 v2",
+ e558_v2_setup);
+
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
index 09b62ddee8..de1efab3a2 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
+++ b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
@@ -105,6 +105,7 @@ enum ath79_mach_type {
ATH79_MACH_DR531, /* Wallys DR531 */
ATH79_MACH_DRAGINO2, /* Dragino Version 2 */
ATH79_MACH_E1700AC_V2, /* Qxwlan E1700AC v2 */
+ ATH79_MACH_E558_V2, /* Qxwlan E558 v2 */
ATH79_MACH_E600G_V2, /* Qxwlan E600G v2 */
ATH79_MACH_E600GAC_V2, /* Qxwlan E600GAC v2 */
ATH79_MACH_EAP120, /* TP-LINK EAP120 */