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authorDavid Bauer <mail@david-bauer.net>2018-08-06 16:15:04 +0200
committerJohn Crispin <john@phrozen.org>2018-08-08 15:48:57 +0200
commitf4f99ec9737c653815268f2efad0210caaa32e2d (patch)
treeb0aa4b6488ecfbd36f6f11b1cd7da75cc3fb9d0f /target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79
parentfbe17867daddf76ec26be7dbf6b9af3cfad4a54f (diff)
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ar71xx: fix QCA955X SGMII link loss
The QCA955X is affected by a hardware bug which causes link-loss of the SGMII link between SoC and PHY. This happens on change of link-state or speed. It is not really known what causes this bug. It definitely occurs when using a AR8033 Gigabit Ethernet PHY. Qualcomm solves this Bug in a similar fashion. We need to apply the fix on a per-device base via platform-data as performing the fixup work will break connectivity in case the SGMII interface is connected to a Switch. This bug was first proposed to be fixed by Sven Eckelmann in 2016. https://patchwork.ozlabs.org/patch/604782/ Based-on-patch-by: Sven Eckelmann <sven.eckelmann@open-mesh.com> Signed-off-by: David Bauer <mail@david-bauer.net>
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79')
-rw-r--r--target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
index c4c3a6d44c..e476d57e45 100644
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
@@ -37,6 +37,7 @@ struct ag71xx_platform_data {
u8 is_ar724x:1;
u8 has_ar8216:1;
u8 use_flow_control:1;
+ u8 enable_sgmii_fixup:1;
u8 disable_inline_checksum_engine:1;
struct ag71xx_switch_platform_data *switch_data;