diff options
| author | Gabor Juhos <juhosg@openwrt.org> | 2013-03-11 15:55:19 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2013-03-11 15:55:19 +0000 |
| commit | 5c5e1c0a9da17e834ea3c3337412ef5746ac615a (patch) | |
| tree | d66a044fec6740fdd0d1cc372a8156fbcf762c2f /target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c | |
| parent | 257bfc21afe14da432ead147463f83b5cdf6881b (diff) | |
| download | upstream-5c5e1c0a9da17e834ea3c3337412ef5746ac615a.tar.gz upstream-5c5e1c0a9da17e834ea3c3337412ef5746ac615a.tar.bz2 upstream-5c5e1c0a9da17e834ea3c3337412ef5746ac615a.zip | |
ar71xx: enabling control GPIO14 and GPIO15 on MR3040/MR11U
LAN1 and LAN2 LEDs not present (it pulled to ground via
resistors) on MR3040 and MR11U devices. This little patch
enabling ability to control GPIO14 and GPIO15.
Patch-by: Dmytro <dioptimizer@gmail.com>
Patchwork: http://patchwork.openwrt.org/patch/3439/
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 35960
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c index b6bdf9bb61..818ed97678 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c @@ -12,7 +12,9 @@ #include <linux/gpio.h> #include <asm/mach-ath79/ath79.h> +#include <asm/mach-ath79/ar71xx_regs.h> +#include "common.h" #include "dev-eth.h" #include "dev-gpio-buttons.h" #include "dev-leds-gpio.h" @@ -85,6 +87,10 @@ static void __init common_setup(void) u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + /* Disable hardware control LAN1 and LAN2 LEDs, enabling GPIO14 and GPIO15 */ + ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | + AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN); + /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ath79_setup_ar933x_phy4_switch(false, false); |