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author | Piotr Dymacz <pepe2k@gmail.com> | 2018-03-10 00:06:50 +0100 |
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committer | Piotr Dymacz <pepe2k@gmail.com> | 2018-04-06 23:11:00 +0200 |
commit | 57c641ba6ed833c309a0f06dfc1b808bdea2c613 (patch) | |
tree | e375e6e1aabbf894ec43da75c8b3eaa3c495b8d8 /target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.c | |
parent | 10ea53f900ee0cb384a9610d8870ba86cd837791 (diff) | |
download | upstream-57c641ba6ed833c309a0f06dfc1b808bdea2c613.tar.gz upstream-57c641ba6ed833c309a0f06dfc1b808bdea2c613.tar.bz2 upstream-57c641ba6ed833c309a0f06dfc1b808bdea2c613.zip |
ar71xx: rework chipidea controller support, add QCA9531
Rework (again) platform support for dual-role chipidea USB controller:
- include support for QCA9531
- use correct EHCI block size
- drop ar933x_usb_setup_ctrl_config() function
- simplify code after previous "register chipidea only in device mode"
change (fa22714181)
Reworked patch was tested on devices with below QCA WiSOCs (signal/GPIO
name with required bootstrap state for USB bus 0 in device mode):
- AR9331 (GPIO13 pull-down)
- AR9342 (RGMII_TXD1/ETXD1 pull-up)
- AR9344 (GPIO20 pull-up)
- QCA9531 (GPIO13 pull-up)
- QCA9558 (GPIO13 pull-up)
The only way to select device mode for bus 0 is to change SOC bootstrap
configuration which is sampled only once, at hard reset. Likely, other
models, like QCA9556 or AR9341, should also support dual-role USB mode
but they were not tested.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.c')
0 files changed, 0 insertions, 0 deletions