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| author | Thibaut VARÈNE <hacks@slashdirt.org> | 2022-04-14 12:39:04 +0200 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2022-04-15 07:11:18 +0200 |
| commit | f9ff282d17ec652d63fa2404e47bb0e15ed95b69 (patch) | |
| tree | e2cf92fccc8df628aa8173c2878071476dfbe408 /package/kernel/mac80211 | |
| parent | c91df224f54fdd44c9c0487a8c91876f5d273164 (diff) | |
| download | upstream-f9ff282d17ec652d63fa2404e47bb0e15ed95b69.tar.gz upstream-f9ff282d17ec652d63fa2404e47bb0e15ed95b69.tar.bz2 upstream-f9ff282d17ec652d63fa2404e47bb0e15ed95b69.zip | |
mac80211 adjust QCA9561 PA bias
ath9k is setting the TX PA DC bias level different on QCA9561 and QCA9565
although they have the same radio IP-core, which results in a very low
output power and very low throughput as devices are further away from
the AP (compared to other 2.4GHz APs.)
In real life testing, without this patch the 2.4GHz throughput on Yuncore
XD3200 is around 10Mbps sitting close to the AP, and close to theoretical
maximum with the patch applied.
Signed-off-by: Clemens Hopfer <openwrt@wireloss.net>
[edit commit message]
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Diffstat (limited to 'package/kernel/mac80211')
| -rw-r--r-- | package/kernel/mac80211/patches/ath9k/580-ath9k_ar9561_xpa_bias_level_top.patch | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/package/kernel/mac80211/patches/ath9k/580-ath9k_ar9561_xpa_bias_level_top.patch b/package/kernel/mac80211/patches/ath9k/580-ath9k_ar9561_xpa_bias_level_top.patch new file mode 100644 index 0000000000..25db3ab5ba --- /dev/null +++ b/package/kernel/mac80211/patches/ath9k/580-ath9k_ar9561_xpa_bias_level_top.patch @@ -0,0 +1,18 @@ +--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c ++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +@@ -3604,10 +3604,13 @@ static void ar9003_hw_xpa_bias_level_app + { + int bias = ar9003_modal_header(ah, is2ghz)->xpaBiasLvl; + ++ ++ + if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah) || +- AR_SREV_9531(ah) || AR_SREV_9561(ah)) ++ AR_SREV_9531(ah)) + REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias); +- else if (AR_SREV_9462(ah) || AR_SREV_9550(ah) || AR_SREV_9565(ah)) ++ else if (AR_SREV_9462(ah) || AR_SREV_9550(ah) || AR_SREV_9565(ah) || ++ AR_SREV_9561(ah)) + REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias); + else { + REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias); |