diff options
| author | Pawel Dembicki <paweldembicki@gmail.com> | 2020-11-04 10:16:31 +0100 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2020-11-23 22:53:15 +0100 |
| commit | cdff729b27592b1761059886c40f0204507000d1 (patch) | |
| tree | c08622ee6f464b368da457707341035454520cb6 /package/firmware | |
| parent | 4dc27a026b7e308477adecbdf8e6da58e1d57716 (diff) | |
| download | upstream-cdff729b27592b1761059886c40f0204507000d1.tar.gz upstream-cdff729b27592b1761059886c40f0204507000d1.tar.bz2 upstream-cdff729b27592b1761059886c40f0204507000d1.zip | |
layerscape: enable spi-uart in LS1012A-FRDM
This patch add missing support of SC16IS740 serial controller, installed
on LS1012A-FRDM board.
It was required to change RCW bits, because SPI was disabled by default.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Diffstat (limited to 'package/firmware')
| -rw-r--r-- | package/firmware/layerscape/ls-rcw/Makefile | 2 | ||||
| -rw-r--r-- | package/firmware/layerscape/ls-rcw/patches/0002-fix_rcw_for_ls1012a-frdm.patch | 13 |
2 files changed, 14 insertions, 1 deletions
diff --git a/package/firmware/layerscape/ls-rcw/Makefile b/package/firmware/layerscape/ls-rcw/Makefile index 3853c9c3fb..6245e89633 100644 --- a/package/firmware/layerscape/ls-rcw/Makefile +++ b/package/firmware/layerscape/ls-rcw/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ls-rcw PKG_VERSION:=LSDK-20.04-update-290520 -PKG_RELEASE:=1 +PKG_RELEASE:=2 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/rcw diff --git a/package/firmware/layerscape/ls-rcw/patches/0002-fix_rcw_for_ls1012a-frdm.patch b/package/firmware/layerscape/ls-rcw/patches/0002-fix_rcw_for_ls1012a-frdm.patch new file mode 100644 index 0000000000..66b4df9faa --- /dev/null +++ b/package/firmware/layerscape/ls-rcw/patches/0002-fix_rcw_for_ls1012a-frdm.patch @@ -0,0 +1,13 @@ +--- a/ls1012afrdm/N_SSNP_3305/rcw_800.rcw ++++ b/ls1012afrdm/N_SSNP_3305/rcw_800.rcw +@@ -41,8 +41,8 @@ EC1_EXT_SAI2_RX=1 + EC1_BASE=0 + UART1_BASE=1 + SDHC1_BASE=1 +-SDHC2_BASE_DAT321=1 +-SDHC2_BASE_BASE=1 ++SDHC2_BASE_DAT321=3 ++SDHC2_BASE_BASE=3 + UART2_BASE_DATA=1 + EMI1_BASE=1 + CLK_OUT_BASE=1 |