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authorFelix Fietkau <nbd@openwrt.org>2014-12-26 12:36:38 +0000
committerFelix Fietkau <nbd@openwrt.org>2014-12-26 12:36:38 +0000
commitfa3cb9fa5c013672e5e9d6794ac7a2646920f9da (patch)
tree7b9913ef688d1f2a83032e342954461a7f965644
parenta96afecf5c1d08c9a7870eedf9e525fbae0bfecf (diff)
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ar71xx: add flush reset register writes, should fix restart issues (#17839)
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 43777
-rw-r--r--target/linux/ar71xx/patches-3.14/728-MIPS-ath79-fix-restart.patch10
1 files changed, 10 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.14/728-MIPS-ath79-fix-restart.patch b/target/linux/ar71xx/patches-3.14/728-MIPS-ath79-fix-restart.patch
index 0027c59631..b8fc078ba0 100644
--- a/target/linux/ar71xx/patches-3.14/728-MIPS-ath79-fix-restart.patch
+++ b/target/linux/ar71xx/patches-3.14/728-MIPS-ath79-fix-restart.patch
@@ -8,3 +8,13 @@
ath79_device_reset_set(AR71XX_RESET_FULL_CHIP);
for (;;)
if (cpu_wait)
+--- a/arch/mips/include/asm/mach-ath79/ath79.h
++++ b/arch/mips/include/asm/mach-ath79/ath79.h
+@@ -144,6 +144,7 @@ static inline u32 ath79_pll_rr(unsigned
+ static inline void ath79_reset_wr(unsigned reg, u32 val)
+ {
+ __raw_writel(val, ath79_reset_base + reg);
++ (void) __raw_readl(ath79_reset_base + reg); /* flush */
+ }
+
+ static inline u32 ath79_reset_rr(unsigned reg)