aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorJonas Gorski <jogo@openwrt.org>2014-12-01 00:52:07 +0000
committerJonas Gorski <jogo@openwrt.org>2014-12-01 00:52:07 +0000
commite8068f0b1b4e53559ae0c58910b8905bee9b61ab (patch)
treecf44e0daeb888e0b4c69d9bf8483088a05239b96
parent443d730da80775f4e6740f947b447e0bffef3644 (diff)
downloadupstream-e8068f0b1b4e53559ae0c58910b8905bee9b61ab.tar.gz
upstream-e8068f0b1b4e53559ae0c58910b8905bee9b61ab.tar.bz2
upstream-e8068f0b1b4e53559ae0c58910b8905bee9b61ab.zip
brcm63xx: register interrupt-controllers through DT when possible
Add the required nodes for the interrupt controllers and register them through DT when a DTB is present. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 43457
-rw-r--r--target/linux/brcm63xx/dts/bcm6318.dtsi30
-rw-r--r--target/linux/brcm63xx/dts/bcm63268.dtsi31
-rw-r--r--target/linux/brcm63xx/dts/bcm6328.dtsi30
-rw-r--r--target/linux/brcm63xx/dts/bcm6338.dtsi30
-rw-r--r--target/linux/brcm63xx/dts/bcm6345.dtsi30
-rw-r--r--target/linux/brcm63xx/dts/bcm6348.dtsi30
-rw-r--r--target/linux/brcm63xx/dts/bcm6358.dtsi42
-rw-r--r--target/linux/brcm63xx/dts/bcm6362.dtsi31
-rw-r--r--target/linux/brcm63xx/dts/bcm6368.dtsi42
-rw-r--r--target/linux/brcm63xx/patches-3.14/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch38
10 files changed, 334 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/dts/bcm6318.dtsi b/target/linux/brcm63xx/dts/bcm6318.dtsi
index 370183e81c..723c488f20 100644
--- a/target/linux/brcm63xx/dts/bcm6318.dtsi
+++ b/target/linux/brcm63xx/dts/bcm6318.dtsi
@@ -14,6 +14,14 @@
};
};
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
memory { device_type = "memory"; reg = <0 0>; };
ubus@10000000 {
@@ -21,5 +29,27 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+
+ ext_intc: interrupt-controller@10000018 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0x10000018 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <24>, <25>, <26>, <27>;
+ };
+
+ periph_intc: interrupt-controller@10000020 {
+ compatible = "brcm,bcm6345-l2-intc";
+ reg = <0x10000020 0x20>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
};
};
diff --git a/target/linux/brcm63xx/dts/bcm63268.dtsi b/target/linux/brcm63xx/dts/bcm63268.dtsi
index eafa74b6ac..214cd6266c 100644
--- a/target/linux/brcm63xx/dts/bcm63268.dtsi
+++ b/target/linux/brcm63xx/dts/bcm63268.dtsi
@@ -20,6 +20,14 @@
};
};
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
memory { device_type = "memory"; reg = <0 0>; };
ubus@10000000 {
@@ -27,5 +35,28 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+
+ ext_intc: interrupt-controller@10000018 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0x10000018 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <44>, <45>, <46>, <47>;
+ };
+
+ periph_intc: interrupt-controller@10000020 {
+ compatible = "brcm,bcm6345-l2-intc";
+ reg = <0x10000020 0x20>,
+ <0x10000040 0x20>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>, <3>;
+ };
};
};
diff --git a/target/linux/brcm63xx/dts/bcm6328.dtsi b/target/linux/brcm63xx/dts/bcm6328.dtsi
index c9940c16de..0ed186e185 100644
--- a/target/linux/brcm63xx/dts/bcm6328.dtsi
+++ b/target/linux/brcm63xx/dts/bcm6328.dtsi
@@ -14,6 +14,14 @@
};
};
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
memory { device_type = "memory"; reg = <0 0>; };
ubus@10000000 {
@@ -21,5 +29,27 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+
+ ext_intc: interrupt-controller@10000018 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0x10000018 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <24>, <25>, <26>, <27>;
+ };
+
+ periph_intc: interrupt-controller@10000020 {
+ compatible = "brcm,bcm6345-l2-intc";
+ reg = <0x10000020 0x10>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
};
};
diff --git a/target/linux/brcm63xx/dts/bcm6338.dtsi b/target/linux/brcm63xx/dts/bcm6338.dtsi
index 9746e7a4fd..b527781060 100644
--- a/target/linux/brcm63xx/dts/bcm6338.dtsi
+++ b/target/linux/brcm63xx/dts/bcm6338.dtsi
@@ -18,6 +18,14 @@
};
};
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
memory { device_type = "memory"; reg = <0 0>; };
pflash: nor@1fc00000 {
@@ -35,5 +43,27 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+
+ periph_intc: interrupt-controller@fffe000c {
+ compatible = "brcm,bcm6345-l2-intc";
+ reg = <0xfffe000c 0x8>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
+
+ ext_intc: interrupt-controller@fffe0014 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0xfffe0014 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <3>, <4>, <5>, <6>;
+ };
};
};
diff --git a/target/linux/brcm63xx/dts/bcm6345.dtsi b/target/linux/brcm63xx/dts/bcm6345.dtsi
index 03e742b7ac..16ba8bd6c0 100644
--- a/target/linux/brcm63xx/dts/bcm6345.dtsi
+++ b/target/linux/brcm63xx/dts/bcm6345.dtsi
@@ -18,6 +18,14 @@
};
};
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
memory { device_type = "memory"; reg = <0 0>; };
pflash: nor@1fc00000 {
@@ -35,5 +43,27 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+
+ periph_intc: interrupt-controller@fffe000c {
+ compatible = "brcm,bcm6345-l2-intc";
+ reg = <0xfffe000c 0x9>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
+
+ ext_intc: interrupt-controller@fffe0014 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0xfffe0014 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <3>, <4>, <5>, <6>;
+ };
};
};
diff --git a/target/linux/brcm63xx/dts/bcm6348.dtsi b/target/linux/brcm63xx/dts/bcm6348.dtsi
index 404ed33435..06ecbaa1f9 100644
--- a/target/linux/brcm63xx/dts/bcm6348.dtsi
+++ b/target/linux/brcm63xx/dts/bcm6348.dtsi
@@ -18,6 +18,14 @@
};
};
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
memory { device_type = "memory"; reg = <0 0>; };
pflash: nor@1fc00000 {
@@ -35,5 +43,27 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+
+ periph_intc: interrupt-controller@fffe000c {
+ compatible = "brcm,bcm6345-l2-intc";
+ reg = <0xfffe000c 0x8>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
+
+ ext_intc: interrupt-controller@fffe0014 {
+ compatible = "brcm,bcm6348-ext-intc";
+ reg = <0xfffe0014 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <3>, <4>, <5>, <6>;
+ };
};
};
diff --git a/target/linux/brcm63xx/dts/bcm6358.dtsi b/target/linux/brcm63xx/dts/bcm6358.dtsi
index b376cf01f3..a4af2144a8 100644
--- a/target/linux/brcm63xx/dts/bcm6358.dtsi
+++ b/target/linux/brcm63xx/dts/bcm6358.dtsi
@@ -24,6 +24,14 @@
};
};
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
memory { device_type = "memory"; reg = <0 0>; };
pflash: nor@1e000000 {
@@ -41,5 +49,39 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+
+ periph_intc: interrupt-controller@fffe000c {
+ compatible = "brcm,bcm6345-l2-intc";
+ reg = <0xfffe000c 0x8>,
+ <0xfffe0038 0x8>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>, <3>;
+ };
+
+ ext_intc0: interrupt-controller@fffe0014 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0xfffe0014 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <25>, <26>, <27>, <28>;
+ };
+
+ ext_intc1: interrupt-controller@fffe001c {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0xfffe001c 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <20>, <21>;
+ };
};
};
diff --git a/target/linux/brcm63xx/dts/bcm6362.dtsi b/target/linux/brcm63xx/dts/bcm6362.dtsi
index 543d24ebae..36765b0eba 100644
--- a/target/linux/brcm63xx/dts/bcm6362.dtsi
+++ b/target/linux/brcm63xx/dts/bcm6362.dtsi
@@ -20,6 +20,14 @@
};
};
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
memory { device_type = "memory"; reg = <0 0>; };
ubus@10000000 {
@@ -27,5 +35,28 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+
+ ext_intc: interrupt-controller@10000018 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0x10000018 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <40>, <41>, <42>, <43>;
+ };
+
+ periph_intc: interrupt-controller@10000020 {
+ compatible = "brcm,bcm6345-l2-intc";
+ reg = <0x10000020 0x10>,
+ <0x10000030 0x10>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>, <3>;
+ };
};
};
diff --git a/target/linux/brcm63xx/dts/bcm6368.dtsi b/target/linux/brcm63xx/dts/bcm6368.dtsi
index 378f4fb5bf..dcbbdbfe81 100644
--- a/target/linux/brcm63xx/dts/bcm6368.dtsi
+++ b/target/linux/brcm63xx/dts/bcm6368.dtsi
@@ -24,6 +24,14 @@
};
};
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
memory { device_type = "memory"; reg = <0 0>; };
ubus@10000000 {
@@ -31,6 +39,40 @@
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+
+ ext_intc0: interrupt-controller@10000018 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0x10000018 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <20>, <21>, <22>, <23>;
+ };
+
+ ext_intc1: interrupt-controller@1000001c {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0x1000001c 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <24>, <25>;
+ };
+
+ periph_intc: interrupt-controller@10000020 {
+ compatible = "brcm,bcm6345-l2-intc";
+ reg = <0x10000020 0x10>,
+ <0x10000030 0x10>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>, <3>;
+ };
};
pflash: nor@18000000 {
diff --git a/target/linux/brcm63xx/patches-3.14/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch b/target/linux/brcm63xx/patches-3.14/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch
new file mode 100644
index 0000000000..5a74ddb839
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.14/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch
@@ -0,0 +1,38 @@
+From 7c22b08baba941a8c83072047b0d2b55a6b952aa Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 1 Dec 2014 00:20:07 +0100
+Subject: [PATCH] MIPS: BCM63XX: register interrupt controllers through DT
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -15,6 +15,8 @@
+ #include <linux/irqchip.h>
+ #include <linux/irqchip/irq-bcm6345-ext-intc.h>
+ #include <linux/irqchip/irq-bcm6345-l2-intc.h>
++#include <linux/of.h>
++#include <linux/of_fdt.h>
+ #include <asm/irq_cpu.h>
+ #include <asm/mipsregs.h>
+ #include <bcm63xx_cpu.h>
+@@ -189,7 +191,15 @@ static void bcm63xx_init_irq(void)
+ ext_shift);
+ }
+
++static const struct of_device_id irqchip_of_match_mips_cpu_intc __used __section(__irqchip_of_table) = {
++ .compatible = "mti,cpu-interrupt-controller",
++ .data = mips_cpu_irq_of_init,
++};
++
+ void __init arch_init_irq(void)
+ {
+- bcm63xx_init_irq();
++ if (initial_boot_params)
++ irqchip_init();
++ else
++ bcm63xx_init_irq();
+ }