aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorFelix Fietkau <nbd@openwrt.org>2010-12-04 01:32:15 +0000
committerFelix Fietkau <nbd@openwrt.org>2010-12-04 01:32:15 +0000
commit8067f3f3cc0f783406cbe1e97c598a35efb2c7c6 (patch)
tree7c1f581608628f9f65a1bb3a4001a5e4fd67a050
parent2a55832f5884d0512556d772b5532aa5737f39ad (diff)
downloadupstream-8067f3f3cc0f783406cbe1e97c598a35efb2c7c6.tar.gz
upstream-8067f3f3cc0f783406cbe1e97c598a35efb2c7c6.tar.bz2
upstream-8067f3f3cc0f783406cbe1e97c598a35efb2c7c6.zip
ar71xx: work around a PCI controller bug which causes reads to the PCI_COMMAND register to return bogus values - properly fixes ath9k module reload issues
SVN-Revision: 24236
-rw-r--r--package/mac80211/patches/520-ath9k_pci_error_fix.patch13
-rw-r--r--target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c10
2 files changed, 10 insertions, 13 deletions
diff --git a/package/mac80211/patches/520-ath9k_pci_error_fix.patch b/package/mac80211/patches/520-ath9k_pci_error_fix.patch
deleted file mode 100644
index b8fcc994b6..0000000000
--- a/package/mac80211/patches/520-ath9k_pci_error_fix.patch
+++ /dev/null
@@ -1,13 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/pci.c
-+++ b/drivers/net/wireless/ath/ath9k/pci.c
-@@ -255,6 +255,10 @@ static void ath_pci_remove(struct pci_de
- struct ath_wiphy *aphy = hw->priv;
- struct ath_softc *sc = aphy->sc;
- void __iomem *mem = sc->mem;
-+ u16 val;
-+
-+ /* Do a config read to clear pre-existing pci error status */
-+ pci_read_config_word(pdev, PCI_COMMAND, &val);
-
- ath9k_deinit_device(sc);
- free_irq(sc->irq, sc);
diff --git a/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c b/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
index c6c6e55834..5f10d6a652 100644
--- a/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
+++ b/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
@@ -136,6 +136,7 @@ static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
static u32 mask[8] = {0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0};
unsigned long flags;
u32 data;
+ int retry = 0;
int ret;
ret = PCIBIOS_SUCCESSFUL;
@@ -143,6 +144,7 @@ static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
DBG("PCI: read config: %02x:%02x.%01x/%02x:%01d\n", bus->number,
PCI_SLOT(devfn), PCI_FUNC(devfn), where, size);
+retry:
spin_lock_irqsave(&ar71xx_pci_lock, flags);
if (bus->number == 0 && devfn == 0) {
@@ -176,6 +178,14 @@ static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
*value = (data >> (8 * (where & 3))) & mask[size & 7];
+ /*
+ * PCI controller bug: sometimes reads to the PCI_COMMAND register
+ * return 0xffff, even though the PCI trace shows the correct value.
+ * Work around this by retrying reads to this register
+ */
+ if (where == PCI_COMMAND && (*value & 0xffff) == 0xffff && retry++ < 2)
+ goto retry;
+
return ret;
}