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| author | Rafał Miłecki <rafal@milecki.pl> | 2018-12-27 07:58:48 +0100 |
|---|---|---|
| committer | Rafał Miłecki <rafal@milecki.pl> | 2018-12-27 07:59:03 +0100 |
| commit | 75b134c4c5675898a68ada14f21f997549e2058d (patch) | |
| tree | 894ada347363b500a96d437a2b29733702f59ee8 | |
| parent | 7a7d19abcfc56c5073931e81f481e2e1fdf774c2 (diff) | |
| download | upstream-75b134c4c5675898a68ada14f21f997549e2058d.tar.gz upstream-75b134c4c5675898a68ada14f21f997549e2058d.tar.bz2 upstream-75b134c4c5675898a68ada14f21f997549e2058d.zip | |
bcm53xx: add support for the kernel 4.19
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
22 files changed, 2097 insertions, 0 deletions
diff --git a/target/linux/bcm53xx/config-4.19 b/target/linux/bcm53xx/config-4.19 new file mode 100644 index 0000000000..12da0eec9f --- /dev/null +++ b/target/linux/bcm53xx/config-4.19 @@ -0,0 +1,363 @@ +CONFIG_ALIGNMENT_TRAP=y +CONFIG_ARCH_BCM=y +CONFIG_ARCH_BCM_5301X=y +CONFIG_ARCH_BCM_53573=y +CONFIG_ARCH_BCM_IPROC=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MULTIPLATFORM=y +# CONFIG_ARCH_MULTI_CPU_AUTO is not set +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_ARM=y +CONFIG_ARM_AMBA=y +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +# CONFIG_ARM_ATAG_DTB_COMPAT is not set +# CONFIG_ARM_CPU_SUSPEND is not set +CONFIG_ARM_ERRATA_754322=y +CONFIG_ARM_ERRATA_764369=y +CONFIG_ARM_ERRATA_775420=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GLOBAL_TIMER=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_ARM_HEAVY_MB=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_L1_CACHE_SHIFT_6=y +# CONFIG_ARM_LPAE is not set +CONFIG_ARM_PATCH_IDIV=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +# CONFIG_ARM_SP805_WATCHDOG is not set +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +CONFIG_ARM_VIRT_EXT=y +CONFIG_ATAGS=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_BCM47XX_NVRAM=y +CONFIG_BCM47XX_SPROM=y +CONFIG_BCM47XX_WDT=y +CONFIG_BCMA=y +CONFIG_BCMA_BLOCKIO=y +CONFIG_BCMA_DEBUG=y +CONFIG_BCMA_DRIVER_GMAC_CMN=y +CONFIG_BCMA_DRIVER_GPIO=y +CONFIG_BCMA_DRIVER_PCI=y +CONFIG_BCMA_HOST_PCI=y +CONFIG_BCMA_HOST_PCI_POSSIBLE=y +CONFIG_BCMA_HOST_SOC=y +CONFIG_BCMA_SFLASH=y +CONFIG_BCM_NET_PHYLIB=y +CONFIG_BCM_NS_THERMAL=y +CONFIG_BGMAC=y +CONFIG_BGMAC_BCMA=y +# CONFIG_BGMAC_PLATFORM is not set +CONFIG_BLK_MQ_PCI=y +CONFIG_BOUNCE=y +CONFIG_BROADCOM_PHY=y +CONFIG_CACHE_L2X0=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y +CONFIG_CLKSRC_MMIO=y +# CONFIG_CLK_BCM_NS2 is not set +CONFIG_CLK_BCM_NSP=y +# CONFIG_CLK_BCM_SR is not set +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMMON_CLK_IPROC=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_HAS_ASID=y +# CONFIG_CPU_ICACHE_DISABLE is not set +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +CONFIG_CRC16=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_BCM_5301X=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_LL=y +CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" +CONFIG_DEBUG_UART_8250=y +# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set +CONFIG_DEBUG_UART_8250_SHIFT=0 +CONFIG_DEBUG_UART_PHYS=0x18000300 +CONFIG_DEBUG_UART_VIRT=0xf1000300 +CONFIG_DEBUG_UNCOMPRESS=y +CONFIG_DEBUG_USER=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_EXTCON=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FRAME_POINTER=y +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_74X164=y +CONFIG_GPIO_SYSFS=y +# CONFIG_GRO_CELLS is not set +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_ARM_ARCH_TIMER=y +CONFIG_HAVE_ARM_SCU=y +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_TWD=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_HAVE_CC_STACKPROTECTOR=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_EBPF_JIT=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IDE=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_HAVE_NET_DSA=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_SMP=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_UID16=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HIGHMEM=y +# CONFIG_HIGHPTE is not set +CONFIG_HZ_FIXED=0 +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IOMMU_HELPER=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_LIBFDT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BCM_IPROC=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +# CONFIG_MDIO_BUS_MUX_BCM_IPROC is not set +CONFIG_MDIO_BUS_MUX_MMIOREG=y +CONFIG_MDIO_DEVICE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MIGHT_HAVE_PCI=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MTD_BCM47XXSFLASH=y +CONFIG_MTD_BCM47XX_PARTS=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_BRCMNAND=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_PARSER_TRX=y +# CONFIG_MTD_PHYSMAP_OF is not set +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_SEAMA_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +# CONFIG_MTD_UBI_FASTMAP is not set +# CONFIG_MTD_UBI_GLUEBI is not set +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MULTI_IRQ_HANDLER=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NO_BOOTMEM=y +CONFIG_NR_CPUS=2 +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_PADATA=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PCI=y +CONFIG_PCIE_IPROC=y +CONFIG_PCIE_IPROC_BCMA=y +# CONFIG_PCIE_IPROC_PLATFORM is not set +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +# CONFIG_PHY_BCM_NS_USB2 is not set +# CONFIG_PHY_BCM_NS_USB3 is not set +# CONFIG_PHY_BRCM_SATA is not set +# CONFIG_PHY_NS2_USB_DRD is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_IPROC_GPIO is not set +CONFIG_PINCTRL_NS=y +# CONFIG_PINCTRL_NS2_MUX is not set +# CONFIG_PL310_ERRATA_588369 is not set +# CONFIG_PL310_ERRATA_727915 is not set +# CONFIG_PL310_ERRATA_753970 is not set +# CONFIG_PL310_ERRATA_769419 is not set +CONFIG_RATIONAL=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +# CONFIG_SCHED_INFO is not set +# CONFIG_SCSI_DMA is not set +CONFIG_SERIAL_8250_FSL=y +# CONFIG_SERIAL_AMBA_PL011 is not set +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +# CONFIG_SPI_BCM53XX is not set +CONFIG_SPI_BCM_QSPI=y +CONFIG_SPI_BITBANG=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_MASTER=y +CONFIG_SRCU=y +CONFIG_SWCONFIG=y +CONFIG_SWCONFIG_B53=y +# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set +CONFIG_SWCONFIG_B53_PHY_DRIVER=y +CONFIG_SWCONFIG_B53_PHY_FIXUP=y +CONFIG_SWCONFIG_B53_SRAB_DRIVER=y +CONFIG_SWIOTLB=y +CONFIG_SWPHY=y +CONFIG_SWP_EMULATE=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_OF=y +# CONFIG_THUMB2_KERNEL is not set +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VECTORS_BASE=0xffff0000 +# CONFIG_VFP is not set +CONFIG_WATCHDOG_CORE=y +CONFIG_XPS=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/bcm53xx/patches-4.19/030-v4.20-0001-ARM-dts-BCM5301X-Specify-flash-partitions.patch b/target/linux/bcm53xx/patches-4.19/030-v4.20-0001-ARM-dts-BCM5301X-Specify-flash-partitions.patch new file mode 100644 index 0000000000..e6e2522f08 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/030-v4.20-0001-ARM-dts-BCM5301X-Specify-flash-partitions.patch @@ -0,0 +1,167 @@ +From b0465fdfdd7e7c1afe2fae1cb36b94e1ce89732e Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Sat, 28 Jul 2018 14:13:57 +0200 +Subject: [PATCH] ARM: dts: BCM5301X: Specify flash partitions +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Most devices use Broadcom standard partitions which allows them to be +described with the "brcm,bcm947xx-cfe-partitions". Exceptions are: +1) TP-LINK devices which use "os-image" partition with TRX containing + kernel only + separated rootfs partition. +2) Asus RT-AC87U with custom "asus" partition. + +This commit also removes undocumented and unsupported linux,part-probe +binding which got accidentally upstreamed while describing SPI +controller. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts | 28 +++++++++++++++++++ + arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 31 ++++++++++++++++++++++ + arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts | 28 +++++++++++++++++++ + arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi | 4 +++ + arch/arm/boot/dts/bcm5301x.dtsi | 5 +++- + 5 files changed, 95 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts ++++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts +@@ -94,6 +94,34 @@ + + &spi_nor { + status = "okay"; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ boot@0 { ++ label = "boot"; ++ reg = <0x000000 0x040000>; ++ read-only; ++ }; ++ ++ os-image@100000 { ++ label = "os-image"; ++ reg = <0x040000 0x200000>; ++ compatible = "brcm,trx"; ++ }; ++ ++ rootfs@240000 { ++ label = "rootfs"; ++ reg = <0x240000 0xc00000>; ++ }; ++ ++ nvram@ff0000 { ++ label = "nvram"; ++ reg = <0xff0000 0x010000>; ++ }; ++ }; + }; + + &usb2 { +--- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts ++++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts +@@ -66,3 +66,34 @@ + &usb3_phy { + status = "okay"; + }; ++ ++&nandcs { ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ boot@0 { ++ label = "boot"; ++ reg = <0x00000000 0x00080000>; ++ read-only; ++ }; ++ ++ nvram@80000 { ++ label = "nvram"; ++ reg = <0x00080000 0x00180000>; ++ }; ++ ++ firmware@200000 { ++ label = "firmware"; ++ reg = <0x00200000 0x07cc0000>; ++ compatible = "brcm,trx"; ++ }; ++ ++ asus@7ec0000 { ++ label = "asus"; ++ reg = <0x07ec0000 0x00140000>; ++ read-only; ++ }; ++ }; ++}; +--- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts ++++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts +@@ -103,6 +103,34 @@ + + &spi_nor { + status = "okay"; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ boot@0 { ++ label = "boot"; ++ reg = <0x000000 0x040000>; ++ read-only; ++ }; ++ ++ os-image@100000 { ++ label = "os-image"; ++ reg = <0x040000 0x200000>; ++ compatible = "brcm,trx"; ++ }; ++ ++ rootfs@240000 { ++ label = "rootfs"; ++ reg = <0x240000 0xc00000>; ++ }; ++ ++ nvram@ff0000 { ++ label = "nvram"; ++ reg = <0xff0000 0x010000>; ++ }; ++ }; + }; + + &usb3_phy { +--- a/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi ++++ b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi +@@ -12,6 +12,10 @@ + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; ++ ++ partitions { ++ compatible = "brcm,bcm947xx-cfe-partitions"; ++ }; + }; + }; + }; +--- a/arch/arm/boot/dts/bcm5301x.dtsi ++++ b/arch/arm/boot/dts/bcm5301x.dtsi +@@ -475,8 +475,11 @@ + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; +- linux,part-probe = "ofpart", "bcm47xxpart"; + status = "disabled"; ++ ++ partitions { ++ compatible = "brcm,bcm947xx-cfe-partitions"; ++ }; + }; + }; + diff --git a/target/linux/bcm53xx/patches-4.19/031-v4.21-0001-ARM-dts-BCM5301X-Relicense-BCM47081-BCM4709-files-to.patch b/target/linux/bcm53xx/patches-4.19/031-v4.21-0001-ARM-dts-BCM5301X-Relicense-BCM47081-BCM4709-files-to.patch new file mode 100644 index 0000000000..2dc6b2c23c --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/031-v4.21-0001-ARM-dts-BCM5301X-Relicense-BCM47081-BCM4709-files-to.patch @@ -0,0 +1,58 @@ +From 26ff86f7794b9466481ccf29ac79925d327f106d Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Thu, 20 Sep 2018 13:18:47 +0200 +Subject: [PATCH] ARM: dts: BCM5301X: Relicense BCM47081/BCM4709 files to the + GPL 2.0+ / MIT +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This matches licensing used by other BCM5301X files and is preferred as: +1) GPL 2.0+ makes it clearly compatible with Linux kernel +2) MIT is also permissive but preferred over ISC + +Both files were fully developed by me. Commits touching them were signed +by Florian and Hauke due to submitting process only. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm47081.dtsi | 13 +------------ + arch/arm/boot/dts/bcm4709.dtsi | 3 +-- + 2 files changed, 2 insertions(+), 14 deletions(-) + +--- a/arch/arm/boot/dts/bcm47081.dtsi ++++ b/arch/arm/boot/dts/bcm47081.dtsi +@@ -1,20 +1,9 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + /* + * Broadcom BCM470X / BCM5301X ARM platform code. + * DTS for BCM47081 SoC. + * + * Copyright © 2014 Rafał Miłecki <zajec5@gmail.com> +- * +- * Permission to use, copy, modify, and/or distribute this software for any +- * purpose with or without fee is hereby granted, provided that the above +- * copyright notice and this permission notice appear in all copies. +- * +- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH +- * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY +- * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, +- * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM +- * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE +- * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR +- * PERFORMANCE OF THIS SOFTWARE. + */ + + #include "bcm5301x.dtsi" +--- a/arch/arm/boot/dts/bcm4709.dtsi ++++ b/arch/arm/boot/dts/bcm4709.dtsi +@@ -1,7 +1,6 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + /* + * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> +- * +- * Licensed under the ISC license. + */ + + #include "bcm4708.dtsi" diff --git a/target/linux/bcm53xx/patches-4.19/031-v4.21-0002-ARM-dts-BCM5301X-Relicense-BCM47094-file-to-the-GPL-.patch b/target/linux/bcm53xx/patches-4.19/031-v4.21-0002-ARM-dts-BCM5301X-Relicense-BCM47094-file-to-the-GPL-.patch new file mode 100644 index 0000000000..86c6b0ae41 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/031-v4.21-0002-ARM-dts-BCM5301X-Relicense-BCM47094-file-to-the-GPL-.patch @@ -0,0 +1,33 @@ +From d10967344375026ca8762b6080dec2585d895906 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Thu, 20 Sep 2018 13:20:19 +0200 +Subject: [PATCH] ARM: dts: BCM5301X: Relicense BCM47094 file to the GPL 2.0+ / + MIT +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This matches licensing used by other BCM5301X files and is preferred as: +1) GPL 2.0+ makes it clearly compatible with Linux kernel +2) MIT is also permissive but preferred over ISC + +This file has been developed by me & once modified by Vivek. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Acked-by: Vivek Unune <npcomplete13@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm47094.dtsi | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/bcm47094.dtsi ++++ b/arch/arm/boot/dts/bcm47094.dtsi +@@ -1,7 +1,6 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + /* + * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> +- * +- * Licensed under the ISC license. + */ + + #include "bcm4708.dtsi" diff --git a/target/linux/bcm53xx/patches-4.19/031-v4.21-0003-ARM-dts-BCM53573-Relicense-Tenda-AC9-file-to-the-GPL.patch b/target/linux/bcm53xx/patches-4.19/031-v4.21-0003-ARM-dts-BCM53573-Relicense-Tenda-AC9-file-to-the-GPL.patch new file mode 100644 index 0000000000..a5358b70c3 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/031-v4.21-0003-ARM-dts-BCM53573-Relicense-Tenda-AC9-file-to-the-GPL.patch @@ -0,0 +1,32 @@ +From 1c9001b4f69a37820862286b3bbcdde152a52dcf Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Thu, 20 Sep 2018 13:37:47 +0200 +Subject: [PATCH] ARM: dts: BCM53573: Relicense Tenda AC9 file to the GPL 2.0+ + / MIT +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This matches licensing used by most of BCM5301X files and is preferred as: +1) GPL 2.0+ makes it clearly compatible with Linux kernel +2) MIT is also permissive but preferred over ISC + +This file was fully developed by me. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts ++++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts +@@ -1,7 +1,6 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + /* + * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> +- * +- * Licensed under the ISC license. + */ + + /dts-v1/; diff --git a/target/linux/bcm53xx/patches-4.19/031-v4.21-0004-ARM-dts-BCM53573-Relicense-SoC-file-to-the-GPL-2.0-M.patch b/target/linux/bcm53xx/patches-4.19/031-v4.21-0004-ARM-dts-BCM53573-Relicense-SoC-file-to-the-GPL-2.0-M.patch new file mode 100644 index 0000000000..56cd6376aa --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/031-v4.21-0004-ARM-dts-BCM53573-Relicense-SoC-file-to-the-GPL-2.0-M.patch @@ -0,0 +1,33 @@ +From ca3a6e705cad10662827093d5426abe078861793 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Thu, 20 Sep 2018 13:39:28 +0200 +Subject: [PATCH] ARM: dts: BCM53573: Relicense SoC file to the GPL 2.0+ / MIT +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This matches licensing used by most of BCM5301X files and is preferred as: +1) GPL 2.0+ makes it clearly compatible with Linux kernel +2) MIT is also permissive but preferred over ISC + +This file has been developed by me & once modified by Rob dropping a +single leading zero in an UART address. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Acked-by: Rob Herring <robh@kernel.org> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm53573.dtsi | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/bcm53573.dtsi ++++ b/arch/arm/boot/dts/bcm53573.dtsi +@@ -1,7 +1,6 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + /* + * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl> +- * +- * Licensed under the ISC license. + */ + + #include <dt-bindings/gpio/gpio.h> diff --git a/target/linux/bcm53xx/patches-4.19/031-v4.21-0005-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA6500-V2.patch b/target/linux/bcm53xx/patches-4.19/031-v4.21-0005-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA6500-V2.patch new file mode 100644 index 0000000000..da37542f9d --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/031-v4.21-0005-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA6500-V2.patch @@ -0,0 +1,75 @@ +From 03e96644d7a810916fc4997d572577e876908b18 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ren=C3=A9=20Kjellerup?= <rk.katana.steel@gmail.com> +Date: Mon, 1 Oct 2018 15:07:16 -0700 +Subject: [PATCH] ARM: dts: BCM5301X: Add basic DT for Linksys EA6500 V2 + +It is wireless home router based on BCM4708A0 with BCM4360 + BCM4331 +wireless chipsets. The BCM4331 5GHz chip currently isn't supported only +due to missing compatible firmware. + +Signed-off-by: Rene Kjellerup <rk.katana.steel@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts | 45 +++++++++++++++++++++++++ + 2 files changed, 46 insertions(+) + create mode 100644 arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -88,6 +88,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ + bcm4708-asus-rt-ac68u.dtb \ + bcm4708-buffalo-wzr-1750dhp.dtb \ + bcm4708-linksys-ea6300-v1.dtb \ ++ bcm4708-linksys-ea6500-v2.dtb \ + bcm4708-luxul-xap-1510.dtb \ + bcm4708-luxul-xwc-1000.dtb \ + bcm4708-netgear-r6250.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts +@@ -0,0 +1,45 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl> ++ * Copyright (C) 2018 Rene Kjellerup <rk.katana.steel@gmail.com> ++ */ ++ ++/dts-v1/; ++ ++#include "bcm4708.dtsi" ++#include "bcm5301x-nand-cs0-bch8.dtsi" ++ ++/ { ++ compatible = "linksys,ea6500-v2", "brcm,bcm4708"; ++ model = "Linksys EA6500 V2"; ++ ++ chosen { ++ bootargs = "console=ttyS0,115200"; ++ }; ++ ++ memory { ++ reg = <0x00000000 0x08000000>; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ wps { ++ label = "WPS"; ++ linux,code = <KEY_WPS_BUTTON>; ++ gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; ++ }; ++ ++ restart { ++ label = "Reset"; ++ linux,code = <KEY_RESTART>; ++ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&usb3_phy { ++ status = "okay"; ++}; diff --git a/target/linux/bcm53xx/patches-4.19/031-v4.21-0006-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch b/target/linux/bcm53xx/patches-4.19/031-v4.21-0006-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch new file mode 100644 index 0000000000..5f6dd17dc7 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/031-v4.21-0006-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch @@ -0,0 +1,77 @@ +From 9994241ac97cb84d1df98fdc172d3cc6b04b11bf Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Fri, 9 Nov 2018 09:56:49 +0100 +Subject: [PATCH] ARM: dts: BCM5301X: Describe Northstar pins mux controller +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This describes hardware & will allow referencing pin functions. The +first usage is UART1 which allows supporting devices using it. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm5301x.dtsi | 44 +++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 44 insertions(+) + +--- a/arch/arm/boot/dts/bcm5301x.dtsi ++++ b/arch/arm/boot/dts/bcm5301x.dtsi +@@ -37,6 +37,8 @@ + reg = <0x0400 0x100>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&iprocslow>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinmux_uart1>; + status = "disabled"; + }; + }; +@@ -391,6 +393,48 @@ + status = "disabled"; + }; + ++ dmu@1800c000 { ++ compatible = "simple-bus"; ++ ranges = <0 0x1800c000 0x1000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ cru@100 { ++ compatible = "simple-bus"; ++ reg = <0x100 0x1a4>; ++ ranges; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ pin-controller@1c0 { ++ compatible = "brcm,bcm4708-pinmux"; ++ reg = <0x1c0 0x24>; ++ reg-names = "cru_gpio_control"; ++ ++ spi-pins { ++ groups = "spi_grp"; ++ function = "spi"; ++ }; ++ ++ i2c { ++ groups = "i2c_grp"; ++ function = "i2c"; ++ }; ++ ++ pwm { ++ groups = "pwm0_grp", "pwm1_grp", ++ "pwm2_grp", "pwm3_grp"; ++ function = "pwm"; ++ }; ++ ++ pinmux_uart1: uart1 { ++ groups = "uart1_grp"; ++ function = "uart1"; ++ }; ++ }; ++ }; ++ }; ++ + lcpll0: lcpll0@1800c100 { + #clock-cells = <1>; + compatible = "brcm,nsp-lcpll0"; diff --git a/target/linux/bcm53xx/patches-4.19/080-v4.20-0001-pinctrl-bcm-add-Northstar-driver.patch b/target/linux/bcm53xx/patches-4.19/080-v4.20-0001-pinctrl-bcm-add-Northstar-driver.patch new file mode 100644 index 0000000000..44871e29c8 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/080-v4.20-0001-pinctrl-bcm-add-Northstar-driver.patch @@ -0,0 +1,427 @@ +From c12fb1774deaa9c9408b19db8d43d3612f6e47a0 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Wed, 26 Sep 2018 21:31:03 +0200 +Subject: [PATCH] pinctrl: bcm: add Northstar driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This driver provides support for Northstar mux controller. It differs +from Northstar Plus one so a new binding and driver were needed. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Signed-off-by: Linus Walleij <linus.walleij@linaro.org> +--- + drivers/pinctrl/bcm/Kconfig | 13 ++ + drivers/pinctrl/bcm/Makefile | 1 + + drivers/pinctrl/bcm/pinctrl-ns.c | 372 +++++++++++++++++++++++++++++++++++++++ + 3 files changed, 386 insertions(+) + create mode 100644 drivers/pinctrl/bcm/pinctrl-ns.c + +--- a/drivers/pinctrl/bcm/Kconfig ++++ b/drivers/pinctrl/bcm/Kconfig +@@ -73,6 +73,19 @@ config PINCTRL_CYGNUS_MUX + configuration, with the exception that certain individual pins + can be overridden to GPIO function + ++config PINCTRL_NS ++ bool "Broadcom Northstar pins driver" ++ depends on OF && (ARCH_BCM_5301X || COMPILE_TEST) ++ select PINMUX ++ select GENERIC_PINCONF ++ default ARCH_BCM_5301X ++ help ++ Say yes here to enable the Broadcom NS SoC pins driver. ++ ++ The Broadcom Northstar pins driver supports muxing multi-purpose pins ++ that can be used for various functions (e.g. SPI, I2C, UART) as well ++ as GPIOs. ++ + config PINCTRL_NSP_GPIO + bool "Broadcom NSP GPIO (with PINCONF) driver" + depends on OF_GPIO && (ARCH_BCM_NSP || COMPILE_TEST) +--- a/drivers/pinctrl/bcm/Makefile ++++ b/drivers/pinctrl/bcm/Makefile +@@ -5,6 +5,7 @@ obj-$(CONFIG_PINCTRL_BCM281XX) += pinct + obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o + obj-$(CONFIG_PINCTRL_IPROC_GPIO) += pinctrl-iproc-gpio.o + obj-$(CONFIG_PINCTRL_CYGNUS_MUX) += pinctrl-cygnus-mux.o ++obj-$(CONFIG_PINCTRL_NS) += pinctrl-ns.o + obj-$(CONFIG_PINCTRL_NSP_GPIO) += pinctrl-nsp-gpio.o + obj-$(CONFIG_PINCTRL_NS2_MUX) += pinctrl-ns2-mux.o + obj-$(CONFIG_PINCTRL_NSP_MUX) += pinctrl-nsp-mux.o +--- /dev/null ++++ b/drivers/pinctrl/bcm/pinctrl-ns.c +@@ -0,0 +1,372 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2018 Rafał Miłecki <rafal@milecki.pl> ++ */ ++ ++#include <linux/err.h> ++#include <linux/io.h> ++#include <linux/module.h> ++#include <linux/of.h> ++#include <linux/of_device.h> ++#include <linux/pinctrl/pinconf-generic.h> ++#include <linux/pinctrl/pinctrl.h> ++#include <linux/pinctrl/pinmux.h> ++#include <linux/platform_device.h> ++#include <linux/slab.h> ++ ++#define FLAG_BCM4708 BIT(1) ++#define FLAG_BCM4709 BIT(2) ++#define FLAG_BCM53012 BIT(3) ++ ++struct ns_pinctrl { ++ struct device *dev; ++ unsigned int chipset_flag; ++ struct pinctrl_dev *pctldev; ++ void __iomem *base; ++ ++ struct pinctrl_desc pctldesc; ++ struct ns_pinctrl_group *groups; ++ unsigned int num_groups; ++ struct ns_pinctrl_function *functions; ++ unsigned int num_functions; ++}; ++ ++/* ++ * Pins ++ */ ++ ++static const struct pinctrl_pin_desc ns_pinctrl_pins[] = { ++ { 0, "spi_clk", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 1, "spi_ss", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 2, "spi_mosi", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 3, "spi_miso", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 4, "i2c_scl", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 5, "i2c_sda", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 6, "mdc", (void *)(FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 7, "mdio", (void *)(FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 8, "pwm0", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 9, "pwm1", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 10, "pwm2", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 11, "pwm3", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 12, "uart1_rx", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 13, "uart1_tx", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 14, "uart1_cts", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 15, "uart1_rts", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 16, "uart2_rx", (void *)(FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 17, "uart2_tx", (void *)(FLAG_BCM4709 | FLAG_BCM53012) }, ++/* TODO { ??, "xtal_out", (void *)(FLAG_BCM4709) }, */ ++ { 22, "sdio_pwr", (void *)(FLAG_BCM4709 | FLAG_BCM53012) }, ++ { 23, "sdio_en_1p8v", (void *)(FLAG_BCM4709 | FLAG_BCM53012) }, ++}; ++ ++/* ++ * Groups ++ */ ++ ++struct ns_pinctrl_group { ++ const char *name; ++ const unsigned int *pins; ++ const unsigned int num_pins; ++ unsigned int chipsets; ++}; ++ ++static const unsigned int spi_pins[] = { 0, 1, 2, 3 }; ++static const unsigned int i2c_pins[] = { 4, 5 }; ++static const unsigned int mdio_pins[] = { 6, 7 }; ++static const unsigned int pwm0_pins[] = { 8 }; ++static const unsigned int pwm1_pins[] = { 9 }; ++static const unsigned int pwm2_pins[] = { 10 }; ++static const unsigned int pwm3_pins[] = { 11 }; ++static const unsigned int uart1_pins[] = { 12, 13, 14, 15 }; ++static const unsigned int uart2_pins[] = { 16, 17 }; ++static const unsigned int sdio_pwr_pins[] = { 22 }; ++static const unsigned int sdio_1p8v_pins[] = { 23 }; ++ ++#define NS_GROUP(_name, _pins, _chipsets) \ ++{ \ ++ .name = _name, \ ++ .pins = _pins, \ ++ .num_pins = ARRAY_SIZE(_pins), \ ++ .chipsets = _chipsets, \ ++} ++ ++static const struct ns_pinctrl_group ns_pinctrl_groups[] = { ++ NS_GROUP("spi_grp", spi_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), ++ NS_GROUP("i2c_grp", i2c_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), ++ NS_GROUP("mdio_grp", mdio_pins, FLAG_BCM4709 | FLAG_BCM53012), ++ NS_GROUP("pwm0_grp", pwm0_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), ++ NS_GROUP("pwm1_grp", pwm1_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), ++ NS_GROUP("pwm2_grp", pwm2_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), ++ NS_GROUP("pwm3_grp", pwm3_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), ++ NS_GROUP("uart1_grp", uart1_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), ++ NS_GROUP("uart2_grp", uart2_pins, FLAG_BCM4709 | FLAG_BCM53012), ++ NS_GROUP("sdio_pwr_grp", sdio_pwr_pins, FLAG_BCM4709 | FLAG_BCM53012), ++ NS_GROUP("sdio_1p8v_grp", sdio_1p8v_pins, FLAG_BCM4709 | FLAG_BCM53012), ++}; ++ ++/* ++ * Functions ++ */ ++ ++struct ns_pinctrl_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned int num_groups; ++ unsigned int chipsets; ++}; ++ ++static const char * const spi_groups[] = { "spi_grp" }; ++static const char * const i2c_groups[] = { "i2c_grp" }; ++static const char * const mdio_groups[] = { "mdio_grp" }; ++static const char * const pwm_groups[] = { "pwm0_grp", "pwm1_grp", "pwm2_grp", ++ "pwm3_grp" }; ++static const char * const uart1_groups[] = { "uart1_grp" }; ++static const char * const uart2_groups[] = { "uart2_grp" }; ++static const char * const sdio_groups[] = { "sdio_pwr_grp", "sdio_1p8v_grp" }; ++ ++#define NS_FUNCTION(_name, _groups, _chipsets) \ ++{ \ ++ .name = _name, \ ++ .groups = _groups, \ ++ .num_groups = ARRAY_SIZE(_groups), \ ++ .chipsets = _chipsets, \ ++} ++ ++static const struct ns_pinctrl_function ns_pinctrl_functions[] = { ++ NS_FUNCTION("spi", spi_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), ++ NS_FUNCTION("i2c", i2c_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), ++ NS_FUNCTION("mdio", mdio_groups, FLAG_BCM4709 | FLAG_BCM53012), ++ NS_FUNCTION("pwm", pwm_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), ++ NS_FUNCTION("uart1", uart1_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), ++ NS_FUNCTION("uart2", uart2_groups, FLAG_BCM4709 | FLAG_BCM53012), ++ NS_FUNCTION("sdio", sdio_groups, FLAG_BCM4709 | FLAG_BCM53012), ++}; ++ ++/* ++ * Groups code ++ */ ++ ++static int ns_pinctrl_get_groups_count(struct pinctrl_dev *pctrl_dev) ++{ ++ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); ++ ++ return ns_pinctrl->num_groups; ++} ++ ++static const char *ns_pinctrl_get_group_name(struct pinctrl_dev *pctrl_dev, ++ unsigned int selector) ++{ ++ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); ++ ++ return ns_pinctrl->groups[selector].name; ++} ++ ++static int ns_pinctrl_get_group_pins(struct pinctrl_dev *pctrl_dev, ++ unsigned int selector, ++ const unsigned int **pins, ++ unsigned int *num_pins) ++{ ++ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); ++ ++ *pins = ns_pinctrl->groups[selector].pins; ++ *num_pins = ns_pinctrl->groups[selector].num_pins; ++ ++ return 0; ++} ++ ++static const struct pinctrl_ops ns_pinctrl_ops = { ++ .get_groups_count = ns_pinctrl_get_groups_count, ++ .get_group_name = ns_pinctrl_get_group_name, ++ .get_group_pins = ns_pinctrl_get_group_pins, ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_group, ++ .dt_free_map = pinconf_generic_dt_free_map, ++}; ++ ++/* ++ * Functions code ++ */ ++ ++static int ns_pinctrl_get_functions_count(struct pinctrl_dev *pctrl_dev) ++{ ++ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); ++ ++ return ns_pinctrl->num_functions; ++} ++ ++static const char *ns_pinctrl_get_function_name(struct pinctrl_dev *pctrl_dev, ++ unsigned int selector) ++{ ++ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); ++ ++ return ns_pinctrl->functions[selector].name; ++} ++ ++static int ns_pinctrl_get_function_groups(struct pinctrl_dev *pctrl_dev, ++ unsigned int selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); ++ ++ *groups = ns_pinctrl->functions[selector].groups; ++ *num_groups = ns_pinctrl->functions[selector].num_groups; ++ ++ return 0; ++} ++ ++static int ns_pinctrl_set_mux(struct pinctrl_dev *pctrl_dev, ++ unsigned int func_select, ++ unsigned int grp_select) ++{ ++ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); ++ u32 unset = 0; ++ u32 tmp; ++ int i; ++ ++ for (i = 0; i < ns_pinctrl->groups[grp_select].num_pins; i++) { ++ int pin_number = ns_pinctrl->groups[grp_select].pins[i]; ++ ++ unset |= BIT(pin_number); ++ } ++ ++ tmp = readl(ns_pinctrl->base); ++ tmp &= ~unset; ++ writel(tmp, ns_pinctrl->base); ++ ++ return 0; ++} ++ ++static const struct pinmux_ops ns_pinctrl_pmxops = { ++ .get_functions_count = ns_pinctrl_get_functions_count, ++ .get_function_name = ns_pinctrl_get_function_name, ++ .get_function_groups = ns_pinctrl_get_function_groups, ++ .set_mux = ns_pinctrl_set_mux, ++}; ++ ++/* ++ * Controller code ++ */ ++ ++static struct pinctrl_desc ns_pinctrl_desc = { ++ .name = "pinctrl-ns", ++ .pctlops = &ns_pinctrl_ops, ++ .pmxops = &ns_pinctrl_pmxops, ++}; ++ ++static const struct of_device_id ns_pinctrl_of_match_table[] = { ++ { .compatible = "brcm,bcm4708-pinmux", .data = (void *)FLAG_BCM4708, }, ++ { .compatible = "brcm,bcm4709-pinmux", .data = (void *)FLAG_BCM4709, }, ++ { .compatible = "brcm,bcm53012-pinmux", .data = (void *)FLAG_BCM53012, }, ++ { } ++}; ++ ++static int ns_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ const struct of_device_id *of_id; ++ struct ns_pinctrl *ns_pinctrl; ++ struct pinctrl_desc *pctldesc; ++ struct pinctrl_pin_desc *pin; ++ struct ns_pinctrl_group *group; ++ struct ns_pinctrl_function *function; ++ struct resource *res; ++ int i; ++ ++ ns_pinctrl = devm_kzalloc(dev, sizeof(*ns_pinctrl), GFP_KERNEL); ++ if (!ns_pinctrl) ++ return -ENOMEM; ++ pctldesc = &ns_pinctrl->pctldesc; ++ platform_set_drvdata(pdev, ns_pinctrl); ++ ++ /* Set basic properties */ ++ ++ ns_pinctrl->dev = dev; ++ ++ of_id = of_match_device(ns_pinctrl_of_match_table, dev); ++ if (!of_id) ++ return -EINVAL; ++ ns_pinctrl->chipset_flag = (unsigned int)of_id->data; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, ++ "cru_gpio_control"); ++ ns_pinctrl->base = devm_ioremap_resource(dev, res); ++ if (IS_ERR(ns_pinctrl->base)) { ++ dev_err(dev, "Failed to map pinctrl regs\n"); ++ return PTR_ERR(ns_pinctrl->base); ++ } ++ ++ memcpy(pctldesc, &ns_pinctrl_desc, sizeof(*pctldesc)); ++ ++ /* Set pinctrl properties */ ++ ++ pctldesc->pins = devm_kcalloc(dev, ARRAY_SIZE(ns_pinctrl_pins), ++ sizeof(struct pinctrl_pin_desc), ++ GFP_KERNEL); ++ if (!pctldesc->pins) ++ return -ENOMEM; ++ for (i = 0, pin = (struct pinctrl_pin_desc *)&pctldesc->pins[0]; ++ i < ARRAY_SIZE(ns_pinctrl_pins); i++) { ++ const struct pinctrl_pin_desc *src = &ns_pinctrl_pins[i]; ++ unsigned int chipsets = (unsigned int)src->drv_data; ++ ++ if (chipsets & ns_pinctrl->chipset_flag) { ++ memcpy(pin++, src, sizeof(*src)); ++ pctldesc->npins++; ++ } ++ } ++ ++ ns_pinctrl->groups = devm_kcalloc(dev, ARRAY_SIZE(ns_pinctrl_groups), ++ sizeof(struct ns_pinctrl_group), ++ GFP_KERNEL); ++ if (!ns_pinctrl->groups) ++ return -ENOMEM; ++ for (i = 0, group = &ns_pinctrl->groups[0]; ++ i < ARRAY_SIZE(ns_pinctrl_groups); i++) { ++ const struct ns_pinctrl_group *src = &ns_pinctrl_groups[i]; ++ ++ if (src->chipsets & ns_pinctrl->chipset_flag) { ++ memcpy(group++, src, sizeof(*src)); ++ ns_pinctrl->num_groups++; ++ } ++ } ++ ++ ns_pinctrl->functions = devm_kcalloc(dev, ++ ARRAY_SIZE(ns_pinctrl_functions), ++ sizeof(struct ns_pinctrl_function), ++ GFP_KERNEL); ++ if (!ns_pinctrl->functions) ++ return -ENOMEM; ++ for (i = 0, function = &ns_pinctrl->functions[0]; ++ i < ARRAY_SIZE(ns_pinctrl_functions); i++) { ++ const struct ns_pinctrl_function *src = &ns_pinctrl_functions[i]; ++ ++ if (src->chipsets & ns_pinctrl->chipset_flag) { ++ memcpy(function++, src, sizeof(*src)); ++ ns_pinctrl->num_functions++; ++ } ++ } ++ ++ /* Register */ ++ ++ ns_pinctrl->pctldev = devm_pinctrl_register(dev, pctldesc, ns_pinctrl); ++ if (IS_ERR(ns_pinctrl->pctldev)) { ++ dev_err(dev, "Failed to register pinctrl\n"); ++ return PTR_ERR(ns_pinctrl->pctldev); ++ } ++ ++ return 0; ++} ++ ++static struct platform_driver ns_pinctrl_driver = { ++ .probe = ns_pinctrl_probe, ++ .driver = { ++ .name = "ns-pinmux", ++ .of_match_table = ns_pinctrl_of_match_table, ++ }, ++}; ++ ++module_platform_driver(ns_pinctrl_driver); ++ ++MODULE_AUTHOR("Rafał Miłecki"); ++MODULE_LICENSE("GPL v2"); ++MODULE_DEVICE_TABLE(of, ns_pinctrl_of_match_table); diff --git a/target/linux/bcm53xx/patches-4.19/080-v4.20-0002-pinctrl-bcm-ns-Use-uintptr_t-for-casting-data.patch b/target/linux/bcm53xx/patches-4.19/080-v4.20-0002-pinctrl-bcm-ns-Use-uintptr_t-for-casting-data.patch new file mode 100644 index 0000000000..afaed68d05 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/080-v4.20-0002-pinctrl-bcm-ns-Use-uintptr_t-for-casting-data.patch @@ -0,0 +1,38 @@ +From ce7bdb957b8e3f1cbf0a3358f1deef385dff6502 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Thu, 11 Oct 2018 13:23:40 +0200 +Subject: [PATCH] pinctrl: bcm: ns: Use uintptr_t for casting data +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Fix up a compiler error on 64bit architectures where pointers +and integers differ in size. + +Suggested-by: Arnd Bergmann <arnd@arndb.de> +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Signed-off-by: Linus Walleij <linus.walleij@linaro.org> +--- + drivers/pinctrl/bcm/pinctrl-ns.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/pinctrl/bcm/pinctrl-ns.c ++++ b/drivers/pinctrl/bcm/pinctrl-ns.c +@@ -285,7 +285,7 @@ static int ns_pinctrl_probe(struct platf + of_id = of_match_device(ns_pinctrl_of_match_table, dev); + if (!of_id) + return -EINVAL; +- ns_pinctrl->chipset_flag = (unsigned int)of_id->data; ++ ns_pinctrl->chipset_flag = (uintptr_t)of_id->data; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + "cru_gpio_control"); +@@ -307,7 +307,7 @@ static int ns_pinctrl_probe(struct platf + for (i = 0, pin = (struct pinctrl_pin_desc *)&pctldesc->pins[0]; + i < ARRAY_SIZE(ns_pinctrl_pins); i++) { + const struct pinctrl_pin_desc *src = &ns_pinctrl_pins[i]; +- unsigned int chipsets = (unsigned int)src->drv_data; ++ unsigned int chipsets = (uintptr_t)src->drv_data; + + if (chipsets & ns_pinctrl->chipset_flag) { + memcpy(pin++, src, sizeof(*src)); diff --git a/target/linux/bcm53xx/patches-4.19/081-v4.21-0001-pinctrl-bcm-ns-support-updated-DT-binding-as-syscon-.patch b/target/linux/bcm53xx/patches-4.19/081-v4.21-0001-pinctrl-bcm-ns-support-updated-DT-binding-as-syscon-.patch new file mode 100644 index 0000000000..45595bddc9 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/081-v4.21-0001-pinctrl-bcm-ns-support-updated-DT-binding-as-syscon-.patch @@ -0,0 +1,99 @@ +From a49d784d5a8272d0f63c448fe8dc69e589db006e Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Tue, 18 Dec 2018 16:58:08 +0100 +Subject: [PATCH] pinctrl: bcm: ns: support updated DT binding as syscon + subnode +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Documentation has been recently updated specifying that pinctrl should +be subnode of the CRU "syscon". Support that by using parent node for +regmap and reading "offset" property from the DT. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +Signed-off-by: Linus Walleij <linus.walleij@linaro.org> +--- + drivers/pinctrl/bcm/pinctrl-ns.c | 29 +++++++++++++++++++---------- + 1 file changed, 19 insertions(+), 10 deletions(-) + +--- a/drivers/pinctrl/bcm/pinctrl-ns.c ++++ b/drivers/pinctrl/bcm/pinctrl-ns.c +@@ -5,6 +5,7 @@ + + #include <linux/err.h> + #include <linux/io.h> ++#include <linux/mfd/syscon.h> + #include <linux/module.h> + #include <linux/of.h> + #include <linux/of_device.h> +@@ -12,6 +13,7 @@ + #include <linux/pinctrl/pinctrl.h> + #include <linux/pinctrl/pinmux.h> + #include <linux/platform_device.h> ++#include <linux/regmap.h> + #include <linux/slab.h> + + #define FLAG_BCM4708 BIT(1) +@@ -22,7 +24,8 @@ struct ns_pinctrl { + struct device *dev; + unsigned int chipset_flag; + struct pinctrl_dev *pctldev; +- void __iomem *base; ++ struct regmap *regmap; ++ u32 offset; + + struct pinctrl_desc pctldesc; + struct ns_pinctrl_group *groups; +@@ -229,9 +232,9 @@ static int ns_pinctrl_set_mux(struct pin + unset |= BIT(pin_number); + } + +- tmp = readl(ns_pinctrl->base); ++ regmap_read(ns_pinctrl->regmap, ns_pinctrl->offset, &tmp); + tmp &= ~unset; +- writel(tmp, ns_pinctrl->base); ++ regmap_write(ns_pinctrl->regmap, ns_pinctrl->offset, tmp); + + return 0; + } +@@ -263,13 +266,13 @@ static const struct of_device_id ns_pinc + static int ns_pinctrl_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; ++ struct device_node *np = dev->of_node; + const struct of_device_id *of_id; + struct ns_pinctrl *ns_pinctrl; + struct pinctrl_desc *pctldesc; + struct pinctrl_pin_desc *pin; + struct ns_pinctrl_group *group; + struct ns_pinctrl_function *function; +- struct resource *res; + int i; + + ns_pinctrl = devm_kzalloc(dev, sizeof(*ns_pinctrl), GFP_KERNEL); +@@ -287,12 +290,18 @@ static int ns_pinctrl_probe(struct platf + return -EINVAL; + ns_pinctrl->chipset_flag = (uintptr_t)of_id->data; + +- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, +- "cru_gpio_control"); +- ns_pinctrl->base = devm_ioremap_resource(dev, res); +- if (IS_ERR(ns_pinctrl->base)) { +- dev_err(dev, "Failed to map pinctrl regs\n"); +- return PTR_ERR(ns_pinctrl->base); ++ ns_pinctrl->regmap = syscon_node_to_regmap(of_get_parent(np)); ++ if (IS_ERR(ns_pinctrl->regmap)) { ++ int err = PTR_ERR(ns_pinctrl->regmap); ++ ++ dev_err(dev, "Failed to map pinctrl regs: %d\n", err); ++ ++ return err; ++ } ++ ++ if (of_property_read_u32(np, "offset", &ns_pinctrl->offset)) { ++ dev_err(dev, "Failed to get register offset\n"); ++ return -ENOENT; + } + + memcpy(pctldesc, &ns_pinctrl_desc, sizeof(*pctldesc)); diff --git a/target/linux/bcm53xx/patches-4.19/180-usb-xhci-add-support-for-performing-fake-doorbell.patch b/target/linux/bcm53xx/patches-4.19/180-usb-xhci-add-support-for-performing-fake-doorbell.patch new file mode 100644 index 0000000000..89b4cc8d97 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/180-usb-xhci-add-support-for-performing-fake-doorbell.patch @@ -0,0 +1,137 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Sat, 1 Oct 2016 22:54:48 +0200 +Subject: [PATCH] usb: xhci: add support for performing fake doorbell + +Broadcom's Northstar XHCI controllers seem to need a special start +procedure to work correctly. There isn't any official documentation of +this, the problem is that controller doesn't detect any connected +devices with default setup. Moreover connecting USB device to controller +that doesn't run properly can cause SoC's watchdog issues. + +A workaround that was successfully tested on multiple devices is to +perform a fake doorbell. This patch adds code for doing this and enables +it on BCM4708 family. +--- + drivers/usb/host/xhci-plat.c | 6 +++++ + drivers/usb/host/xhci.c | 63 +++++++++++++++++++++++++++++++++++++++++--- + drivers/usb/host/xhci.h | 1 + + 3 files changed, 67 insertions(+), 3 deletions(-) + +--- a/drivers/usb/host/xhci-plat.c ++++ b/drivers/usb/host/xhci-plat.c +@@ -65,12 +65,18 @@ static int xhci_priv_resume_quirk(struct + + static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci) + { ++ struct platform_device *pdev = to_platform_device(dev); ++ struct device_node *node = pdev->dev.of_node; ++ + /* + * As of now platform drivers don't provide MSI support so we ensure + * here that the generic code does not try to make a pci_dev from our + * dev struct in order to setup MSI + */ + xhci->quirks |= XHCI_PLAT; ++ ++ if (node && of_machine_is_compatible("brcm,bcm4708")) ++ xhci->quirks |= XHCI_FAKE_DOORBELL; + } + + /* called during probe() after chip reset completes */ +--- a/drivers/usb/host/xhci.c ++++ b/drivers/usb/host/xhci.c +@@ -158,6 +158,49 @@ int xhci_start(struct xhci_hcd *xhci) + return ret; + } + ++/** ++ * xhci_fake_doorbell - Perform a fake doorbell on a specified slot ++ * ++ * Some controllers require a fake doorbell to start correctly. Without that ++ * they simply don't detect any devices. ++ */ ++static int xhci_fake_doorbell(struct xhci_hcd *xhci, int slot_id) ++{ ++ u32 temp; ++ ++ /* Alloc a virt device for that slot */ ++ if (!xhci_alloc_virt_device(xhci, slot_id, NULL, GFP_NOIO)) { ++ xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n"); ++ return -ENOMEM; ++ } ++ ++ /* Ring fake doorbell for slot_id ep 0 */ ++ xhci_ring_ep_doorbell(xhci, slot_id, 0, 0); ++ usleep_range(1000, 1500); ++ ++ /* Read the status to check if HSE is set or not */ ++ temp = readl(&xhci->op_regs->status); ++ ++ /* Clear HSE if set */ ++ if (temp & STS_FATAL) { ++ xhci_dbg(xhci, "HSE problem detected, status: 0x%08x\n", temp); ++ temp &= ~0x1fff; ++ temp |= STS_FATAL; ++ writel(temp, &xhci->op_regs->status); ++ usleep_range(1000, 1500); ++ readl(&xhci->op_regs->status); ++ } ++ ++ /* Free virt device */ ++ xhci_free_virt_device(xhci, slot_id); ++ ++ /* We're done if controller is already running */ ++ if (readl(&xhci->op_regs->command) & CMD_RUN) ++ return 0; ++ ++ return xhci_start(xhci); ++} ++ + /* + * Reset a halted HC. + * +@@ -605,10 +648,20 @@ static int xhci_init(struct usb_hcd *hcd + + static int xhci_run_finished(struct xhci_hcd *xhci) + { +- if (xhci_start(xhci)) { +- xhci_halt(xhci); +- return -ENODEV; ++ int err; ++ ++ err = xhci_start(xhci); ++ if (err) { ++ err = -ENODEV; ++ goto err_halt; + } ++ ++ if (xhci->quirks & XHCI_FAKE_DOORBELL) { ++ err = xhci_fake_doorbell(xhci, 1); ++ if (err) ++ goto err_halt; ++ } ++ + xhci->shared_hcd->state = HC_STATE_RUNNING; + xhci->cmd_ring_state = CMD_RING_STATE_RUNNING; + +@@ -618,6 +671,10 @@ static int xhci_run_finished(struct xhci + xhci_dbg_trace(xhci, trace_xhci_dbg_init, + "Finished xhci_run for USB3 roothub"); + return 0; ++ ++err_halt: ++ xhci_halt(xhci); ++ return err; + } + + /* +--- a/drivers/usb/host/xhci.h ++++ b/drivers/usb/host/xhci.h +@@ -1848,6 +1848,7 @@ struct xhci_hcd { + #define XHCI_ZERO_64B_REGS BIT_ULL(32) + #define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34) + #define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35) ++#define XHCI_FAKE_DOORBELL BIT_ULL(36) + + unsigned int num_active_eps; + unsigned int limit_active_eps; diff --git a/target/linux/bcm53xx/patches-4.19/300-ARM-BCM5301X-Disable-MMU-and-Dcache-during-decompres.patch b/target/linux/bcm53xx/patches-4.19/300-ARM-BCM5301X-Disable-MMU-and-Dcache-during-decompres.patch new file mode 100644 index 0000000000..034d5b52fc --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/300-ARM-BCM5301X-Disable-MMU-and-Dcache-during-decompres.patch @@ -0,0 +1,101 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Wed, 24 Sep 2014 22:14:07 +0200 +Subject: [PATCH] ARM: BCM5301X: Disable MMU and Dcache during decompression +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Broadcom devices have broken CFE (bootloader) that leaves hardware in an +invalid state. It causes problems with booting Linux. On Northstar +devices kernel was randomly hanging in ~25% of tries during early init. +Hangs used to happen at random places in the start_kernel. On BCM53573 +kernel doesn't even seem to start booting. + +To workaround this problem we need to do following very early: +1) Clear 2 following bits in the SCTLR register: +#define CR_M (1 << 0) /* MMU enable */ +#define CR_C (1 << 2) /* Dcache enable */ +2) Flush the whole D-cache +3) Disable L2 cache + +Unfortunately this patch is not upstreamable as it does above things +unconditionally. We can't check if we are running on Broadcom platform +in any safe way and doing such hacks with ARCH_MULTI_V7 is unacceptable +as it could break other devices support. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +--- + +--- a/arch/arm/boot/compressed/Makefile ++++ b/arch/arm/boot/compressed/Makefile +@@ -35,6 +35,11 @@ ifeq ($(CONFIG_ARCH_ACORN),y) + OBJS += ll_char_wr.o font.o + endif + ++ifeq ($(CONFIG_ARCH_BCM_5301X),y) ++OBJS += head-bcm_5301x-mpcore.o ++OBJS += cache-v7-min.o ++endif ++ + ifeq ($(CONFIG_ARCH_SA1100),y) + OBJS += head-sa1100.o + endif +--- /dev/null ++++ b/arch/arm/boot/compressed/head-bcm_5301x-mpcore.S +@@ -0,0 +1,37 @@ ++/* ++ * ++ * Platform specific tweaks. This is merged into head.S by the linker. ++ * ++ */ ++ ++#include <linux/linkage.h> ++#include <asm/assembler.h> ++#include <asm/cp15.h> ++ ++ .section ".start", "ax" ++ ++/* ++ * This code section is spliced into the head code by the linker ++ */ ++ ++__plat_uncompress_start: ++ ++ @ Preserve r8/r7 i.e. kernel entry values ++ mov r12, r8 ++ ++ @ Clear MMU enable and Dcache enable bits ++ mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR ++ bic r0, #CR_C|CR_M ++ mcr p15, 0, r0, c1, c0, 0 @ Write SCTLR ++ nop ++ ++ @ Call the cache invalidation routine ++ bl v7_flush_dcache_all ++ nop ++ mov r0,#0 ++ ldr r3, =0x19022000 @ L2 cache controller, control reg ++ str r0, [r3, #0x100] @ Disable L2 cache ++ nop ++ ++ @ Restore ++ mov r8, r12 +--- a/arch/arm/boot/compressed/cache-v7-min.S ++++ b/arch/arm/boot/compressed/cache-v7-min.S +@@ -12,6 +12,7 @@ + + #include <linux/linkage.h> + #include <linux/init.h> ++#include <asm/assembler.h> + + __INIT + +@@ -63,7 +64,7 @@ loop2: + ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11 + THUMB( lsl r6, r9, r2 ) + THUMB( orr r11, r11, r6 ) @ factor index number into r11 +- mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way ++ mcr p15, 0, r11, c7, c6, 2 @ clean & invalidate by set/way + subs r9, r9, #1 @ decrement the index + bge loop2 + subs r4, r4, #1 @ decrement the way diff --git a/target/linux/bcm53xx/patches-4.19/302-ARM-dts-BCM5301X-Update-Northstar-pinctrl-binding.patch b/target/linux/bcm53xx/patches-4.19/302-ARM-dts-BCM5301X-Update-Northstar-pinctrl-binding.patch new file mode 100644 index 0000000000..d1d287588c --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/302-ARM-dts-BCM5301X-Update-Northstar-pinctrl-binding.patch @@ -0,0 +1,31 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Subject: [PATCH] ARM: dts: BCM5301X: Update Northstar pinctrl binding +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +--- + +--- a/arch/arm/boot/dts/bcm5301x.dtsi ++++ b/arch/arm/boot/dts/bcm5301x.dtsi +@@ -400,16 +400,12 @@ + #size-cells = <1>; + + cru@100 { +- compatible = "simple-bus"; ++ compatible = "syscon", "simple-mfd"; + reg = <0x100 0x1a4>; +- ranges; +- #address-cells = <1>; +- #size-cells = <1>; + +- pin-controller@1c0 { ++ pinctrl { + compatible = "brcm,bcm4708-pinmux"; +- reg = <0x1c0 0x24>; +- reg-names = "cru_gpio_control"; ++ offset = <0xc0>; + + spi-pins { + groups = "spi_grp"; diff --git a/target/linux/bcm53xx/patches-4.19/310-ARM-BCM5301X-Add-DT-for-Netgear-R7900.patch b/target/linux/bcm53xx/patches-4.19/310-ARM-BCM5301X-Add-DT-for-Netgear-R7900.patch new file mode 100644 index 0000000000..fca2b88ed8 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/310-ARM-BCM5301X-Add-DT-for-Netgear-R7900.patch @@ -0,0 +1,64 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> +Subject: [PATCH] ARM: BCM5301X: Add DT for Netgear R7900 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Rafał Miłecki <zajec5@gmail.com> +--- + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -104,6 +104,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ + bcm4709-buffalo-wxr-1900dhp.dtb \ + bcm4709-linksys-ea9200.dtb \ + bcm4709-netgear-r7000.dtb \ ++ bcm4709-netgear-r7900.dtb \ + bcm4709-netgear-r8000.dtb \ + bcm4709-tplink-archer-c9-v1.dtb \ + bcm47094-dlink-dir-885l.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/bcm4709-netgear-r7900.dts +@@ -0,0 +1,42 @@ ++/* ++ * Broadcom BCM470X / BCM5301X ARM platform code. ++ * DTS for Netgear R7900 ++ * ++ * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com> ++ * ++ * Licensed under the GNU/GPL. See COPYING for details. ++ */ ++ ++/dts-v1/; ++ ++#include "bcm4709.dtsi" ++#include "bcm5301x-nand-cs0-bch8.dtsi" ++ ++/ { ++ compatible = "netgear,r7900", "brcm,bcm4709", "brcm,bcm4708"; ++ model = "Netgear R7900"; ++ ++ chosen { ++ bootargs = "console=ttyS0,115200"; ++ }; ++ ++ memory { ++ reg = <0x00000000 0x08000000 ++ 0x88000000 0x08000000>; ++ }; ++ ++ axi@18000000 { ++ usb3@23000 { ++ reg = <0x00023000 0x1000>; ++ ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; diff --git a/target/linux/bcm53xx/patches-4.19/311-ARM-BCM5301X-Add-power-button-for-Buffalo-WZR-1750DHP.patch b/target/linux/bcm53xx/patches-4.19/311-ARM-BCM5301X-Add-power-button-for-Buffalo-WZR-1750DHP.patch new file mode 100644 index 0000000000..5ebc7f89f2 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/311-ARM-BCM5301X-Add-power-button-for-Buffalo-WZR-1750DHP.patch @@ -0,0 +1,20 @@ +From: Felix Fietkau <nbd@nbd.name> +Subject: [PATCH] ARM: BCM5301X: Add power button for Buffalo WZR-1750DHP + +Signed-off-by: Felix Fietkau <nbd@nbd.name> +--- +--- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts ++++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts +@@ -101,6 +101,12 @@ + #address-cells = <1>; + #size-cells = <0>; + ++ power { ++ label = "Power"; ++ linux,code = <KEY_POWER>; ++ gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; ++ }; ++ + restart { + label = "Reset"; + linux,code = <KEY_RESTART>; diff --git a/target/linux/bcm53xx/patches-4.19/320-ARM-dts-BCM5301X-Add-serial-to-the-bootargs.patch b/target/linux/bcm53xx/patches-4.19/320-ARM-dts-BCM5301X-Add-serial-to-the-bootargs.patch new file mode 100644 index 0000000000..dc5faf2d27 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/320-ARM-dts-BCM5301X-Add-serial-to-the-bootargs.patch @@ -0,0 +1,92 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Subject: [PATCH] ARM: dts: BCM5301X: Add serial= to the bootargs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +It's enough to have proper stdout-path for getting serial working but +for some reason LEDE doesn't offer "Please press Enter to activate this +console." unless ttyS0 is specified. + +This is a workaround to get serial working in LEDE. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +--- + +--- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts ++++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts +@@ -12,7 +12,7 @@ + model = "TP-LINK Archer C5 V2"; + + chosen { +- bootargs = "earlycon"; ++ bootargs = "console=ttyS0,115200 earlycon"; + }; + + memory { +--- a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts ++++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts +@@ -13,7 +13,7 @@ + model = "Luxul ABR-4500 V1"; + + chosen { +- bootargs = "earlycon"; ++ bootargs = "console=ttyS0,115200 earlycon"; + }; + + memory { +--- a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts ++++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts +@@ -13,7 +13,7 @@ + model = "Luxul XBR-4500 V1"; + + chosen { +- bootargs = "earlycon"; ++ bootargs = "console=ttyS0,115200 earlycon"; + }; + + memory { +--- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts ++++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts +@@ -13,7 +13,7 @@ + model = "Luxul XAP-1440 V1"; + + chosen { +- bootargs = "earlycon"; ++ bootargs = "console=ttyS0,115200 earlycon"; + }; + + memory { +--- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts ++++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts +@@ -13,7 +13,7 @@ + model = "Luxul XAP-810 V1"; + + chosen { +- bootargs = "earlycon"; ++ bootargs = "console=ttyS0,115200 earlycon"; + }; + + memory { +--- a/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts ++++ b/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts +@@ -12,7 +12,7 @@ + model = "Luxul XAP-1610 V1"; + + chosen { +- bootargs = "earlycon"; ++ bootargs = "console=ttyS0,115200 earlycon"; + }; + + memory { +--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts ++++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts +@@ -13,7 +13,7 @@ + model = "Luxul XWR-3150 V1"; + + chosen { +- bootargs = "earlycon"; ++ bootargs = "console=ttyS0,115200 earlycon"; + }; + + memory { diff --git a/target/linux/bcm53xx/patches-4.19/321-ARM-dts-BCM5301X-Describe-partition-formats.patch b/target/linux/bcm53xx/patches-4.19/321-ARM-dts-BCM5301X-Describe-partition-formats.patch new file mode 100644 index 0000000000..66ae6dca33 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/321-ARM-dts-BCM5301X-Describe-partition-formats.patch @@ -0,0 +1,25 @@ +From 7166207bd1d8c46d09d640d46afc685df9bb9083 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Thu, 22 Nov 2018 09:21:49 +0100 +Subject: [PATCH] ARM: dts: BCM5301X: Describe partition formats +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +It's needed by OpenWrt for custom partitioning. + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +--- + arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts ++++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts +@@ -34,6 +34,7 @@ + partition@0 { + label = "firmware"; + reg = <0x00000000 0x08000000>; ++ compatible = "seama"; + }; + }; + }; diff --git a/target/linux/bcm53xx/patches-4.19/400-mtd-spi-nor-detect-JEDEC-incompatible-w25q128-using-.patch b/target/linux/bcm53xx/patches-4.19/400-mtd-spi-nor-detect-JEDEC-incompatible-w25q128-using-.patch new file mode 100644 index 0000000000..b23dae5026 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/400-mtd-spi-nor-detect-JEDEC-incompatible-w25q128-using-.patch @@ -0,0 +1,34 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> +Subject: [PATCH] mtd: spi-nor: detect JEDEC incompatible w25q128 using 0x90 + command +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Some w25q128 chipsets don't support RDID (0x9f) command, they reply with +0xff-s only. To suppose such flashes fallback to the 0x90 command. + +Signed-off-by: Rafał Miłecki <zajec5@gmail.com> +--- + +--- a/drivers/mtd/spi-nor/spi-nor.c ++++ b/drivers/mtd/spi-nor/spi-nor.c +@@ -1294,6 +1294,18 @@ static const struct flash_info *spi_nor_ + } + dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n", + id[0], id[1], id[2]); ++ ++ tmp = nor->read_reg(nor, 0x90, id, SPI_NOR_MAX_ID_LEN); ++ if (tmp < 0) { ++ dev_dbg(nor->dev, " error %d reading JEDEC ID\n", tmp); ++ return ERR_PTR(tmp); ++ } ++ dev_info(nor->dev, "using Read Manufacturer / Device ID command (0x%02x) returned %02x %02x\n", ++ 0x90, id[0x03], id[0x04]); ++ if (id[0x03] == 0xef && id[0x04] == 0x17) { ++ return spi_nor_match_id("w25q128"); ++ } ++ + return ERR_PTR(-ENODEV); + } + diff --git a/target/linux/bcm53xx/patches-4.19/500-UBI-Detect-EOF-mark-and-erase-all-remaining-blocks.patch b/target/linux/bcm53xx/patches-4.19/500-UBI-Detect-EOF-mark-and-erase-all-remaining-blocks.patch new file mode 100644 index 0000000000..6d7a45f7ba --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/500-UBI-Detect-EOF-mark-and-erase-all-remaining-blocks.patch @@ -0,0 +1,59 @@ +From 2a2af518266a29323cf30c3f9ba9ef2ceb1dd84b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> +Date: Thu, 16 Oct 2014 20:52:16 +0200 +Subject: [PATCH] UBI: Detect EOF mark and erase all remaining blocks +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Rafał Miłecki <zajec5@gmail.com> +--- + drivers/mtd/ubi/attach.c | 5 +++++ + drivers/mtd/ubi/io.c | 4 ++++ + drivers/mtd/ubi/ubi.h | 1 + + 3 files changed, 10 insertions(+) + +--- a/drivers/mtd/ubi/attach.c ++++ b/drivers/mtd/ubi/attach.c +@@ -95,6 +95,9 @@ static int self_check_ai(struct ubi_devi + #define AV_ADD BIT(1) + #define AV_FIND_OR_ADD (AV_FIND | AV_ADD) + ++/* Set on finding block with 0xdeadc0de, indicates erasing all blocks behind */ ++bool erase_all_next; ++ + /** + * find_or_add_av - internal function to find a volume, add a volume or do + * both (find and add if missing). +@@ -1592,6 +1595,8 @@ int ubi_attach(struct ubi_device *ubi, i + if (!ai) + return -ENOMEM; + ++ erase_all_next = false; ++ + #ifdef CONFIG_MTD_UBI_FASTMAP + /* On small flash devices we disable fastmap in any case. */ + if ((int)mtd_div_by_eb(ubi->mtd->size, ubi->mtd) <= UBI_FM_MAX_START) { +--- a/drivers/mtd/ubi/io.c ++++ b/drivers/mtd/ubi/io.c +@@ -723,6 +723,10 @@ int ubi_io_read_ec_hdr(struct ubi_device + } + + magic = be32_to_cpu(ec_hdr->magic); ++ if (magic == 0xdeadc0de) ++ erase_all_next = true; ++ if (erase_all_next) ++ return read_err ? UBI_IO_FF_BITFLIPS : UBI_IO_FF; + if (magic != UBI_EC_HDR_MAGIC) { + if (mtd_is_eccerr(read_err)) + return UBI_IO_BAD_HDR_EBADMSG; +--- a/drivers/mtd/ubi/ubi.h ++++ b/drivers/mtd/ubi/ubi.h +@@ -833,6 +833,7 @@ extern struct mutex ubi_devices_mutex; + extern struct blocking_notifier_head ubi_notifiers; + + /* attach.c */ ++extern bool erase_all_next; + struct ubi_ainf_peb *ubi_alloc_aeb(struct ubi_attach_info *ai, int pnum, + int ec); + void ubi_free_aeb(struct ubi_attach_info *ai, struct ubi_ainf_peb *aeb); diff --git a/target/linux/bcm53xx/patches-4.19/700-b53-add-hacky-CPU-port-fixes-for-devices-not-using-p.patch b/target/linux/bcm53xx/patches-4.19/700-b53-add-hacky-CPU-port-fixes-for-devices-not-using-p.patch new file mode 100644 index 0000000000..91bb4fae11 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/700-b53-add-hacky-CPU-port-fixes-for-devices-not-using-p.patch @@ -0,0 +1,52 @@ +From 4abdde3ad6bc0b3b157c4bf6ec0bf139d11d07e8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> +Date: Wed, 13 May 2015 14:13:28 +0200 +Subject: [PATCH] b53: add hacky CPU port fixes for devices not using port 5 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Rafał Miłecki <zajec5@gmail.com> +--- + drivers/net/phy/b53/b53_common.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/net/phy/b53/b53_common.c ++++ b/drivers/net/phy/b53/b53_common.c +@@ -28,6 +28,7 @@ + #include <linux/of.h> + #include <linux/of_net.h> + #include <linux/platform_data/b53.h> ++#include <linux/of.h> + + #include "b53_regs.h" + #include "b53_priv.h" +@@ -1579,6 +1580,28 @@ static int b53_switch_init(struct b53_de + return ret; + } + ++ /* Set correct CPU port */ ++ if (of_machine_is_compatible("asus,rt-ac87u")) ++ sw_dev->cpu_port = 7; ++ else if (of_machine_is_compatible("netgear,r7900")) ++ sw_dev->cpu_port = 8; ++ else if (of_machine_is_compatible("netgear,r8000")) ++ sw_dev->cpu_port = 8; ++ else if (of_machine_is_compatible("netgear,r8500")) ++ sw_dev->cpu_port = 8; ++ ++ /* Enable extra ports */ ++ if (of_machine_is_compatible("tenda,ac9")) ++ dev->enabled_ports |= BIT(5); ++ ++ /* ++ * Workaround for devices using port 8 (connected to the 3rd iface). ++ * For some reason it doesn't work (no packets on eth2). ++ */ ++ if (of_machine_is_compatible("netgear,r7900") || ++ of_machine_is_compatible("netgear,r8000")) ++ sw_dev->cpu_port = 5; ++ + dev->enabled_ports |= BIT(sw_dev->cpu_port); + sw_dev->ports = fls(dev->enabled_ports); + diff --git a/target/linux/bcm53xx/patches-4.19/905-BCM53573-minor-hacks.patch b/target/linux/bcm53xx/patches-4.19/905-BCM53573-minor-hacks.patch new file mode 100644 index 0000000000..8f4b3ac694 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.19/905-BCM53573-minor-hacks.patch @@ -0,0 +1,80 @@ +From 6f1c62440eb6846cb8045d7a5480ec7bbe47c96f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Mon, 15 Aug 2016 10:30:41 +0200 +Subject: [PATCH] BCM53573 minor hacks +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Rafał Miłecki <rafal@milecki.pl> +--- + +--- a/arch/arm/boot/dts/bcm53573.dtsi ++++ b/arch/arm/boot/dts/bcm53573.dtsi +@@ -53,6 +53,7 @@ + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; ++ clocks = <&ilp>; + }; + + clocks { +--- a/drivers/bcma/main.c ++++ b/drivers/bcma/main.c +@@ -348,14 +348,6 @@ static int bcma_register_devices(struct + } + #endif + +-#ifdef CONFIG_BCMA_SFLASH +- if (bus->drv_cc.sflash.present) { +- err = platform_device_register(&bcma_sflash_dev); +- if (err) +- bcma_err(bus, "Error registering serial flash\n"); +- } +-#endif +- + #ifdef CONFIG_BCMA_NFLASH + if (bus->drv_cc.nflash.present) { + err = platform_device_register(&bcma_nflash_dev); +@@ -436,6 +428,14 @@ int bcma_bus_register(struct bcma_bus *b + bcma_register_core(bus, core); + } + ++#ifdef CONFIG_BCMA_SFLASH ++ if (bus->drv_cc.sflash.present) { ++ err = platform_device_register(&bcma_sflash_dev); ++ if (err) ++ bcma_err(bus, "Error registering serial flash\n"); ++ } ++#endif ++ + /* Try to get SPROM */ + err = bcma_sprom_get(bus); + if (err == -ENOENT) { +--- a/drivers/clocksource/arm_arch_timer.c ++++ b/drivers/clocksource/arm_arch_timer.c +@@ -17,6 +17,7 @@ + #include <linux/smp.h> + #include <linux/cpu.h> + #include <linux/cpu_pm.h> ++#include <linux/clk.h> + #include <linux/clockchips.h> + #include <linux/clocksource.h> + #include <linux/interrupt.h> +@@ -864,6 +865,16 @@ static void arch_timer_of_configure_rate + if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) + arch_timer_rate = rate; + ++ /* Get clk rate through clk driver if present */ ++ if (!arch_timer_rate) { ++ struct clk *clk = of_clk_get(np, 0); ++ ++ if (!IS_ERR(clk)) { ++ if (!clk_prepare_enable(clk)) ++ arch_timer_rate = clk_get_rate(clk); ++ } ++ } ++ + /* Check the timer frequency. */ + if (arch_timer_rate == 0) + pr_warn("frequency not available\n"); |