diff options
author | Michael Lee <igvtee@gmail.com> | 2016-01-08 21:15:27 +0800 |
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committer | John Crispin <john@phrozen.org> | 2016-06-13 22:51:42 +0200 |
commit | 42bbe28cf1133ac884eb4ec1fdafdebd5700ca64 (patch) | |
tree | faf9b774800b608470e406f52835ace10b2d9a2f | |
parent | 011ce1fad6d7048a3fa9015ce8b8f8c64cb2f022 (diff) | |
download | upstream-42bbe28cf1133ac884eb4ec1fdafdebd5700ca64.tar.gz upstream-42bbe28cf1133ac884eb4ec1fdafdebd5700ca64.tar.bz2 upstream-42bbe28cf1133ac884eb4ec1fdafdebd5700ca64.zip |
ramips: add i2c clock
Signed-off-by: Michael Lee <igvtee@gmail.com>
-rw-r--r-- | target/linux/ramips/patches-4.4/0720-arch-mips-ralink-add-i2c-clocks.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-4.4/0720-arch-mips-ralink-add-i2c-clocks.patch b/target/linux/ramips/patches-4.4/0720-arch-mips-ralink-add-i2c-clocks.patch new file mode 100644 index 0000000000..3958836860 --- /dev/null +++ b/target/linux/ramips/patches-4.4/0720-arch-mips-ralink-add-i2c-clocks.patch @@ -0,0 +1,40 @@ +--- a/arch/mips/ralink/mt7620.c ++++ b/arch/mips/ralink/mt7620.c +@@ -446,6 +446,7 @@ void __init ralink_clk_init(void) + ralink_clk_add("cpu", cpu_rate); + ralink_clk_add("10000100.timer", periph_rate); + ralink_clk_add("10000120.watchdog", periph_rate); ++ ralink_clk_add("10000900.i2c", periph_rate); + ralink_clk_add("10000b00.spi", sys_rate); + ralink_clk_add("10000b40.spi", sys_rate); + ralink_clk_add("10000c00.uartlite", periph_rate); +--- a/arch/mips/ralink/rt288x.c ++++ b/arch/mips/ralink/rt288x.c +@@ -75,6 +75,7 @@ void __init ralink_clk_init(void) + ralink_clk_add("300100.timer", cpu_rate / 2); + ralink_clk_add("300120.watchdog", cpu_rate / 2); + ralink_clk_add("300500.uart", cpu_rate / 2); ++ ralink_clk_add("300900.i2c", cpu_rate / 2); + ralink_clk_add("300c00.uartlite", cpu_rate / 2); + ralink_clk_add("400000.ethernet", cpu_rate / 2); + ralink_clk_add("480000.wmac", wmac_rate); +--- a/arch/mips/ralink/rt305x.c ++++ b/arch/mips/ralink/rt305x.c +@@ -200,6 +200,7 @@ void __init ralink_clk_init(void) + + ralink_clk_add("cpu", cpu_rate); + ralink_clk_add("sys", sys_rate); ++ ralink_clk_add("10000900.i2c", uart_rate); + ralink_clk_add("10000b00.spi", sys_rate); + ralink_clk_add("10000b40.spi", sys_rate); + ralink_clk_add("10000100.timer", wdt_rate); +--- a/arch/mips/ralink/rt3883.c ++++ b/arch/mips/ralink/rt3883.c +@@ -108,6 +108,7 @@ void __init ralink_clk_init(void) + ralink_clk_add("10000100.timer", sys_rate); + ralink_clk_add("10000120.watchdog", sys_rate); + ralink_clk_add("10000500.uart", 40000000); ++ ralink_clk_add("10000900.i2c", 40000000); + ralink_clk_add("10000b00.spi", sys_rate); + ralink_clk_add("10000b40.spi", sys_rate); + ralink_clk_add("10000c00.uartlite", 40000000); |