aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/lantiq/dts/P2812HNUFX.dtsi
blob: d93e862b3a1679c8a27a3a2123021a7ec5b9b583 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
/include/ "vr9.dtsi"

/ {
	chosen {
		bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
	};

	memory@0 {
		reg = <0x0 0x8000000>;
	};

        fpi@10000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "lantiq,fpi", "simple-bus";
		ranges = <0x0 0x10000000 0xEEFFFFF>;
		reg = <0x10000000 0xEF00000>;

		localbus@0 {
			#address-cells = <2>;
			#size-cells = <1>;
			ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
				1 0 0x4000000 0x4000010>; /* addsel1 */
			compatible = "lantiq,localbus", "simple-bus";
		};

		gpio: pinmux@E100B10 {
			compatible = "lantiq,pinctrl-xr9";
			pinctrl-names = "default";
			pinctrl-0 = <&state_default>;
			
			interrupt-parent = <&icu0>;
			interrupts = <166 135 66 40 41 42 38>;

			#gpio-cells = <2>;
			gpio-controller;
			reg = <0xE100B10 0xA0>;

			state_default: pinmux {
				exin3 {
					lantiq,groups = "exin3";
					lantiq,function = "exin";
				};
				mdio {
					lantiq,groups = "mdio";
					lantiq,function = "mdio";
				};
				gphy-leds {
					lantiq,groups = "gphy0 led1", "gphy1 led1",
							"gphy0 led2", "gphy1 led2";
					lantiq,function = "gphy";
					lantiq,pull = <2>;
					lantiq,open-drain = <0>;
					lantiq,output = <1>;
				};
				stp {
					lantiq,groups = "stp";
					lantiq,function = "stp";
					lantiq,pull = <2>;
					lantiq,open-drain = <0>;
					lantiq,output = <1>;
				};
				pci-in {
					lantiq,groups = "req1";
					lantiq,function = "pci";
					lantiq,output = <0>;
					lantiq,open-drain = <1>;
					lantiq,pull = <2>;
				};
				pci-out {
					lantiq,groups = "gnt1";
					lantiq,function = "pci";
					lantiq,output = <1>;
					lantiq,open-drain = <0>;
					lantiq,pull = <0>;
				};
				pci_rst {
					lantiq,pins = "io21";
					lantiq,output = <1>;
					lantiq,open-drain = <0>;
					lantiq,pull = <2>;
				};
				pcie-rst {
					lantiq,pins = "io38";
					lantiq,pull = <0>;
					lantiq,output = <1>;
				};
				ifxhcd-rst {
					lantiq,pins = "io33";
					lantiq,pull = <0>;
					lantiq,open-drain = <0>;
					lantiq,output = <1>;
				};
				nand_out {
					lantiq,groups = "nand cle", "nand ale";
					lantiq,function = "ebu";
					lantiq,output = <1>;
					lantiq,open-drain = <0>;
					lantiq,pull = <0>;
				};
				nand_cs1 {
					lantiq,groups = "nand cs1";
					lantiq,function = "ebu";
					lantiq,open-drain = <0>;
					lantiq,pull = <0>;
				};
			};
		};

		eth@E108000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "lantiq,xrx200-net";
			reg = < 0xE108000 0x3000	/* switch */
				0xE10B100 0x70		/* mdio */
				0xE10B1D8 0x30		/* mii */
				0xE10B308 0x30 >;	/* pmac */
			interrupt-parent = <&icu0>;
			interrupts = <73 72>;

			lan: interface@0 {
				compatible = "lantiq,xrx200-pdi";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0>;
				mac-address = [ 00 11 22 33 44 55 ];
				lantiq,switch;

				ethernet@0 {
					compatible = "lantiq,xrx200-pdi-port";
					reg = <0>;
					phy-mode = "rgmii";
					phy-handle = <&phy0>;
				};
				ethernet@1 {
					compatible = "lantiq,xrx200-pdi-port";
					reg = <1>;
					phy-mode = "rgmii";
					phy-handle = <&phy1>;
				};
				ethernet@2 {
					compatible = "lantiq,xrx200-pdi-port";
					reg = <2>;
					phy-mode = "gmii";
					phy-handle = <&phy11>;
				};
				ethernet@4 {
					compatible = "lantiq,xrx200-pdi-port";
					reg = <4>;
					phy-mode = "gmii";
					phy-handle = <&phy13>;
				};
				ethernet@5 {
					compatible = "lantiq,xrx200-pdi-port";
					reg = <5>;
					phy-mode = "rgmii";
					phy-handle = <&phy5>;
				};
			};

			mdio@0 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "lantiq,xrx200-mdio";

				phy0: ethernet-phy@0 {
					reg = <0x0>;
					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
				};
				phy1: ethernet-phy@1 {
					reg = <0x1>;
					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
				};
				phy5: ethernet-phy@5 {
					reg = <0x5>;
					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
				};
				phy11: ethernet-phy@11 {
					reg = <0x11>;
					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
				};
				phy13: ethernet-phy@13 {
					reg = <0x13>;
					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
				};
			};
		};

		stp: stp@E100BB0 {
			compatible = "lantiq,gpio-stp-xway";
			reg = <0xE100BB0 0x40>;
			#gpio-cells = <2>;
			gpio-controller;

			lantiq,shadow = <0xffffff>;
			lantiq,groups = <0x7>;
			lantiq,dsl = <0x0>;
			lantiq,phy1 = <0x0>;
			lantiq,phy2 = <0x0>;
		};

		ifxhcd@E101000 {
			status = "okay";
			gpios = <&gpio 33 0>;
			lantiq,portmask = <0x3>;
		};

		ifxhcd@E106000 {
			status = "okay";
			gpios = <&gpio 33 0>;
		};

		pci@E105400 {
			status = "okay";
			#address-cells = <3>;
			#size-cells = <2>;
			#interrupt-cells = <1>;
			compatible = "lantiq,pci-xway";
			bus-range = <0x0 0x0>;
			ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000   /* pci memory */
				0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
			reg = <0x7000000 0x8000         /* config space */
				0xE105400 0x400>;       /* pci bridge */
			lantiq,bus-clock = <33333333>;
			/*lantiq,external-clock;*/
			lantiq,delay-hi = <0>; /* 0ns delay */
			lantiq,delay-lo = <0>; /* 0.0ns delay */
			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
			interrupt-map = <
				0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30
				>;
			gpio-reset = <&gpio 21 0>;
			req-mask = <0x1>;	/* GNT1 */
		};
	};

	gphy-xrx200 {
		compatible = "lantiq,phy-xrx200";
		firmware1 = "lantiq/vr9_phy11g_a1x.bin";	/*VR9 1.1*/
		firmware2 = "lantiq/vr9_phy11g_a2x.bin";	/*VR9 1.2*/
		phys = [ 00 01 ];
	};

	gpio-keys-polled {
		compatible = "gpio-keys-polled";
		#address-cells = <1>;
		#size-cells = <0>;
		poll-interval = <100>;

		reset {
			label = "reset";
			gpios = <&gpio 39 1>;
			linux,code = <0x198>;
		};

		rfkill {
			label = "rfkill";
			gpios = <&gpio 1 1>;
			linux,code = <0xf7>;
		};
	};
};