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author | James <> | 2013-03-17 12:16:37 +0000 |
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committer | James <> | 2013-03-17 12:16:37 +0000 |
commit | 27b76ab0671089c47506615a796a261e993896a7 (patch) | |
tree | 61213d67e7fa87b20356b23798558e2c4212c42f /package/boot/kexec-tools/patches | |
download | trunk-36060-master.tar.gz trunk-36060-master.tar.bz2 trunk-36060-master.zip |
Diffstat (limited to 'package/boot/kexec-tools/patches')
3 files changed, 268 insertions, 0 deletions
diff --git a/package/boot/kexec-tools/patches/.svn/entries b/package/boot/kexec-tools/patches/.svn/entries new file mode 100644 index 0000000..a6d2354 --- /dev/null +++ b/package/boot/kexec-tools/patches/.svn/entries @@ -0,0 +1,62 @@ +10 + +dir +36060 +svn://svn.openwrt.org/openwrt/trunk/package/boot/kexec-tools/patches +svn://svn.openwrt.org/openwrt + + + +2012-10-16T13:44:25.630275Z +33781 +blogic + + + + + + + + + + + + + + +3c298f89-4303-0410-b956-a3cf2f4a3e73 + +0004-mips_regdefs.patch +file + + + + +2013-03-17T12:13:21.000000Z +33113e08f846ec68e08370825d881eab +2012-10-16T13:44:25.630275Z +33781 +blogic + + + + + + + + + + + + + + + + + + + + + +2919 + diff --git a/package/boot/kexec-tools/patches/.svn/text-base/0004-mips_regdefs.patch.svn-base b/package/boot/kexec-tools/patches/.svn/text-base/0004-mips_regdefs.patch.svn-base new file mode 100644 index 0000000..7e21349 --- /dev/null +++ b/package/boot/kexec-tools/patches/.svn/text-base/0004-mips_regdefs.patch.svn-base @@ -0,0 +1,103 @@ +--- /dev/null ++++ b/kexec/arch/mips/regdef.h +@@ -0,0 +1,100 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 1985 MIPS Computer Systems, Inc. ++ * Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle ++ * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc. ++ */ ++#ifndef _ASM_REGDEF_H ++#define _ASM_REGDEF_H ++ ++#include <asm/sgidefs.h> ++ ++#if _MIPS_SIM == _MIPS_SIM_ABI32 ++ ++/* ++ * Symbolic register names for 32 bit ABI ++ */ ++#define zero $0 /* wired zero */ ++#define AT $1 /* assembler temp - uppercase because of ".set at" */ ++#define v0 $2 /* return value */ ++#define v1 $3 ++#define a0 $4 /* argument registers */ ++#define a1 $5 ++#define a2 $6 ++#define a3 $7 ++#define t0 $8 /* caller saved */ ++#define t1 $9 ++#define t2 $10 ++#define t3 $11 ++#define t4 $12 ++#define t5 $13 ++#define t6 $14 ++#define t7 $15 ++#define s0 $16 /* callee saved */ ++#define s1 $17 ++#define s2 $18 ++#define s3 $19 ++#define s4 $20 ++#define s5 $21 ++#define s6 $22 ++#define s7 $23 ++#define t8 $24 /* caller saved */ ++#define t9 $25 ++#define jp $25 /* PIC jump register */ ++#define k0 $26 /* kernel scratch */ ++#define k1 $27 ++#define gp $28 /* global pointer */ ++#define sp $29 /* stack pointer */ ++#define fp $30 /* frame pointer */ ++#define s8 $30 /* same like fp! */ ++#define ra $31 /* return address */ ++ ++#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ ++ ++#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 ++ ++#define zero $0 /* wired zero */ ++#define AT $at /* assembler temp - uppercase because of ".set at" */ ++#define v0 $2 /* return value - caller saved */ ++#define v1 $3 ++#define a0 $4 /* argument registers */ ++#define a1 $5 ++#define a2 $6 ++#define a3 $7 ++#define a4 $8 /* arg reg 64 bit; caller saved in 32 bit */ ++#define ta0 $8 ++#define a5 $9 ++#define ta1 $9 ++#define a6 $10 ++#define ta2 $10 ++#define a7 $11 ++#define ta3 $11 ++#define t0 $12 /* caller saved */ ++#define t1 $13 ++#define t2 $14 ++#define t3 $15 ++#define s0 $16 /* callee saved */ ++#define s1 $17 ++#define s2 $18 ++#define s3 $19 ++#define s4 $20 ++#define s5 $21 ++#define s6 $22 ++#define s7 $23 ++#define t8 $24 /* caller saved */ ++#define t9 $25 /* callee address for PIC/temp */ ++#define jp $25 /* PIC jump register */ ++#define k0 $26 /* kernel temporary */ ++#define k1 $27 ++#define gp $28 /* global pointer - caller saved for PIC */ ++#define sp $29 /* stack pointer */ ++#define fp $30 /* frame pointer */ ++#define s8 $30 /* callee saved */ ++#define ra $31 /* return address */ ++ ++#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */ ++ ++#endif /* _ASM_REGDEF_H */ diff --git a/package/boot/kexec-tools/patches/0004-mips_regdefs.patch b/package/boot/kexec-tools/patches/0004-mips_regdefs.patch new file mode 100644 index 0000000..7e21349 --- /dev/null +++ b/package/boot/kexec-tools/patches/0004-mips_regdefs.patch @@ -0,0 +1,103 @@ +--- /dev/null ++++ b/kexec/arch/mips/regdef.h +@@ -0,0 +1,100 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 1985 MIPS Computer Systems, Inc. ++ * Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle ++ * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc. ++ */ ++#ifndef _ASM_REGDEF_H ++#define _ASM_REGDEF_H ++ ++#include <asm/sgidefs.h> ++ ++#if _MIPS_SIM == _MIPS_SIM_ABI32 ++ ++/* ++ * Symbolic register names for 32 bit ABI ++ */ ++#define zero $0 /* wired zero */ ++#define AT $1 /* assembler temp - uppercase because of ".set at" */ ++#define v0 $2 /* return value */ ++#define v1 $3 ++#define a0 $4 /* argument registers */ ++#define a1 $5 ++#define a2 $6 ++#define a3 $7 ++#define t0 $8 /* caller saved */ ++#define t1 $9 ++#define t2 $10 ++#define t3 $11 ++#define t4 $12 ++#define t5 $13 ++#define t6 $14 ++#define t7 $15 ++#define s0 $16 /* callee saved */ ++#define s1 $17 ++#define s2 $18 ++#define s3 $19 ++#define s4 $20 ++#define s5 $21 ++#define s6 $22 ++#define s7 $23 ++#define t8 $24 /* caller saved */ ++#define t9 $25 ++#define jp $25 /* PIC jump register */ ++#define k0 $26 /* kernel scratch */ ++#define k1 $27 ++#define gp $28 /* global pointer */ ++#define sp $29 /* stack pointer */ ++#define fp $30 /* frame pointer */ ++#define s8 $30 /* same like fp! */ ++#define ra $31 /* return address */ ++ ++#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ ++ ++#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 ++ ++#define zero $0 /* wired zero */ ++#define AT $at /* assembler temp - uppercase because of ".set at" */ ++#define v0 $2 /* return value - caller saved */ ++#define v1 $3 ++#define a0 $4 /* argument registers */ ++#define a1 $5 ++#define a2 $6 ++#define a3 $7 ++#define a4 $8 /* arg reg 64 bit; caller saved in 32 bit */ ++#define ta0 $8 ++#define a5 $9 ++#define ta1 $9 ++#define a6 $10 ++#define ta2 $10 ++#define a7 $11 ++#define ta3 $11 ++#define t0 $12 /* caller saved */ ++#define t1 $13 ++#define t2 $14 ++#define t3 $15 ++#define s0 $16 /* callee saved */ ++#define s1 $17 ++#define s2 $18 ++#define s3 $19 ++#define s4 $20 ++#define s5 $21 ++#define s6 $22 ++#define s7 $23 ++#define t8 $24 /* caller saved */ ++#define t9 $25 /* callee address for PIC/temp */ ++#define jp $25 /* PIC jump register */ ++#define k0 $26 /* kernel temporary */ ++#define k1 $27 ++#define gp $28 /* global pointer - caller saved for PIC */ ++#define sp $29 /* stack pointer */ ++#define fp $30 /* frame pointer */ ++#define s8 $30 /* callee saved */ ++#define ra $31 /* return address */ ++ ++#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */ ++ ++#endif /* _ASM_REGDEF_H */ |