diff options
| author | James <> | 2015-11-04 11:49:21 +0000 |
|---|---|---|
| committer | James <> | 2015-11-04 11:49:21 +0000 |
| commit | 716ca530e1c4515d8683c9d5be3d56b301758b66 (patch) | |
| tree | 700eb5bcc1a462a5f21dcec15ce7c97ecfefa772 /package/boot/uboot-lantiq/patches/0021-MIPS-vrx200-add-NAND-SPL-support.patch | |
| download | trunk-47381-master.tar.gz trunk-47381-master.tar.bz2 trunk-47381-master.zip | |
Diffstat (limited to 'package/boot/uboot-lantiq/patches/0021-MIPS-vrx200-add-NAND-SPL-support.patch')
| -rw-r--r-- | package/boot/uboot-lantiq/patches/0021-MIPS-vrx200-add-NAND-SPL-support.patch | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/package/boot/uboot-lantiq/patches/0021-MIPS-vrx200-add-NAND-SPL-support.patch b/package/boot/uboot-lantiq/patches/0021-MIPS-vrx200-add-NAND-SPL-support.patch new file mode 100644 index 0000000..6c9f14b --- /dev/null +++ b/package/boot/uboot-lantiq/patches/0021-MIPS-vrx200-add-NAND-SPL-support.patch @@ -0,0 +1,30 @@ +From 7361581a1baaec43058f5b9350c32c7ac4e58064 Mon Sep 17 00:00:00 2001 +From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> +Date: Mon, 12 Aug 2013 00:11:16 +0200 +Subject: MIPS: vrx200: add NAND SPL support + +Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> + +--- a/arch/mips/cpu/mips32/vrx200/config.mk ++++ b/arch/mips/cpu/mips32/vrx200/config.mk +@@ -27,4 +27,9 @@ ALL-y += $(obj)u-boot.ltq.norspl + ALL-$(CONFIG_SPL_LZO_SUPPORT) += $(obj)u-boot.ltq.lzo.norspl + ALL-$(CONFIG_SPL_LZMA_SUPPORT) += $(obj)u-boot.ltq.lzma.norspl + endif ++ifdef CONFIG_SYS_BOOT_NANDSPL ++ALL-y += $(obj)u-boot.ltq.nandspl ++ALL-$(CONFIG_SPL_LZO_SUPPORT) += $(obj)u-boot.ltq.lzo.nandspl ++ALL-$(CONFIG_SPL_LZMA_SUPPORT) += $(obj)u-boot.ltq.lzma.nandspl ++endif + endif +--- a/arch/mips/include/asm/arch-vrx200/config.h ++++ b/arch/mips/include/asm/arch-vrx200/config.h +@@ -164,7 +164,7 @@ + #define CONFIG_SYS_TEXT_BASE 0xB0000000 + #endif + +-#if defined(CONFIG_SYS_BOOT_SFSPL) ++#if defined(CONFIG_SYS_BOOT_SFSPL) || defined(CONFIG_SYS_BOOT_NANDSPL) + #define CONFIG_SYS_TEXT_BASE 0x80100000 + #define CONFIG_SPL_TEXT_BASE 0xBE220000 + #endif |