diff options
Diffstat (limited to 'cfe/cfe/arch/mips/common/src/lib_hssubr.S')
-rw-r--r-- | cfe/cfe/arch/mips/common/src/lib_hssubr.S | 194 |
1 files changed, 194 insertions, 0 deletions
diff --git a/cfe/cfe/arch/mips/common/src/lib_hssubr.S b/cfe/cfe/arch/mips/common/src/lib_hssubr.S new file mode 100644 index 0000000..07085e3 --- /dev/null +++ b/cfe/cfe/arch/mips/common/src/lib_hssubr.S @@ -0,0 +1,194 @@ +/* ********************************************************************* + * Broadcom Common Firmware Environment (CFE) + * + * Hyperspace Subroutines File: lib_hssubr.S + * + * Little stub routines to allow access to KXSEG from 32-bit progs. + * + * Author: Mitch Lichtenberg (mitch@sibyte.com) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This software is furnished under license and may be used and + * copied only in accordance with the following terms and + * conditions. Subject to these conditions, you may download, + * copy, install, use, modify and distribute modified or unmodified + * copies of this software in source and/or binary form. No title + * or ownership is transferred hereby. + * + * 1) Any source code used, modified or distributed must reproduce + * and retain this copyright notice and list of conditions + * as they appear in the source file. + * + * 2) No right is granted to use any trade name, trademark, or + * logo of Broadcom Corporation. The "Broadcom Corporation" + * name may not be used to endorse or promote products derived + * from this software without the prior written permission of + * Broadcom Corporation. + * + * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED + * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT + * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN + * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + ********************************************************************* */ + + +#include "sbmips.h" +#include "mipsmacros.h" +#include "cpu_config.h" /* for definition of HAZARD */ + + +/* ********************************************************************* + * hs_read8 - read 8-bit bytes + ********************************************************************* */ + + +LEAF(hs_read8) + mfc0 t2,C0_SR + or t1,t2,M_SR_KX + mtc0 t1,C0_SR + HAZARD + + lbu v0,(a0) + + mtc0 t2,C0_SR + HAZARD + j ra +END(hs_read8) + +/* ********************************************************************* + * hs_read16 - read 16-bit shorts + ********************************************************************* */ + +LEAF(hs_read16) + mfc0 t2,C0_SR + or t1,t2,M_SR_KX + mtc0 t1,C0_SR + HAZARD + + lhu v0,(a0) + + mtc0 t2,C0_SR + HAZARD + j ra +END(hs_read16) + +/* ********************************************************************* + * hs_read32 - read 32-bit ints + ********************************************************************* */ + +LEAF(hs_read32) + mfc0 t2,C0_SR + or t1,t2,M_SR_KX + mtc0 t1,C0_SR + HAZARD + + lw v0,(a0) + + mtc0 t2,C0_SR + HAZARD + j ra +END(hs_read32) + +/* ********************************************************************* + * hs_read64 - read 64-bit longs + ********************************************************************* */ + +LEAF(hs_read64) + mfc0 t2,C0_SR + or t1,t2,M_SR_KX + mtc0 t1,C0_SR + HAZARD + + ld v0,(a0) + + mtc0 t2,C0_SR + HAZARD + j ra +END(hs_read64) + +/* ********************************************************************* + * hs_write8 - write 8-bit bytes + ********************************************************************* */ + +LEAF(hs_write8) + mfc0 t2,C0_SR + or t1,t2,M_SR_KX + mtc0 t1,C0_SR + HAZARD + + sb a1,(a0) + + mtc0 t2,C0_SR + HAZARD + j ra +END(hs_write8) + +/* ********************************************************************* + * hs_write16 - write 16-bit shorts + ********************************************************************* */ + +LEAF(hs_write16) + mfc0 t2,C0_SR + or t1,t2,M_SR_KX + mtc0 t1,C0_SR + HAZARD + + sh a1,(a0) + + mtc0 t2,C0_SR + HAZARD + j ra +END(hs_write16) + +/* ********************************************************************* + * hs_write32 - write 32-bit longs + ********************************************************************* */ + +LEAF(hs_write32) + mfc0 t2,C0_SR + or t1,t2,M_SR_KX + mtc0 t1,C0_SR + HAZARD + + sw a1,(a0) + + mtc0 t2,C0_SR + HAZARD + j ra +END(hs_write32) + +/* ********************************************************************* + * hs_write64 - write 64-bit longs + ********************************************************************* */ + +LEAF(hs_write64) + mfc0 t2,C0_SR + or t1,t2,M_SR_KX + mtc0 t1,C0_SR + HAZARD + + sd a1,(a0) + + mtc0 t2,C0_SR + HAZARD + j ra +END(hs_write64) + + +/* ********************************************************************* + * End + ********************************************************************* */ + |