diff options
Diffstat (limited to 'cfe/cfe/arch/mips/common/include')
| -rw-r--r-- | cfe/cfe/arch/mips/common/include/addrspace.h | 63 | ||||
| -rw-r--r-- | cfe/cfe/arch/mips/common/include/disasm.h | 61 | ||||
| -rw-r--r-- | cfe/cfe/arch/mips/common/include/exception.h | 223 | ||||
| -rw-r--r-- | cfe/cfe/arch/mips/common/include/exchandler.h | 85 | ||||
| -rw-r--r-- | cfe/cfe/arch/mips/common/include/initdata.h | 68 | ||||
| -rw-r--r-- | cfe/cfe/arch/mips/common/include/lib_hssubr.h | 84 | ||||
| -rw-r--r-- | cfe/cfe/arch/mips/common/include/lib_physio.h | 100 | ||||
| -rw-r--r-- | cfe/cfe/arch/mips/common/include/lib_setjmp.h | 81 | ||||
| -rwxr-xr-x | cfe/cfe/arch/mips/common/include/mipsmacros.h | 376 | ||||
| -rwxr-xr-x | cfe/cfe/arch/mips/common/include/segtable.h | 97 |
10 files changed, 1238 insertions, 0 deletions
diff --git a/cfe/cfe/arch/mips/common/include/addrspace.h b/cfe/cfe/arch/mips/common/include/addrspace.h new file mode 100644 index 0000000..6330851 --- /dev/null +++ b/cfe/cfe/arch/mips/common/include/addrspace.h @@ -0,0 +1,63 @@ +/* ********************************************************************* + * Broadcom Common Firmware Environment (CFE) + * + * Address space macros File: addrspace.h + * + * Macros to deal with physical, virtual, and uncached addresses. + * for MIPS, these map to the appropriate KSEG0/KSEG1 macros + * + * Author: Mitch Lichtenberg (mpl@broadcom.com) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This software is furnished under license and may be used and + * copied only in accordance with the following terms and + * conditions. Subject to these conditions, you may download, + * copy, install, use, modify and distribute modified or unmodified + * copies of this software in source and/or binary form. No title + * or ownership is transferred hereby. + * + * 1) Any source code used, modified or distributed must reproduce + * and retain this copyright notice and list of conditions + * as they appear in the source file. + * + * 2) No right is granted to use any trade name, trademark, or + * logo of Broadcom Corporation. The "Broadcom Corporation" + * name may not be used to endorse or promote products derived + * from this software without the prior written permission of + * Broadcom Corporation. + * + * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED + * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT + * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN + * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + ********************************************************************* */ + + +#include "sbmips.h" + +#define PHYSADDR(x) K0_TO_PHYS(x) + +/* If running uncached, force all kernel addresses to be uncached */ +#if CFG_RUNFROMKSEG0 +#define KERNADDR(x) PHYS_TO_K0(x) +#else +#define KERNADDR(x) PHYS_TO_K1(x) +#endif + +#define UNCADDR(x) PHYS_TO_K1(x) + + + diff --git a/cfe/cfe/arch/mips/common/include/disasm.h b/cfe/cfe/arch/mips/common/include/disasm.h new file mode 100644 index 0000000..8a8e7b7 --- /dev/null +++ b/cfe/cfe/arch/mips/common/include/disasm.h @@ -0,0 +1,61 @@ +/* ********************************************************************* + * Broadcom Common Firmware Environment (CFE) + * + * MIPS disassembler File: disasm.h + * + * MIPS disassembler (used by ui_examcmds.c) + * + * Author: Justin Carlson (carlson@broadcom.com) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This software is furnished under license and may be used and + * copied only in accordance with the following terms and + * conditions. Subject to these conditions, you may download, + * copy, install, use, modify and distribute modified or unmodified + * copies of this software in source and/or binary form. No title + * or ownership is transferred hereby. + * + * 1) Any source code used, modified or distributed must reproduce + * and retain this copyright notice and list of conditions + * as they appear in the source file. + * + * 2) No right is granted to use any trade name, trademark, or + * logo of Broadcom Corporation. The "Broadcom Corporation" + * name may not be used to endorse or promote products derived + * from this software without the prior written permission of + * Broadcom Corporation. + * + * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED + * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT + * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN + * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + ********************************************************************* */ + +#ifndef DISASM_H +#define DISASM_H + +/* Returns a pointer to a read-only string containing the intstruction name */ +char *disasm_inst_name(uint32_t inst); + +/* Copies a disassembled version of the instruction into buf, null terminating the +string. Will not exceed buf_size bytes written; if the disassembled string is +longer than buf_size, buf_size-1 bytes of the string will be written and that string +will be null-terminated */ +void disasm_inst(char *buf, int buf_size, uint32_t inst, uint64_t pc); +#endif + + + diff --git a/cfe/cfe/arch/mips/common/include/exception.h b/cfe/cfe/arch/mips/common/include/exception.h new file mode 100644 index 0000000..70e87c2 --- /dev/null +++ b/cfe/cfe/arch/mips/common/include/exception.h @@ -0,0 +1,223 @@ +/* ********************************************************************* + * Broadcom Common Firmware Environment (CFE) + * + * Exception/trap handler defs File: exception.h + * + * This module describes the exception handlers, exception + * trap frames, and dispatch. + * + * Author: Mitch Lichtenberg (mpl@broadcom.com) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This software is furnished under license and may be used and + * copied only in accordance with the following terms and + * conditions. Subject to these conditions, you may download, + * copy, install, use, modify and distribute modified or unmodified + * copies of this software in source and/or binary form. No title + * or ownership is transferred hereby. + * + * 1) Any source code used, modified or distributed must reproduce + * and retain this copyright notice and list of conditions + * as they appear in the source file. + * + * 2) No right is granted to use any trade name, trademark, or + * logo of Broadcom Corporation. The "Broadcom Corporation" + * name may not be used to endorse or promote products derived + * from this software without the prior written permission of + * Broadcom Corporation. + * + * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED + * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT + * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN + * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + ********************************************************************* */ + +#ifdef __ASSEMBLER__ +#define _XAIDX(x) (8*(x)) +#else +#define _XAIDX(x) (x) +#endif + + +/* ********************************************************************* + * Exception vectors from the MIPS specification + ********************************************************************* */ + +#define MIPS_ROM_VEC_RESET 0x0000 +#define MIPS_ROM_VEC_TLBFILL 0x0200 +#define MIPS_ROM_VEC_XTLBFILL 0x0280 +#define MIPS_ROM_VEC_CACHEERR 0x0300 +#define MIPS_ROM_VEC_EXCEPTION 0x0380 +#define MIPS_ROM_VEC_INTERRUPT 0x0400 +#define MIPS_ROM_VEC_EJTAG 0x0480 + +#define MIPS_RAM_VEC_TLBFILL 0x0000 +#define MIPS_RAM_VEC_XTLBFILL 0x0080 +#define MIPS_RAM_VEC_EXCEPTION 0x0180 +#define MIPS_RAM_VEC_INTERRUPT 0x0200 +#define MIPS_RAM_VEC_CACHEERR 0x0100 +#define MIPS_RAM_VEC_END 0x0300 + +#define MIPS_RAM_EXL_VEC_TLBFILL 0x0100 +#define MIPS_RAM_EXL_VEC_XTLBFILL 0x0180 + + +/* ********************************************************************* + * Fixed locations of other low-memory objects. We stuff some + * important data in the spaces between the vectors. + ********************************************************************* */ + +#define CFE_LOCORE_GLOBAL_GP 0x0040 /* our "handle" */ +#define CFE_LOCORE_GLOBAL_SP 0x0048 /* Stack pointer for exceptions */ +#define CFE_LOCORE_GLOBAL_K0TMP 0x0050 /* Used by cache error handler */ +#define CFE_LOCORE_GLOBAL_K1TMP 0x0058 /* Used by cache error handler */ +#define CFE_LOCORE_GLOBAL_RATMP 0x0060 /* Used by cache error handler */ +#define CFE_LOCORE_GLOBAL_GPTMP 0x0068 /* Used by cache error handler */ +#define CFE_LOCORE_GLOBAL_CERRH 0x0070 /* Pointer to cache error handler */ + +#define CFE_LOCORE_GLOBAL_T0TMP 0x0240 /* used by cache error handler */ +#define CFE_LOCORE_GLOBAL_T1TMP 0x0248 /* used by cache error handler */ +#define CFE_LOCORE_GLOBAL_T2TMP 0x0250 /* used by cache error handler */ +#define CFE_LOCORE_GLOBAL_T3TMP 0x0258 /* used by cache error handler */ + +/* ********************************************************************* + * Offsets into our exception handler table. + ********************************************************************* */ + +#define XTYPE_RESET 0 +#define XTYPE_TLBFILL 8 +#define XTYPE_XTLBFILL 16 +#define XTYPE_CACHEERR 24 +#define XTYPE_EXCEPTION 32 +#define XTYPE_INTERRUPT 40 +#define XTYPE_EJTAG 48 + +/* ********************************************************************* + * Exception frame definitions. + ********************************************************************* */ + +/* + * The exception frame is divided up into pieces, representing the different + * parts of the processor that the data comes from: + * + * CP0: Words 0..7 + * Int Regs: Words 8..41 + * FP Regs: Words 42..73 + * Total size: 74 words + */ + +#define EXCEPTION_SIZE _XAIDX(74) + +#define XCP0_BASE 0 +#define XGR_BASE 8 +#define XFR_BASE 42 + +#define _XCP0IDX(x) _XAIDX((x)+XCP0_BASE) +#define XCP0_SR _XCP0IDX(0) +#define XCP0_CAUSE _XCP0IDX(1) +#define XCP0_EPC _XCP0IDX(2) +#define XCP0_VADDR _XCP0IDX(3) +#define XCP0_PRID _XCP0IDX(4) + +#define _XGRIDX(x) _XAIDX((x)+XGR_BASE) +#define XGR_ZERO _XGRIDX(0) +#define XGR_AT _XGRIDX(1) +#define XGR_V0 _XGRIDX(2) +#define XGR_V1 _XGRIDX(3) +#define XGR_A0 _XGRIDX(4) +#define XGR_A1 _XGRIDX(5) +#define XGR_A2 _XGRIDX(6) +#define XGR_A3 _XGRIDX(7) +#define XGR_T0 _XGRIDX(8) +#define XGR_T1 _XGRIDX(9) +#define XGR_T2 _XGRIDX(10) +#define XGR_T3 _XGRIDX(11) +#define XGR_T4 _XGRIDX(12) +#define XGR_T5 _XGRIDX(13) +#define XGR_T6 _XGRIDX(14) +#define XGR_T7 _XGRIDX(15) +#define XGR_S0 _XGRIDX(16) +#define XGR_S1 _XGRIDX(17) +#define XGR_S2 _XGRIDX(18) +#define XGR_S3 _XGRIDX(19) +#define XGR_S4 _XGRIDX(20) +#define XGR_S5 _XGRIDX(21) +#define XGR_S6 _XGRIDX(22) +#define XGR_S7 _XGRIDX(23) +#define XGR_T8 _XGRIDX(24) +#define XGR_T9 _XGRIDX(25) +#define XGR_K0 _XGRIDX(26) +#define XGR_K1 _XGRIDX(27) +#define XGR_GP _XGRIDX(28) +#define XGR_SP _XGRIDX(29) +#define XGR_FP _XGRIDX(30) +#define XGR_RA _XGRIDX(31) +#define XGR_LO _XGRIDX(32) +#define XGR_HI _XGRIDX(33) + + +#define _XFRIDX(x) _XAIDX((x)+XFR_BASE) +#define XR_F0 _XFRIDX(0) +#define XR_F1 _XFRIDX(1) +#define XR_F2 _XFRIDX(2) +#define XR_F3 _XFRIDX(3) +#define XR_F4 _XFRIDX(4) +#define XR_F5 _XFRIDX(5) +#define XR_F6 _XFRIDX(6) +#define XR_F7 _XFRIDX(7) +#define XR_F8 _XFRIDX(8) +#define XR_F9 _XFRIDX(9) +#define XR_F10 _XFRIDX(10) +#define XR_F11 _XFRIDX(11) +#define XR_F12 _XFRIDX(12) +#define XR_F13 _XFRIDX(13) +#define XR_F14 _XFRIDX(14) +#define XR_F15 _XFRIDX(15) +#define XR_F16 _XFRIDX(16) +#define XR_F17 _XFRIDX(17) +#define XR_F18 _XFRIDX(18) +#define XR_F19 _XFRIDX(19) +#define XR_F20 _XFRIDX(20) +#define XR_F21 _XFRIDX(21) +#define XR_F22 _XFRIDX(22) +#define XR_F23 _XFRIDX(23) +#define XR_F24 _XFRIDX(24) +#define XR_F25 _XFRIDX(25) +#define XR_F26 _XFRIDX(26) +#define XR_F27 _XFRIDX(27) +#define XR_F28 _XFRIDX(28) +#define XR_F29 _XFRIDX(29) +#define XR_F30 _XFRIDX(30) +#define XR_F31 _XFRIDX(31) +#define XR_FCR _XFRIDX(32) +#define XR_FID _XFRIDX(33) + + +#ifndef __ASSEMBLER__ +extern void _exc_setvector(int vectype, void *vecaddr); +extern void _exc_crash_sim(void); +extern void _exc_cache_crash_sim(void); +extern void _exc_restart(void); +extern void _exc_clear_sr_exl(void); +extern void _exc_clear_sr_erl(void); +void cfe_exception(int code,uint64_t *info); +void cfe_setup_exceptions(void); +#endif + + + + + diff --git a/cfe/cfe/arch/mips/common/include/exchandler.h b/cfe/cfe/arch/mips/common/include/exchandler.h new file mode 100644 index 0000000..af268f1 --- /dev/null +++ b/cfe/cfe/arch/mips/common/include/exchandler.h @@ -0,0 +1,85 @@ +/* ********************************************************************* + * Broadcom Common Firmware Environment (CFE) + * + * Exception Handler definitions File: exchandler.h + * + * Exception handler functions and constants + * + * Author: Binh Vo (binh@broadcom.com) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This software is furnished under license and may be used and + * copied only in accordance with the following terms and + * conditions. Subject to these conditions, you may download, + * copy, install, use, modify and distribute modified or unmodified + * copies of this software in source and/or binary form. No title + * or ownership is transferred hereby. + * + * 1) Any source code used, modified or distributed must reproduce + * and retain this copyright notice and list of conditions + * as they appear in the source file. + * + * 2) No right is granted to use any trade name, trademark, or + * logo of Broadcom Corporation. The "Broadcom Corporation" + * name may not be used to endorse or promote products derived + * from this software without the prior written permission of + * Broadcom Corporation. + * + * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED + * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT + * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN + * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + ********************************************************************* */ + + +#ifndef _LIB_SETJMP_H +#include "lib_setjmp.h" +#endif + +#ifndef _LIB_QUEUE_H +#include "lib_queue.h" +#endif + +#define MEM_BYTE 1 +#define MEM_HALFWORD 2 +#define MEM_WORD 3 +#define MEM_QUADWORD 4 + +#define EXC_NORMAL_RETURN 0 +#define EXC_CHAIN_EXC 1 + +typedef struct jmpbuf_s { + queue_t stack; + jmp_buf jmpbuf; +} jmpbuf_t; + +typedef struct exc_handler_s { + int catch_exc; + int chain_exc; + queue_t jmpbuf_stack; +} exc_handler_t; + +extern exc_handler_t exc_handler; + +jmpbuf_t *exc_initialize_block(void); +void exc_cleanup_block(jmpbuf_t *); +void exc_cleanup_handler(jmpbuf_t *, int); +void exc_longjmp_handler(void); +int mem_peek(void*, long, int); +int mem_poke(long, uint64_t, int); + + +#define exc_try(jb) (lib_setjmp(((jb)->jmpbuf))) diff --git a/cfe/cfe/arch/mips/common/include/initdata.h b/cfe/cfe/arch/mips/common/include/initdata.h new file mode 100644 index 0000000..c5fc0d8 --- /dev/null +++ b/cfe/cfe/arch/mips/common/include/initdata.h @@ -0,0 +1,68 @@ +/* ********************************************************************* + * Broadcom Common Firmware Environment (CFE) + * + * Data stored in initialization module File: initdata.h + * + * This file contains data declared by the init module. It also + * contains externs for that data so we can keep the types straight. + * + * Author: Mitch Lichtenberg (mpl@broadcom.com) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This software is furnished under license and may be used and + * copied only in accordance with the following terms and + * conditions. Subject to these conditions, you may download, + * copy, install, use, modify and distribute modified or unmodified + * copies of this software in source and/or binary form. No title + * or ownership is transferred hereby. + * + * 1) Any source code used, modified or distributed must reproduce + * and retain this copyright notice and list of conditions + * as they appear in the source file. + * + * 2) No right is granted to use any trade name, trademark, or + * logo of Broadcom Corporation. The "Broadcom Corporation" + * name may not be used to endorse or promote products derived + * from this software without the prior written permission of + * Broadcom Corporation. + * + * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED + * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT + * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN + * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + ********************************************************************* */ + + +#if defined(__ASSEMBLER__) +#define DECLARE_INITVAR(x) \ + .globl x ; \ +x: _LONG_ 0 +#else +#define DECLARE_INITVAR(x) \ + extern long x; +#endif + +DECLARE_INITVAR(mem_textreloc) +DECLARE_INITVAR(mem_textbase) +DECLARE_INITVAR(mem_textsize) +DECLARE_INITVAR(mem_totalsize) +DECLARE_INITVAR(mem_topofmem) +DECLARE_INITVAR(mem_heapstart) +DECLARE_INITVAR(mem_bottomofmem) +DECLARE_INITVAR(mem_datareloc) +DECLARE_INITVAR(cpu_prid) + + diff --git a/cfe/cfe/arch/mips/common/include/lib_hssubr.h b/cfe/cfe/arch/mips/common/include/lib_hssubr.h new file mode 100644 index 0000000..b4df439 --- /dev/null +++ b/cfe/cfe/arch/mips/common/include/lib_hssubr.h @@ -0,0 +1,84 @@ +/* ********************************************************************* + * Broadcom Common Firmware Environment (CFE) + * + * "Hyperspace" access routines File: lib_hssubr.h + * + * Constants, macros, and definitions for routines to deal with + * hyperspace (beyond 256MB) on MIPS processors. + * + * Author: Mitch Lichtenberg (mpl@broadcom.com) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This software is furnished under license and may be used and + * copied only in accordance with the following terms and + * conditions. Subject to these conditions, you may download, + * copy, install, use, modify and distribute modified or unmodified + * copies of this software in source and/or binary form. No title + * or ownership is transferred hereby. + * + * 1) Any source code used, modified or distributed must reproduce + * and retain this copyright notice and list of conditions + * as they appear in the source file. + * + * 2) No right is granted to use any trade name, trademark, or + * logo of Broadcom Corporation. The "Broadcom Corporation" + * name may not be used to endorse or promote products derived + * from this software without the prior written permission of + * Broadcom Corporation. + * + * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED + * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT + * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN + * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + ********************************************************************* */ + + +#ifndef _LIB_HSSUBR_H +#define _LIB_HSSUBR_H + +/* + * If __long64 we can do this via macros. Otherwise, call + * the magic functions. + */ + +#if __long64 + +typedef long hsaddr_t; + +#define hs_write8(a,b) *((volatile uint8_t *) (a)) = (b) +#define hs_write16(a,b) *((volatile uint16_t *) (a)) = (b) +#define hs_write32(a,b) *((volatile uint32_t *) (a)) = (b) +#define hs_write64(a,b) *((volatile uint32_t *) (a)) = (b) +#define hs_read8(a) *((volatile uint8_t *) (a)) +#define hs_read16(a) *((volatile uint16_t *) (a)) +#define hs_read32(a) *((volatile uint32_t *) (a)) +#define hs_read64(a) *((volatile uint64_t *) (a)) + +#else /* not __long64 */ + +typedef long long hsaddr_t; + +extern void hs_write8(hsaddr_t a,uint8_t b); +extern void hs_write16(hsaddr_t a,uint16_t b); +extern void hs_write32(hsaddr_t a,uint32_t b); +extern void hs_write64(hsaddr_t a,uint64_t b); +extern uint8_t hs_read8(hsaddr_t a); +extern uint16_t hs_read16(hsaddr_t a); +extern uint32_t hs_read32(hsaddr_t a); +extern uint64_t hs_read64(hsaddr_t a); +#endif + +#endif diff --git a/cfe/cfe/arch/mips/common/include/lib_physio.h b/cfe/cfe/arch/mips/common/include/lib_physio.h new file mode 100644 index 0000000..00d0093 --- /dev/null +++ b/cfe/cfe/arch/mips/common/include/lib_physio.h @@ -0,0 +1,100 @@ +/* ********************************************************************* + * Broadcom Common Firmware Environment (CFE) + * + * Physical memory peek/poke routines File: lib_physio.h + * + * Little stub routines to allow access to arbitrary physical + * addresses. In most cases this should not be needed, as + * many physical addresses are within kseg1, but this handles + * the cases that are not automagically, so we don't need + * to mess up the code with icky macros and such. + * + * Author: Mitch Lichtenberg (mpl@broadcom.com) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This software is furnished under license and may be used and + * copied only in accordance with the following terms and + * conditions. Subject to these conditions, you may download, + * copy, install, use, modify and distribute modified or unmodified + * copies of this software in source and/or binary form. No title + * or ownership is transferred hereby. + * + * 1) Any source code used, modified or distributed must reproduce + * and retain this copyright notice and list of conditions + * as they appear in the source file. + * + * 2) No right is granted to use any trade name, trademark, or + * logo of Broadcom Corporation. The "Broadcom Corporation" + * name may not be used to endorse or promote products derived + * from this software without the prior written permission of + * Broadcom Corporation. + * + * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED + * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT + * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN + * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + ********************************************************************* */ + + +#ifndef _LIB_PHYSIO_H +#define _LIB_PHYSIO_H + +//#ifndef _SB_MIPS_H +//#include "sbmips.h" +//#endif + +/* + * If __long64 we can do this via macros. Otherwise, call + * the magic functions. + */ + +#if __long64 + +typedef long physaddr_t; +#define _PHYSADDR_T_DEFINED_ + +/*#define __UNCADDRX(x) PHYS_TO_XKSEG_UNCACHED(x)*/ +#define __UNCADDRX(x) (((physaddr_t)(x))|0x9000000000000000) + + +#define phys_write8(a,b) *((volatile uint8_t *) __UNCADDRX(a)) = (b) +#define phys_write16(a,b) *((volatile uint16_t *) __UNCADDRX(a)) = (b) +#define phys_write32(a,b) *((volatile uint32_t *) __UNCADDRX(a)) = (b) +#define phys_write64(a,b) *((volatile uint64_t *) __UNCADDRX(a)) = (b) +#define phys_read8(a) *((volatile uint8_t *) __UNCADDRX(a)) +#define phys_read16(a) *((volatile uint16_t *) __UNCADDRX(a)) +#define phys_read32(a) *((volatile uint32_t *) __UNCADDRX(a)) +#define phys_read64(a) *((volatile uint64_t *) __UNCADDRX(a)) + +#else /* not __long64 */ + +#ifdef _MIPSREGS32_ +typedef long physaddr_t; /* 32-bit-only processors can't have >32bit pa's */ +#else +typedef long long physaddr_t; /* Otherwise, they might. */ +#endif + +extern void phys_write8(physaddr_t a,uint8_t b); +extern void phys_write16(physaddr_t a,uint16_t b); +extern void phys_write32(physaddr_t a,uint32_t b); +extern void phys_write64(physaddr_t a,uint64_t b); +extern uint8_t phys_read8(physaddr_t a); +extern uint16_t phys_read16(physaddr_t a); +extern uint32_t phys_read32(physaddr_t a); +extern uint64_t phys_read64(physaddr_t a); +#endif + +#endif diff --git a/cfe/cfe/arch/mips/common/include/lib_setjmp.h b/cfe/cfe/arch/mips/common/include/lib_setjmp.h new file mode 100644 index 0000000..b673222 --- /dev/null +++ b/cfe/cfe/arch/mips/common/include/lib_setjmp.h @@ -0,0 +1,81 @@ +/* ********************************************************************* + * Broadcom Common Firmware Environment (CFE) + * + * setjmp/longjmp defs File: lib_setjmp.h + * + * Description of the jmp_buf structure for setjmp and longjmp + * + * Author: Mitch Lichtenberg (mpl@broadcom.com) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This software is furnished under license and may be used and + * copied only in accordance with the following terms and + * conditions. Subject to these conditions, you may download, + * copy, install, use, modify and distribute modified or unmodified + * copies of this software in source and/or binary form. No title + * or ownership is transferred hereby. + * + * 1) Any source code used, modified or distributed must reproduce + * and retain this copyright notice and list of conditions + * as they appear in the source file. + * + * 2) No right is granted to use any trade name, trademark, or + * logo of Broadcom Corporation. The "Broadcom Corporation" + * name may not be used to endorse or promote products derived + * from this software without the prior written permission of + * Broadcom Corporation. + * + * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED + * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT + * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN + * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + ********************************************************************* */ + + +/* + * Note that while lib_setjmp() and lib_longjmp() behave like setjmp() + * and longjmp() normally do, gcc 3.1.x (and later) assumes things about + * how setjmp() and longjmp() should work (even with -fno-builtins). We + * don't want it to do those, so these functions must be named differently. + */ + +#ifdef __ASSEMBLER__ +#define _JBIDX(x) (8*(x)) +#else +#define _JBIDX(x) (x) +#endif + + +#define JMPB_S0 _JBIDX(0) +#define JMPB_S1 _JBIDX(1) +#define JMPB_S2 _JBIDX(2) +#define JMPB_S3 _JBIDX(3) +#define JMPB_S4 _JBIDX(4) +#define JMPB_S5 _JBIDX(5) +#define JMPB_S6 _JBIDX(6) +#define JMPB_S7 _JBIDX(7) +#define JMPB_FP _JBIDX(8) +#define JMPB_SP _JBIDX(9) +#define JMPB_RA _JBIDX(10) + +#define JMPB_SIZE _JBIDX(11) + +#ifndef __ASSEMBLER__ +typedef long long jmp_buf[JMPB_SIZE]; +extern int lib_setjmp(jmp_buf); +extern void lib_longjmp(jmp_buf,int val); +#endif + diff --git a/cfe/cfe/arch/mips/common/include/mipsmacros.h b/cfe/cfe/arch/mips/common/include/mipsmacros.h new file mode 100755 index 0000000..072a5e6 --- /dev/null +++ b/cfe/cfe/arch/mips/common/include/mipsmacros.h @@ -0,0 +1,376 @@ +/* ********************************************************************* + * Broadcom Common Firmware Environment (CFE) + * + * MIPS Macros File: mipsmacros.h + * + * Macros to deal with various mips-related things. + * + * Author: Mitch Lichtenberg (mpl@broadcom.com) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This software is furnished under license and may be used and + * copied only in accordance with the following terms and + * conditions. Subject to these conditions, you may download, + * copy, install, use, modify and distribute modified or unmodified + * copies of this software in source and/or binary form. No title + * or ownership is transferred hereby. + * + * 1) Any source code used, modified or distributed must reproduce + * and retain this copyright notice and list of conditions + * as they appear in the source file. + * + * 2) No right is granted to use any trade name, trademark, or + * logo of Broadcom Corporation. The "Broadcom Corporation" + * name may not be used to endorse or promote products derived + * from this software without the prior written permission of + * Broadcom Corporation. + * + * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED + * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT + * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN + * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + ********************************************************************* */ + +/* ********************************************************************* + * 32/64-bit macros + ********************************************************************* */ + +#ifdef __long64 +#define _VECT_ .dword +#define _LONG_ .dword +#define SR sd +#define LR ld +#define ADD dadd +#define SUB dsub +#define MFC0 dmfc0 +#define MTC0 dmtc0 +#define REGSIZE 8 +#define BPWSIZE 3 /* bits per word size */ +#define _TBLIDX(x) ((x)*REGSIZE) +#else +#define _VECT_ .word +#define _LONG_ .word +#define SR sw +#define LR lw +#define ADD add +#define SUB sub +#define MFC0 mfc0 +#define MTC0 mtc0 +#define REGSIZE 4 +#define BPWSIZE 2 +#define _TBLIDX(x) ((x)*REGSIZE) +#endif + + +/* ********************************************************************* + * NORMAL_VECTOR(addr,vecname,vecdest) + * NORMAL_XVECTOR(addr,vecname,vecdest,code) + * + * Declare a trap or dispatch vector. There are two flavors, + * DECLARE_XVECTOR sets up an indentifying code in k0 before + * jumping to the dispatch routine. + * + * Input parameters: + * addr - vector address + * vecname - for label at that address + * vecdest - destination (place vector jumps to) + * code - code to place in k0 before jumping + * + * Return value: + * nothing + ********************************************************************* */ + + +#define NORMAL_VECTOR(addr,vecname,vecdest) \ + .globl vecname ; \ + .org addr ; \ +vecname: b vecdest ; \ + nop; + +#define NORMAL_XVECTOR(addr,vecname,vecdest,code) \ + .globl vecname ; \ + .org addr ; \ +vecname: b vecdest ; \ + li k0,code ; \ + nop; + + +/* ********************************************************************* + * Evil macros for bi-endian support. + * + * The magic here is in the instruction encoded as 0x10000014. + * + * This instruction in big-endian is: "b .+0x54" + * this instruction in little-endian is: "bne zero,zero,.+0x44" + * + * So, depending on what the system endianness is, it will either + * branch to .+0x54 or not branch at all. + * + * the instructions that follow are: + * + * 0x10000014 "magic branch" (either-endian) + * 0x00000000 nop (bds) (either-endian) + * 0xD0BF1A3C lui k0,0xBFD0 (little-endian) + * 0xxxxx5A27 addu k0,vector (little-endian) + * 0x08004003 jr k0 (little-endian) + * 0x00000000 nop (bds) (little-endian) + * ... space up to offset 0x54 + * ......... b vecaddr (big-endian) + * + * The idea is that the big-endian firmware is first, from 0..1MB + * in the flash, and the little-endian firmware is second, + * from 1..2MB in the flash. The little-endian firmware is + * set to load at BFD00000, so that its initial routines will + * work until relocation is completed. + * + * the instructions at the vectors will either jump to the + * big-endian or little-endian code based on system endianness. + * + * The ROM is built by compiling CFE twice, first with + * CFG_BIENDIAN=1 and CFG_LITTLE=0 (big-endian) and again + * with CFG_BIENDIAN=1 and CFG_LITTLE=1. The resulting + * cfe.bin files are located at 0xBFC00000 and 0xBFD00000 + * for big and little-endian versions, respectively. + * + * More information about how this works can be found in the + * CFE Manual. + ********************************************************************* */ + +#define __SWAPW(x) ((((x) & 0xFF) << 8) | (((x) & 0xFF00) >> 8)) + +#define BIENDIAN_VECTOR(addr,vecname,vecdest) \ + .globl vecname ; \ + .org addr ; \ +vecname: .word 0x10000014 ; \ + .word 0 ; \ + .word ((__SWAPW(BIENDIAN_LE_BASE >> 16)) << 16) | 0x1A3C ; \ + .word (0x00005A27 | (((addr) & 0xFF) << 24) | (((addr) & 0xFF00) << 8)) ; \ + .word 0x08004003 ; \ + .word 0 ; \ + .org ((addr) + 0x54) ; \ + b vecdest ; \ + nop; + +#define BIENDIAN_XVECTOR(addr,vecname,vecdest,code) \ + .globl vecname ; \ + .org addr ; \ +vecname: .word 0x10000014 ; \ + .word 0 ; \ + .word ((__SWAPW(BIENDIAN_LE_BASE >> 16)) << 16) | 0x1A3C ; \ + .word (0x00005A27 | (((addr) & 0xFF) << 24) | (((addr) & 0xFF00) << 8)) ; \ + .word 0x08004003 ; \ + .word 0 ; \ + .org ((addr) + 0x54) ; \ + b vecdest ; \ + li k0,code ; \ + nop; + + + +/* ********************************************************************* + * Declare the right versions of DECLARE_VECTOR and + * DECLARE_XVECTOR depending on how we're building stuff. + * Generally, we only use the biendian version if we're building + * as CFG_BIENDIAN=1 and we're doing the big-endian MIPS version. + ********************************************************************* */ + +#if (CFG_BIENDIAN) && defined(__MIPSEB) +#define DECLARE_VECTOR BIENDIAN_VECTOR +#define DECLARE_XVECTOR BIENDIAN_XVECTOR +#else +#define DECLARE_VECTOR NORMAL_VECTOR +#define DECLARE_XVECTOR NORMAL_XVECTOR +#endif + + + +/* ********************************************************************* + * LOADREL(reg,label) + * + * Load the address of a label, but do it in a position-independent + * way. + * + * Input parameters: + * reg - register to load + * label - label whose address to load + * + * Return value: + * ra is trashed! + ********************************************************************* */ + +#if (!(CFG_RAMAPP)) +#define LOADREL(reg,label) \ + la reg, label ; \ + la ra, 100f ; \ + sub reg, ra ; \ + .set push ; \ + .set noreorder ; \ + bal 100f ; \ + nop ; \ + .set pop ; \ +100: ; \ + addu reg, ra +#else +#define LOADREL(reg,label) \ + la reg,label +#endif + +#if (CFG_RAMAPP) +#define FIXUP(addr) +#else +#define FIXUP(addr) \ + addu addr, s6 +#endif + + + +/* ********************************************************************* + * CALLINIT_KSEG1(label,table,offset) + * CALLINIT_KSEG0(label,table,offset) + * + * Call an initialization routine (usually in another module). + * If initialization routine lives in KSEG1 it may need + * special fixing if using the cached version of CFE (this is + * the default case). CFE is linked at a KSEG0 address. + * + * Embedded PIC is especially tricky, since the "la" + * instruction expands to calculations involving GP. + * In that case, use our table of offsets to + * load the routine address from a table in memory. + * + * Input parameters: + * label - routine to call if we can call directly + * table - symbol name of table containing routine addresses + * offset - offset within the above table + * + * Return value: + * k1,ra is trashed. + ********************************************************************* */ + + +#if CFG_RUNFROMKSEG0 +/* Cached PIC code - call indirect through table */ +#define CALLINIT_KSEG1(table,tableoffset) \ + LOADREL(k1,table) ; \ + or k1,K1BASE ; \ + LR k1,tableoffset(k1) ; \ + FIXUP (k1); \ + or k1,K1BASE ; \ + jal k1 +#define CALLINIT_KSEG0(table,tableoffset) \ + LOADREL(k1,table) ; \ + LR k1,tableoffset(k1) ; \ + FIXUP (k1); \ + jal k1 +#else +/* Uncached PIC code - call indirect through table, always same KSEG */ +#define CALLINIT_KSEG1(table,tableoffset) \ + LOADREL(k1,table) ; \ + LR k1,tableoffset(k1) ; \ + FIXUP (k1); \ + jal k1 +#define CALLINIT_KSEG0 CALLINIT_KSEG1 +#endif + +/* + * CALLINIT_RELOC is used once CFE's relocation is complete and + * the "mem_textreloc" variable is set up. (yes, this is nasty.) + * If 'gp' is set, we can presume that we've relocated + * and it's safe to read "mem_textreloc", otherwise use the + * address as-is from the table. + */ + +#define CALLINIT_RELOC CALLINIT_KSEG0 + +/* ********************************************************************* + * SPIN_LOCK(lock,reg1,reg2) + * + * Acquire a spin lock. + * + * Input parameters: + * lock - symbol (address) of lock to acquire + * reg1,reg2 - registers we can use to acquire lock + * + * Return value: + * nothing (lock acquired) + ********************************************************************* */ + +#define SPIN_LOCK(lock,reg1,reg2) \ + la reg1,lock ; \ +1: sync ; \ + ll reg2,0(reg1) ; \ + bne reg2,zero,1b ; \ + li reg2,1 ; \ + sc reg2,0(reg1) ; \ + beq reg2,zero,1b ; \ + nop + +/* ********************************************************************* + * SPIN_UNLOCK(lock,reg1) + * + * Release a spin lock. + * + * Input parameters: + * lock - symbol (address) of lock to release + * reg1 - a register we can use + * + * Return value: + * nothing (lock released) + ********************************************************************* */ + + +#define SPIN_UNLOCK(lock,reg1) \ + la reg1,lock ; \ + sw zero,0(reg1) + + +/* ********************************************************************* + * SETCCAMODE(treg,mode) + * + * Set cacheability mode. For some of the pass1 workarounds we + * do this alot, so here's a handy macro. + * + * Input parameters: + * treg - temporary register we can use + * mode - new mode (K_CFG_K0COH_xxx) + * + * Return value: + * nothing + ********************************************************************* */ + +#define SETCCAMODE(treg,mode) \ + mfc0 treg,C0_CONFIG ; \ + srl treg,treg,3 ; \ + sll treg,treg,3 ; \ + or treg,treg,mode ; \ + mtc0 treg,C0_CONFIG ; \ + HAZARD + + +/* ********************************************************************* + * Declare variables + ********************************************************************* */ + +#define DECLARE_LONG(x) \ + .global x ; \ +x: _LONG_ 0 + + + + +/* + * end + */ diff --git a/cfe/cfe/arch/mips/common/include/segtable.h b/cfe/cfe/arch/mips/common/include/segtable.h new file mode 100755 index 0000000..8a003f0 --- /dev/null +++ b/cfe/cfe/arch/mips/common/include/segtable.h @@ -0,0 +1,97 @@ +/* ********************************************************************* + * Broadcom Common Firmware Environment (CFE) + * + * Segment Table definitions File: segtable.h + * + * The 'segment table' (bad name) is just a list of addresses + * of important stuff used during initialization. We use these + * indirections to make life less complicated during code + * relocation. + * + * Author: Mitch Lichtenberg (mpl@broadcom.com) + * + ********************************************************************* + * + * Copyright 2000,2001,2002,2003 + * Broadcom Corporation. All rights reserved. + * + * This software is furnished under license and may be used and + * copied only in accordance with the following terms and + * conditions. Subject to these conditions, you may download, + * copy, install, use, modify and distribute modified or unmodified + * copies of this software in source and/or binary form. No title + * or ownership is transferred hereby. + * + * 1) Any source code used, modified or distributed must reproduce + * and retain this copyright notice and list of conditions + * as they appear in the source file. + * + * 2) No right is granted to use any trade name, trademark, or + * logo of Broadcom Corporation. The "Broadcom Corporation" + * name may not be used to endorse or promote products derived + * from this software without the prior written permission of + * Broadcom Corporation. + * + * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED + * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR + * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT + * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN + * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + ********************************************************************* */ + + +#if !defined(__ASSEMBLER__) +#define _TBLIDX(x) (x) /* C handles indexing for us */ +typedef long segtable_t; /* 32 for long32, 64 for long64 */ +#endif + +/* + * Definitions for the segment_table + */ + +#define R_SEG_ETEXT _TBLIDX(0) /* end of text segment */ +#define R_SEG_FDATA _TBLIDX(1) /* Beginning of data segment */ +#define R_SEG_EDATA _TBLIDX(2) /* end of data segment */ +#define R_SEG_END _TBLIDX(3) /* End of BSS */ +#define R_SEG_FTEXT _TBLIDX(4) /* Beginning of text segment */ +#define R_SEG_FBSS _TBLIDX(5) /* Beginning of BSS */ +#define R_SEG_GP _TBLIDX(6) /* Global Pointer */ +#define R_SEG_RELOCSTART _TBLIDX(7) /* Start of reloc table */ +#define R_SEG_RELOCEND _TBLIDX(8) /* End of reloc table */ +#define R_SEG_APIENTRY _TBLIDX(9) /* API Entry address */ + +/* + * Definitions for the init_table + */ + +#define R_INIT_EARLYINIT _TBLIDX(0) /* pointer to board_earlyinit */ +#define R_INIT_SETLEDS _TBLIDX(1) /* pointer to board_setleds */ +#define R_INIT_DRAMINFO _TBLIDX(2) /* pointer to board_draminfo */ +#define R_INIT_CPUINIT _TBLIDX(3) /* pointer tp cpuinit */ +#define R_INIT_ALTCPU_START1 _TBLIDX(4) /* pointer to altcpu_start1 */ +#define R_INIT_ALTCPU_START2 _TBLIDX(5) /* pointer to altcpu_start2 */ +#define R_INIT_ALTCPU_RESET _TBLIDX(6) /* pointer to altcpu_reset */ +#define R_INIT_CPURESTART _TBLIDX(7) /* pointer to cpurestart */ +#define R_INIT_DRAMINIT _TBLIDX(8) /* pointer to draminit */ +#define R_INIT_CACHEOPS _TBLIDX(9) /* pointer to cacheops */ +#define R_INIT_TLBHANDLER _TBLIDX(10) /* pointer to TLB fault handler */ +#define R_INIT_CMDSTART _TBLIDX(11) /* pointer to cfe_main */ +#define R_INIT_CMDRESTART _TBLIDX(12) /* pointer to cfe_cmd_restart */ +#define R_INIT_DOXREQ _TBLIDX(13) /* pointer to cfe_doxreq */ +#define R_INIT_TP1_SWITCH _TBLIDX(14) /* pointer to tp1_switch */ +#define R_INIT_SIZERAM _TBLIDX(15) /* pointer to board_sizeram */ + +/* + * Definitions for the diag_table + */ + +#define R_DIAG_TEST1 _TBLIDX(0) /* after CPU and cache init, before DRAM init */ +#define R_DIAG_TEST2 _TBLIDX(1) /* after DRAM init, before main */ |