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authorJames <>2015-09-26 12:29:31 +0100
committerJames <>2015-09-26 12:29:31 +0100
commit626d9efa74685720020e816f3a917b7591d3cf7a (patch)
treed22eef73ae82287b30a1140decb4fc806d39d621 /target/linux/ramips/patches-3.18/0017-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch
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Diffstat (limited to 'target/linux/ramips/patches-3.18/0017-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch')
-rw-r--r--target/linux/ramips/patches-3.18/0017-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch99
1 files changed, 99 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.18/0017-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch b/target/linux/ramips/patches-3.18/0017-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch
new file mode 100644
index 0000000..310d362
--- /dev/null
+++ b/target/linux/ramips/patches-3.18/0017-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch
@@ -0,0 +1,99 @@
+From f8da5caf65926d44581d4e7914b28ceab3d28a7c Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Sun, 14 Jul 2013 23:08:11 +0200
+Subject: [PATCH 17/57] MIPS: use set_mode() to enable/disable the cevt-r4k
+ irq
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ arch/mips/kernel/cevt-r4k.c | 37 +++++++++++++++++++++++++++++++------
+ 1 file changed, 31 insertions(+), 6 deletions(-)
+
+--- a/arch/mips/kernel/cevt-r4k.c
++++ b/arch/mips/kernel/cevt-r4k.c
+@@ -29,12 +29,6 @@ static int mips_next_event(unsigned long
+ return res;
+ }
+
+-void mips_set_clock_mode(enum clock_event_mode mode,
+- struct clock_event_device *evt)
+-{
+- /* Nothing to do ... */
+-}
+-
+ DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device);
+ int cp0_timer_irq_installed;
+
+@@ -75,9 +69,38 @@ struct irqaction c0_compare_irqaction =
+ .name = "timer",
+ };
+
++void mips_set_clock_mode(enum clock_event_mode mode,
++ struct clock_event_device *evt)
++{
++#ifdef CONFIG_CEVT_SYSTICK_QUIRK
++ switch (mode) {
++ case CLOCK_EVT_MODE_ONESHOT:
++ if (cp0_timer_irq_installed)
++ break;
++
++ cp0_timer_irq_installed = 1;
++
++ setup_irq(evt->irq, &c0_compare_irqaction);
++ break;
++
++ case CLOCK_EVT_MODE_SHUTDOWN:
++ if (!cp0_timer_irq_installed)
++ break;
++
++ cp0_timer_irq_installed = 0;
++ free_irq(evt->irq, &c0_compare_irqaction);
++ break;
++
++ default:
++ pr_err("Unhandeled mips clock_mode\n");
++ break;
++ }
++#endif
++}
+
+ void mips_event_handler(struct clock_event_device *dev)
+ {
++
+ }
+
+ /*
+@@ -198,12 +221,14 @@ int r4k_clockevent_init(void)
+
+ clockevents_register_device(cd);
+
++#ifndef CONFIG_CEVT_SYSTICK_QUIRK
+ if (cp0_timer_irq_installed)
+ return 0;
+
+ cp0_timer_irq_installed = 1;
+
+ setup_irq(irq, &c0_compare_irqaction);
++#endif
+
+ return 0;
+ }
+--- a/arch/mips/ralink/Kconfig
++++ b/arch/mips/ralink/Kconfig
+@@ -1,11 +1,16 @@
+ if RALINK
+
++config CEVT_SYSTICK_QUIRK
++ bool
++ default n
++
+ config CLKEVT_RT3352
+ bool
+ depends on SOC_RT305X || SOC_MT7620
+ default y
+ select CLKSRC_OF
+ select CLKSRC_MMIO
++ select CEVT_SYSTICK_QUIRK
+
+ config RALINK_ILL_ACC
+ bool