trunk-47048

479 files changed, 43702 insertions, 0 deletions

diff --git a/target/linux/brcm63xx/Makefile b/target/linux/brcm63xx/Makefile
new file mode 100644
index 0000000..f96897c
--- /dev/null
+++ b/target/linux/brcm63xx/Makefile
@@ -0,0 +1,27 @@
+#
+# Copyright (C) 2006-2009 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+include $(TOPDIR)/rules.mk
+
+ARCH:=mips
+BOARD:=brcm63xx
+BOARDNAME:=Broadcom BCM63xx
+SUBTARGETS:=generic smp
+FEATURES:=squashfs usb atm pci pcmcia usbgadget
+KERNEL_PATCHVER:=4.1
+MAINTAINER:=Jonas Gorski <jogo@openwrt.org>
+
+include $(INCLUDE_DIR)/target.mk
+
+DEFAULT_PACKAGES += swconfig kmod-gpio-button-hotplug
+
+define Target/Description
+	Build firmware images for Broadcom based xDSL/routers
+	currently supports BCM6338, BCM6348 and BCM6358 based devices.
+	(e.g. Inventel Livebox, Siemens SE515, Neufbox 4)
+endef
+
+$(eval $(call BuildTarget))
diff --git a/target/linux/brcm63xx/base-files.mk b/target/linux/brcm63xx/base-files.mk
new file mode 100644
index 0000000..d6682bd
--- /dev/null
+++ b/target/linux/brcm63xx/base-files.mk
@@ -0,0 +1,5 @@
+define Package/base-files/install-target
+	rm -f $(1)/etc/config/network
+endef
+
+
diff --git a/target/linux/brcm63xx/base-files/etc/diag.sh b/target/linux/brcm63xx/base-files/etc/diag.sh
new file mode 100644
index 0000000..7826fad
--- /dev/null
+++ b/target/linux/brcm63xx/base-files/etc/diag.sh
@@ -0,0 +1,137 @@
+#!/bin/sh
+# Copyright (C) 2007-2013 OpenWrt.org
+
+. /lib/functions/leds.sh
+. /lib/brcm63xx.sh
+
+set_state() {
+	case "$(brcm63xx_board_name)" in
+	a4001n1)
+		status_led="A4001N1:green:power"
+		;;
+	a4001n)
+		status_led="A4001N:green:power"
+		;;
+	ar-5381u)
+		status_led="AR-5381u:green:power"
+		;;
+	ar-5387un)
+		status_led="AR-5387un:green:power"
+		;;
+	bcm96348gw)
+		status_led="96348GW:green:power"
+		;;
+	bcm963281tan)
+		status_led="963281TAN::power"
+		;;
+	bcm96328avng)
+		status_led="96328avng::power"
+		;;
+	bcm96348gw-11)
+		status_led="96348GW-11:green:power"
+		;;
+	spw303v)
+		status_led="spw303v:green:power+adsl"
+		;;
+	vr-3025un)
+		status_led="VR-3025un:green:power"
+		;;
+	vr-3025u)
+		status_led="VR-3025u:green:power"
+		;;
+	vr-3026e)
+		status_led="VR-3026e:green:power"
+		;;
+	wap-5813n)
+		status_led="WAP-5813n:green:power"
+		;;
+	ar1004g)
+		status_led="AR1004G:green:power"
+		;;
+	dsl-274xb-c|\
+	dsl-274xb-f)
+		status_led="dsl-274xb:green:power"
+		;;
+	dsl-275xb-d)
+		status_led="dsl-275xb:green:power"
+		;;
+	cpva642)
+		status_led="CPVA642:green:power:"
+		;;
+	ct536_ct5621)
+		status_led="CT536_CT5621:green:power"
+		;;
+	cvg834g)
+		status_led="CVG834G:green:power"
+		;;
+	dsl-2640b-b)
+		status_led="D-4P-W:green:power"
+		;;
+	dgnd3700v1_dgnd3800b)
+		status_led="DGND3700v1_3800B:green:power"
+		;;
+	fast2504n)
+		status_led="fast2504n:green:ok"
+		;;
+	fast2704n)
+		status_led2="F@ST2704N:red:power"
+		;;
+	fast2704v2)
+		status_led="F@ST2704V2:green:power"
+		;;
+	homehub2a)
+		status_led="HOMEHUB2A:green:upgrading"
+		status_led2="HOMEHUB2A:blue:upgrading"
+		;;
+	gw6200)
+		status_led="GW6200:green:line1"
+		status_led2="GW6200:green:tel"
+		;;
+	hg553)
+		status_led="HW553:blue:power"
+		;;
+	hg556a_*)
+		status_led="HW556:red:power"
+		;;
+	hg520)
+		status_led="HW520:green:net"
+		;;
+	hg655b)
+		status_led="HW65x:green:power"
+		;;
+	p870hw-51a_v2)
+		status_led="P870HW-51a:green:power"
+		;;
+	rta770bw)
+		status_led="RTA770BW:green:diag"
+		;;
+	rta770w)
+		status_led="RTA770W:green:diag"
+		;;
+	spw500v)
+		status_led="SPW500V:green:power"
+		;;
+	v2110)
+		status_led="V2110:power:green"
+		;;
+	esac
+
+	case "$1" in
+	preinit)
+		status_led_set_timer 200 200
+		;;
+	failsafe)
+		status_led_set_timer 50 50
+		;;
+	preinit_regular)
+		status_led_set_timer 500 500
+		;;
+	done)
+		if [ "${status_led/power}" != "$status_led" ]; then
+			status_led_on
+		else
+			status_led_off
+		fi
+		;;
+	esac
+}
diff --git a/target/linux/brcm63xx/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom b/target/linux/brcm63xx/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
new file mode 100644
index 0000000..4347485
--- /dev/null
+++ b/target/linux/brcm63xx/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
@@ -0,0 +1,45 @@
+#!/bin/sh
+# Based on gabors ralink wisoc implementation.
+
+rt2x00_eeprom_die() {
+	echo "rt2x00 eeprom: " "$*"
+	exit 1
+}
+
+rt2x00_eeprom_extract() {
+	local part=$1
+	local offset=$2
+	local count=$3
+	local mtd
+
+	. /lib/functions.sh
+
+	mtd=$(find_mtd_part $part)
+	[ -n "$mtd" ] || \
+		rt2x00_eeprom_die "no mtd device found for partition $part"
+
+	dd if=$mtd of=/lib/firmware/$FIRMWARE bs=1 skip=$offset count=$count || \
+		rt2x00_eeprom_die "failed to extract from $mtd"
+}
+
+[ -e /lib/firmware/$FIRMWARE ] && exit 0
+
+. /lib/brcm63xx.sh
+
+board=$(brcm63xx_board_name)
+
+case "$FIRMWARE" in
+"rt2x00.eeprom" )
+	case $board in
+	hg556a_c)
+		rt2x00_eeprom_extract "cal_data" 130560 512
+		;;
+	hg655b)
+		rt2x00_eeprom_extract "cal_data" 0 512
+		;;
+	*)
+		rt2x00_eeprom_die "board $board is not supported yet"
+		;;
+	esac
+	;;
+esac
diff --git a/target/linux/brcm63xx/base-files/etc/uci-defaults/01_leds b/target/linux/brcm63xx/base-files/etc/uci-defaults/01_leds
new file mode 100644
index 0000000..bdb3dad
--- /dev/null
+++ b/target/linux/brcm63xx/base-files/etc/uci-defaults/01_leds
@@ -0,0 +1,53 @@
+#!/bin/sh
+#
+# Copyright (C) 2013-2014 OpenWrt.org
+#
+
+. /lib/functions/uci-defaults.sh
+. /lib/brcm63xx.sh
+
+case "$(brcm63xx_board_name)" in
+a4001n1)
+	ucidef_set_led_netdev "lan" "LAN" "A4001N1:green:eth" "eth0"
+	ucidef_set_led_usbdev "usb" "USB" "A4001N1:green:3g" "1-1"
+	;;
+a4001n)
+	ucidef_set_led_usbdev "usb" "USB" "A4001N:green:usb" "1-1"
+	;;
+dgnd3700v1_dgnd3800b)
+	ucidef_set_led_netdev "lan" "LAN" "DGND3700v1_3800B:green:lan" "eth0.1"
+	ucidef_set_led_netdev "wan" "WAN" "DGND3700v1_3800B:green:inet" "eth0.2"
+	ucidef_set_led_netdev "wlan0" "WIFI2G" "DGND3700v1_3800B:green:wifi2g" "wlan0"
+	ucidef_set_led_netdev "wlan1" "WIFI5G" "DGND3700v1_3800B:blue:wifi5g" "wlan1"
+	ucidef_set_led_usbdev "usb1" "USB1" "DGND3700v1_3800B:green:usb-back" "1-1"
+	ucidef_set_led_usbdev "usb2" "USB2" "DGND3700v1_3800B:green:usb-front" "1-2"
+	;;
+fast2704n)
+	ucidef_set_led_netdev "wan" "WAN" "F@ST2704N:green:inet" "eth0.2"
+	;;
+fast2704v2)
+	ucidef_set_led_usbdev "usb" "USB" "F@ST2704V2:green:usb" "1-1"
+	;;
+hg553)
+	ucidef_set_led_netdev "lan" "LAN" "HW553:blue:lan" "eth0"
+	ucidef_set_led_usbdev "usb1" "USB1" "HW553:red:hspa" "1-1"
+	ucidef_set_led_usbdev "usb2" "USB2" "HW553:blue:hspa" "1-2"
+	;;
+hg556a_*)
+	ucidef_set_led_netdev "lan" "LAN" "HW556:red:dsl" "eth0"
+	ucidef_set_led_usbdev "usb" "USB" "HW556:red:hspa" "1-2"
+	;;
+hg655b)
+	ucidef_set_led_usbdev "usb" "USB" "HW65x:green:usb" "1-2"
+	;;
+homehub2a)
+	ucidef_set_led_netdev "lan" "LAN" "HOMEHUB2A:blue:broadband" "eth0.1"
+	ucidef_set_led_netdev "wlan0" "WIFI" "HOMEHUB2A:green:wireless" "wlan0"
+	ucidef_set_led_usbdev "usb1" "USB1" "HOMEHUB2A:blue:phone" "1-1"
+	ucidef_set_led_usbdev "usb2" "USB2" "HOMEHUB2A:green:phone" "2-1"
+	;;
+esac
+
+ucidef_commit_leds
+
+exit 0
diff --git a/target/linux/brcm63xx/base-files/etc/uci-defaults/02_network b/target/linux/brcm63xx/base-files/etc/uci-defaults/02_network
new file mode 100644
index 0000000..129514b
--- /dev/null
+++ b/target/linux/brcm63xx/base-files/etc/uci-defaults/02_network
@@ -0,0 +1,154 @@
+#!/bin/sh
+#
+# Copyright (C) 2012 OpenWrt.org
+#
+
+[ -e /etc/config/network ] && exit 0
+
+touch /etc/config/network
+
+. /lib/functions/uci-defaults.sh
+. /lib/brcm63xx.sh
+
+ucidef_set_interface_loopback
+
+case "$(brcm63xx_board_name)" in
+
+cvg834g |\
+rta770bw |\
+rta770w |\
+spw303v |\
+spw500v)
+	ucidef_set_interface_lan "eth0"
+	;;
+
+ar1004g |\
+bcm96338gw |\
+bcm96338w |\
+cpva642 |\
+ct-5365 |\
+ct-536p_5621t |\
+ct-6373 |\
+dg834g_v4 |\
+dsl-2640b-b |\
+dsl-2640u |\
+fast2604 |\
+rta1320 |\
+v2110)
+	ucidef_set_interface_lan "eth0"
+	ucidef_add_switch "eth0" "1" "1"
+	ucidef_add_switch_vlan "eth0" "1" "0 1 2 3 4 5"
+	;;
+
+agpf-s0 |\
+bcm96348gw |\
+bcm96348gw-10 |\
+bcm96348gw-11 |\
+bcm96358vw |\
+bcm96358vw2 |\
+cpva502p |\
+dg834gt |\
+dmv-s0 |\
+dsl-2650u |\
+dv-201amr |\
+f5d7633 |\
+fast2404 |\
+magic |\
+rg100a |\
+rta1025W |\
+td-w8900gb |\
+usr9108 |\
+v2500v_bb)
+	ucidef_set_interfaces_lan_wan "eth1" "eth0"
+	ucidef_add_switch "eth1" "1" "1"
+	ucidef_add_switch_vlan "eth1" "1" "0 1 2 3 4 5"
+	;;
+
+dsl-274xb-c |\
+hg553 |\
+hg556a_* |\
+homehub2a)
+	ucidef_set_interface_lan "eth0.1"
+	ucidef_add_switch "eth0" "1" "1"
+	ucidef_add_switch_vlan "eth0" "1" "0 1 2 3 4 5t"
+	;;
+
+dva-g3810bn |\
+hg520 |\
+neufbox4)
+	ucidef_set_interfaces_lan_wan "eth1.1" "eth0"
+	ucidef_add_switch "eth1" "1" "1"
+	ucidef_add_switch_vlan "eth1" "1" "0 1 2 3 4 5t"
+	;;
+
+a4001n1 |\
+a4001n |\
+ar-5381u |\
+ar-5387un |\
+bcm963281tan |\
+bcm96328avng |\
+bcm96368mvngr |\
+dsl-274xb-f |\
+dsl-275xb-d |\
+fast2504n |\
+fast2704v2 |\
+hg655b |\
+p870hw-51a_v2 |\
+vr-3025un |\
+vr-3025u |\
+vr-3026e)
+	ucidef_set_interface_lan "eth0.1"
+	ucidef_add_switch "eth0" "1" "1"
+	ucidef_add_switch_vlan "eth0" "1" "0 1 2 3 8t"
+	;;
+
+bcm96368mvwg)
+	ucidef_set_interface_lan "eth0.1"
+	ucidef_add_switch "eth0" "1" "1"
+	ucidef_add_switch_vlan "eth0" "1" "1 2 4 5 8t"
+	;;
+
+wap-5813n)
+	ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
+	ucidef_add_switch "eth0" "1" "1"
+	ucidef_add_switch_vlan "eth0" "1" "0 1 2 3 5t"
+	ucidef_add_switch_vlan "eth0" "2" "4 5t"
+	;;
+
+fast2704n |\
+dgnd3700v1_dgnd3800b)
+	ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
+	ucidef_add_switch "eth0" "1" "1"
+	ucidef_add_switch_vlan "eth0" "1" "1 2 3 4 8t"
+	ucidef_add_switch_vlan "eth0" "2" "0 8t"
+	;;
+
+neufbox6)
+	ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
+	ucidef_add_switch "switch0" "1" "1"
+	ucidef_add_switch_vlan "switch0" "1" "1 2 3 4 9t"
+	ucidef_add_switch_vlan "switch0" "2" "0 9t"
+	;;
+
+vg50)
+	ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
+	ucidef_add_switch "switch0" "1" "1"
+	ucidef_add_switch_vlan "switch0" "1" "0 1 2 3 8t"
+	ucidef_add_switch_vlan "switch0" "2" "4 8t"
+	;;
+
+bcm963268bu_p300)
+	ucidef_set_interface_lan "eth0.1"
+	ucidef_add_switch "switch0" "1" "1"
+	ucidef_add_switch_vlan "switch0" "1" "0 3 4 5 6 7 8t"
+	;;
+
+*)
+	ucidef_set_interfaces_lan_wan "eth1" "eth0"
+	;;
+
+esac
+
+uci commit network
+
+exit 0
diff --git a/target/linux/brcm63xx/base-files/etc/uci-defaults/09_fix_crc b/target/linux/brcm63xx/base-files/etc/uci-defaults/09_fix_crc
new file mode 100644
index 0000000..f307a4c
--- /dev/null
+++ b/target/linux/brcm63xx/base-files/etc/uci-defaults/09_fix_crc
@@ -0,0 +1,38 @@
+#!/bin/sh
+#
+# Copyright (C) 2007 OpenWrt.org
+#
+#
+
+. /lib/brcm63xx.sh
+
+do_fixcrc() {
+	mtd fixtrx linux
+}
+
+case "$(brcm63xx_board_name)" in
+	a4001n |\
+	a4001n1 |\
+	ar-5381u |\
+	ar-5387un |\
+	bcm96328avng |\
+	bcm963281tan |\
+	cpva502p |\
+	cpva642 |\
+	ct-6373 |\
+	dsl-274xb-f |\
+	magic |\
+	p870hw-51a_v2 |\
+	rta770bw |\
+	rta770w |\
+	spw303v |\
+	v2110 |\
+	v2500v_bb |\
+	vr-3025u |\
+	vr-3025un |\
+	vr-3026e |\
+	wap-5813n)
+		do_fixcrc
+		;;
+esac
+
diff --git a/target/linux/brcm63xx/base-files/lib/brcm63xx.sh b/target/linux/brcm63xx/base-files/lib/brcm63xx.sh
new file mode 100755
index 0000000..1a97c86
--- /dev/null
+++ b/target/linux/brcm63xx/base-files/lib/brcm63xx.sh
@@ -0,0 +1,292 @@
+#!/bin/sh
+#
+# Copyright (C) 2007 OpenWrt.org
+#
+#
+
+board_id=""
+sys_mtd_part=""
+ifname=""
+
+brcm63xx_dt_detect() {
+	local board_name
+
+	case "$1" in
+	"ADB P.DG A4001N")
+		board_name="a4001n"
+		;;
+	"ADB P.DG A4001N1")
+		board_name="a4001n1"
+		;;
+	"Alcatel RG100A")
+		board_name="rg100a"
+		;;
+	"ASMAX AR 1004g")
+		board_name="ar100g"
+		;;
+	"Belkin F5D7633")
+		board_name="f5d7633"
+		;;
+	"Broadcom 96348R reference board")
+		board_name="bcm96348r"
+		;;
+	"Broadcom BCM96318REF reference board")
+		board_name="bcm96318ref"
+		;;
+	"Broadcom BCM96318REF_P300 reference board")
+		board_name="bcm96318ref_p300"
+		;;
+	"Broadcom BCM963268BU_P300 reference board")
+		board_name="bcm963268bu_p300"
+		;;
+	"Broadcom BCM963269BHR reference board")
+		board_name="bcm963269bhr"
+		;;
+	"Broadcom bcm963281TAN reference board")
+		board_name="bcm963281tan"
+		;;
+	"Broadcom BCM96328avng reference board")
+		board_name="bcm96328avng"
+		;;
+	"Broadcom BCM96345GW2 reference board")
+		board_name="bcm96345gw2"
+		;;
+	"Broadcom BCM96348GW-10 reference board")
+		board_name="bcm96348gw-10"
+		;;
+	"Broadcom BCM96348GW-11 reference board")
+		board_name="bcm96348gw-11"
+		;;
+	"Broadcom BCM96348GW reference board")
+		board_name="bcm96358gw"
+		;;
+	"Broadcom BCM96358VW reference board")
+		board_name="bcm96358vw"
+		;;
+	"Broadcom BCM96358VW2 reference board")
+		board_name="bcm96358vw2"
+		;;
+	"Broadcom BCM96368MVNgr reference board")
+		board_name="bcm96368mvngr"
+		;;
+	"Broadcom BCM96368MVWG reference board")
+		board_name="bcm96368mvwg"
+		;;
+	"BT Home Hub 2.0 Type A")
+		board_name="homehub2a"
+		;;
+	"BT Voyager 2110")
+		board_name="v2110"
+		;;
+	"BT Voyager V2500V")
+		board_name="v2500v_bb"
+		;;
+	"Comtrend AR-5381u")
+		board_name="ar-5381u"
+		;;
+	"Comtrend AR-5387un")
+		board_name="ar-5387un"
+		;;
+	"Comtrend CT-5365")
+		board_name="ct-5365"
+		;;
+	"Comtrend CT-536+/CT-5621T")
+		board_name="ct-536p_5621t"
+		;;
+	"Comtrend CT-6373")
+		board_name="ct-6373"
+		;;
+	"Comtrend VR-3025u")
+		board_name="vr-3025u"
+		;;
+	"Comtrend VR-3025un")
+		board_name="vr-3025un"
+		;;
+	"Comtrend VR-3026e")
+		board_name="vr-3026e"
+		;;
+	"Comtrend WAP-5813n")
+		board_name="wap-5813n"
+		;;
+	"Davolink DV-201AMR")
+		board_name="dv-201amr"
+		;;
+	"D-Link DSL-2640B rev B2")
+		board_name="dsl-2640b-b"
+		;;
+	"D-Link DSL-2640U/BRU/C")
+		board_name="dsl-2640u"
+		;;
+	"D-Link DSL-2650U")
+		board_name="dsl-2650u"
+		;;
+	"D-Link DSL-2740B/DSL-2741B rev C2/3")
+		board_name="dsl-274xb-c"
+		;;
+	"D-Link DSL-2740B/DSL-2741B rev F1")
+		board_name="dsl-274xb-f"
+		;;
+	"D-Link DSL-2750B/DSL-2751 rev D1")
+		board_name="dsl-275xb-d"
+		;;
+	"D-Link DVA-G3810BN/TL")
+		board_name="dva-g3810bn"
+		;;
+	"Dynalink RTA770BW")
+		board_name="rta770bw"
+		;;
+	"Dynalink RTA770W")
+		board_name="rta770w"
+		;;
+	"Dynalink RTA1025W")
+		board_name="rta1025w"
+		;;
+	"Dynalink RTA1320")
+		board_name="rta1320"
+		;;
+	"Huawei EchoLife HG520v")
+		board_name="hg520v"
+		;;
+	"Huawei EchoLife HG553")
+		board_name="hg553"
+		;;
+	"Huawei EchoLife HG556a (version A)")
+		board_name="hg556a_a"
+		;;
+	"Huawei EchoLife HG556a (version B)")
+		board_name="hg556a_b"
+		;;
+	"Huawei EchoLife HG556a (version C)")
+		board_name="hg556a_c"
+		;;
+	"Huawei HG655b")
+		board_name="hg655b"
+		;;
+	"Inteno VG50")
+		board_name="vg50"
+		;;
+	"Inventel Livebox 1")
+		board_name="livebox1"
+		;;
+	"Netgear CVG834G")
+		board_name="cvg834g"
+		;;
+	"Netgear DG834GT/PN")
+		board_name="dg834gt"
+		;;
+	"Netgear DG834G v4")
+		board_name="dg834g_v4"
+		;;
+	"Netgear DGND3700v1/DGND3800B")
+		board_name="dgnd3700v1_dgnd3800b"
+		;;
+	"Pirelli A226G")
+		board_name="a226g"
+		;;
+	"Pirelli A226M")
+		board_name="a226m"
+		;;
+	"Pirelli A226M-FWB")
+		board_name="a226m-fwb"
+		;;
+	"Pirelli Alice Gate AGPF-S0")
+		board_name="agpf-s0"
+		;;
+	"Sagem F@ST2404")
+		board_name="fast2404"
+		;;
+	"Sagem F@ST2504n")
+		board_name="fast2504n"
+		;;
+	"Sagem F@ST2604")
+		board_name="fast2604"
+		;;
+	"Sagem F@ST2704N")
+		board_name="fast2704n"
+		;;
+	"Sagem F@ST2704V2")
+		board_name="fast2704v2"
+		;;
+	"SFR Neuf Box 4"*)
+		board_name="neufbox4"
+		;;
+	"SFR neufbox 6 (Sercomm)")
+		board_name="neufbox6"
+		;;
+	"T-Com Speedport W303 V")
+		board_name="spw303v"
+		;;
+	"T-Com Speedport W500 V")
+		board_name="spw500v"
+		;;
+	"TECOM GW6000")
+		board_name="g6000"
+		;;
+	"TECOM GW6200")
+		board_name="g6200"
+		;;
+	"Telsey CVPA502+")
+		board_name="cpva502p"
+		;;
+	"Telsey CPVA642-type (CPA-ZNTE60T)")
+		board_name="cpva642"
+		;;
+	"Telsey MAGIC")
+		board_name="magic"
+		;;
+	"TP-Link TD-W8900GB")
+		board_name="td-w8900gb"
+		;;
+	"USRobotics 9108")
+		board_name="usr9108"
+		;;
+	"Zyxel P870HW-51a v2")
+		board_name="p870hw-51a_v2"
+		;;
+	*)
+		board_name="unknown"
+		;;
+	esac
+
+	echo "$board_name"
+}
+
+brcm63xx_legacy_detect() {
+	local board_name
+
+	case "$1" in
+	*)
+		board_name="unknown"
+		;;
+	esac
+
+	echo "$board_name"
+}
+
+brcm63xx_detect() {
+	local board_name model
+
+	board_id=$(awk 'BEGIN{FS="[ \t:/]+"} /system type/ {print $4}' /proc/cpuinfo)
+
+	if [ -e /proc/device-tree ]; then
+		model=$(cat /proc/device-tree/model)
+		board_name=$(brcm63xx_dt_detect "$model")
+	else
+		model="Unknown bcm63xx board"
+		board_name=$(brcm63xx_legacy_detect "$board_id")
+	fi
+
+	[ -e "/tmp/sysinfo" ] || mkdir -p "/tmp/sysinfo"
+
+	echo "$board_name" > /tmp/sysinfo/board_name
+	echo "$model" > /tmp/sysinfo/model
+}
+
+brcm63xx_board_name() {
+	local name
+
+	[ -f /tmp/sysinfo/board_name ] && name=$(cat /tmp/sysinfo/board_name)
+	[ -n "$name" ] || name="unknown"
+
+	echo $name
+}
diff --git a/target/linux/brcm63xx/base-files/lib/preinit/03_do_brcm63xx.sh b/target/linux/brcm63xx/base-files/lib/preinit/03_do_brcm63xx.sh
new file mode 100644
index 0000000..4179695
--- /dev/null
+++ b/target/linux/brcm63xx/base-files/lib/preinit/03_do_brcm63xx.sh
@@ -0,0 +1,9 @@
+#!/bin/sh
+
+do_brcm63xx() {
+	. /lib/brcm63xx.sh
+
+	brcm63xx_detect
+}
+
+boot_hook_add preinit_main do_brcm63xx
diff --git a/target/linux/brcm63xx/base-files/lib/preinit/05_failsafe_config_switch_brcm63xx b/target/linux/brcm63xx/base-files/lib/preinit/05_failsafe_config_switch_brcm63xx
new file mode 100644
index 0000000..e1653e3
--- /dev/null
+++ b/target/linux/brcm63xx/base-files/lib/preinit/05_failsafe_config_switch_brcm63xx
@@ -0,0 +1,10 @@
+#!/bin/sh
+
+failsafe_ip() {
+	[ -n "$pi_ifname" ] && grep -q "$pi_ifname" /proc/net/dev && {
+        	ifconfig $pi_ifname $pi_ip netmask $pi_netmask broadcast $pi_broadcast up
+        }
+}
+
+boot_hook_add failsafe failsafe_ip
+
diff --git a/target/linux/brcm63xx/base-files/lib/preinit/05_init_interfaces_brcm63xx b/target/linux/brcm63xx/base-files/lib/preinit/05_init_interfaces_brcm63xx
new file mode 100644
index 0000000..abf5b89
--- /dev/null
+++ b/target/linux/brcm63xx/base-files/lib/preinit/05_init_interfaces_brcm63xx
@@ -0,0 +1,48 @@
+#!/bin/sh
+
+. /lib/brcm63xx.sh
+
+set_preinit_iface() {
+	case "$(brcm63xx_board_name)" in
+	a4001n |\
+	a4001n1 |\
+	ar-5381u |\
+	ar-5387un |\
+	bcm963281tan |\
+	bcm96328avng |\
+	cpva642 |\
+	ct536_ct5621 |\
+	cvg834g |\
+	dgnd3700v1_dgnd3800b |\
+	dsl-2640b-b |\
+	dsl-274xb-c |\
+	dsl-274xb-f |\
+	dsl-275xb-d |\
+	fast2504n |\
+	fast2704v2 |\
+	hg553 |\
+	hg556a_* |\
+	hg520 |\
+	neufbox6 |\
+	p870hw-51a_v2 |\
+	rta770bw |\
+	rta770w |\
+	spw303v |\
+	spw500v |\
+	v2110 |\
+	vr-3025un |\
+	vr-3025u |\
+	vr-3026e |\
+	wap-5813n)
+		ifname=eth0
+		;;
+	bcm96348gw |\
+	bcm96348gw-11 |\
+	gw6000 |\
+	gw6200)
+		ifname=eth1
+		;;
+	esac
+}
+
+boot_hook_add preinit_main set_preinit_iface
diff --git a/target/linux/brcm63xx/base-files/lib/preinit/15_set_preinit_interface_brcm63xx b/target/linux/brcm63xx/base-files/lib/preinit/15_set_preinit_interface_brcm63xx
new file mode 100644
index 0000000..7655fb7
--- /dev/null
+++ b/target/linux/brcm63xx/base-files/lib/preinit/15_set_preinit_interface_brcm63xx
@@ -0,0 +1,27 @@
+#!/bin/sh
+
+port_net_echo() {
+	[ -n "$pi_ifname" ] && grep -q "$pi_ifname" /proc/net/dev && {
+		if [ "$pi_preinit_net_messages" = "y" ] || [ "$pi_failsafe_net_message" = "true" ] && [ "$pi_preinit_no_failsafe_netmsg" != "y" ]; then 
+			netmsg $pi_broadcast "$1"
+		fi
+	}
+}
+
+preinit_ip_deconfig() {
+	if [ -z "$pi_ifname" ]; then
+		ifconfig $ifname 0.0.0.0 down
+	else
+		grep -q "$pi_ifname" /proc/net/dev && {
+			ifconfig $pi_ifname 0.0.0.0 down
+		}
+	fi
+}
+
+preinit_net_echo() {
+	preinit_ip
+
+	port_net_echo $1
+}
+
+
diff --git a/target/linux/brcm63xx/base-files/lib/preinit/20_failsafe_net_echo_brcm63xx b/target/linux/brcm63xx/base-files/lib/preinit/20_failsafe_net_echo_brcm63xx
new file mode 100644
index 0000000..f030cb2
--- /dev/null
+++ b/target/linux/brcm63xx/base-files/lib/preinit/20_failsafe_net_echo_brcm63xx
@@ -0,0 +1,12 @@
+#!/bin/sh
+
+indicate_failsafe() {
+	preinit_net_echo() {
+		port_net_echo $1
+	}
+	echo "- failsafe -"
+	preinit_net_echo "Entering Failsafe!\n"
+	indicate_failsafe_led
+}
+
+
diff --git a/target/linux/brcm63xx/base-files/lib/upgrade/platform.sh b/target/linux/brcm63xx/base-files/lib/upgrade/platform.sh
new file mode 100644
index 0000000..5c9e2c2
--- /dev/null
+++ b/target/linux/brcm63xx/base-files/lib/upgrade/platform.sh
@@ -0,0 +1,16 @@
+PART_NAME=linux
+platform_check_image() {
+	[ "$#" -gt 1 ] && return 1
+	case "$(get_magic_word "$1")" in
+		3600|3700|3800)
+			# 6348GW-11 boards use openwrt-96348GW-11-squashfs-cfe.bin files
+			return 0
+			;;
+		*)
+			echo "Invalid image type. Please use only .bin files"
+			return 1
+			;;
+	esac
+}
+
+# use default for platform_do_upgrade()
diff --git a/target/linux/brcm63xx/config-3.18 b/target/linux/brcm63xx/config-3.18
new file mode 100644
index 0000000..b72080b
--- /dev/null
+++ b/target/linux/brcm63xx/config-3.18
@@ -0,0 +1,229 @@
+CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
+CONFIG_ARCH_DISCARD_MEMBLOCK=y
+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
+# CONFIG_ARCH_HAS_SG_CHAIN is not set
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_B53=y
+CONFIG_B53_MMAP_DRIVER=y
+CONFIG_B53_PHY_DRIVER=y
+CONFIG_B53_PHY_FIXUP=y
+CONFIG_B53_SPI_DRIVER=y
+# CONFIG_B53_SRAB_DRIVER is not set
+CONFIG_BCM6345_EXT_IRQ=y
+CONFIG_BCM6345_PERIPH_IRQ=y
+CONFIG_BCM63XX=y
+CONFIG_BCM63XX_CPU_3368=y
+CONFIG_BCM63XX_CPU_6318=y
+CONFIG_BCM63XX_CPU_63268=y
+CONFIG_BCM63XX_CPU_6328=y
+CONFIG_BCM63XX_CPU_6338=y
+CONFIG_BCM63XX_CPU_6345=y
+CONFIG_BCM63XX_CPU_6348=y
+CONFIG_BCM63XX_CPU_6358=y
+CONFIG_BCM63XX_CPU_6362=y
+CONFIG_BCM63XX_CPU_6368=y
+CONFIG_BCM63XX_EHCI=y
+CONFIG_BCM63XX_ENET=y
+CONFIG_BCM63XX_OHCI=y
+CONFIG_BCM63XX_PHY=y
+CONFIG_BCM63XX_WDT=y
+CONFIG_BCMA=y
+CONFIG_BCMA_BLOCKIO=y
+# CONFIG_BCMA_DEBUG is not set
+# CONFIG_BCMA_DRIVER_GMAC_CMN is not set
+# CONFIG_BCMA_DRIVER_MIPS is not set
+# CONFIG_BCMA_DRIVER_PCI_HOSTMODE is not set
+CONFIG_BCMA_HOST_PCI=y
+CONFIG_BCMA_HOST_PCI_POSSIBLE=y
+# CONFIG_BCMA_HOST_SOC is not set
+CONFIG_BOARD_BCM63XX_DT=y
+CONFIG_BOARD_BCM963XX=y
+CONFIG_BOARD_LIVEBOX=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CEVT_R4K=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
+CONFIG_CMDLINE_BOOL=y
+# CONFIG_CMDLINE_OVERRIDE is not set
+CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_CPU_BMIPS=y
+CONFIG_CPU_BMIPS32_3300=y
+CONFIG_CPU_BMIPS4350=y
+CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_MIPS32=y
+CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
+CONFIG_CPU_R4K_CACHE_TLB=y
+CONFIG_CPU_R4K_FPU=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CSRC_R4K=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_DTC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_FW_LOADER_USER_HELPER=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_74X164=y
+CONFIG_GPIO_BCM63XX=y
+CONFIG_GPIO_DEVRES=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_HAVE_BPF_JIT=y
+CONFIG_HAVE_CC_STACKPROTECTOR=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HW_HAS_PCI=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_BCM63XX=y
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+CONFIG_HZ_PERIODIC=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_CPU=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+CONFIG_KEXEC=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LIBFDT=y
+CONFIG_MDIO_BOARDINFO=y
+CONFIG_MIPS=y
+CONFIG_MIPS_APPENDED_DTB=y
+# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=4
+CONFIG_MIPS_L1_CACHE_SHIFT_4=y
+# CONFIG_MIPS_MACHINE is not set
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MTD_BCM63XX_PARTS=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_BE_BYTE_SWAP=y
+# CONFIG_MTD_CFI_GEOMETRY is not set
+# CONFIG_MTD_CFI_NOSWAP is not set
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
+# CONFIG_NO_IOPORT_MAP is not set
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_ADDRESS_PCI=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_MTD=y
+CONFIG_OF_NET=y
+CONFIG_OF_PCI=y
+CONFIG_OF_PCI_IRQ=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PCI=y
+# CONFIG_PCIEAER is not set
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PHYLIB=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_STALL_COMMON is not set
+CONFIG_RELAY=y
+CONFIG_RTL8366_SMI=y
+CONFIG_RTL8367_PHY=y
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SERIAL_8250 is not set
+CONFIG_SERIAL_BCM63XX=y
+CONFIG_SERIAL_BCM63XX_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_SPI_BCM63XX=y
+CONFIG_SPI_BCM63XX_HSSPI=y
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_GPIO=y
+CONFIG_SPI_MASTER=y
+CONFIG_SQUASHFS_EMBEDDED=y
+CONFIG_SSB=y
+CONFIG_SSB_B43_PCI_BRIDGE=y
+CONFIG_SSB_BLOCKIO=y
+# CONFIG_SSB_DRIVER_MIPS is not set
+CONFIG_SSB_DRIVER_PCICORE=y
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+CONFIG_SSB_PCIHOST=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+CONFIG_SSB_SPROM=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_SWCONFIG=y
+CONFIG_SYNC_R4K=y
+CONFIG_SYS_HAS_CPU_BMIPS=y
+CONFIG_SYS_HAS_CPU_BMIPS32_3300=y
+CONFIG_SYS_HAS_CPU_BMIPS4350=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
+CONFIG_SYS_SUPPORTS_SMP=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USE_OF=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_WEAK_ORDERING=y
+CONFIG_ZONE_DMA_FLAG=0
diff --git a/target/linux/brcm63xx/config-4.1 b/target/linux/brcm63xx/config-4.1
new file mode 100644
index 0000000..d61b6e6
--- /dev/null
+++ b/target/linux/brcm63xx/config-4.1
@@ -0,0 +1,241 @@
+CONFIG_ARCH_BINFMT_ELF_STATE=y
+CONFIG_ARCH_DISCARD_MEMBLOCK=y
+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
+# CONFIG_ARCH_HAS_SG_CHAIN is not set
+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_B53=y
+CONFIG_B53_MMAP_DRIVER=y
+CONFIG_B53_PHY_DRIVER=y
+CONFIG_B53_PHY_FIXUP=y
+CONFIG_B53_SPI_DRIVER=y
+# CONFIG_B53_SRAB_DRIVER is not set
+CONFIG_BCM6345_EXT_IRQ=y
+CONFIG_BCM6345_PERIPH_IRQ=y
+CONFIG_BCM63XX=y
+CONFIG_BCM63XX_CPU_3368=y
+CONFIG_BCM63XX_CPU_6318=y
+CONFIG_BCM63XX_CPU_63268=y
+CONFIG_BCM63XX_CPU_6328=y
+CONFIG_BCM63XX_CPU_6338=y
+CONFIG_BCM63XX_CPU_6345=y
+CONFIG_BCM63XX_CPU_6348=y
+CONFIG_BCM63XX_CPU_6358=y
+CONFIG_BCM63XX_CPU_6362=y
+CONFIG_BCM63XX_CPU_6368=y
+CONFIG_BCM63XX_EHCI=y
+CONFIG_BCM63XX_ENET=y
+CONFIG_BCM63XX_OHCI=y
+CONFIG_BCM63XX_PHY=y
+CONFIG_BCM63XX_WDT=y
+CONFIG_BCMA=y
+CONFIG_BCMA_BLOCKIO=y
+# CONFIG_BCMA_DEBUG is not set
+# CONFIG_BCMA_DRIVER_GMAC_CMN is not set
+# CONFIG_BCMA_DRIVER_MIPS is not set
+CONFIG_BCMA_DRIVER_PCI=y
+# CONFIG_BCMA_DRIVER_PCI_HOSTMODE is not set
+CONFIG_BCMA_HOST_PCI=y
+CONFIG_BCMA_HOST_PCI_POSSIBLE=y
+# CONFIG_BCMA_HOST_SOC is not set
+CONFIG_BOARD_BCM63XX_DT=y
+CONFIG_BOARD_BCM963XX=y
+CONFIG_BOARD_LIVEBOX=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CEVT_R4K=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
+CONFIG_CMDLINE_BOOL=y
+# CONFIG_CMDLINE_OVERRIDE is not set
+CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_CPU_BMIPS=y
+CONFIG_CPU_BMIPS32_3300=y
+CONFIG_CPU_BMIPS4350=y
+CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_MIPS32=y
+CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
+CONFIG_CPU_R4K_CACHE_TLB=y
+CONFIG_CPU_R4K_FPU=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CSRC_R4K=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_DTC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_74X164=y
+CONFIG_GPIO_BCM63XX=y
+CONFIG_GPIO_DEVRES=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+# CONFIG_HAVE_ARCH_BITREVERSE is not set
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_HAVE_BPF_JIT=y
+CONFIG_HAVE_CC_STACKPROTECTOR=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HW_HAS_PCI=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_BCM63XX=y
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+CONFIG_HZ_PERIODIC=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_CPU=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+CONFIG_KEXEC=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LIBFDT=y
+# CONFIG_LZ4_COMPRESS is not set
+# CONFIG_LZ4_DECOMPRESS is not set
+CONFIG_MDIO_BOARDINFO=y
+CONFIG_MIPS=y
+# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=4
+CONFIG_MIPS_L1_CACHE_SHIFT_4=y
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_MIPS_NO_APPENDED_DTB is not set
+CONFIG_MIPS_RAW_APPENDED_DTB=y
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MTD_BCM63XX_PARTS=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_BE_BYTE_SWAP=y
+# CONFIG_MTD_CFI_GEOMETRY is not set
+# CONFIG_MTD_CFI_NOSWAP is not set
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
+# CONFIG_NO_IOPORT_MAP is not set
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_ADDRESS_PCI=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_MTD=y
+CONFIG_OF_NET=y
+CONFIG_OF_PCI=y
+CONFIG_OF_PCI_IRQ=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PCI=y
+# CONFIG_PCIEAER is not set
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_RCU_EXPEDITE_BOOT is not set
+# CONFIG_RCU_STALL_COMMON is not set
+CONFIG_RELAY=y
+CONFIG_RTL8366_SMI=y
+CONFIG_RTL8367_PHY=y
+CONFIG_SCHED_HRTICK=y
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SERIAL_8250 is not set
+CONFIG_SERIAL_BCM63XX=y
+CONFIG_SERIAL_BCM63XX_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_SPI_BCM63XX=y
+CONFIG_SPI_BCM63XX_HSSPI=y
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_GPIO=y
+CONFIG_SPI_MASTER=y
+CONFIG_SQUASHFS_EMBEDDED=y
+CONFIG_SRCU=y
+CONFIG_SSB=y
+CONFIG_SSB_B43_PCI_BRIDGE=y
+CONFIG_SSB_BLOCKIO=y
+# CONFIG_SSB_DRIVER_MIPS is not set
+CONFIG_SSB_DRIVER_PCICORE=y
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+CONFIG_SSB_PCIHOST=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+CONFIG_SSB_SPROM=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_SWCONFIG=y
+CONFIG_SYNC_R4K=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_SYS_HAS_CPU_BMIPS=y
+CONFIG_SYS_HAS_CPU_BMIPS32_3300=y
+CONFIG_SYS_HAS_CPU_BMIPS4350=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
+CONFIG_SYS_SUPPORTS_SMP=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USE_OF=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_WEAK_ORDERING=y
+CONFIG_ZONE_DMA_FLAG=0
diff --git a/target/linux/brcm63xx/dts/a226g.dts b/target/linux/brcm63xx/dts/a226g.dts
new file mode 100644
index 0000000..b62c68f
--- /dev/null
+++ b/target/linux/brcm63xx/dts/a226g.dts
@@ -0,0 +1,109 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Pirelli A226G";
+	compatible = "pirelli,a226g", "brcm,bcm6358";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio1 5 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		voip_red {
+			label = "DWV-S0:red:VoIP";
+			gpios = <&gpio0 0 1>;
+		};
+		eth_red {
+			label = "DWV-S0:red:ethernet";
+			gpios = <&gpio0 1 1>;
+		};
+		dsl_green {
+			label = "DWV-S0:green:ADSL";
+			gpios = <&gpio0 2 1>;
+		};
+		usb_green {
+			label = "DWV-S0:green:USB";
+			gpios = <&gpio0 3 1>;
+		};
+		power_green {
+			label = "DWV-S0:green:power";
+			gpios = <&gpio0 4 1>;
+			default-state = "on";
+		};
+		power_red {
+			label = "DWV-S0:red:power";
+			gpios = <&gpio0 5 1>;
+		};
+		inet_red {
+			label = "DWV-S0:red:internet";
+			gpios = <&gpio0 6 1>;
+		};
+		inet_green {
+			label = "DWV-S0:green:internet";
+			gpios = <&gpio0 7 1>;
+		};
+		eth_green {
+			label = "DWV-S0:green:ethernet";
+			gpios = <&gpio0 8 1>;
+		};
+		voip_green {
+			label = "DWV-S0:green:VoIP";
+			gpios = <&gpio0 9 1>;
+		};
+		wifi_red {
+			label = "DWV-S0:red:wifi";
+			gpios = <&gpio0 10 1>;
+		};
+		usb_red {
+			label = "DWV-S0:red:USB";
+			gpios = <&gpio0 11 1>;
+		};
+		dsl_red {
+			label = "DWV-S0:red:ADSL";
+			gpios = <&gpio0 12 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x7e0000>;
+	};
+
+	nvram@7f0000 {
+		label = "nvram";
+		reg = <0x7f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/a226m-fwb.dts b/target/linux/brcm63xx/dts/a226m-fwb.dts
new file mode 100644
index 0000000..d91fffe
--- /dev/null
+++ b/target/linux/brcm63xx/dts/a226m-fwb.dts
@@ -0,0 +1,109 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Pirelli A226M-FWB";
+	compatible = "pirelli,a226m-fwb", "brcm,bcm6358";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio1 5 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		voip_red {
+			label = "DWV-S0:red:VoIP";
+			gpios = <&gpio0 0 1>;
+		};
+		eth_red {
+			label = "DWV-S0:red:ethernet";
+			gpios = <&gpio0 1 1>;
+		};
+		dsl_green {
+			label = "DWV-S0:green:ADSL";
+			gpios = <&gpio0 2 1>;
+		};
+		usb_green {
+			label = "DWV-S0:green:USB";
+			gpios = <&gpio0 3 1>;
+		};
+		power_green {
+			label = "DWV-S0:green:power";
+			gpios = <&gpio0 4 1>;
+			default-state = "on";
+		};
+		power_red {
+			label = "DWV-S0:red:power";
+			gpios = <&gpio0 5 1>;
+		};
+		inet_red {
+			label = "DWV-S0:red:internet";
+			gpios = <&gpio0 6 1>;
+		};
+		inet_green {
+			label = "DWV-S0:green:internet";
+			gpios = <&gpio0 7 1>;
+		};
+		eth_green {
+			label = "DWV-S0:green:ethernet";
+			gpios = <&gpio0 8 1>;
+		};
+		voip_green {
+			label = "DWV-S0:green:VoIP";
+			gpios = <&gpio0 9 1>;
+		};
+		wifi_red {
+			label = "DWV-S0:red:wifi";
+			gpios = <&gpio0 10 1>;
+		};
+		usb_red {
+			label = "DWV-S0:red:USB";
+			gpios = <&gpio0 11 1>;
+		};
+		dsl_red {
+			label = "DWV-S0:red:ADSL";
+			gpios = <&gpio0 12 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x020000>;
+		read-only;
+	};
+
+	linux@20000 {
+		label = "linux";
+		reg = <0x020000 0xfc0000>;
+	};
+
+	nvram@fe0000 {
+		label = "nvram";
+		reg = <0xfe0000 0x020000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/a226m.dts b/target/linux/brcm63xx/dts/a226m.dts
new file mode 100644
index 0000000..d3f628d
--- /dev/null
+++ b/target/linux/brcm63xx/dts/a226m.dts
@@ -0,0 +1,109 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Pirelli A226M";
+	compatible = "pirelli,a226m", "brcm,bcm6358";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio1 5 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		voip_red {
+			label = "DWV-S0:red:VoIP";
+			gpios = <&gpio0 0 1>;
+		};
+		eth_red {
+			label = "DWV-S0:red:ethernet";
+			gpios = <&gpio0 1 1>;
+		};
+		dsl_green {
+			label = "DWV-S0:green:ADSL";
+			gpios = <&gpio0 2 1>;
+		};
+		usb_green {
+			label = "DWV-S0:green:USB";
+			gpios = <&gpio0 3 1>;
+		};
+		power_green {
+			label = "DWV-S0:green:power";
+			gpios = <&gpio0 4 1>;
+			default-state = "on";
+		};
+		power_red {
+			label = "DWV-S0:red:power";
+			gpios = <&gpio0 5 1>;
+		};
+		inet_red {
+			label = "DWV-S0:red:internet";
+			gpios = <&gpio0 6 1>;
+		};
+		inet_green {
+			label = "DWV-S0:green:internet";
+			gpios = <&gpio0 7 1>;
+		};
+		eth_green {
+			label = "DWV-S0:green:ethernet";
+			gpios = <&gpio0 8 1>;
+		};
+		voip_green {
+			label = "DWV-S0:green:VoIP";
+			gpios = <&gpio0 9 1>;
+		};
+		wifi_red {
+			label = "DWV-S0:red:wifi";
+			gpios = <&gpio0 10 1>;
+		};
+		usb_red {
+			label = "DWV-S0:red:USB";
+			gpios = <&gpio0 11 1>;
+		};
+		dsl_red {
+			label = "DWV-S0:red:ADSL";
+			gpios = <&gpio0 12 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x7e0000>;
+	};
+
+	nvram@7f0000 {
+		label = "nvram";
+		reg = <0x7f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/a4001n.dts b/target/linux/brcm63xx/dts/a4001n.dts
new file mode 100644
index 0000000..13c5e50
--- /dev/null
+++ b/target/linux/brcm63xx/dts/a4001n.dts
@@ -0,0 +1,55 @@
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "ADB P.DG A4001N";
+	compatible = "adb,a4001n", "brcm,bcm6328";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 23 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio0 24 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		inet_red {
+			label = "A4001N:red:inet";
+			gpios = <&gpio0 1 0>;
+		};
+		power_red {
+			label = "A4001N:red:power";
+			gpios = <&gpio0 4 0>;
+		};
+		power_green {
+			label = "A4001N:green:power";
+			gpios = <&gpio0 8 0>;
+			default-state = "on";
+		};
+		usb_green {
+			label = "A4001N:green:usb";
+			gpios = <&gpio0 10 1>;
+		};
+		dsl_green {
+			label = "A4001N:green:dsl";
+			gpios = <&gpio0 11 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/a4001n1.dts b/target/linux/brcm63xx/dts/a4001n1.dts
new file mode 100644
index 0000000..e30d6d0
--- /dev/null
+++ b/target/linux/brcm63xx/dts/a4001n1.dts
@@ -0,0 +1,83 @@
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "ADB P.DG A4001N1";
+	compatible = "adb,a4001n1", "brcm,bcm6328";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 23 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wlan";
+			gpios = <&gpio0 24 1>;
+			linux,code = <KEY_WLAN>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		inet_red {
+			label = "A4001N1:red:inet";
+			gpios = <&gpio0 2 1>;
+		};
+		ppp_green {
+			label = "A4001N1:green:ppp";
+			gpios = <&gpio0 3 1>;
+		};
+		power_green {
+			label = "A4001N1:green:power";
+			gpios = <&gpio0 4 1>;
+			default-state = "on";
+		};
+		ppp_red {
+			label = "A4001N1:red:ppp";
+			gpios = <&gpio0 5 1>;
+		};
+		usb_green {
+			label = "A4001N1:green:3g";
+			gpios = <&gpio0 6 1>;
+		};
+		usb_red {
+			label = "A4001N1:red:3g";
+			gpios = <&gpio0 7 1>;
+		};
+		power_red {
+			label = "A4001N1:red:power";
+			gpios = <&gpio0 8 1>;
+		};
+		wlan_green {
+			label = "A4001N1:green:wlan";
+			gpios = <&gpio0 9 1>;
+		};
+		wlan_red {
+			label = "A4001N1:red:wlan";
+			gpios = <&gpio0 10 1>;
+		};
+		inet_green {
+			label = "A4001N1:green:inet";
+			gpios = <&gpio0 11 1>;
+		};
+		eth_red {
+			label = "A4001N1:red:eth";
+			gpios = <&gpio0 20 1>;
+		};
+		eth_green {
+			label = "A4001N1:green:eth";
+			gpios = <&gpio0 31 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/agpf-s0.dts b/target/linux/brcm63xx/dts/agpf-s0.dts
new file mode 100644
index 0000000..4662b2d
--- /dev/null
+++ b/target/linux/brcm63xx/dts/agpf-s0.dts
@@ -0,0 +1,113 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Pirelli Alice Gate AGPF-S0";
+	compatible = "pirelli,agpf-s0", "brcm,bcm6358";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio1 5 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "AGPF-S0:green:power";
+			gpios = <&gpio0 4 1>;
+			default-state = "on";
+		};
+		power_red {
+			label = "AGPF-S0:red:power";
+			gpios = <&gpio0 5 1>;
+		};
+		service_green {
+			label = "AGPF-S0:green:service";
+			gpios = <&gpio0 6 1>;
+		};
+		service_red {
+			label = "AGPF-S0:red:service";
+			gpios = <&gpio0 7 1>;
+		};
+		dsl_green {
+			label = "AGPF-S0:green:adsl";
+			gpios = <&gpio0 9 1>;
+		};
+		dsl_red {
+			label = "AGPF-S0:red:adsl";
+			gpios = <&gpio0 10 1>;
+		};
+		wifi_green {
+			label = "AGPF-S0:green:wifi";
+			gpios = <&gpio0 22 1>;
+		};
+		wifi_red {
+			label = "AGPF-S0:red:wifi";
+			gpios = <&gpio0 23 1>;
+		};
+		inet_red {
+			label = "AGPF-S0:red:internet";
+			gpios = <&gpio0 24 1>;
+		};
+		inet_green {
+			label = "AGPF-S0:green:internet";
+			gpios = <&gpio0 25 1>;
+		};
+		usr1_green {
+			label = "AGPF-S0:green:usr1";
+			gpios = <&gpio0 26 1>;
+		};
+		usr1_red {
+			label = "AGPF-S0:red:usr1";
+			gpios = <&gpio0 27 1>;
+		};
+		usr2_green {
+			label = "AGPF-S0:green:usr2";
+			gpios = <&gpio0 29 1>;
+		};
+		usr2_red {
+			label = "AGPF-S0:red:usr2";
+			gpios = <&gpio0 30 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x020000>;
+		read-only;
+	};
+
+	linux@20000 {
+		label = "linux";
+		reg = <0x020000 0xfc0000>;
+	};
+
+	nvram@fe0000 {
+		label = "nvram";
+		reg = <0xfe0000 0x020000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/ar-5381u.dts b/target/linux/brcm63xx/dts/ar-5381u.dts
new file mode 100644
index 0000000..a148ec4
--- /dev/null
+++ b/target/linux/brcm63xx/dts/ar-5381u.dts
@@ -0,0 +1,42 @@
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Comtrend AR-5381u";
+	compatible = "comtrend,ar-5381u", "brcm,bcm6328";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 23 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		alarm_red {
+			label = "AR-5381u:red:alarm";
+			gpios = <&gpio0 2 1>;
+		};
+		inet_green {
+			label = "AR-5381u:green:inet";
+			gpios = <&gpio0 3 1>;
+		};
+		power_green {
+			label = "AR-5381u:green:power";
+			gpios = <&gpio0 4 1>;
+			default-state = "on";
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/ar-5387un.dts b/target/linux/brcm63xx/dts/ar-5387un.dts
new file mode 100644
index 0000000..c30da06
--- /dev/null
+++ b/target/linux/brcm63xx/dts/ar-5387un.dts
@@ -0,0 +1,50 @@
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Comtrend AR-5387un";
+	compatible = "comtrend,ar-5387un", "brcm,bcm6328";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 23 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		inet_red {
+			label = "AR-5387un:red:inet";
+			gpios = <&gpio0 1 0>;
+		};
+		power_red {
+			label = "AR-5387un:red:power";
+			gpios = <&gpio0 4 0>;
+		};
+		inet_green {
+			label = "AR-5387un:green:inet";
+			gpios = <&gpio0 7 0>;
+		};
+		power_green {
+			label = "AR-5387un:green:power";
+			gpios = <&gpio0 8 0>;
+			default-state = "on";
+		};
+		dsl_green {
+			label = "AR-5387un:green:dsl";
+			gpios = <&gpio0 11 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/ar1004g.dts b/target/linux/brcm63xx/dts/ar1004g.dts
new file mode 100644
index 0000000..0740799
--- /dev/null
+++ b/target/linux/brcm63xx/dts/ar1004g.dts
@@ -0,0 +1,42 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "ASMAX AR 1004g";
+	compatible = "asmax,ar1004g", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 1 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "AR1004G:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		inet_green {
+			label = "AR1004G:green:inet";
+			gpios = <&gpio0 3 1>;
+		};
+		power_red {
+			label = "AR1004G:red:power";
+			gpios = <&gpio0 6 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm3368.dtsi b/target/linux/brcm63xx/dts/bcm3368.dtsi
new file mode 100644
index 0000000..f3b0b02
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm3368.dtsi
@@ -0,0 +1,95 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm3368";
+
+	aliases {
+		pflash = &pflash;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+
+		cpu@1 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory { device_type = "memory"; reg = <0 0>; };
+
+	pflash: nor@1e000000 {
+		compatible = "cfi-flash";
+		reg = <0x1e000000 0x2000000>;
+		bank-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		status = "disabled";
+	};
+
+	ubus@fff00000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		periph_intc: interrupt-controller@fff8c00c {
+			compatible = "brcm,bcm6345-periph-intc";
+			reg = <0xfffe000c 0x8>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>;
+		};
+
+		ext_intc0: interrupt-controller@fff8c014 {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0xfffe0014 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <24>, <25>, <26>, <27>;
+		};
+
+		gpio1: gpio-controller@fff8c080 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0xfff8c080 4>, <0xfff8c088 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			ngpios = <8>;
+		};
+
+		gpio0: gpio-controller@fff8c084 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0xfff8c084 4>, <0xfff8c08c 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm6318.dtsi b/target/linux/brcm63xx/dts/bcm6318.dtsi
new file mode 100644
index 0000000..f851a9c
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm6318.dtsi
@@ -0,0 +1,78 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm6318";
+
+	aliases {
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			compatible = "brcm,bmips3300", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory { device_type = "memory"; reg = <0 0>; };
+
+	ubus@10000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		ext_intc: interrupt-controller@10000018 {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0x10000018 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <24>, <25>, <26>, <27>;
+		};
+
+		periph_intc: interrupt-controller@10000020 {
+			compatible = "brcm,bcm6345-periph-intc";
+			reg = <0x10000020 0x20>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>;
+		};
+
+		gpio1: gpio-controller@10000080 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000080 4>, <0x10000088 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			ngpios = <18>;
+		};
+
+		gpio0: gpio-controller@10000084 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000084 4>, <0x1000008c 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm63268.dtsi b/target/linux/brcm63xx/dts/bcm63268.dtsi
new file mode 100644
index 0000000..0a1f8b1
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm63268.dtsi
@@ -0,0 +1,85 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm63268";
+
+	aliases {
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+
+		cpu@1 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory { device_type = "memory"; reg = <0 0>; };
+
+	ubus@10000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		ext_intc: interrupt-controller@10000018 {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0x10000018 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <44>, <45>, <46>, <47>;
+		};
+
+		periph_intc: interrupt-controller@10000020 {
+			compatible = "brcm,bcm6345-periph-intc";
+			reg = <0x10000020 0x20>,
+			      <0x10000040 0x20>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>, <3>;
+		};
+
+		gpio1: gpio-controller@100000c0 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x100000c0 4>, <0x100000c8 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			ngpios = <20>;
+		};
+
+		gpio0: gpio-controller@100000c4 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x100000c4 4>, <0x100000cc 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm6328.dtsi b/target/linux/brcm63xx/dts/bcm6328.dtsi
new file mode 100644
index 0000000..a0b1316
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm6328.dtsi
@@ -0,0 +1,67 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm6328";
+
+	aliases {
+		gpio0 = &gpio0;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory { device_type = "memory"; reg = <0 0>; };
+
+	ubus@10000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		ext_intc: interrupt-controller@10000018 {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0x10000018 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <24>, <25>, <26>, <27>;
+		};
+
+		periph_intc: interrupt-controller@10000020 {
+			compatible = "brcm,bcm6345-periph-intc";
+			reg = <0x10000020 0x10>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>;
+		};
+
+		gpio0: gpio-controller@10000084 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000084 4>, <0x1000008c 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm6338.dtsi b/target/linux/brcm63xx/dts/bcm6338.dtsi
new file mode 100644
index 0000000..d578a5b
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm6338.dtsi
@@ -0,0 +1,80 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm6338";
+
+	aliases {
+		pflash = &pflash;
+		gpio0 = &gpio0;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			compatible = "brcm,bmips3300", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory { device_type = "memory"; reg = <0 0>; };
+
+	pflash: nor@1fc00000 {
+		compatible = "cfi-flash";
+		reg = <0x1fc00000 0x400000>;
+		bank-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		status = "disabled";
+	};
+
+	ubus@fff00000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		periph_intc: interrupt-controller@fffe000c {
+			compatible = "brcm,bcm6345-periph-intc";
+			reg = <0xfffe000c 0x8>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>;
+		};
+
+		ext_intc: interrupt-controller@fffe0014 {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0xfffe0014 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <3>, <4>, <5>, <6>;
+		};
+
+		gpio0: gpio-controller@fffe0404 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0xfffe0404 4>, <0xfffe040c 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			ngpios = <8>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm6345.dtsi b/target/linux/brcm63xx/dts/bcm6345.dtsi
new file mode 100644
index 0000000..f702468
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm6345.dtsi
@@ -0,0 +1,80 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm6345";
+
+	aliases {
+		pflash = &pflash;
+		gpio0 = &gpio0;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			compatible = "brcm,bmips32", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory { device_type = "memory"; reg = <0 0>; };
+
+	pflash: nor@1fc00000 {
+		compatible = "cfi-flash";
+		reg = <0x1fc00000 0x400000>;
+		bank-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		status = "disabled";
+	};
+
+	ubus@fff00000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		periph_intc: interrupt-controller@fffe000c {
+			compatible = "brcm,bcm6345-periph-intc";
+			reg = <0xfffe000c 0x9>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>;
+		};
+
+		ext_intc: interrupt-controller@fffe0014 {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0xfffe0014 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <3>, <4>, <5>, <6>;
+		};
+
+		gpio0: gpio-controller@fffe0404 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0xfffe0404 4>, <0xfffe0408 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			ngpios = <16>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm6348.dtsi b/target/linux/brcm63xx/dts/bcm6348.dtsi
new file mode 100644
index 0000000..81e99ed
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm6348.dtsi
@@ -0,0 +1,91 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm6348";
+
+	aliases {
+		pflash = &pflash;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			compatible = "brcm,bmips3300", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory { device_type = "memory"; reg = <0 0>; };
+
+	pflash: nor@1fc00000 {
+		compatible = "cfi-flash";
+		reg = <0x1fc00000 0x400000>;
+		bank-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		status = "disabled";
+	};
+
+	ubus@fff00000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		periph_intc: interrupt-controller@fffe000c {
+			compatible = "brcm,bcm6345-periph-intc";
+			reg = <0xfffe000c 0x8>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>;
+		};
+
+		ext_intc: interrupt-controller@fffe0014 {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0xfffe0014 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <3>, <4>, <5>, <6>;
+
+			brcm,field-width = <5>;
+		};
+
+		gpio1: gpio-controller@fffe0400 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0xfffe0400 4>, <0xfffe0408 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			ngpios = <5>;
+		};
+
+		gpio0: gpio-controller@fffe0404 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0xfffe0404 4>, <0xfffe040c 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm6358.dtsi b/target/linux/brcm63xx/dts/bcm6358.dtsi
new file mode 100644
index 0000000..bc3784a
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm6358.dtsi
@@ -0,0 +1,107 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm6358";
+
+	aliases {
+		pflash = &pflash;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+
+		cpu@1 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory { device_type = "memory"; reg = <0 0>; };
+
+	pflash: nor@1e000000 {
+		compatible = "cfi-flash";
+		reg = <0x1e000000 0x2000000>;
+		bank-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		status = "disabled";
+	};
+
+	ubus@fff00000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		periph_intc: interrupt-controller@fffe000c {
+			compatible = "brcm,bcm6345-periph-intc";
+			reg = <0xfffe000c 0x8>,
+			      <0xfffe0038 0x8>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>, <3>;
+		};
+
+		ext_intc0: interrupt-controller@fffe0014 {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0xfffe0014 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <25>, <26>, <27>, <28>;
+		};
+
+		ext_intc1: interrupt-controller@fffe001c {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0xfffe001c 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <20>, <21>;
+		};
+
+		gpio1: gpio-controller@fffe0080 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0xfffe0080 4>, <0xfffe0088 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			ngpios = <8>;
+		};
+
+		gpio0: gpio-controller@fffe0084 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0xfffe0084 4>, <0xfffe008c 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm6362.dtsi b/target/linux/brcm63xx/dts/bcm6362.dtsi
new file mode 100644
index 0000000..6604f5c
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm6362.dtsi
@@ -0,0 +1,85 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm6362";
+
+	aliases {
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+
+		cpu@1 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory { device_type = "memory"; reg = <0 0>; };
+
+	ubus@10000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		ext_intc: interrupt-controller@10000018 {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0x10000018 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <40>, <41>, <42>, <43>;
+		};
+
+		periph_intc: interrupt-controller@10000020 {
+			compatible = "brcm,bcm6345-periph-intc";
+			reg = <0x10000020 0x10>,
+			      <0x10000030 0x10>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>, <3>;
+		};
+
+		gpio1: gpio-controller@10000080 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000080 4>, <0x10000088 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			ngpios = <16>;
+		};
+
+		gpio0: gpio-controller@10000084 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000084 4>, <0x1000008c 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm6368.dtsi b/target/linux/brcm63xx/dts/bcm6368.dtsi
new file mode 100644
index 0000000..7dbe9ec
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm6368.dtsi
@@ -0,0 +1,106 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm6368";
+
+	aliases {
+		pflash = &pflash;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+
+		cpu@1 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory { device_type = "memory"; reg = <0 0>; };
+
+	ubus@10000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		ext_intc0: interrupt-controller@10000018 {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0x10000018 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <20>, <21>, <22>, <23>;
+		};
+
+		ext_intc1: interrupt-controller@1000001c {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0x1000001c 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <24>, <25>;
+		};
+
+		periph_intc: interrupt-controller@10000020 {
+			compatible = "brcm,bcm6345-periph-intc";
+			reg = <0x10000020 0x10>,
+			      <0x10000030 0x10>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>, <3>;
+		};
+
+		gpio1: gpio-controller@10000080 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000080 4>, <0x10000088 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			ngpios = <6>;
+		};
+
+		gpio0: gpio-controller@10000084 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000084 4>, <0x1000008c 4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+
+	pflash: nor@18000000 {
+		compatible = "cfi-flash";
+		reg = <0x18000000 0x2000000>;
+		bank-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		status = "disabled";
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm96318ref.dts b/target/linux/brcm63xx/dts/bcm96318ref.dts
new file mode 100644
index 0000000..79137db
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96318ref.dts
@@ -0,0 +1,49 @@
+/dts-v1/;
+
+#include "bcm6318.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM96318REF reference board";
+	compatible = "brcm,bcm96318ref", "brcm,bcm6318";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio1 1 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+        };
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		inet {
+			label = "96318REF:green:inet";
+			gpios = <&gpio0 8 1>;
+		};
+
+		inet_fail {
+			label = "96318REF:red:inet-fail";
+			gpios = <&gpio0 9 1>;
+		};
+
+		post_failed {
+			label = "96318REF:red:post-failed";
+			gpios = <&gpio0 11 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm96318ref_p300.dts b/target/linux/brcm63xx/dts/bcm96318ref_p300.dts
new file mode 100644
index 0000000..be1db5a
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96318ref_p300.dts
@@ -0,0 +1,55 @@
+/dts-v1/;
+
+#include "bcm6318.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM96318REF_P300 reference board";
+	compatible = "brcm,bcm96318ref_p300", "brcm,bcm6318";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio1 1 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+        };
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		inet {
+			label = "96318REF_P300:green:inet";
+			gpios = <&gpio0 8 1>;
+		};
+
+		inet_fail {
+			label = "96318REF_P300:red:inet-fail";
+			gpios = <&gpio0 9 1>;
+		};
+
+		post_failed {
+			label = "96318REF_P300:red:post-failed";
+			gpios = <&gpio0 11 1>;
+		};
+
+		usb_pwron {
+			label = "96318REF_P300::usb-pwron";
+			gpios = <&gpio0 13 1>;
+			default-state = "on";
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm963268bu_p300.dts b/target/linux/brcm63xx/dts/bcm963268bu_p300.dts
new file mode 100644
index 0000000..f659b39
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm963268bu_p300.dts
@@ -0,0 +1,30 @@
+/dts-v1/;
+
+#include "bcm63268.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM963268BU_P300 reference board";
+	compatible = "brcm,bcm963268bu_p300", "brcm,bcm63268";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 0 0>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio1 1 0>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+        };
+};
diff --git a/target/linux/brcm63xx/dts/bcm963269bhr.dts b/target/linux/brcm63xx/dts/bcm963269bhr.dts
new file mode 100644
index 0000000..01a7680
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm963269bhr.dts
@@ -0,0 +1,38 @@
+/dts-v1/;
+
+#include "bcm63268.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM963269BHR reference board";
+	compatible = "brcm,bcm963269bhr", "brcm,bcm63268";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 0 0>;
+			linux,code = <KEY_RESTART>;
+		};
+        };
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		usb1 {
+			label = "963269BHR:green:usb1";
+			gpios = <&gpio0 9 1>;
+		};
+
+		usb2 {
+			label = "963269BHR:green:usb2";
+			gpios = <&gpio0 10 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm963281TAN.dts b/target/linux/brcm63xx/dts/bcm963281TAN.dts
new file mode 100644
index 0000000..21b329a
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm963281TAN.dts
@@ -0,0 +1,40 @@
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom bcm963281TAN reference board";
+	compatible = "brcm,bcm963281TAN", "brcm,bcm6328";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		inet {
+			label = "963281TAN::internet";
+			gpios = <&gpio0 1 1>;
+		};
+		power {
+			label = "963281TAN::power";
+			gpios = <&gpio0 4 1>;
+			default-state = "on";
+		};
+		inet_fail {
+			label = "963281TAN::internet-fail";
+			gpios = <&gpio0 7 1>;
+		};
+		power_fail {
+			label = "963281TAN::power-fail";
+			gpios = <&gpio0 8 1>;
+		};
+		wps {
+			label = "963281TAN::wps";
+			gpios = <&gpio0 9 1>;
+		};
+		dsl {
+			label = "963281TAN::dsl";
+			gpios = <&gpio0 11 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm96328avng.dts b/target/linux/brcm63xx/dts/bcm96328avng.dts
new file mode 100644
index 0000000..3ed4b22
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96328avng.dts
@@ -0,0 +1,40 @@
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM96328avng reference board";
+	compatible = "brcm,bcm96328avng", "brcm,bcm6328";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		inet_fail {
+			label = "96328avng::internet-fail";
+			gpios = <&gpio0 2 1>;
+		};
+		dsl {
+			label = "96328avng::dsl";
+			gpios = <&gpio0 3 1>;
+		};
+		power {
+			label = "96328avng::power";
+			gpios = <&gpio0 4 1>;
+			default-state = "on";
+		};
+		power_fail {
+			label = "96328avng::power-fail";
+			gpios = <&gpio0 8 1>;
+		};
+		wps {
+			label = "96328avng::wps";
+			gpios = <&gpio0 9 1>;
+		};
+		inet {
+			label = "96328avng::internet";
+			gpios = <&gpio0 11 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm96338GW.dts b/target/linux/brcm63xx/dts/bcm96338GW.dts
new file mode 100644
index 0000000..d7af9ef
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96338GW.dts
@@ -0,0 +1,36 @@
+/dts-v1/;
+
+#include "bcm6338.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM96338GW reference board";
+	compatible = "brcm,bcm96338gw", "brcm,bcm6338";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "96338GW:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		stop_green {
+			label = "96338GW:green:stop";
+			gpios = <&gpio0 1 1>;
+		};
+		dsl_green {
+			label = "96338GW:green:adsl";
+			gpios = <&gpio0 3 1>;
+		};
+		ppp_fail_green {
+			label = "96338GW:green:ppp-fail";
+			gpios = <&gpio0 4 1>;
+		};
+		ses_green {
+			label = "96338GW:green:ses";
+			gpios = <&gpio0 5 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm96338W.dts b/target/linux/brcm63xx/dts/bcm96338W.dts
new file mode 100644
index 0000000..4904073
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96338W.dts
@@ -0,0 +1,36 @@
+/dts-v1/;
+
+#include "bcm6338.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM96338W reference board";
+	compatible = "brcm,bcm96338w", "brcm,bcm6338";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "96338W:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		stop_green {
+			label = "96338W:green:stop";
+			gpios = <&gpio0 1 1>;
+		};
+		dsl_green {
+			label = "96338W:green:adsl";
+			gpios = <&gpio0 3 1>;
+		};
+		ppp_fail_green {
+			label = "96338W:green:ppp-fail";
+			gpios = <&gpio0 4 1>;
+		};
+		ses_green {
+			label = "96338W:green:ses";
+			gpios = <&gpio0 5 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm96345GW2.dts b/target/linux/brcm63xx/dts/bcm96345GW2.dts
new file mode 100644
index 0000000..7214185
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96345GW2.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "bcm6345.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM96345GW2 reference board";
+	compatible = "brcm,bcm96345gw2", "brcm,bcm6345";
+};
diff --git a/target/linux/brcm63xx/dts/bcm96348GW-10.dts b/target/linux/brcm63xx/dts/bcm96348GW-10.dts
new file mode 100644
index 0000000..5f60d36
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96348GW-10.dts
@@ -0,0 +1,50 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM96348GW-10 reference board";
+	compatible = "brcm,bcm96348gw-10", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 6 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "96348GW-10:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		stop_green {
+			label = "96348GW-10:green:stop";
+			gpios = <&gpio0 1 1>;
+		};
+		adsl_fail_green {
+			label = "96348GW-10:green:adsl-fail";
+			gpios = <&gpio0 2 1>;
+		};
+		ppp_green {
+			label = "96348GW-10:green:ppp";
+			gpios = <&gpio0 3 1>;
+		};
+		ppp_fail_green {
+			label = "96348GW-10:green:ppp-fail";
+			gpios = <&gpio0 4 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm96348GW-11.dts b/target/linux/brcm63xx/dts/bcm96348GW-11.dts
new file mode 100644
index 0000000..efd3e91
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96348GW-11.dts
@@ -0,0 +1,50 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM96348GW-11 reference board";
+	compatible = "brcm,bcm96348gw-11", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 1 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "96348GW-11:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		stop_green {
+			label = "96348GW-11:green:stop";
+			gpios = <&gpio0 1 1>;
+		};
+		adsl_fail_green {
+			label = "96348GW-11:green:adsl-fail";
+			gpios = <&gpio0 2 1>;
+		};
+		ppp_green {
+			label = "96348GW-11:green:ppp";
+			gpios = <&gpio0 3 1>;
+		};
+		ppp_fail_green {
+			label = "96348GW-11:green:ppp-fail";
+			gpios = <&gpio0 4 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm96348GW.dts b/target/linux/brcm63xx/dts/bcm96348GW.dts
new file mode 100644
index 0000000..cf40e52
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96348GW.dts
@@ -0,0 +1,50 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM96348GW reference board";
+	compatible = "brcm,bcm96348gw", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 4 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "96348GW:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		stop_green {
+			label = "96348GW:green:stop";
+			gpios = <&gpio0 1 1>;
+		};
+		adsl_fail_green {
+			label = "96348GW:green:adsl-fail";
+			gpios = <&gpio0 2 1>;
+		};
+		ppp_green {
+			label = "96348GW:green:ppp";
+			gpios = <&gpio0 3 1>;
+		};
+		ppp_fail_green {
+			label = "96348GW:green:ppp-fail";
+			gpios = <&gpio0 4 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm96348R.dts b/target/linux/brcm63xx/dts/bcm96348R.dts
new file mode 100644
index 0000000..d7df2a9
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96348R.dts
@@ -0,0 +1,36 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom 96348R reference board";
+	compatible = "brcm,bcm96348r", "brcm,bcm6348";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "96348R:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		stop_green {
+			label = "96348R:green:stop";
+			gpios = <&gpio0 1 1>;
+		};
+		adsl_fail_green {
+			label = "96348R:green:adsl-fail";
+			gpios = <&gpio0 2 1>;
+		};
+		ppp_green {
+			label = "96348R:green:ppp";
+			gpios = <&gpio0 3 1>;
+		};
+		ppp_fail_green {
+			label = "96348R:green:ppp-fail";
+			gpios = <&gpio0 4 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm96358VW.dts b/target/linux/brcm63xx/dts/bcm96358VW.dts
new file mode 100644
index 0000000..ff92499
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96358VW.dts
@@ -0,0 +1,36 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM96358VW reference board";
+	compatible = "brcm,bcm96358vw", "brcm,bcm6358";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "96358VW:green:power";
+			gpios = <&gpio0 4 0>;
+			default-state = "on";
+		};
+		stop_green {
+			label = "96358VW:green:stop";
+			gpios = <&gpio0 5 0>;
+		};
+		adsl_fail_green {
+			label = "96358VW:green:adsl-fail";
+			gpios = <&gpio0 15 1>;
+		};
+		ppp_green {
+			label = "96358VW:green:ppp";
+			gpios = <&gpio0 22 1>;
+		};
+		ppp_fail_green {
+			label = "96358VW:green:ppp-fail";
+			gpios = <&gpio0 23 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm96358VW2.dts b/target/linux/brcm63xx/dts/bcm96358VW2.dts
new file mode 100644
index 0000000..8f7070a
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96358VW2.dts
@@ -0,0 +1,32 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM96358VW2 reference board";
+	compatible = "brcm,bcm96358vw2", "brcm,bcm6358";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		stop_green {
+			label = "96358VW2:green:stop";
+			gpios = <&gpio0 4 1>;
+		};
+		power_green {
+			label = "96358VW2:green:power";
+			gpios = <&gpio0 5 1>;
+			default-state = "on";
+		};
+		adsl_green {
+			label = "96358VW2:green:adsl";
+			gpios = <&gpio0 22 1>;
+		};
+		ppp_fail_green {
+			label = "96358VW2:green:ppp-fail";
+			gpios = <&gpio0 23 0>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm96368MVNgr.dts b/target/linux/brcm63xx/dts/bcm96368MVNgr.dts
new file mode 100644
index 0000000..21f1395
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96368MVNgr.dts
@@ -0,0 +1,36 @@
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM96368MVNgr reference board";
+	compatible = "brcm,bcm96368mvngr", "brcm,bcm6368";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		dsl_green {
+			label = "96368MVNgr:green:adsl";
+			gpios = <&gpio0 2 1>;
+		};
+		inet_fail_green {
+			label = "96368MVNgr:green:inet-fail";
+			gpios = <&gpio0 3 0>;
+		};
+		inet_green {
+			label = "96368MVNgr:green:inet";
+			gpios = <&gpio0 5 0>;
+		};
+		power_green {
+			label = "96368MVNgr:green:power";
+			gpios = <&gpio0 22 0>;
+			default-state = "on";
+		};
+		wps_green {
+			label = "96368MVNgr:green:wps";
+			gpios = <&gpio0 23 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/bcm96368MVWG.dts b/target/linux/brcm63xx/dts/bcm96368MVWG.dts
new file mode 100644
index 0000000..04442ab
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm96368MVWG.dts
@@ -0,0 +1,36 @@
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Broadcom BCM96368MVWG reference board";
+	compatible = "brcm,bcm96368mvwg", "brcm,bcm6368";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		dsl_green {
+			label = "96368MVWG:green:adsl";
+			gpios = <&gpio0 2 1>;
+		};
+		ppp_green {
+			label = "96368MVWG:green:ppp";
+			gpios = <&gpio0 5 0>;
+		};
+		power_green {
+			label = "96368MVWG:green:power";
+			gpios = <&gpio0 22 0>;
+			default-state = "on";
+		};
+		wps_green {
+			label = "96368MVWG:green:wps";
+			gpios = <&gpio0 23 1>;
+		};
+		ppp_fail_red {
+			label = "96368MVWG:red:ppp-fail";
+			gpios = <&gpio0 31 0>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/cpva502plus.dts b/target/linux/brcm63xx/dts/cpva502plus.dts
new file mode 100644
index 0000000..f00d73e
--- /dev/null
+++ b/target/linux/brcm63xx/dts/cpva502plus.dts
@@ -0,0 +1,46 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Telsey CPVA502+";
+	compatible = "telsey,cpva502+", "brcm,bcm6348";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "CPVA502+:green:phone";
+			gpios = <&gpio0 0 1>;
+		};
+
+		status {
+			label = "CPVA502+:amber:link";
+			gpios = <&gpio0 1 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/cpva642.dts b/target/linux/brcm63xx/dts/cpva642.dts
new file mode 100644
index 0000000..8d72e02
--- /dev/null
+++ b/target/linux/brcm63xx/dts/cpva642.dts
@@ -0,0 +1,97 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Telsey CPVA642-type (CPA-ZNTE60T)";
+	compatible = "telsey,cpva642", "brcm,bcm6358";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 4 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio1 5 0>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		eth_green {
+			label = "CPVA642:green:ether";
+			gpios = <&gpio0 1 1>;
+		};
+		phone2_green {
+			label = "CPVA642:green:phone2";
+			gpios = <&gpio0 2 1>;
+		};
+		usb_green {
+			label = "CPVA642:green:usb";
+			gpios = <&gpio0 3 1>;
+		};
+		phone1_green {
+			label = "CPVA642:green:phone1";
+			gpios = <&gpio0 4 1>;
+		};
+		wifi_red {
+			label = "CPVA642:red:wifi";
+			gpios = <&gpio0 6 1>;
+		};
+		link_red {
+			label = "CPVA642:red:link";
+			gpios = <&gpio0 9 1>;
+		};
+		link_green {
+			label = "CPVA642:green:link";
+			gpios = <&gpio0 10 1>;
+		};
+		power_green {
+			label = "CPVA642:green:power";
+			gpios = <&gpio0 11 1>;
+			default-state = "on";
+		};
+		power_red {
+			label = "CPVA642:red:power";
+			gpios = <&gpio0 14 1>;
+		};
+		wifi_green {
+			label = "CPVA642:green:wifi";
+			gpios = <&gpio0 28 0>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x7e0000>;
+	};
+
+	nvram@7f0000 {
+		label = "nvram";
+		reg = <0x7f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/ct-5365.dts b/target/linux/brcm63xx/dts/ct-5365.dts
new file mode 100644
index 0000000..6f452fe
--- /dev/null
+++ b/target/linux/brcm63xx/dts/ct-5365.dts
@@ -0,0 +1,74 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Comtrend CT-5365";
+	compatible = "comtrend,ct-5365", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 1 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wlan {
+			label = "wlan";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_WLAN>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio1 3 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "96348A-122:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		alarm_red {
+			label = "96348A-122:red:alarm";
+			gpios = <&gpio0 2 1>;
+		};
+		wps_green {
+			label = "96348A-122:green:wps";
+			gpios = <&gpio0 6 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/ct-6373.dts b/target/linux/brcm63xx/dts/ct-6373.dts
new file mode 100644
index 0000000..d6f0f8b
--- /dev/null
+++ b/target/linux/brcm63xx/dts/ct-6373.dts
@@ -0,0 +1,100 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Comtrend CT-6373";
+	compatible = "comtrend,ct-6373", "brcm,bcm6358";
+
+	spi-gpio {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-gpio";
+
+		gpio-mosi = <&gpio0 7 0>;
+		gpio-sck = <&gpio0 6 0>;
+		num-chipselects = <0>;
+
+		hc595: gpio-spi-controller@0 {
+			compatible = "fairchild,74hc595";
+			reg = <0>;
+			registers-number = <1>;
+			spi-max-frequency = <100000>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 3 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "CT6373-1:green:power";
+			gpios = <&gpio0 0 0>;
+			default-state = "on";
+		};
+		usb_green {
+			label = "CT6373-1:green:usb";
+			gpios = <&gpio0 3 1>;
+		};
+		wlan_green {
+			label = "CT6373-1:green:wlan";
+			gpios = <&gpio0 9 1>;
+		};
+		dsl_green {
+			label = "CT6373-1:green:adsl";
+			gpios = <&hc595 0 1>;
+		};
+		line_green {
+			label = "CT6373-1:green:line";
+			gpios = <&hc595 1 1>;
+		};
+		fxs1_green {
+			label = "CT6373-1:green:fxs1";
+			gpios = <&hc595 2 1>;
+		};
+		fxs2_green {
+			label = "CT6373-1:green:fxs2";
+			gpios = <&hc595 3 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x7e0000>;
+	};
+
+	nvram@7f0000 {
+		label = "nvram";
+		reg = <0x7f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/ct536plus.dts b/target/linux/brcm63xx/dts/ct536plus.dts
new file mode 100644
index 0000000..c05068a
--- /dev/null
+++ b/target/linux/brcm63xx/dts/ct536plus.dts
@@ -0,0 +1,38 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Comtrend CT-536+/CT-5621T";
+	compatible = "comtrend,ct536+", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 1 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "CT536_CT5621:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		adsl_fail_green {
+			label = "CT536_CT5621:green:adsl-fail";
+			gpios = <&gpio0 2 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/cvg834g.dts b/target/linux/brcm63xx/dts/cvg834g.dts
new file mode 100644
index 0000000..b61a07c
--- /dev/null
+++ b/target/linux/brcm63xx/dts/cvg834g.dts
@@ -0,0 +1,42 @@
+/dts-v1/;
+
+#include "bcm3368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Netgear CVG834G";
+	compatible = "netgear,cvg834g", "brcm,bcm6348";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "CVG834G:green:power";
+			gpios = <&gpio1 5 0>;
+			default-state = "on";
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/dg834g_v4.dts b/target/linux/brcm63xx/dts/dg834g_v4.dts
new file mode 100644
index 0000000..1485300
--- /dev/null
+++ b/target/linux/brcm63xx/dts/dg834g_v4.dts
@@ -0,0 +1,68 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Netgear DG834G v4";
+	compatible = "netgear,dg834g-v4", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 6 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "96348W3:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		status {
+			label = "96348W3:red:power";
+			gpios = <&gpio0 1 1>;
+		};
+		inet_green {
+			label = "96348W3::adsl";
+			gpios = <&gpio0 2 1>;
+		};
+		inet_red {
+			label = "96348W3::internet";
+			gpios = <&gpio0 3 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/dg834gtpn.dts b/target/linux/brcm63xx/dts/dg834gtpn.dts
new file mode 100644
index 0000000..8894358
--- /dev/null
+++ b/target/linux/brcm63xx/dts/dg834gtpn.dts
@@ -0,0 +1,72 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Netgear DG834GT/PN";
+	compatible = "netgear,dg834gtpn", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 6 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "96348GW-10:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		stop_green {
+			label = "96348GW-10:green:stop";
+			gpios = <&gpio0 1 1>;
+		};
+		adsl_fail_green {
+			label = "96348GW-10:green:adsl-fail";
+			gpios = <&gpio0 2 1>;
+		};
+		ppp_green {
+			label = "96348GW-10:green:ppp";
+			gpios = <&gpio0 3 1>;
+		};
+		ppp_fail_green {
+			label = "96348GW-10:green:ppp-fail";
+			gpios = <&gpio0 4 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/dgnd3700v1.dts b/target/linux/brcm63xx/dts/dgnd3700v1.dts
new file mode 100644
index 0000000..8c8c0bf
--- /dev/null
+++ b/target/linux/brcm63xx/dts/dgnd3700v1.dts
@@ -0,0 +1,112 @@
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Netgear DGND3700v1/DGND3800B";
+	compatible = "netgear,dgnd3700v1", "brcm,bcm6368";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		wlan {
+			label = "wlan";
+			gpios = <&gpio0 10 1>;
+			linux,code = <KEY_WLAN>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio0 12 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio1 3 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		dsl_green {
+			label = "DGND3700v1_3800B:green:dsl";
+			gpios = <&gpio0 2 1>;
+		};
+		inet_red {
+			label = "DGND3700v1_3800B:red:inet";
+			gpios = <&gpio0 4 1>;
+		};
+		inet_green {
+			label = "DGND3700v1_3800B:green:inet";
+			gpios = <&gpio0 5 1>;
+		};
+		wps_green {
+			label = "DGND3700v1_3800B:green:wps";
+			gpios = <&gpio0 11 1>;
+		};
+		usbfront_green {
+			label = "DGND3700v1_3800B:green:usb-front";
+			gpios = <&gpio0 13 1>;
+		};
+		usbback_green {
+			label = "DGND3700v1_3800B:green:usb-back";
+			gpios = <&gpio0 14 1>;
+		};
+		power_red {
+			label = "DGND3700v1_3800B:red:power";
+			gpios = <&gpio0 22 1>;
+		};
+		lan_green {
+			label = "DGND3700v1_3800B:green:lan";
+			gpios = <&gpio0 23 1>;
+		};
+		power_green {
+			label = "DGND3700v1_3800B:green:power";
+			gpios = <&gpio0 24 1>;
+			default-state = "on";
+		};
+		wifi2g_green {
+			label = "DGND3700v1_3800B:green:wifi2g";
+			gpios = <&gpio0 26 1>;
+		};
+		wifi5g_blue {
+			label = "DGND3700v1_3800B:blue:wifi5g";
+			gpios = <&gpio0 27 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x020000>;
+		read-only;
+	};
+
+	linux@20000 {
+		label = "linux";
+		reg = <0x020000 0x1e20000>;
+	};
+
+	board_data@1e40000 {
+		label = "board_data";
+		reg = <0x1e40000 0x1a0000>;
+		read-only;
+	};
+
+	nvram@1fe0000 {
+		label = "nvram";
+		reg = <0x1fe0000 0x20000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/dsl-2640b-b.dts b/target/linux/brcm63xx/dts/dsl-2640b-b.dts
new file mode 100644
index 0000000..83b36a5
--- /dev/null
+++ b/target/linux/brcm63xx/dts/dsl-2640b-b.dts
@@ -0,0 +1,68 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "D-Link DSL-2640B rev B2";
+	compatible = "d-link,dsl-2640b-b", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 7 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "D-4P-W:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		status {
+			label = "D-4P-W::status";
+			gpios = <&gpio0 3 1>;
+		};
+		inet_green {
+			label = "D-4P-W:green:internet";
+			gpios = <&gpio0 4 1>;
+		};
+		inet_red {
+			label = "D-4P-W:red:internet";
+			gpios = <&gpio0 5 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/dsl-2640u.dts b/target/linux/brcm63xx/dts/dsl-2640u.dts
new file mode 100644
index 0000000..d3d2772
--- /dev/null
+++ b/target/linux/brcm63xx/dts/dsl-2640u.dts
@@ -0,0 +1,52 @@
+/dts-v1/;
+
+#include "bcm6338.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "D-Link DSL-2640U/BRU/C";
+	compatible = "d-link,dsl-2640u", "brcm,bcm6338";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		green_power {
+			label = "96338W2_E7T:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+
+		green_stop {
+			label = "96338W2_E7T:green:ppp";
+			gpios = <&gpio0 4 1>;
+		};
+
+		green_adsl {
+			label = "96338W2_E7T:green:ppp-fail";
+			gpios = <&gpio0 5 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/dsl-2650u.dts b/target/linux/brcm63xx/dts/dsl-2650u.dts
new file mode 100644
index 0000000..2847c18
--- /dev/null
+++ b/target/linux/brcm63xx/dts/dsl-2650u.dts
@@ -0,0 +1,54 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "D-Link DSL-2650U";
+	compatible = "d-link,dsl-2650u", "brcm,bcm6358";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		stop_green {
+			label = "96358VW2:green:stop";
+			gpios = <&gpio0 4 1>;
+		};
+		power_green {
+			label = "96358VW2:green:power";
+			gpios = <&gpio0 5 1>;
+			default-state = "on";
+		};
+		adsl_green {
+			label = "96358VW2:green:adsl";
+			gpios = <&gpio0 22 1>;
+		};
+		ppp_fail_green {
+			label = "96358VW2:green:ppp-fail";
+			gpios = <&gpio0 23 0>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x7e0000>;
+	};
+
+	nvram@7f0000 {
+		label = "nvram";
+		reg = <0x7f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/dsl-274xb-c.dts b/target/linux/brcm63xx/dts/dsl-274xb-c.dts
new file mode 100644
index 0000000..29ae125
--- /dev/null
+++ b/target/linux/brcm63xx/dts/dsl-274xb-c.dts
@@ -0,0 +1,72 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "D-Link DSL-2740B/DSL-2741B rev C2/3";
+	compatible = "d-link,dsl-274xb-c2", "brcm,bcm6358";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		inet_green {
+			label = "dsl-274xb:green:internet";
+			gpios = <&gpio0 2 0>;
+		};
+		power_red {
+			label = "dsl-274xb:red:power";
+			gpios = <&gpio0 4 1>;
+		};
+		power_green {
+			label = "dsl-274xb:green:power";
+			gpios = <&gpio0 5 1>;
+			default-state = "on";
+		};
+		dsl_green {
+			label = "dsl-274xb:green:adsl";
+			gpios = <&gpio0 9 1>;
+		};
+		inet_red {
+			label = "dsl-274xb:red:internet";
+			gpios = <&gpio0 10 0>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/dsl-274xb-f.dts b/target/linux/brcm63xx/dts/dsl-274xb-f.dts
new file mode 100644
index 0000000..fb1ded7
--- /dev/null
+++ b/target/linux/brcm63xx/dts/dsl-274xb-f.dts
@@ -0,0 +1,64 @@
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "D-Link DSL-2740B/DSL-2741B rev F1";
+	compatible = "d-link,dsl-274xb-f", "brcm,bcm6328";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		wifi {
+			label = "wifi";
+			gpios = <&gpio0 10 1>;
+			linux,code = <KEY_WLAN>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio0 23 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio0 24 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		inet_red {
+			label = "dsl-274xb:red:internet";
+			gpios = <&gpio0 2 1>;
+		};
+		dsl_green {
+			label = "dsl-274xb:green:dsl";
+			gpios = <&gpio0 3 1>;
+		};
+		power_green {
+			label = "dsl-274xb:green:power";
+			gpios = <&gpio0 4 1>;
+			default-state = "on";
+		};
+		power_red {
+			label = "dsl-274xb:red:power";
+			gpios = <&gpio0 8 1>;
+		};
+		wps_blue {
+			label = "dsl-274xb:blue:wps";
+			gpios = <&gpio0 9 1>;
+		};
+		inet_green {
+			label = "dsl-274xb:green:internet";
+			gpios = <&gpio0 11 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/dsl-275xb-d.dts b/target/linux/brcm63xx/dts/dsl-275xb-d.dts
new file mode 100644
index 0000000..dd00e2c
--- /dev/null
+++ b/target/linux/brcm63xx/dts/dsl-275xb-d.dts
@@ -0,0 +1,77 @@
+/dts-v1/;
+
+#include "bcm6318.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "D-Link DSL-2750B/DSL-2751 rev D1";
+	compatible = "d-link,dsl-275xb-d", "brcm,bcm6318";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		wifi {
+			label = "wifi";
+			gpios = <&gpio0 2 1>;
+			linux,code = <KEY_WLAN>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio1 1 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "dsl-275xb:green:power";
+			gpios = <&gpio0 3 1>;
+			default-state = "on";
+		};
+
+		inet_green {
+			label = "dsl-275xb:green:inet";
+			gpios = <&gpio0 8 1>;
+		};
+
+		inet_red {
+			label = "dsl-275xb:red:inet-fail";
+			gpios = <&gpio0 9 1>;
+		};
+
+		power_red {
+			label = "dsl-275xb:red:post-failed";
+			gpios = <&gpio0 11 1>;
+		};
+
+		wps_blue {
+			label = "dsl-275xb:blue:wps";
+			gpios = <&gpio0 16 1>;
+		};
+
+		dsl_green {
+			label = "dsl-275xb:green:dsl";
+			gpios = <&gpio0 17 1>;
+		};
+
+		usb_green {
+			/* not user controllable? */
+			label = "dsl-275xb:green:usb";
+			gpios = <&gpio1 17 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/dv-201amr.dts b/target/linux/brcm63xx/dts/dv-201amr.dts
new file mode 100644
index 0000000..f792ac2
--- /dev/null
+++ b/target/linux/brcm63xx/dts/dv-201amr.dts
@@ -0,0 +1,32 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Davolink DV-201AMR";
+	compatible = "davolink,dv-201amr", "brcm,bcm6348";
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	backup@0 {
+		label = "backup";
+		reg = <0x000000 0x400000>;
+	};
+
+	cfe@400000 {
+		label = "cfe";
+		reg = <0x400000 0x010000>;
+		read-only;
+	};
+
+	linux@410000 {
+		label = "linux";
+		reg = <0x410000 0x3f0000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/dva-g3810bn_tl.dts b/target/linux/brcm63xx/dts/dva-g3810bn_tl.dts
new file mode 100644
index 0000000..2009825
--- /dev/null
+++ b/target/linux/brcm63xx/dts/dva-g3810bn_tl.dts
@@ -0,0 +1,50 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "D-Link DVA-G3810BN/TL";
+	compatible = "d-link,dva-g3810bn/tl", "brcm,bcm6358";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		voip {
+			label = "DVAG3810BN::voip";
+			gpios = <&gpio0 1 0>;
+		};
+		power {
+			label = "DVAG3810BN::power";
+			gpios = <&gpio0 4 0>;
+			default-state = "on";
+		};
+		stop {
+			label = "DVAG3810BN::stop";
+			gpios = <&gpio0 5 0>;
+		};
+		dsl {
+			label = "DVAG3810BN::dsl";
+			gpios = <&gpio0 22 1>;
+		};
+		inet {
+			label = "DVAG3810BN::internet";
+			gpios = <&gpio0 23 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/f5d7633.dts b/target/linux/brcm63xx/dts/f5d7633.dts
new file mode 100644
index 0000000..519df1e
--- /dev/null
+++ b/target/linux/brcm63xx/dts/f5d7633.dts
@@ -0,0 +1,72 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Belkin F5D7633";
+	compatible = "belkin,f5d7633", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 6 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "96348GW-10:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		stop_green {
+			label = "96348GW-10:green:stop";
+			gpios = <&gpio0 1 1>;
+		};
+		adsl_fail_green {
+			label = "96348GW-10:green:adsl-fail";
+			gpios = <&gpio0 2 1>;
+		};
+		ppp_green {
+			label = "96348GW-10:green:ppp";
+			gpios = <&gpio0 3 1>;
+		};
+		ppp_fail_green {
+			label = "96348GW-10:green:ppp-fail";
+			gpios = <&gpio0 4 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x020000>;
+		read-only;
+	};
+
+	linux@20000 {
+		label = "linux";
+		reg = <0x020000 0x3c0000>;
+	};
+
+	nvram@3e0000 {
+		label = "nvram";
+		reg = <0x3e0000 0x020000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/fast2404.dts b/target/linux/brcm63xx/dts/fast2404.dts
new file mode 100644
index 0000000..5309703
--- /dev/null
+++ b/target/linux/brcm63xx/dts/fast2404.dts
@@ -0,0 +1,32 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Sagem F@ST2404";
+	compatible = "sagem,f@st2404", "brcm,bcm6348";
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/fast2504n.dts b/target/linux/brcm63xx/dts/fast2504n.dts
new file mode 100644
index 0000000..cf453af
--- /dev/null
+++ b/target/linux/brcm63xx/dts/fast2504n.dts
@@ -0,0 +1,59 @@
+/dts-v1/;
+
+#include "bcm6362.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Sagem F@ST2504n";
+	compatible = "sagem,f@st2504n", "brcm,bcm6362";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 24 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio0 25 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_orange {
+			label = "fast2504n:orange:power";
+			gpios = <&gpio0 2 1>;
+		};
+		power_green {
+			label = "fast2504n:green:power";
+			gpios = <&gpio0 10 1>;
+			default-state = "on";
+		};
+		inet_red {
+			label = "fast2504n:red:internet";
+			gpios = <&gpio0 26 1>;
+		};
+		ok_green {
+			label = "fast2504n:green:ok";
+			gpios = <&gpio0 28 1>;
+		};
+		ok_orange {
+			label = "fast2504n:orange:ok";
+			gpios = <&gpio0 29 1>;
+		};
+		wlan_orangee {
+			label = "fast2504n:orange:wlan";
+			gpios = <&gpio0 30 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/fast2604.dts b/target/linux/brcm63xx/dts/fast2604.dts
new file mode 100644
index 0000000..c6b71d1
--- /dev/null
+++ b/target/linux/brcm63xx/dts/fast2604.dts
@@ -0,0 +1,68 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Sagem F@ST2604";
+	compatible = "sagem,f@st2604", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 1 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "F@ST2604:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		power_red {
+			label = "F@ST2604:red:power";
+			gpios = <&gpio0 1 1>;
+		};
+		inet_red {
+			label = "F@ST2604:red:inet";
+			gpios = <&gpio0 4 1>;
+		};
+		wps_green {
+			label = "F@ST2604:green:wps";
+			gpios = <&gpio0 5 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/fast2704n.dts b/target/linux/brcm63xx/dts/fast2704n.dts
new file mode 100644
index 0000000..232d4d1
--- /dev/null
+++ b/target/linux/brcm63xx/dts/fast2704n.dts
@@ -0,0 +1,84 @@
+/dts-v1/;
+
+#include "bcm6318.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Sagem F@ST2704N";
+	compatible = "sagem,f@st2704n", "brcm,bcm6318";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		wlan {
+			label = "wlan";
+			gpios = <&gpio0 1 0>;
+			linux,code = <KEY_WLAN>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio1 1 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		wps_green {
+			label = "F@ST2704N:green:wps";
+			gpios = <&gpio0 2 1>;
+		};
+		lan1_green {
+			label = "F@ST2704N:green:lan1";
+			gpios = <&gpio0 4 1>;
+		};
+		lan2_green {
+			label = "F@ST2704N:green:lan2";
+			gpios = <&gpio0 5 1>;
+		};
+		lan3_green {
+			label = "F@ST2704N:green:lan3";
+			gpios = <&gpio0 6 1>;
+		};
+		lan4_green {
+			label = "F@ST2704N:green:lan4";
+			gpios = <&gpio0 7 1>;
+		};
+		inet_green {
+			label = "F@ST2704N:green:inet";
+			gpios = <&gpio0 8 1>;
+		};
+		inet_red {
+			label = "F@ST2704N:red:inet";
+			gpios = <&gpio0 9 1>;
+		};
+		dsl_green {
+			label = "F@ST2704N:green:dsl";
+			gpios = <&gpio0 10 1>;
+		};
+		power_red {
+			label = "F@ST2704N:red:power";
+			gpios = <&gpio0 11 1>;
+		};
+		power_green {
+			label = "F@ST2704N:green:power";
+			gpios = <&gpio1 15 1>;
+			default-state = "on";
+		};
+		usb_green {
+			label = "F@ST2704N:green:usb";
+			gpios = <&gpio1 17 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/fast2704v2.dts b/target/linux/brcm63xx/dts/fast2704v2.dts
new file mode 100644
index 0000000..3f56827
--- /dev/null
+++ b/target/linux/brcm63xx/dts/fast2704v2.dts
@@ -0,0 +1,68 @@
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Sagem F@ST2704V2";
+	compatible = "sagem,f@st2704v2", "brcm,bcm6328";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio0 15 1>;
+			linux,code = <KEY_WLAN>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio0 23 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio0 24 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		usb_green {
+			label = "F@ST2704V2:green:usb";
+			gpios = <&gpio0 1 1>;
+		};
+		inet_red {
+			label = "F@ST2704V2:red:inet";
+			gpios = <&gpio0 2 1>;
+		};
+		dsl_green {
+			label = "F@ST2704V2:green:dsl";
+			gpios = <&gpio0 3 1>;
+		};
+		power_green {
+			label = "F@ST2704V2:green:power";
+			gpios = <&gpio0 4 1>;
+			default-state = "on";
+		};
+		power_red {
+			label = "F@ST2704V2:red:power";
+			gpios = <&gpio0 5 1>;
+		};
+		wps_green {
+			label = "F@ST2704V2:green:wps";
+			gpios = <&gpio0 10 1>;
+		};
+		inet_green {
+			label = "F@ST2704V2:green:inet";
+			gpios = <&gpio0 11 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/gw6000.dts b/target/linux/brcm63xx/dts/gw6000.dts
new file mode 100644
index 0000000..69424e0
--- /dev/null
+++ b/target/linux/brcm63xx/dts/gw6000.dts
@@ -0,0 +1,24 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "TECOM GW6000";
+	compatible = "tecom,gw6000", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 4 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/gw6200.dts b/target/linux/brcm63xx/dts/gw6200.dts
new file mode 100644
index 0000000..2bd4381
--- /dev/null
+++ b/target/linux/brcm63xx/dts/gw6200.dts
@@ -0,0 +1,45 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "TECOM GW6200";
+	compatible = "tecom,gw6200", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 4 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		line1_green {
+			label = "GW6200:green:line1";
+			gpios = <&gpio0 4 1>;
+		};
+		line2_green {
+			label = "GW6200:green:line2";
+			gpios = <&gpio0 5 1>;
+		};
+		line3_green {
+			label = "GW6200:green:line3";
+			gpios = <&gpio0 6 1>;
+		};
+		tel_green {
+			label = "GW6200:green:tel";
+			gpios = <&gpio0 7 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/hg520v.dts b/target/linux/brcm63xx/dts/hg520v.dts
new file mode 100644
index 0000000..7b6b36f
--- /dev/null
+++ b/target/linux/brcm63xx/dts/hg520v.dts
@@ -0,0 +1,55 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Huawei EchoLife HG520v";
+	compatible = "huawei,hg520v", "brcm,bcm6358";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 5 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		inet_green {
+			label = "HW520:green:net";
+			gpios = <&gpio1 0 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/hg553.dts b/target/linux/brcm63xx/dts/hg553.dts
new file mode 100644
index 0000000..b23ceaa
--- /dev/null
+++ b/target/linux/brcm63xx/dts/hg553.dts
@@ -0,0 +1,94 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Huawei EchoLife HG553";
+	compatible = "huawei,hg553", "brcm,bcm6358";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio0 9 1>;
+			linux,code = <KEY_RFKILL>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 5 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "HW553:blue:power";
+			gpios = <&gpio0 4 1>;
+			default-state = "on";
+		};
+		power_red {
+			label = "HW553:red:power";
+			gpios = <&gpio0 5 1>;
+		};
+		hspa_red {
+			label = "HW553:red:hspa";
+			gpios = <&gpio0 12 1>;
+		};
+		hspa_blue {
+			label = "HW553:blue:hspa";
+			gpios = <&gpio0 13 1>;
+		};
+		lan_red {
+			label = "HW553:red:lan";
+			gpios = <&gpio0 22 1>;
+		};
+		lan_blue {
+			label = "HW553:blue:lan";
+			gpios = <&gpio0 23 1>;
+		};
+		wifi_red {
+			label = "HW553:red:wifi";
+			gpios = <&gpio0 25 1>;
+		};
+		dsl_red {
+			label = "HW553:red:adsl";
+			gpios = <&gpio1 2 1>;
+		};
+		dsl_blue {
+			label = "HW553:blue:adsl";
+			gpios = <&gpio1 3 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x020000>;
+		read-only;
+	};
+
+	linux@20000 {
+		label = "linux";
+		reg = <0x020000 0xfc0000>;
+	};
+
+	nvram@fe0000 {
+		label = "nvram";
+		reg = <0xfe0000 0x020000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/hg556a-a.dts b/target/linux/brcm63xx/dts/hg556a-a.dts
new file mode 100644
index 0000000..98e0a83
--- /dev/null
+++ b/target/linux/brcm63xx/dts/hg556a-a.dts
@@ -0,0 +1,126 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Huawei EchoLife HG556a (version A)";
+	compatible = "huawei,hg556a-a", "brcm,bcm6358";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		help {
+			label = "help";
+			gpios = <&gpio0 8 1>;
+			linux,code = <KEY_HELP>;
+		};
+		wlan {
+			label = "wlan";
+			gpios = <&gpio0 9 1>;
+			linux,code = <KEY_WLAN>;
+		};
+		restart {
+			label = "restart";
+			gpios = <&gpio0 10 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio0 11 1>;
+			linux,code = <KEY_CONFIG>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		message_red {
+			label = "HW556:red:message";
+			gpios = <&gpio0 0 1>;
+		};
+		hspa_red {
+			label = "HW556:red:hspa";
+			gpios = <&gpio0 1 1>;
+		};
+		dsl_red {
+			label = "HW556:red:dsl";
+			gpios = <&gpio0 2 1>;
+		};
+		power_red {
+			label = "HW556:red:power";
+			gpios = <&gpio0 3 1>;
+			default-state = "on";
+		};
+		all_red {
+			label = "HW556:red:all";
+			gpios = <&gpio0 6 1>;
+			default-state = "on";
+		};
+		lan1_green {
+			label = "HW556:green:lan1";
+			gpios = <&gpio0 12 1>;
+		};
+		lan1_red {
+			label = "HW556:red:lan1";
+			gpios = <&gpio0 13 1>;
+		};
+		lan2_green {
+			label = "HW556:green:lan2";
+			gpios = <&gpio0 15 1>;
+		};
+		lan2_red {
+			label = "HW556:red:lan2";
+			gpios = <&gpio0 22 1>;
+		};
+		lan3_green {
+			label = "HW556:green:lan3";
+			gpios = <&gpio0 23 1>;
+		};
+		lan3_red {
+			label = "HW556:red:lan3";
+			gpios = <&gpio0 26 1>;
+		};
+		lan4_green {
+			label = "HW556:green:lan4";
+			gpios = <&gpio0 27 1>;
+		};
+		lan4_red {
+			label = "HW556:red:lan4";
+			gpios = <&gpio0 28 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x020000>;
+		read-only;
+	};
+
+	linux@20000 {
+		label = "linux";
+		reg = <0x020000 0xec0000>;
+	};
+
+	cal_data@ee0000 {
+		label = "cal_data";
+		reg = <0xee0000 0x100000>;
+		read-only;
+	};
+
+	nvram@fe0000 {
+		label = "nvram";
+		reg = <0xfe0000 0x020000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/hg556a-b.dts b/target/linux/brcm63xx/dts/hg556a-b.dts
new file mode 100644
index 0000000..8a19856
--- /dev/null
+++ b/target/linux/brcm63xx/dts/hg556a-b.dts
@@ -0,0 +1,126 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Huawei EchoLife HG556a (version B)";
+	compatible = "huawei,hg556a-b", "brcm,bcm6358";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		help {
+			label = "help";
+			gpios = <&gpio0 8 1>;
+			linux,code = <KEY_HELP>;
+		};
+		wlan {
+			label = "wlan";
+			gpios = <&gpio0 9 1>;
+			linux,code = <KEY_WLAN>;
+		};
+		restart {
+			label = "restart";
+			gpios = <&gpio0 10 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio0 11 1>;
+			linux,code = <KEY_CONFIG>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		message_red {
+			label = "HW556:red:message";
+			gpios = <&gpio0 0 1>;
+		};
+		hspa_red {
+			label = "HW556:red:hspa";
+			gpios = <&gpio0 1 1>;
+		};
+		dsl_red {
+			label = "HW556:red:dsl";
+			gpios = <&gpio0 2 1>;
+		};
+		power_red {
+			label = "HW556:red:power";
+			gpios = <&gpio0 3 1>;
+			default-state = "on";
+		};
+		all_red {
+			label = "HW556:red:all";
+			gpios = <&gpio0 6 1>;
+			default-state = "on";
+		};
+		lan1_green {
+			label = "HW556:green:lan1";
+			gpios = <&gpio0 12 1>;
+		};
+		lan1_red {
+			label = "HW556:red:lan1";
+			gpios = <&gpio0 13 1>;
+		};
+		lan2_green {
+			label = "HW556:green:lan2";
+			gpios = <&gpio0 15 1>;
+		};
+		lan2_red {
+			label = "HW556:red:lan2";
+			gpios = <&gpio0 22 1>;
+		};
+		lan3_green {
+			label = "HW556:green:lan3";
+			gpios = <&gpio0 23 1>;
+		};
+		lan3_red {
+			label = "HW556:red:lan3";
+			gpios = <&gpio0 26 1>;
+		};
+		lan4_green {
+			label = "HW556:green:lan4";
+			gpios = <&gpio0 27 1>;
+		};
+		lan4_red {
+			label = "HW556:red:lan4";
+			gpios = <&gpio0 28 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x020000>;
+		read-only;
+	};
+
+	linux@20000 {
+		label = "linux";
+		reg = <0x020000 0xec0000>;
+	};
+
+	cal_data@ee0000 {
+		label = "cal_data";
+		reg = <0xee0000 0x100000>;
+		read-only;
+	};
+
+	nvram@fe0000 {
+		label = "nvram";
+		reg = <0xfe0000 0x020000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/hg556a-c.dts b/target/linux/brcm63xx/dts/hg556a-c.dts
new file mode 100644
index 0000000..9798091
--- /dev/null
+++ b/target/linux/brcm63xx/dts/hg556a-c.dts
@@ -0,0 +1,121 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Huawei EchoLife HG556a (version C)";
+	compatible = "huawei,hg556a-c", "brcm,bcm6358";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		help {
+			label = "help";
+			gpios = <&gpio0 8 1>;
+			linux,code = <KEY_HELP>;
+		};
+		wlan {
+			label = "wlan";
+			gpios = <&gpio0 9 1>;
+			linux,code = <KEY_WLAN>;
+		};
+		restart {
+			label = "restart";
+			gpios = <&gpio0 10 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio0 11 1>;
+			linux,code = <KEY_CONFIG>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		lan1_green {
+			label = "HW556:green:lan1";
+			gpios = <&gpio0 0 1>;
+		};
+		lan2_green {
+			label = "HW556:green:lan2";
+			gpios = <&gpio0 1 1>;
+		};
+		dsl_red {
+			label = "HW556:red:dsl";
+			gpios = <&gpio0 2 1>;
+		};
+		power_red {
+			label = "HW556:red:power";
+			gpios = <&gpio0 3 1>;
+			default-state = "on";
+		};
+		message_red {
+			label = "HW556:red:message";
+			gpios = <&gpio0 12 1>;
+		};
+		lan1_red {
+			label = "HW556:red:lan1";
+			gpios = <&gpio0 13 1>;
+		};
+		hspa_red {
+			label = "HW556:red:hspa";
+			gpios = <&gpio0 15 1>;
+		};
+		lan2_red {
+			label = "HW556:red:lan2";
+			gpios = <&gpio0 22 1>;
+		};
+		lan3_green {
+			label = "HW556:green:lan3";
+			gpios = <&gpio0 23 1>;
+		};
+		lan3_red {
+			label = "HW556:red:lan3";
+			gpios = <&gpio0 26 1>;
+		};
+		lan4_green {
+			label = "HW556:green:lan4";
+			gpios = <&gpio0 27 1>;
+		};
+		lan4_red {
+			label = "HW556:red:lan4";
+			gpios = <&gpio0 28 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x020000>;
+		read-only;
+	};
+
+	linux@20000 {
+		label = "linux";
+		reg = <0x020000 0xec0000>;
+	};
+
+	cal_data@ee0000 {
+		label = "cal_data";
+		reg = <0xee0000 0x100000>;
+		read-only;
+	};
+
+	nvram@fe0000 {
+		label = "nvram";
+		reg = <0xfe0000 0x020000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/hg655b.dts b/target/linux/brcm63xx/dts/hg655b.dts
new file mode 100644
index 0000000..b7722df
--- /dev/null
+++ b/target/linux/brcm63xx/dts/hg655b.dts
@@ -0,0 +1,112 @@
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Huawei HG655b";
+	compatible = "huawei,hg655b", "brcm,bcm6368";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 12 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+		wlan {
+			label = "wlan";
+			gpios = <&gpio0 23 1>;
+			linux,code = <KEY_WLAN>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		dsl_green {
+			label = "HW65x:green:dsl";
+			gpios = <&gpio0 2 1>;
+		};
+		internet_green {
+			label = "HW65x:green:internet";
+			gpios = <&gpio0 5 1>;
+		};
+		lan1_green {
+			label = "HW65x:green:lan1";
+			gpios = <&gpio0 6 1>;
+		};
+		lan2_green {
+			label = "HW65x:green:lan2";
+			gpios = <&gpio0 7 1>;
+		};
+		lan3_green {
+			label = "HW65x:green:lan3";
+			gpios = <&gpio0 8 1>;
+		};
+		lan4_green {
+			label = "HW65x:green:lan4";
+			gpios = <&gpio0 9 1>;
+		};
+		usb_green {
+			label = "HW65x:green:usb";
+			gpios = <&gpio0 14 1>;
+		};
+		power_green {
+			label = "HW65x:green:power";
+			gpios = <&gpio0 22 1>;
+			default-state = "on";
+		};
+		voip_green {
+			label = "HW65x:green:voip";
+			gpios = <&gpio0 25 1>;
+		};
+		wps_green {
+			label = "HW65x:green:wps";
+			gpios = <&gpio0 27 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x020000>;
+	};
+
+	linux@20000 {
+		label = "linux";
+		reg = <0x020000 0x770000>;
+	};
+
+	board_data@790000 {
+		label = "board_data";
+		reg = <0x790000 0x030000>;
+	};
+
+	cal_data@7c0000 {
+		label = "cal_data";
+		reg = <0x7c0000 0x020000>;
+		read-only;
+	};
+
+	nvram@7d0000 {
+		label = "nvram";
+		reg = <0x7e0000 0x020000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/homehub2a.dts b/target/linux/brcm63xx/dts/homehub2a.dts
new file mode 100644
index 0000000..9e7ce2f
--- /dev/null
+++ b/target/linux/brcm63xx/dts/homehub2a.dts
@@ -0,0 +1,142 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "BT Home Hub 2.0 Type A";
+	compatible = "thomson,homehub2a", "brcm,bcm6358";
+
+	spi-gpio {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-gpio";
+
+		gpio-mosi = <&gpio0 7 0>;
+		gpio-sck = <&gpio0 6 0>;
+		cs-gpios = <&gpio0 5 0>;
+		num-chipselects = <1>;
+
+		hc595: gpio-spi-controller@0 {
+			compatible = "fairchild,74hc595";
+			reg = <0>;
+			registers-number = <2>;
+			spi-max-frequency = <100000>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		phone {
+			label = "phone";
+			gpios = <&gpio0 1 1>;
+			linux,code = <169>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio0 9 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio0 11 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_red {
+			label = "HOMEHUB2A:red:power";
+			gpios = <&hc595 0 1>;
+		};
+		power_green {
+			label = "HOMEHUB2A:green:power";
+			gpios = <&hc595 1 1>;
+			default-state = "on";
+		};
+		power_blue {
+			label = "HOMEHUB2A:blue:power";
+			gpios = <&hc595 2 1>;
+		};
+		broadband_red {
+			label = "HOMEHUB2A:red:broadband";
+			gpios = <&hc595 3 1>;
+		};
+		broadband_green {
+			label = "HOMEHUB2A:green:broadband";
+			gpios = <&hc595 4 1>;
+		};
+		broadband_blue {
+			label = "HOMEHUB2A:blue:broadband";
+			gpios = <&hc595 5 1>;
+		};
+		wireless_red {
+			label = "HOMEHUB2A:red:wireless";
+			gpios = <&hc595 6 1>;
+		};
+		wireless_green {
+			label = "HOMEHUB2A:green:wireless";
+			gpios = <&hc595 7 1>;
+		};
+		wireless_blue {
+			label = "HOMEHUB2A:blue:wireless";
+			gpios = <&hc595 8 1>;
+		};
+		phone_red {
+			label = "HOMEHUB2A:red:phone";
+			gpios = <&hc595 9 1>;
+		};
+		phone_green {
+			label = "HOMEHUB2A:green:phone";
+			gpios = <&hc595 10 1>;
+		};
+		phone_blue {
+			label = "HOMEHUB2A:blue:phone";
+			gpios = <&hc595 11 1>;
+		};
+		upgrading_red {
+			label = "HOMEHUB2A:red:upgrading";
+			gpios = <&hc595 12 1>;
+		};
+		upgrading_green {
+			label = "HOMEHUB2A:green:upgrading";
+			gpios = <&hc595 13 1>;
+		};
+		upgrading_blue {
+			label = "HOMEHUB2A:blue:upgrading";
+			gpios = <&hc595 14 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x020000>;
+	};
+
+	linux@20000 {
+		label = "linux";
+		reg = <0x020000 0xfc0000>;
+	};
+
+	nvram@fe0000 {
+		label = "nvram";
+		reg = <0xfe0000 0x020000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/livebox-blue-5g.dts b/target/linux/brcm63xx/dts/livebox-blue-5g.dts
new file mode 100644
index 0000000..bc3d403
--- /dev/null
+++ b/target/linux/brcm63xx/dts/livebox-blue-5g.dts
@@ -0,0 +1,68 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Inventel Livebox 1";
+	compatible = "inventel,livebox-blue-5g", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		button1 {
+			label = "BTN_1";
+			gpios = <&gpio1 4 1>;
+			linux,code = <BTN_1>;
+		};
+
+		button2 {
+			label = "BTN_2";
+			gpios = <&gpio0 7 1>;
+			linux,code = <BTN_2>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		red_adsl_fail {
+			label = "Livebox-blue-5g:red:adsl-fail";
+			gpios = <&gpio0 0 0>;
+			default-state = "on";
+		};
+
+		red_adsl {
+			label = "Livebox-blue-5g:red:adsl-fail";
+			gpios = <&gpio0 1 0>;
+		};
+
+		red_traffic {
+			label = "Livebox-blue-5g:red:adsl-fail";
+			gpios = <&gpio0 2 0>;
+		};
+
+		red_phone {
+			label = "Livebox-blue-5g:red:adsl-fail";
+			gpios = <&gpio0 3 0>;
+		};
+
+		red_wifi {
+			label = "Livebox-blue-5g:red:adsl-fail";
+			gpios = <&gpio0 4 0>;
+		};
+	};
+};
+
+&pflash {
+	reg = <0x1e400000 0x800000>;
+	status = "ok";
+
+	linux,part-probe = "redboot";
+};
diff --git a/target/linux/brcm63xx/dts/magic.dts b/target/linux/brcm63xx/dts/magic.dts
new file mode 100644
index 0000000..b923ee8
--- /dev/null
+++ b/target/linux/brcm63xx/dts/magic.dts
@@ -0,0 +1,72 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Alice W-Gate";
+	compatible = "telsey,magic", "brcm,bcm6348";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power {
+			label = "MAGIC:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+
+		stop {
+			label = "MAGIC:green:stop";
+			gpios = <&gpio0 1 1>;
+		};
+
+		hpna {
+			label = "MAGIC:green:hpna";
+			gpios = <&gpio0 4 1>;
+		};
+
+		status {
+			label = "MAGIC:green:adsl";
+			gpios = <&gpio0 5 1>;
+		};
+
+		voip {
+			label = "MAGIC:green:voip";
+			gpios = <&gpio0 22 1>;
+		};
+
+		wifi {
+			label = "MAGIC:green:wifi";
+			gpios = <&gpio0 28 0>;
+		};
+
+		usb {
+			label = "MAGIC:green:usb";
+			gpios = <&gpio1 3 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/nb4-fxc-r1.dts b/target/linux/brcm63xx/dts/nb4-fxc-r1.dts
new file mode 100644
index 0000000..65f26c7
--- /dev/null
+++ b/target/linux/brcm63xx/dts/nb4-fxc-r1.dts
@@ -0,0 +1,100 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "SFR Neuf Box 4 (Foxconn)";
+	compatible = "sfr,nb4-fxc-r1", "brcm,bcm6358";
+
+	spi-gpio {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-gpio";
+
+		gpio-mosi = <&gpio0 7 0>;
+		gpio-sck = <&gpio0 6 0>;
+		num-chipselects = <0>;
+
+		hc595: gpio-spi-controller@0 {
+			compatible = "fairchild,74hc595";
+			reg = <0>;
+			registers-number = <1>;
+			spi-max-frequency = <100000>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		service {
+			label = "service";
+			gpios = <&gpio0 27 1>;
+			linux,code = <BTN_0>;
+		};
+		clip {
+			label = "clip";
+			gpios = <&gpio0 31 1>;
+			linux,code = <BTN_1>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio1 5 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		traffic_white {
+			label = "NB4-FXC-r1:white:traffic";
+			gpios = <&gpio0 2 0>;
+		};
+		service_blue {
+			label = "NB4-FXC-r1:blue:service";
+			gpios = <&gpio0 4 0>;
+		};
+		wifi_white {
+			label = "NB4-FXC-r1:white:wifi";
+			gpios = <&gpio0 15 0>;
+		};
+		service_red {
+			label = "NB4-FXC-r1:red:service";
+			gpios = <&gpio0 29 0>;
+		};
+		service_green {
+			label = "NB4-FXC-r1:green:service";
+			gpios = <&gpio0 30 0>;
+		};
+		alarm_white {
+			label = "NB4-FXC-r1:white:alarm";
+			gpios = <&hc595 0 1>;
+		};
+		tv_white {
+			label = "NB4-FXC-r1:white:tv";
+			gpios = <&hc595 2 1>;
+		};
+		tel_white {
+			label = "NB4-FXC-r1:white:tel";
+			gpios = <&hc595 3 1>;
+		};
+		adsl_white {
+			label = "NB4-FXC-r0:white:adsl";
+			gpios = <&hc595 4 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/nb4-ser-r0.dts b/target/linux/brcm63xx/dts/nb4-ser-r0.dts
new file mode 100644
index 0000000..1a48b72
--- /dev/null
+++ b/target/linux/brcm63xx/dts/nb4-ser-r0.dts
@@ -0,0 +1,100 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "SFR Neuf Box 4 (Sercomm)";
+	compatible = "sfr,nb4-ser-r0", "brcm,bcm6358";
+
+	spi-gpio {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-gpio";
+
+		gpio-mosi = <&gpio0 7 0>;
+		gpio-sck = <&gpio0 6 0>;
+		num-chipselects = <0>;
+
+		hc595: gpio-spi-controller@0 {
+			compatible = "fairchild,74hc595";
+			reg = <0>;
+			registers-number = <1>;
+			spi-max-frequency = <100000>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		service {
+			label = "service";
+			gpios = <&gpio0 27 1>;
+			linux,code = <BTN_0>;
+		};
+		clip {
+			label = "clip";
+			gpios = <&gpio0 31 1>;
+			linux,code = <BTN_1>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio1 5 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		traffic_white {
+			label = "NB4-SER-r0:white:traffic";
+			gpios = <&gpio0 2 1>;
+		};
+		service_blue {
+			label = "NB4-SER-r0:blue:service";
+			gpios = <&gpio0 4 1>;
+		};
+		wifi_white {
+			label = "NB4-SER-r0:white:wifi";
+			gpios = <&gpio0 15 1>;
+		};
+		service_red {
+			label = "NB4-SER-r0:red:service";
+			gpios = <&gpio0 29 1>;
+		};
+		service_green {
+			label = "NB4-SER-r0:green:service";
+			gpios = <&gpio0 30 1>;
+		};
+		alarm_white {
+			label = "NB4-SER-r0:white:alarm";
+			gpios = <&hc595 0 1>;
+		};
+		tv_white {
+			label = "NB4-SER-r0:white:tv";
+			gpios = <&hc595 2 1>;
+		};
+		tel_white {
+			label = "NB4-SER-r0:white:tel";
+			gpios = <&hc595 3 1>;
+		};
+		adsl_white {
+			label = "NB4-SER-r0:white:adsl";
+			gpios = <&hc595 4 1>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/nb6-ser-r0.dts b/target/linux/brcm63xx/dts/nb6-ser-r0.dts
new file mode 100644
index 0000000..c23ff90
--- /dev/null
+++ b/target/linux/brcm63xx/dts/nb6-ser-r0.dts
@@ -0,0 +1,39 @@
+/dts-v1/;
+
+#include "bcm6362.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "SFR neufbox 6 (Sercomm)";
+	compatible = "sfr,nb6-ser-r0", "brcm,bcm6362";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		service {
+			label = "service";
+			gpios = <&gpio0 10 1>;
+			linux,code = <BTN_0>;
+		};
+		wlan {
+			label = "wlan";
+			gpios = <&gpio0 12 1>;
+			linux,code = <KEY_WLAN>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio0 24 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio0 25 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
diff --git a/target/linux/brcm63xx/dts/p870hw-51a-v2.dts b/target/linux/brcm63xx/dts/p870hw-51a-v2.dts
new file mode 100644
index 0000000..606b896
--- /dev/null
+++ b/target/linux/brcm63xx/dts/p870hw-51a-v2.dts
@@ -0,0 +1,77 @@
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Zyxel P870HW-51a v2";
+	compatible = "zyxel,p870hw-51a-v2", "brcm,bcm6368";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio1 3 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "P870HW-51a:green:power";
+			gpios = <&gpio0 0 0>;
+			default-state = "on";
+		};
+		dsl_green {
+			label = "P870HW-51a:green:dsl";
+			gpios = <&gpio0 2 1>;
+		};
+		inet_green {
+			label = "P870HW-51a:green:inet";
+			gpios = <&gpio0 22 1>;
+		};
+		wps_orange {
+			label = "P870HW-51a:orange:wps";
+			gpios = <&gpio0 24 1>;
+		};
+		inet_red {
+			label = "P870HW-51a:red:inet";
+			gpios = <&gpio1 1 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/rg100a.dts b/target/linux/brcm63xx/dts/rg100a.dts
new file mode 100644
index 0000000..503ae57
--- /dev/null
+++ b/target/linux/brcm63xx/dts/rg100a.dts
@@ -0,0 +1,54 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Alcatel RG100A";
+	compatible = "alcatel,rg100a", "brcm,bcm6358";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		stop_green {
+			label = "96358VW2:green:stop";
+			gpios = <&gpio0 4 1>;
+		};
+		power_green {
+			label = "96358VW2:green:power";
+			gpios = <&gpio0 5 1>;
+			default-state = "on";
+		};
+		adsl_green {
+			label = "96358VW2:green:adsl";
+			gpios = <&gpio0 22 1>;
+		};
+		ppp_fail_green {
+			label = "96358VW2:green:ppp-fail";
+			gpios = <&gpio0 23 0>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x020000>;
+		read-only;
+	};
+
+	linux@20000 {
+		label = "linux";
+		reg = <0x020000 0xfc0000>;
+	};
+
+	nvram@fe0000 {
+		label = "nvram";
+		reg = <0xfe0000 0x020000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/rta1025w.dts b/target/linux/brcm63xx/dts/rta1025w.dts
new file mode 100644
index 0000000..5d0dce0
--- /dev/null
+++ b/target/linux/brcm63xx/dts/rta1025w.dts
@@ -0,0 +1,32 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Dynalink RTA1025W";
+	compatible = "dynalink,rta1025w", "brcm,bcm6348";
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/rta1320.dts b/target/linux/brcm63xx/dts/rta1320.dts
new file mode 100644
index 0000000..c8c2827
--- /dev/null
+++ b/target/linux/brcm63xx/dts/rta1320.dts
@@ -0,0 +1,54 @@
+/dts-v1/;
+
+#include "bcm6338.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Dynalink RTA1320";
+	compatible = "dynalink,rta1320", "brcm,bcm6338";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		green_power {
+			label = "RTA1320_16M:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		green_stop {
+			label = "RTA1320_16M:green:stop";
+			gpios = <&gpio0 1 1>;
+		};
+		green_adsl {
+			label = "RTA1320_16M:green:adsl";
+			gpios = <&gpio0 3 1>;
+		};
+		green_ppp {
+			label = "RTA1320_16M:green:ppp";
+			gpios = <&gpio0 4 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/rta770bw.dts b/target/linux/brcm63xx/dts/rta770bw.dts
new file mode 100644
index 0000000..d24334e
--- /dev/null
+++ b/target/linux/brcm63xx/dts/rta770bw.dts
@@ -0,0 +1,70 @@
+/dts-v1/;
+
+#include "bcm6345.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Siemens Gigaset SE515";
+	compatible = "dynalink,rta770bw", "brcm,bcm6345";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 13 1>;
+			linux,code = <KEY_RESTART>;
+		};
+        };
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		usb {
+			label = "RTA770BW:green:usb";
+			gpios = <&gpio0 7 1>;
+		};
+
+		adsl {
+			label = "RTA770BW:green:adsl";
+			gpios = <&gpio0 8 0>;
+		};
+
+		diag {
+			label = "RTA770BW:green:diag";
+			gpios = <&gpio0 10 1>;
+		};
+
+		wlan {
+			label = "RTA770BW:green:wlan";
+			gpios = <&gpio0 11 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/rta770w.dts b/target/linux/brcm63xx/dts/rta770w.dts
new file mode 100644
index 0000000..2c2d6fb
--- /dev/null
+++ b/target/linux/brcm63xx/dts/rta770w.dts
@@ -0,0 +1,70 @@
+/dts-v1/;
+
+#include "bcm6345.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Dynalink RTA770W";
+	compatible = "dynalink,rta770w", "brcm,bcm6345";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 13 1>;
+			linux,code = <KEY_RESTART>;
+		};
+        };
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		usb {
+			label = "RTA770W:green:usb";
+			gpios = <&gpio0 7 1>;
+		};
+
+		adsl {
+			label = "RTA770W:green:adsl";
+			gpios = <&gpio0 8 0>;
+		};
+
+		diag {
+			label = "RTA770W:green:diag";
+			gpios = <&gpio0 10 1>;
+		};
+
+		wlan {
+			label = "RTA770W:green:wlan";
+			gpios = <&gpio0 11 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/spw303v.dts b/target/linux/brcm63xx/dts/spw303v.dts
new file mode 100644
index 0000000..2dcf752
--- /dev/null
+++ b/target/linux/brcm63xx/dts/spw303v.dts
@@ -0,0 +1,81 @@
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "T-Com Speedport W303 V";
+	compatible = "t-com,spw303v", "brcm,bcm6358";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 11 0>;
+			linux,code = <KEY_RESTART>;
+		};
+		ses {
+			label = "ses";
+			gpios = <&gpio1 5 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		ses_green {
+			label = "spw303v:green:ses";
+			gpios = <&gpio0 0 1>;
+		};
+		power_adsl_red {
+			label = "spw303v:red:power+adsl";
+			gpios = <&gpio0 2 1>;
+		};
+		ppp_green {
+			label = "spw303v:green:ppp";
+			gpios = <&gpio0 5 1>;
+		};
+		power_adsl_green {
+			label = "spw303v:green:power+adsl";
+			gpios = <&gpio0 22 1>;
+			default-state = "on";
+		};
+		voip_green {
+			label = "spw303v:green:voip";
+			gpios = <&gpio0 27 1>;
+		};
+		pots_green {
+			label = "spw303v:green:pots";
+			gpios = <&gpio0 31 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x7e0000>;
+	};
+
+	nvram@7f0000 {
+		label = "nvram";
+		reg = <0x7f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/spw500v.dts b/target/linux/brcm63xx/dts/spw500v.dts
new file mode 100644
index 0000000..2fcf958
--- /dev/null
+++ b/target/linux/brcm63xx/dts/spw500v.dts
@@ -0,0 +1,72 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "T-Com Speedport W500 V";
+	compatible = "t-com,spw500v", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 1 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "SPW500V:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		power_red {
+			label = "SPW500V:red:power";
+			gpios = <&gpio0 1 1>;
+		};
+		ppp_green {
+			label = "SPW500V:green:ppp";
+			gpios = <&gpio0 3 1>;
+		};
+		pstn_green {
+			label = "SPW500V:green:pstn";
+			gpios = <&gpio0 28 1>;
+		};
+		voip_green {
+			label = "SPW500V:green:voip";
+			gpios = <&gpio1 0 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/td-w8900gb.dts b/target/linux/brcm63xx/dts/td-w8900gb.dts
new file mode 100644
index 0000000..a1480f6
--- /dev/null
+++ b/target/linux/brcm63xx/dts/td-w8900gb.dts
@@ -0,0 +1,72 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "TP-Link TD-W8900GB";
+	compatible = "tp-link,td-w8900gb", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 1 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "96348GW-11:green:power";
+			gpios = <&gpio0 0 1>;
+			default-state = "on";
+		};
+		stop_green {
+			label = "96348GW-11:green:stop";
+			gpios = <&gpio0 1 1>;
+		};
+		adsl_fail_green {
+			label = "96348GW-11:green:adsl-fail";
+			gpios = <&gpio0 2 1>;
+		};
+		ppp_green {
+			label = "96348GW-11:green:ppp";
+			gpios = <&gpio0 3 1>;
+		};
+		ppp_fail_green {
+			label = "96348GW-11:green:ppp-fail";
+			gpios = <&gpio0 4 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x020000>;
+		read-only;
+	};
+
+	linux@20000 {
+		label = "linux";
+		reg = <0x020000 0x3d0000>;
+	};
+
+	nvram@3e0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/usr9108.dts b/target/linux/brcm63xx/dts/usr9108.dts
new file mode 100644
index 0000000..64a5ab3
--- /dev/null
+++ b/target/linux/brcm63xx/dts/usr9108.dts
@@ -0,0 +1,45 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "USRobotics 9108";
+	compatible = "usr,9108", "brcm,bcm6348";
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		usb {
+			label = "96348GW-A::usb";
+			gpios = <&gpio0 0 1>;
+		};
+		dsl {
+			label = "96348GW-A::adsl";
+			gpios = <&gpio0 3 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/v2110.dts b/target/linux/brcm63xx/dts/v2110.dts
new file mode 100644
index 0000000..2605339
--- /dev/null
+++ b/target/linux/brcm63xx/dts/v2110.dts
@@ -0,0 +1,71 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "BT Voyager 2110";
+	compatible = "bt,v2110", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 1 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "V2110:green:power";
+			gpios = <&gpio0 0 1>;
+		};
+		power_red {
+			label = "V2110:red:power";
+			gpios = <&gpio0 1 1>;
+		};
+		adsl_green {
+			label = "V2110:green:adsl";
+			gpios = <&gpio0 2 1>;
+		};
+		ppp_green {
+			label = "V2110:green:ppp";
+			gpios = <&gpio0 3 1>;
+		};
+		wireless_green {
+			label = "V2110:green:wireless";
+			gpios = <&gpio0 6 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/v2500v-bb.dts b/target/linux/brcm63xx/dts/v2500v-bb.dts
new file mode 100644
index 0000000..5a9223f
--- /dev/null
+++ b/target/linux/brcm63xx/dts/v2500v-bb.dts
@@ -0,0 +1,71 @@
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "BT Voyager V2500V";
+	compatible = "bt,v2500v-bb", "brcm,bcm6348";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 31 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power_green {
+			label = "V2500V_BB:green:power";
+			gpios = <&gpio0 0 1>;
+		};
+		power_red {
+			label = "V2500V_BB:red:power";
+			gpios = <&gpio0 1 1>;
+		};
+		adsl_green {
+			label = "V2500V_BB:green:adsl";
+			gpios = <&gpio0 2 1>;
+		};
+		ppp_green {
+			label = "V2500V_BB:green:ppp";
+			gpios = <&gpio0 3 1>;
+		};
+		wireless_green {
+			label = "V2500V_BB:green:wireless";
+			gpios = <&gpio0 6 1>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x3e0000>;
+	};
+
+	nvram@3f0000 {
+		label = "nvram";
+		reg = <0x3f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/vg50.dts b/target/linux/brcm63xx/dts/vg50.dts
new file mode 100644
index 0000000..f95fa95
--- /dev/null
+++ b/target/linux/brcm63xx/dts/vg50.dts
@@ -0,0 +1,30 @@
+/dts-v1/;
+
+#include "bcm63268.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Inteno VG50";
+	compatible = "inteno,vg50", "brcm,bcm63268";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 0 0>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio1 2 0>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+        };
+};
diff --git a/target/linux/brcm63xx/dts/vr-3025u.dts b/target/linux/brcm63xx/dts/vr-3025u.dts
new file mode 100644
index 0000000..b24b590
--- /dev/null
+++ b/target/linux/brcm63xx/dts/vr-3025u.dts
@@ -0,0 +1,88 @@
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Comtrend VR-3025u";
+	compatible = "comtrend,vr-3025u", "brcm,bcm6368";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		dsl_green {
+			label = "VR-3025u:green:dsl";
+			gpios = <&gpio0 2 1>;
+		};
+		inet_green {
+			label = "VR-3025u:green:inet";
+			gpios = <&gpio0 5 0>;
+		};
+		lan1_green {
+			label = "VR-3025u:green:lan1";
+			gpios = <&gpio0 6 1>;
+		};
+		lan2_green {
+			label = "VR-3025u:green:lan2";
+			gpios = <&gpio0 7 1>;
+		};
+		lan3_green {
+			label = "VR-3025u:green:lan3";
+			gpios = <&gpio0 8 1>;
+		};
+		lan4_green {
+			label = "VR-3025u:green:lan4";
+			gpios = <&gpio0 9 1>;
+		};
+		power_green {
+			label = "VR-3025u:green:power";
+			gpios = <&gpio0 22 0>;
+			default-state = "on";
+		};
+		power_red {
+			label = "VR-3025u:red:power";
+			gpios = <&gpio0 24 0>;
+		};
+		inet_red {
+			label = "VR-3025u:red:inet";
+			gpios = <&gpio0 31 0>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x0000000 0x0020000>;
+		read-only;
+	};
+
+	linux@20000 {
+		label = "linux";
+		reg = <0x0020000 0x1fc0000>;
+	};
+
+	nvram@1fe0000 {
+		label = "nvram";
+		reg = <0x1fe0000 0x020000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/vr-3025un.dts b/target/linux/brcm63xx/dts/vr-3025un.dts
new file mode 100644
index 0000000..124045f
--- /dev/null
+++ b/target/linux/brcm63xx/dts/vr-3025un.dts
@@ -0,0 +1,88 @@
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Comtrend VR-3025un";
+	compatible = "comtrend,vr-3025un", "brcm,bcm6368";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		dsl_green {
+			label = "VR-3025un:green:dsl";
+			gpios = <&gpio0 2 1>;
+		};
+		inet_green {
+			label = "VR-3025un:green:inet";
+			gpios = <&gpio0 5 0>;
+		};
+		lan1_green {
+			label = "VR-3025un:green:lan1";
+			gpios = <&gpio0 6 1>;
+		};
+		lan2_green {
+			label = "VR-3025un:green:lan2";
+			gpios = <&gpio0 7 1>;
+		};
+		lan3_green {
+			label = "VR-3025un:green:lan3";
+			gpios = <&gpio0 8 1>;
+		};
+		iptv_green {
+			label = "VR-3025un:green:iptv";
+			gpios = <&gpio0 9 1>;
+		};
+		power_green {
+			label = "VR-3025un:green:power";
+			gpios = <&gpio0 22 0>;
+			default-state = "on";
+		};
+		power_red {
+			label = "VR-3025un:red:power";
+			gpios = <&gpio0 24 0>;
+		};
+		inet_red {
+			label = "VR-3025un:red:inet";
+			gpios = <&gpio0 31 0>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x7e0000>;
+	};
+
+	nvram@7f0000 {
+		label = "nvram";
+		reg = <0x7f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/vr-3026e.dts b/target/linux/brcm63xx/dts/vr-3026e.dts
new file mode 100644
index 0000000..49790e2
--- /dev/null
+++ b/target/linux/brcm63xx/dts/vr-3026e.dts
@@ -0,0 +1,88 @@
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Comtrend VR-3026e";
+	compatible = "comtrend,vr-3026e", "brcm,bcm6368";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		dsl_green {
+			label = "VR-3026e:green:dsl";
+			gpios = <&gpio0 2 1>;
+		};
+		inet_green {
+			label = "VR-3026e:green:inet";
+			gpios = <&gpio0 5 0>;
+		};
+		lan1_green {
+			label = "VR-3026e:green:lan1";
+			gpios = <&gpio0 6 1>;
+		};
+		lan2_green {
+			label = "VR-3026e:green:lan2";
+			gpios = <&gpio0 7 1>;
+		};
+		lan3_green {
+			label = "VR-3026e:green:lan3";
+			gpios = <&gpio0 8 1>;
+		};
+		lan4_green {
+			label = "VR-3026e:green:lan4";
+			gpios = <&gpio0 9 1>;
+		};
+		power_green {
+			label = "VR-3026e:green:power";
+			gpios = <&gpio0 22 0>;
+			default-state = "on";
+		};
+		power_red {
+			label = "VR-3026e:red:power";
+			gpios = <&gpio0 24 0>;
+		};
+		inet_red {
+			label = "VR-3026e:red:inet";
+			gpios = <&gpio0 31 0>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x7e0000>;
+	};
+
+	nvram@7f0000 {
+		label = "nvram";
+		reg = <0x7f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/dts/wap-5813n.dts b/target/linux/brcm63xx/dts/wap-5813n.dts
new file mode 100644
index 0000000..1c31c57
--- /dev/null
+++ b/target/linux/brcm63xx/dts/wap-5813n.dts
@@ -0,0 +1,82 @@
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Comtrend WAP-5813n";
+	compatible = "comtrend,wap-5813n", "brcm,bcm6368";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+		debounce-interval = <60>;
+
+		wlan {
+			label = "wlan";
+			gpios = <&gpio1 0 1>;
+			linux,code = <KEY_WLAN>;
+		};
+		reset {
+			label = "reset";
+			gpios = <&gpio1 2 1>;
+			linux,code = <KEY_RESTART>;
+		};
+		wps {
+			label = "wps";
+			gpios = <&gpio1 3 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		inet_green {
+			label = "WAP-5813n:green:inet";
+			gpios = <&gpio0 5 0>;
+		};
+		power_green {
+			label = "WAP-5813n:green:power";
+			gpios = <&gpio0 22 0>;
+			default-state = "on";
+		};
+		wps_green {
+			label = "WAP-5813n:green:wps";
+			gpios = <&gpio0 23 1>;
+		};
+		power_red {
+			label = "WAP-5813n:red:power";
+			gpios = <&gpio0 24 0>;
+		};
+		inet_red {
+			label = "WAP-5813n:red:inet";
+			gpios = <&gpio0 31 0>;
+		};
+	};
+};
+
+&pflash {
+	status = "ok";
+
+	linux,part-probe = "bcm63xxpart";
+
+	cfe@0 {
+		label = "CFE";
+		reg = <0x000000 0x010000>;
+		read-only;
+	};
+
+	linux@10000 {
+		label = "linux";
+		reg = <0x010000 0x7e0000>;
+	};
+
+	nvram@7f0000 {
+		label = "nvram";
+		reg = <0x7f0000 0x010000>;
+	};
+};
diff --git a/target/linux/brcm63xx/generic/target.mk b/target/linux/brcm63xx/generic/target.mk
new file mode 100644
index 0000000..d43a37c
--- /dev/null
+++ b/target/linux/brcm63xx/generic/target.mk
@@ -0,0 +1,7 @@
+BOARDNAME:=generic
+
+define Target/Description
+	Build firmware images for BCM63XX boards without SMP support.
+endef
+
+
diff --git a/target/linux/brcm63xx/image/Makefile b/target/linux/brcm63xx/image/Makefile
new file mode 100755
index 0000000..9d3ec9f
--- /dev/null
+++ b/target/linux/brcm63xx/image/Makefile
@@ -0,0 +1,636 @@
+#
+# Copyright (C) 2006-2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/image.mk
+
+LOADADDR = 0x80010000		# RAM start + 64K
+KERNEL_ENTRY = $(LOADADDR)	# Newer kernels add a jmp to the kernel_entry at the start of the binary
+LOADER_ENTRY = 0x80a00000	# RAM start + 10M, for relocate
+RAMSIZE = 0x02000000		# 32MB
+LZMA_TEXT_START = 0x81800000	# 32MB - 8MB
+
+LOADER_MAKEOPTS= \
+		KDIR=$(KDIR) \
+		LOADADDR=$(LOADADDR) \
+		KERNEL_ENTRY=$(KERNEL_ENTRY) \
+		RAMSIZE=$(RAMSIZE) \
+		LZMA_TEXT_START=$(LZMA_TEXT_START) \
+
+RELOCATE_MAKEOPTS= \
+		CACHELINE_SIZE=16 \
+		KERNEL_ADDR=$(KERNEL_ENTRY) \
+		CROSS_COMPILE=$(TARGET_CROSS) \
+		LZMA_TEXT_START=$(LOADER_ENTRY)
+
+define Build/Compile
+	rm -rf $(KDIR)/relocate
+	$(CP) ../../generic/image/relocate $(KDIR)
+	$(MAKE) -C $(KDIR)/relocate $(RELOCATE_MAKEOPTS)
+endef
+
+### Kernel scripts ###
+define Build/append-dtb
+	$(call Image/BuildDTB,../dts/$(DEVICE_DTS).dts,$@.dtb)
+	cat $@.dtb >> $@
+endef
+
+define Build/hcs-initramfs
+	$(STAGING_DIR_HOST)/bin/hcsmakeimage --magic_bytes=$(HCS_MAGIC_BYTES) \
+		--rev_maj=$(HCS_REV_MAJ) --rev_min=$(HCS_REV_MIN) --input_file=$@ \
+		--output_file=$@.hcs --ldaddress=$(LOADADDR)
+	mv $@.hcs $@
+endef
+
+define Build/loader-lzma
+	rm -rf $@.src
+	$(MAKE) -C lzma-loader \
+		$(LOADER_MAKEOPTS) \
+		PKG_BUILD_DIR="$@.src" \
+		TARGET_DIR="$(dir $@)" \
+		LOADER_DATA="$@" \
+		LOADER_NAME="$(notdir $@)" \
+		compile loader.$(1)
+	mv "$@.$(1)" "$@"
+	rm -rf $@.src
+endef
+
+define Build/lzma
+	# CFE is a LZMA nazi! It took me hours to find out the parameters!
+	# Also I think lzma has a bug cause it generates different output depending on
+	# if you use stdin / stdout or not. Use files instead of stdio here, cause
+	# otherwise CFE will complain and not boot the image.
+	$(STAGING_DIR_HOST)/bin/lzma e $@ -d22 -fb64 -a1 $@.lzma
+	mv $@.lzma $@
+endef
+
+define Build/lzma-cfe
+	# Strip out the length, CFE doesn't like this
+	dd if=$@ of=$@.lzma.cfe bs=5 count=1
+	dd if=$@ of=$@.lzma.cfe ibs=13 obs=5 skip=1 seek=1 conv=notrunc
+	mv $@.lzma.cfe $@
+endef
+
+define Build/relocate-kernel
+	# CFE only allows ~4 MiB for the uncompressed kernels, but uncompressed
+	# kernel might get larger than that, so let CFE unpack and load at a
+	# higher address and make the kernel relocate itself to the expected
+	# location.
+	( \
+		dd if=$(KDIR)/relocate/loader.bin bs=32 conv=sync && \
+		perl -e '@s = stat("$@"); print pack("N", @s[7])' && \
+		cat $@ \
+	) > $@.relocate
+	mv $@.relocate $@
+endef
+
+### Image scripts ###
+define rootfspad/jffs2-128k
+--align-rootfs
+endef
+define rootfspad/jffs2-64k
+--align-rootfs
+endef
+define rootfspad/squashfs
+endef
+
+define Image/LimitName16
+$(shell expr substr "$(1)" 1 16)
+endef
+
+define Image/FileSystemStrip
+$(subst root.,,$(notdir $(1)))
+endef
+
+define Build/cfe-bin
+	$(STAGING_DIR_HOST)/bin/imagetag -i $(word 1,$^) -f $(word 2,$^) \
+		--output $@ --boardid $(CFE_BOARD_ID) --chipid $(CFE_CHIP_ID) \
+		--entry $(LOADER_ENTRY) --load-addr $(LOADER_ENTRY) \
+		--info1 "$(call Image/LimitName16,$(DEVICE_NAME))" \
+		--info2 "$(call Image/FileSystemStrip,$(word 2,$^))" \
+		$(call rootfspad/$(call Image/FileSystemStrip,$(word 2,$^))) \
+		$(CFE_EXTRAS) $(1)
+endef
+
+define Build/cfe-old-bin
+	$(TOPDIR)/scripts/brcmImage.pl -t -p \
+		-o $@ -b $(CFE_BOARD_ID) -c $(CFE_CHIP_ID) \
+		-e $(LOADER_ENTRY) -a $(LOADER_ENTRY) \
+		-k $(word 1,$^) -r $(word 2,$^) \
+		$(CFE_EXTRAS)
+endef
+
+define Build/cfe-spw303v-bin
+	$(STAGING_DIR_HOST)/bin/imagetag -i $(word 1,$^) -f $(word 2,$^) \
+		--output $@ --boardid $(CFE_BOARD_ID) --chipid $(CFE_CHIP_ID) \
+		--entry $(LOADER_ENTRY) --load-addr $(LOADER_ENTRY) \
+		$(call rootfspad/$(call Image/FileSystemStrip,$(word 2,$^))) \
+		$(CFE_EXTRAS)
+endef
+
+define Build/spw303v-bin
+	$(STAGING_DIR_HOST)/bin/spw303v -i $@ -o $@.spw303v
+	mv $@.spw303v $@
+endef
+
+define Build/xor-image
+	$(STAGING_DIR_HOST)/bin/xorimage -i $@ -o $@.xor
+	mv $@.xor $@
+endef
+
+define Build/zyxel-bin
+	$(STAGING_DIR_HOST)/bin/zyxbcm -i $@ -o $@.zyxel
+	mv $@.zyxel $@
+endef
+
+define Build/redboot-bin
+	# Prepare kernel and rootfs
+	dd if=$(word 1,$^) of=$(BIN_DIR)/$(REDBOOT_PREFIX)-vmlinux.gz bs=65536 conv=sync
+	dd if=$(word 2,$^) of=$(BIN_DIR)/$(REDBOOT_PREFIX)-$(notdir $(word 2,$^)) bs=64k conv=sync
+	echo -ne \\xDE\\xAD\\xC0\\xDE >> $(BIN_DIR)/$(REDBOOT_PREFIX)-$(notdir $(word 2,$^))
+	# Generate the scripted image
+	$(TOPDIR)/scripts/redboot-script.pl \
+		-k $(BIN_DIR)/$(REDBOOT_PREFIX)-vmlinux.gz \
+		-r $(BIN_DIR)/$(REDBOOT_PREFIX)-$(notdir $(word 2,$^)) \
+		-a $(strip $(LOADADDR)) -f 0xbe430000 -l 0x7c0000 \
+		-s 0x1000 -t 20 -o $@.redbootscript
+	dd if="$@.redbootscript" of="$@.redbootscript.padded" bs=4096 conv=sync
+	cat \
+		"$@.redbootscript.padded" \
+		"$(BIN_DIR)/$(REDBOOT_PREFIX)-vmlinux.gz" \
+		"$(BIN_DIR)/$(REDBOOT_PREFIX)-$(notdir $(word 2,$^))" \
+		> "$@"
+endef
+
+# Shared device definition: applies to every defined device
+define Device/Default
+  PROFILES = Default $$(DEVICE_PROFILE)
+  KERNEL_INITRAMFS_IMAGE = $$(KERNEL_INITRAMFS_PREFIX).elf
+  DEVICE_PROFILE :=
+  DEVICE_DTS :=
+endef
+DEVICE_VARS += DEVICE_PROFILE DEVICE_DTS
+
+# BCM33xx HCS devices: only generates ramdisks (unsupported bin images)
+define Device/bcm33xxHcsRamdisk
+  KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | loader-lzma bin | hcs-initramfs
+  IMAGES :=
+  HCS_MAGIC_BYTES :=
+  HCS_REV_MIN :=
+  HCS_REV_MAJ :=
+endef
+DEVICE_VARS += HCS_MAGIC_BYTES HCS_REV_MIN HCS_REV_MAJ
+
+# Shared BCM63xx CFE device definitios
+define Device/bcm63xxCfeCommon
+  FILESYSTEMS := squashfs jffs2-64k jffs2-128k
+  KERNEL := kernel-bin | append-dtb | relocate-kernel | lzma | lzma-cfe
+  KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | loader-lzma elf
+endef
+
+# BCM63xx CFE devices: only generates ramdisks (unsupported bin images)
+define Device/bcm63xxCfeRamdisk
+  $(Device/bcm63xxCfeCommon)
+  IMAGES :=
+endef
+
+# BCM63xx CFE devices: both ramdisks and parallel/spi bin images
+# New versions of CFE bootloader compatible with imagetag
+define Device/bcm63xxCfe
+  $(Device/bcm63xxCfeCommon)
+  IMAGES := cfe.bin
+  IMAGE/cfe.bin := cfe-bin
+  CFE_BOARD_ID :=
+  CFE_CHIP_ID :=
+  CFE_EXTRAS :=
+endef
+DEVICE_VARS += CFE_BOARD_ID CFE_CHIP_ID CFE_EXTRAS
+
+# BCM63xx CFE BC221 devices: both ramdisks and parallel/spi bin images
+# Generates a generic image and a layout version 5 image
+define Device/bcm63xxCfeBc221
+  $(Device/bcm63xxCfeCommon)
+  IMAGES := cfe.bin cfe-bc221.bin
+  IMAGE/cfe.bin := cfe-bin
+  IMAGE/cfe-bc221.bin := cfe-bin --layoutver 5
+  CFE_BOARD_ID :=
+  CFE_CHIP_ID :=
+  CFE_EXTRAS :=
+endef
+
+# BCM63xx CFE MultiFlash devices: both ramdisks and parallel/spi bin images
+# Generates generic images padded for 4M/8M/16M flashes
+define Device/bcm63xxCfeMultiFlash
+  $(Device/bcm63xxCfeCommon)
+  IMAGES := cfe-4M.bin cfe-8M.bin cfe-16M.bin
+  IMAGE/cfe-4M.bin := cfe-bin --pad 2
+  IMAGE/cfe-8M.bin := cfe-bin --pad 4
+  IMAGE/cfe-16M.bin := cfe-bin --pad 8
+  CFE_BOARD_ID :=
+  CFE_CHIP_ID :=
+  CFE_EXTRAS :=
+endef
+
+# BCM63xx CFE NETGEAR devices: both ramdisks and parallel/spi bin images
+# factory.chk: netgear images for bootloader/original firmware upgrades
+# sysupgrade.bin: openwrt images for sysupgrades
+define Device/bcm63xxCfeNetgear
+  $(Device/bcm63xxCfeCommon)
+  IMAGES := factory.chk sysupgrade.bin
+  IMAGE/factory.chk := cfe-bin | netgear-chk
+  IMAGE/sysupgrade.bin := cfe-bin
+  CFE_BOARD_ID :=
+  CFE_CHIP_ID :=
+  CFE_EXTRAS :=
+  NETGEAR_BOARD_ID :=
+  NETGEAR_REGION :=
+endef
+DEVICE_VARS += NETGEAR_BOARD_ID NETGEAR_REGION
+
+# BCM63xx Old CFE devices: both ramdisks and parallel/spi bin images
+# Old versions of CFE bootloader not compatible with imagetag
+define Device/bcm63xxCfeOld
+  $(Device/bcm63xxCfeCommon)
+  IMAGES := cfe-old.bin
+  IMAGE/cfe-old.bin := cfe-old-bin
+  CFE_BOARD_ID :=
+  CFE_CHIP_ID :=
+  CFE_EXTRAS :=
+endef
+
+# BCM63xx CFE SPW303V devices: both ramdisks and parallel/spi bin images
+# factory.bin: SPW303V images for bootloader/original firmware upgrades
+# sysupgrade.bin: openwrt images for sysupgrades
+define Device/bcm63xxCfeSpw303v
+  $(Device/bcm63xxCfeCommon)
+  IMAGES := factory.bin sysupgrade.bin
+  IMAGE/factory.bin := cfe-spw303v-bin | spw303v-bin | xor-image
+  IMAGE/sysupgrade.bin := cfe-spw303v-bin | spw303v-bin
+  CFE_BOARD_ID :=
+  CFE_CHIP_ID :=
+  CFE_EXTRAS :=
+endef
+
+# BCM63xx CFE ZyXEL devices: both ramdisks and parallel/spi bin images
+# factory.bin: ZyXEL specific CFE images (sysupgrade compatible)
+define Device/bcm63xxCfeZyxel
+  $(Device/bcm63xxCfeCommon)
+  IMAGES := factory.bin
+  IMAGE/factory.bin := cfe-bin | zyxel-bin
+  CFE_BOARD_ID :=
+  CFE_CHIP_ID :=
+  CFE_EXTRAS :=
+endef
+
+# BCM63xx RedBoot devices: both ramdisks and parallel/spi bin images
+# Generates images compatible with RedBoot bootloader
+define Device/bcm63xxRedBoot
+  FILESYSTEMS := squashfs
+  KERNEL := kernel-bin | append-dtb | gzip
+  IMAGES := redboot.bin
+  IMAGE/redboot.bin := redboot-bin
+  REDBOOT_PREFIX := $$(IMAGE_PREFIX)
+endef
+DEVICE_VARS += REDBOOT_PREFIX
+
+### Device macros ###
+# $(1) = profile
+# $(2) = image name
+# $(3) = dts
+# $(4) = hcs magic bytes
+# $(5) = hcs rev min
+# $(6) = hcs rev major
+define bcm33xxHcsRamdisk
+  define Device/$(2)
+    $$(Device/bcm33xxHcsRamdisk)
+    DEVICE_PROFILE := $(1)
+    DEVICE_DTS := $(3)
+    HCS_MAGIC_BYTES := $(4)
+    HCS_REV_MIN := $(5)
+    HCS_REV_MAJ := $(6)
+  endef
+  TARGET_DEVICES += $(2)
+endef
+
+# $(1) = profile
+# $(2) = image name
+# $(3) = dts
+define bcm63xxCfeRamdisk
+  define Device/$(2)
+    $$(Device/bcm63xxCfeRamdisk)
+    DEVICE_PROFILE := $(1)
+    DEVICE_DTS := $(3)
+  endef
+  TARGET_DEVICES += $(2)
+endef
+
+# $(1) = profile
+# $(2) = image name
+# $(3) = dts
+# $(4) = cfe board name
+# $(5) = cfe chip id
+# $(6) = cfe additional options
+define bcm63xxCfe
+  define Device/$(2)
+    $$(Device/bcm63xxCfe)
+    DEVICE_PROFILE := $(1)
+    DEVICE_DTS := $(3)
+    CFE_BOARD_ID := $(4)
+    CFE_CHIP_ID := $(5)
+    CFE_EXTRAS := $(6)
+  endef
+  TARGET_DEVICES += $(2)
+endef
+
+# $(1) = profile
+# $(2) = image name
+# $(3) = dts
+# $(4) = cfe board name
+# $(5) = cfe chip id
+# $(6) = cfe additional options
+define bcm63xxCfeMultiFlash
+  define Device/$(2)
+    $$(Device/bcm63xxCfeMultiFlash)
+    DEVICE_PROFILE := $(1)
+    DEVICE_DTS := $(3)
+    CFE_BOARD_ID := $(4)
+    CFE_CHIP_ID := $(5)
+    CFE_EXTRAS := $(6)
+  endef
+  TARGET_DEVICES += $(2)
+endef
+
+# $(1) = profile
+# $(2) = image name
+# $(3) = dts
+# $(4) = cfe board name
+# $(5) = cfe chip id
+# $(6) = cfe additional options
+define bcm63xxCfeBc221
+  define Device/$(2)
+    $$(Device/bcm63xxCfeBc221)
+    DEVICE_PROFILE := $(1)
+    DEVICE_DTS := $(3)
+    CFE_BOARD_ID := $(4)
+    CFE_CHIP_ID := $(5)
+    CFE_EXTRAS := $(6)
+  endef
+  TARGET_DEVICES += $(2)
+endef
+
+# $(1) = profile
+# $(2) = image name
+# $(3) = dts
+# $(4) = cfe board name
+# $(5) = cfe chip id
+# $(6) = cfe additional options
+# $(7) = netgear id
+# $(8) = netgear region
+define bcm63xxCfeNetgear
+  define Device/$(2)
+    $$(Device/bcm63xxCfeNetgear)
+    DEVICE_PROFILE := $(1)
+    DEVICE_DTS := $(3)
+    CFE_BOARD_ID := $(4)
+    CFE_CHIP_ID := $(5)
+    CFE_EXTRAS := $(6)
+    NETGEAR_BOARD_ID := $(7)
+    NETGEAR_REGION := $(8)
+  endef
+  TARGET_DEVICES += $(2)
+endef
+
+# $(1) = profile
+# $(2) = image name
+# $(3) = dts
+# $(4) = cfe board name
+# $(5) = cfe chip id
+# $(6) = cfe additional options
+define bcm63xxCfeOld
+  define Device/$(2)
+    $$(Device/bcm63xxCfeOld)
+    DEVICE_PROFILE := $(1)
+    DEVICE_DTS := $(3)
+    CFE_BOARD_ID := $(4)
+    CFE_CHIP_ID := $(5)
+    CFE_EXTRAS := $(6)
+  endef
+  TARGET_DEVICES += $(2)
+endef
+
+# $(1) = profile
+# $(2) = image name
+# $(3) = dts
+# $(4) = cfe board name
+# $(5) = cfe chip id
+# $(6) = cfe additional options
+define bcm63xxCfeSpw303v
+  define Device/$(2)
+    $$(Device/bcm63xxCfeSpw303v)
+    DEVICE_PROFILE := $(1)
+    DEVICE_DTS := $(3)
+    CFE_BOARD_ID := $(4)
+    CFE_CHIP_ID := $(5)
+    CFE_EXTRAS := $(6)
+  endef
+  TARGET_DEVICES += $(2)
+endef
+
+# $(1) = profile
+# $(2) = image name
+# $(3) = dts
+# $(4) = cfe board name
+# $(5) = cfe chip id
+# $(6) = cfe additional options
+define bcm63xxCfeZyxel
+  define Device/$(2)
+    $$(Device/bcm63xxCfeZyxel)
+    DEVICE_PROFILE := $(1)
+    DEVICE_DTS := $(3)
+    CFE_BOARD_ID := $(4)
+    CFE_CHIP_ID := $(5)
+    CFE_EXTRAS := $(6)
+  endef
+  TARGET_DEVICES += $(2)
+endef
+
+# $(1) = profile
+# $(2) = image name
+# $(3) = dts
+define bcm63xxRedBoot
+  define Device/$(2)
+    $$(Device/bcm63xxRedBoot)
+    DEVICE_PROFILE := $(1)
+    DEVICE_DTS := $(3)
+  endef
+  TARGET_DEVICES += $(2)
+endef
+
+### Devices ###
+# Generic 963281TAN
+$(eval $(call bcm63xxCfeMultiFlash,963281TAN,963281TAN-generic,bcm963281TAN,963281TAN,6328))
+# Generic 96328avng
+$(eval $(call bcm63xxCfeMultiFlash,96328avng,96328avng-generic,bcm96328avng,96328avng,6328))
+# Generic 96338GW
+$(eval $(call bcm63xxCfe,96338GW,96338GW-generic,bcm96338GW,6338GW,6338))
+# Generic 96338W
+$(eval $(call bcm63xxCfe,96338W,96338W-generic,bcm96338W,6338W,6338))
+# Generic 96345GW2
+$(eval $(call bcm63xxCfeBc221,96345GW2,96345GW2-generic,bcm96345GW2,96345GW2,6345))
+# Generic 96348GW
+$(eval $(call bcm63xxCfeBc221,96348GW,96348GW-generic,bcm96348GW,96348GW,6348))
+# Generic 96348GW-10
+$(eval $(call bcm63xxCfe,96348GW_10,96348GW-10-generic,bcm96348GW-10,96348GW-10,6348))
+# Generic 96348GW-11
+$(eval $(call bcm63xxCfe,96348GW_11,96348GW-11-generic,bcm96348GW-11,96348GW-11,6348))
+# Generic 96348R
+$(eval $(call bcm63xxCfe,96348R,96348R-generic,bcm96348R,96348R,6348))
+# Generic 96358VW
+$(eval $(call bcm63xxCfe,96358VW,96358VW-generic,bcm96358VW,96358VW,6358))
+# Generic 96358VW2
+$(eval $(call bcm63xxCfe,96358VW2,96358VW2-generic,bcm96358VW2,96358VW2,6358))
+# Generic 96368MVNgr
+$(eval $(call bcm63xxCfe,96368MVNgr,96368MVNgr-generic,bcm96368MVNgr,96368MVNgr,6368))
+# Generic 96368MVWG
+$(eval $(call bcm63xxCfe,96368MVWG,96368MVWG-generic,bcm96368MVWG,96368MVWG,6368))
+
+# ADB P.DG A4001N
+$(eval $(call bcm63xxCfe,A4001N,A4001N,a4001n,96328dg2x2,6328,--pad 4))
+# ADB P.DG A4001N1
+$(eval $(call bcm63xxCfe,A4001N1,A4001N1,a4001n1,963281T_TEF,6328,--pad 8))
+# Alcatel RG100A
+$(eval $(call bcm63xxCfe,RG100A,RG100A,rg100a,96358VW2,6358,--block-size 0x20000 --image-offset 0x20000))
+# Asmax AR 1004g
+$(eval $(call bcm63xxCfe,AR1004G,AR1004G,ar1004g,96348GW-10,6348))
+# Belkin F5D7633
+$(eval $(call bcm63xxCfe,F5D7633,F5D7633,f5d7633,96348GW-10,6348,--block-size 0x20000 --image-offset 0x20000))
+# Broadcom BCM96318REF
+$(eval $(call bcm63xxCfeRamdisk,BCM96318REF,BCM96318REF,bcm96318ref,96318REF,6318))
+# Broadcom BCM96318REF_P300
+$(eval $(call bcm63xxCfeRamdisk,BCM96318REF_P300,BCM96318ref_P300,bcm96318ref_p300,96318REF_P300,6318))
+# Broadcom BCM963268BU_P300
+$(eval $(call bcm63xxCfeRamdisk,BCM963268BU_P300,BCM963268BU_P300,bcm963268bu_p300,963268BU_P300,63268))
+# Broadcom BCM963269BHR
+$(eval $(call bcm63xxCfeRamdisk,BCM963269BHR,BCM963269BHR,bcm963269bhr,963269BHR,63268))
+# BT Home Hub 2.0 A
+$(eval $(call bcm63xxCfe,BTHOMEHUB2A,HomeHub2A,homehub2a,HOMEHUB2A,6358,--image-offset 0x20000 --block-size 0x20000))
+# BT Voyager V2110, V2110_AA, V2110_ROI
+$(eval $(call bcm63xxCfe,BTV2110,BTV2110,v2110,V2110,6348,--layoutver 5))
+# BT Voyager V2500V, V2500V_SIP_CLUB, V2500V_AA
+$(eval $(call bcm63xxCfe,BTV2500V,BTV2500V,v2500v-bb,V2500V_BB,6348,--layoutver 5))
+# Comtrend AR-5381u
+$(eval $(call bcm63xxCfe,AR5381u,AR-5381u,ar-5381u,96328A-1241N,6328,--pad 8))
+# Comtrend AR-5387un
+$(eval $(call bcm63xxCfe,AR5387un,AR-5387un,ar-5387un,96328A-1441N1,6328,--pad 8))
+# Comtrend 536, 5621
+$(eval $(call bcm63xxCfe,CT536_CT5621,CT536_CT5621,ct536plus,96348GW-11,6348))
+# Comtrend CT-5365
+$(eval $(call bcm63xxCfe,CT5365,CT-5365,ct-5365,96348A-122,6348))
+# Comtrend CT-6373
+$(eval $(call bcm63xxCfe,CT6373,CT-6373,ct-6373,CT6373-1,6358))
+# Comtrend VR-3025u
+$(eval $(call bcm63xxCfe,VR3025u,VR-3025u,vr-3025u,96368M-1541N,6368,--pad 16 --image-offset 0x20000 --block-size 0x20000))
+# Comtrend VR-3025un
+$(eval $(call bcm63xxCfe,VR3025un,VR-3025un,vr-3025un,96368M-1341N,6368,--pad 4))
+# Comtrend VR-3026e
+$(eval $(call bcm63xxCfe,VR3026e,VR-3026e,vr-3026e,96368MT-1341N1,6368,--pad 4))
+# Comtrend WAP-5813n
+$(eval $(call bcm63xxCfe,WAP5813n,WAP-5813n,wap-5813n,96369R-1231N,6368,--pad 4))
+# D-Link DSL-2640B, rev B2
+$(eval $(call bcm63xxCfe,DSL2640B-B2,DSL2640B_B,dsl-2640b-b,D-4P-W,6348))
+# D-Link DSL-2640U, rev C1
+$(eval $(call bcm63xxCfe,DSL2640U,DSL2640U,dsl-2640u,96338W2_E7T,6338))
+# D-Link DSL-2650U
+$(eval $(call bcm63xxCfe,DSL2650U,DSL2650U,dsl-2650u,96358VW2,6358))
+# D-Link DSL-2740B/DSL-2741B, rev C2
+$(eval $(call bcm63xxCfe,DSL274XB_C,DSL274XB-C2,dsl-274xb-c,96358GW,6358))
+# D-Link DSL-2740B/DSL-2741B, rev C3
+$(eval $(call bcm63xxCfe,DSL274XB_C,DSL274XB-C3,dsl-274xb-c,AW4139,6358))
+# D-Link DSL-2740B/DSL-2741B, rev F1
+$(eval $(call bcm63xxCfe,DSL274XB_F,DSL274XB-F1-EU,dsl-274xb-f,AW4339U,6328,--signature2 "4.06.01.EUF1" --pad 4))
+$(eval $(call bcm63xxCfe,DSL274XB_F,DSL274XB-F1-AU,dsl-274xb-f,AW4339U,6328,--signature2 "4.06.01.AUF1" --pad 4))
+# D-Link DSL-2750B/DSL-2751, rev D1
+$(eval $(call bcm63xxCfe,DSL275XB_D,DSL275XB-D1,dsl-275xb-d,AW5200B,6318,--pad 4))
+# D-Link DVA-G3810BN/TL
+$(eval $(call bcm63xxCfe,DVAG3810BN,DVAG3810BN,dva-g3810bn_tl,96358VW,6358))
+# Davolink DV-201AMR
+$(eval $(call bcm63xxCfeOld,DV201AMR,DV-201AMR,dv-201amr,DV201AMR,6348))
+# Dynalink RTA770BW (Siemens SE515)
+$(eval $(call bcm63xxCfeRamdisk,RTA770BW,RTA770BW,rta770bw,RTA770BW,6345,--layoutver 5))
+# Dynalink RTA770W
+$(eval $(call bcm63xxCfeRamdisk,RTA770W,RTA770W,rta770w,RTA770W,6345,--layoutver 5))
+# Dynalink RTA1025W (numerous routers)
+$(eval $(call bcm63xxCfe,RTA1025W,RTA1025W_16,rta1025w,RTA1025W_16,6348,--layoutver 5))
+# Dynalink RTA1320 (numerous routers)
+$(eval $(call bcm63xxCfe,RTA1320,RTA1320_16M,rta1320,RTA1320_16M,6338,--layoutver 5))
+# Huawei HG520v
+$(eval $(call bcm63xxCfe,HG520v,HG520v,hg520v,HW6358GW_B,6358,--rsa-signature "EchoLife_HG520v"))
+# Huawei HG553
+$(eval $(call bcm63xxCfe,HG553,HG553,hg553,HW553,6358,--rsa-signature "EchoLife_HG553" --image-offset 0x20000 --block-size 0x20000 --tag-version 7))
+# Huawei HG556a
+$(eval $(call bcm63xxCfe,HG556a_AB,HG556a_A,hg556a-a,HW556,6358,--rsa-signature "EchoLife_HG556a" --image-offset 0x20000 --block-size 0x10000 --tag-version 8))
+$(eval $(call bcm63xxCfe,HG556a_AB,HG556a_B,hg556a-b,HW556,6358,--rsa-signature "EchoLife_HG556a" --image-offset 0x20000 --block-size 0x20000 --tag-version 8))
+$(eval $(call bcm63xxCfe,HG556a_C,HG556a_C,hg556a-c,HW556,6358,--rsa-signature "EchoLife_HG556a" --image-offset 0x20000 --block-size 0x20000 --tag-version 8))
+# Huawei HG655b
+$(eval $(call bcm63xxCfe,HG655b,HG655b,hg655b,HW65x,6368,--image-offset 0x20000 --tag-version 7 --pad 4))
+# Inteno VG50
+$(eval $(call bcm63xxCfeRamdisk,VG50,vg50,vg50,VW6339GU,63268))
+# Inventel Livebox 1
+$(eval $(call bcm63xxRedBoot,Livebox,livebox,livebox-blue-5g))
+# Netgear CVG834G
+$(eval $(call bcm33xxHcsRamdisk,CVG834G,cvg834g,cvg834g,a020,0001,0022))
+# Netgear DG834GT/PN
+$(eval $(call bcm63xxCfe,DG834GTPN,DG834GT_PN,dg834gtpn,96348GW-10,6348))
+# Netgear DG834G v4
+$(eval $(call bcm63xxCfeRamdisk,DG834GV4,DG834GTv4,dg834g_v4,96348W3,6348))
+# Netgear DGND3700 v1
+$(eval $(call bcm63xxCfeNetgear,DGND3700v1_3800B,DGND3700v1,dgnd3700v1,96368MVWG,6368,--image-offset 0x20000 --block-size 0x20000,U12L144T01_NETGEAR_NEWLED,1))
+# Netgear DGND3800B
+$(eval $(call bcm63xxCfeNetgear,DGND3700v1_3800B,DGND3800B,dgnd3700v1,96368MVWG,6368,--image-offset 0x20000 --block-size 0x20000,U12L144T11_NETGEAR_NEWLED,1))
+# Pirelli Alice Gate VoIP 2 Plus Wi-Fi AGPF-S0
+$(eval $(call bcm63xxCfe,AGPF_S0,AGV2+W,agpf-s0,AGPF-S0,6358,--block-size 0x20000 --image-offset 0x20000 --signature2 IMAGE --tag-version 8))
+# Pirelli A226G
+$(eval $(call bcm63xxCfe,A226G,A226G,a226g,DWV-S0,6358,--signature2 IMAGE --tag-version 8))
+# Pirelli A226M/A226M-FWB
+$(eval $(call bcm63xxCfe,A226M,A226M,a226m,DWV-S0,6358,--signature2 IMAGE --tag-version 8))
+$(eval $(call bcm63xxCfe,A226M,A226M-FWB,a226m-fwb,DWV-S0,6358,--block-size 0x20000 --image-offset 0x20000 --signature2 IMAGE --tag-version 8))
+# Sagem F@ST2404
+$(eval $(call bcm63xxCfe,FAST2404,F@ST2404,fast2404,F@ST2404,6348))
+# Sagem F@ST2504n
+$(eval $(call bcm63xxCfe,FAST2504n,F@ST2504n,fast2504n,F@ST2504n,6362))
+# Sagem F@ST2604
+$(eval $(call bcm63xxCfe,FAST2604,F@ST2604,fast2604,F@ST2604,6348))
+# Sagem F@ST2704N V1 / Plusnet F@ST2704N V1
+$(eval $(call bcm63xxCfe,FAST2704N,FAST2704N,fast2704n,F@ST2704N,6318,--pad 4))
+# Sagem F@ST2704V2
+$(eval $(call bcm63xxCfe,FAST2704V2,F@ST2704V2,fast2704v2,F@ST2704V2,6328))
+# SFR Neufbox 4
+$(eval $(call bcm63xxCfe,Neufbox4,NEUFBOX4-SER,nb4-ser-r0,96358VW,6358,--rsa-signature "OpenWRT-$(REVISION)"))
+$(eval $(call bcm63xxCfe,Neufbox4,NEUFBOX4-FXC,nb4-fxc-r1,96358VW,6358,--rsa-signature "OpenWRT-$(REVISION)"))
+# SFR Neufbox 6
+$(eval $(call bcm63xxCfe,Neufbox6,NEUFBOX6,nb6-ser-r0,NB6-SER-r0,6362,--rsa-signature "OpenWRT-$(REVISION)"))
+# T-Com Speedport W 303V Typ B
+$(eval $(call bcm63xxCfeSpw303v,SPW303V,SPW303V,spw303v,96358-502V,6358,--pad 4))
+# T-Com Speedport W 500V
+$(eval $(call bcm63xxCfe,SPW500V,SPW500V,spw500v,96348GW,6348))
+# Tecom GW6000
+$(eval $(call bcm63xxCfe,GW6000,GW6000,gw6000,96348GW,6348))
+# Tecom GW6200
+$(eval $(call bcm63xxCfe,GW6200,GW6200,gw6200,96348GW,6348,--rsa-signature "$(shell printf '\x99')"))
+# Telsey CPVA502+
+$(eval $(call bcm63xxCfeRamdisk,CPVA502PLUS,CVPA502PLUS,cpva502plus,CPVA502+,6348,--signature "Telsey Tlc" --signature2 "99.99.999" --second-image-flag "0"))
+# Telsey CPVA642-type (e.g. CPA-ZNTE60T)
+$(eval $(call bcm63xxCfe,CPVA642,CPA-ZNTE60T,cpva642,CPVA642,6358,--signature "Telsey Tlc" --signature2 "99.99.999" --second-image-flag "0" --pad 4))
+# Telsey MAGIC (Alice W-Gate)
+$(eval $(call bcm63xxCfeRamdisk,MAGIC,MAGIC,magic,MAGIC,6348))
+# TP-Link TD-W8900GB
+$(eval $(call bcm63xxCfe,TDW8900GB,TD-W8900GB,td-w8900gb,96348GW-11,6348,--rsa-signature "$(shell printf 'PRID\x89\x10\x00\x02')" --image-offset 0x20000))
+# USRobotics 9108
+$(eval $(call bcm63xxCfe,USR9108,USR9108,usr9108,96348GW-A,6348))
+# ZyXEL P870HW-51a v2
+$(eval $(call bcm63xxCfeZyxel,P870HW_51a_v2,P870HW-51a_v2,p870hw-51a-v2,96368VVW,6368,--rsa-signature "ZyXEL" --signature "ZyXEL_0001"))
+
+$(eval $(call BuildImage))
diff --git a/target/linux/brcm63xx/image/README.images-bcm63xx b/target/linux/brcm63xx/image/README.images-bcm63xx
new file mode 100644
index 0000000..91b6d01
--- /dev/null
+++ b/target/linux/brcm63xx/image/README.images-bcm63xx
@@ -0,0 +1,127 @@
+The image neede to flash onto a Broadcom 63xx-series board depends on the
+board, method you are using to flash, and, for web-based flash, on the version
+of the Broadcom code your router uses.
+
+There are two major revisions of the Broadcom code as far as imagetags are
+concerned, before 3.08 and after 3.08, however there are some variations 
+within in that, either due to vendor differences or due to changes at 
+Broadcom (it's not clear yet which is the case).  In addtion Pirelli modified
+the Broadcom code, so Alice Gate models use a different imagetag than any 
+other vendor.
+
+The imagetag format for flashing via CFE is the same for almost all the 
+boards, and is the same for all images generated by the imagetag utility.
+Images flashable using cfe are labelled openwrt-<board>-<filesystem>-cfe.bin
+
+The imagetags for tftp/ftp flashing is based on Broadcom 3.00-3.04 imagetags
+and is known to be correct as the source code GPL and is available for reading.
+
+Broadcom code 2.21 is based on the BT Voyager firmware image I looked at.  It
+may in fact be BT Voyager-specific.  2.21 is actually more difficult to deal
+with the imagetag from 3.00 as it has three different CRC calculations in
+addtition to the header CRC.
+
+Broadcom 3.00-3.02 flashing has been tested on Comtrend CT-5261, CT-536 and 
+Tecom GW6000, and is the version of the flashing that was present before the
+imagetags were split by broadcom code version (early June 2009)
+
+3.04 is guessed to be the same as 3.00-3.02 based on available information
+
+Broadom 3.06 is thought to be the same as 3.00-3.02, however the only 3.06 
+this author (Daniel Dickinson) has seen is the Alice Gate (Pirelli) firmware
+which is known to be different due to vendor (Pirelli) modifications to the
+Broadcom code.
+
+Broadcom 3.10 uses an imagetag that is believed to apply to all 3.10 and 3.12
+versions, and has been tested on the Tecom GW6200.  This version introdec changes to
+the imagetag to deal with TR69 (a remote rouer management system developed by the
+DSL forum).  There is a field for vendor-specific information, that at least in some
+cases is not optional.  It is based on the hexedit of a neufbox4 firmware image, the
+information in https://dev.openwrt.org/ticket/4987, and the hexedit of a Tecom
+GW6200 image.
+
+Some boards share the same tag format, but require vendor-specific fields in
+the board.  In that case the tagid is shared, but the filename of the generated
+image reflects the router for which the image was created.
+
+router        |method       | codever |filename
++-------------+-------------+---------+---------------------------------------
+|any          |cfe+most web |   any   |openwrt-<board>-<fs>-cfe.bin
+|AGVoIP2+WiFi |cfe          |alice3.06|openwrt-AGV2+W-cfe-<fs>-cfe.bin
+|AGVoIP2+WiFi |web          |alice3.06|openwrt-AGV2+W-cfe-<fs>-cfe.bin
+|CT536        |web          |3.02     |openwrt-CT536_CT5621-<fs>-cfe.bin
+|CT5621       |web          |3.02     |openwrt-CT536_CT5621-<fs>-cfe.bin
+|DG834GT      |web          |3.02     |openwrt-DG834GT_DG834PN-<fs>-cfe.bin
+|DG834PN      |web          |3.02     |openwrt-DG834GT_DG834PN-<fs>-cfe.bin
+|DSL-2640B    |web          |3.10     |openwrt-DSL2640B-<fs>-cfe.bin
+|DSL-2740B    |web          |3.10     |openwrt-DSL2670B-<fs>-cfe.bin
+|F5D7633      |web          |3.10     |openwrt-F5D7633-<fs>-cfe.bin
+|F@ST2404     |web          |3.0X?    |openwrt-F@ST2404-cfe-<fs>-cfe.bin
+|F@ST2404     |web          |3.1X?    |openwrt-F@ST2404-<fs>-cfe.bin
+|GW6000       |web          |3.00     |openwrt-GW6000-<fs>-cfe.bin
+|GW6200       |web          |3.10     |openwrt-GW6200-<fs>-cfe.bin
+|Neufbox4     |web          |3.12     |openwrt-NEUFBOX4-<fs>-cfe.bin
+|TD8810A      |web          |3.06     |openwrt-TD8810-<fs>-cfe.bin
+|TD8810B      |web          |3.06     |openwrt-TD8810-<fs>-cfe.bin
+|TD8811A      |web          |3.06     |openwrt-TD8811-<fs>-cfe.bin
+|TD8811B      |web          |3.06     |openwrt-TD881-<fs>-cfe.bin
+|TD8900GB     |web          |3.06     |openwrt-TD8900DB<fs>-cfe.bin
+|USR9108      |web          |3.0X?    |openwrt-USR9108-<fs>-cfe.bin
+|V2091_BTR    |web          |2.21     |openwrt-V2091_BTR-<fs>-cfe.bin
+|V2091_ROI    |web          |2.21     |openwrt-V2091-<fs>-cfe.bin
+|V2091_WB     |web          |2.21     |openwrt-V2091-<fs>-cfe.bin
+|V210_BTR     |web          |2.21     |openwrt-V210_BTR-<fs>-cfe.bin
+|V210_ROI     |web          |2.21     |openwrt-V210-ROI_WB<fs>-cfe.bin
+|V210_WB      |web          |2.21     |openwrt-V210-ROI_WB<fs>-cfe.bin
+|V2110        |web          |2.21     |openwrt-V2110-<fs>-cfe.bin
+|V2110_AA     |web          |2.21     |openwrt-V2110-<fs>-cfe.bin
+|V2110_ROI    |web          |2.21     |openwrt-V2110-<fs>-cfe.bin
+|V2500V       |web          |2.21     |openwrt-V2500V<fs>-cfe.bin
+|V2500V_AA    |web          |2.21     |openwrt-V2500V-<fs>-cfe.bin
+|V2500V_SIP_CLUB |web       |2.21     |openwrt-V2500V-<fs>-cfe.bin
+
+Old imagetag routers
+--------------------
+Davolink DV201AMR
+
+Redboot routers
+---------------
+Inventel Livebox
+
+Known router->code versions
+---------------------------
+
+Vendor                     |Model                                     |Code Ver
+---------------------------+------------------------------------------+--------
+Belkin                     |F5D7633                                   |3.10
+British Telecom (BT)       |Voyager V2091_BTR                         |2.21
+British Telecom (BT)       |Voyager V2091_ROI                         |2.21
+British Telecom (BT)       |Voyager V2091_WB                          |2.21
+British Telecom (BT)       |Voyager V210_BTR                          |2.21
+British Telecom (BT)       |Voyager V210_ROI                          |2.21
+British Telecom (BT)       |Voyager V210_WB                           |2.21
+British Telecom (BT)       |Voyager V2110                             |2.21
+British Telecom (BT)       |Voyager V2110_AA                          |2.21
+British Telecom (BT)       |Voyager V2110_ROI                         |2.21
+British Telecom (BT)       |Voyager V220V                             |2.21
+British Telecom (BT)       |Voyager V2500V                            |2.21
+British Telecom (BT)       |Voyager V2500V_AA                         |2.21
+British Telecom (BT)       |Voyager V2500V_SIP_CLUB                   |2.21
+Comtrend                   |CT-5261                                   |3.02
+Comtrend                   |CT-536                                    |3.02
+D-Link                     |DSL-2640B                                 |3.10
+D-Link                     |DSL-2670B                                 |3.10
+NetGear			   |DG834GT				      |3.02
+NetGear			   |DG834PN				      |3.02
+Neuf Cegetel               |Neufbox 4                                 |3.12
+Pirelli                    |Alice Gate Wi-Fi (+VoIP models?)          |ag 3.06
+Sagem			   |F@ST2404				      |?
+TP-Link                    |TD-8810A                                  |3.06
+TP-Link			   |TD-8810B				      |3.06
+TP-Link			   |TD-8811A				      |3.06
+TP-Link			   |TD-8811B				      |3.06
+TP-Link			   |TD-W8900GB				      |3.06
+Tecom                      |GW6000                                    |3.00
+Tecom                      |GW6200                                    |3.10
+USR			   |9108				      |?
+
diff --git a/target/linux/brcm63xx/image/lzma-loader/Makefile b/target/linux/brcm63xx/image/lzma-loader/Makefile
new file mode 100644
index 0000000..8d36691
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/Makefile
@@ -0,0 +1,62 @@
+#
+# Copyright (C) 2011 OpenWrt.org
+# Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+LZMA_TEXT_START	:= 0x80a00000
+LOADER		:= loader.bin
+LOADER_NAME	:= $(basename $(notdir $(LOADER)))
+LOADER_DATA 	:=
+TARGET_DIR	:=
+FLASH_OFFS	:=
+FLASH_MAX	:=
+
+ifeq ($(TARGET_DIR),)
+TARGET_DIR	:= $(KDIR)
+endif
+
+LOADER_BIN	:= $(TARGET_DIR)/$(LOADER_NAME).bin
+LOADER_GZ	:= $(TARGET_DIR)/$(LOADER_NAME).gz
+LOADER_ELF	:= $(TARGET_DIR)/$(LOADER_NAME).elf
+
+PKG_NAME := lzma-loader
+PKG_BUILD_DIR := $(KDIR)/$(PKG_NAME)
+
+.PHONY : loader-compile loader.bin loader.elf loader.gz
+
+$(PKG_BUILD_DIR)/.prepared:
+	mkdir $(PKG_BUILD_DIR)
+	$(CP) ./src/* $(PKG_BUILD_DIR)/
+	touch $@
+
+loader-compile: $(PKG_BUILD_DIR)/.prepared
+	$(MAKE) -C $(PKG_BUILD_DIR) CROSS_COMPILE="$(TARGET_CROSS)" \
+		LZMA_TEXT_START=$(LZMA_TEXT_START) \
+		LOADER_DATA=$(LOADER_DATA) \
+		FLASH_OFFS=$(FLASH_OFFS) \
+		FLASH_MAX=$(FLASH_MAX) \
+		clean all
+
+loader.gz: $(PKG_BUILD_DIR)/loader.bin
+	gzip -nc9 $< > $(LOADER_GZ)
+
+loader.elf: $(PKG_BUILD_DIR)/loader.elf
+	$(CP) $< $(LOADER_ELF)
+
+loader.bin: $(PKG_BUILD_DIR)/loader.bin
+	$(CP) $< $(LOADER_BIN)
+
+download:
+prepare: $(PKG_BUILD_DIR)/.prepared
+compile: loader-compile
+
+install:
+
+clean:
+	rm -rf $(PKG_BUILD_DIR)
+
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/LzmaDecode.c b/target/linux/brcm63xx/image/lzma-loader/src/LzmaDecode.c
new file mode 100644
index 0000000..cb83453
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/LzmaDecode.c
@@ -0,0 +1,584 @@
+/*
+  LzmaDecode.c
+  LZMA Decoder (optimized for Speed version)
+  
+  LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
+  http://www.7-zip.org/
+
+  LZMA SDK is licensed under two licenses:
+  1) GNU Lesser General Public License (GNU LGPL)
+  2) Common Public License (CPL)
+  It means that you can select one of these two licenses and 
+  follow rules of that license.
+
+  SPECIAL EXCEPTION:
+  Igor Pavlov, as the author of this Code, expressly permits you to 
+  statically or dynamically link your Code (or bind by name) to the 
+  interfaces of this file without subjecting your linked Code to the 
+  terms of the CPL or GNU LGPL. Any modifications or additions 
+  to this file, however, are subject to the LGPL or CPL terms.
+*/
+
+#include "LzmaDecode.h"
+
+#define kNumTopBits 24
+#define kTopValue ((UInt32)1 << kNumTopBits)
+
+#define kNumBitModelTotalBits 11
+#define kBitModelTotal (1 << kNumBitModelTotalBits)
+#define kNumMoveBits 5
+
+#define RC_READ_BYTE (*Buffer++)
+
+#define RC_INIT2 Code = 0; Range = 0xFFFFFFFF; \
+  { int i; for(i = 0; i < 5; i++) { RC_TEST; Code = (Code << 8) | RC_READ_BYTE; }}
+
+#ifdef _LZMA_IN_CB
+
+#define RC_TEST { if (Buffer == BufferLim) \
+  { SizeT size; int result = InCallback->Read(InCallback, &Buffer, &size); if (result != LZMA_RESULT_OK) return result; \
+  BufferLim = Buffer + size; if (size == 0) return LZMA_RESULT_DATA_ERROR; }}
+
+#define RC_INIT Buffer = BufferLim = 0; RC_INIT2
+
+#else
+
+#define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
+
+#define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
+ 
+#endif
+
+#define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
+
+#define IfBit0(p) RC_NORMALIZE; bound = (Range >> kNumBitModelTotalBits) * *(p); if (Code < bound)
+#define UpdateBit0(p) Range = bound; *(p) += (kBitModelTotal - *(p)) >> kNumMoveBits;
+#define UpdateBit1(p) Range -= bound; Code -= bound; *(p) -= (*(p)) >> kNumMoveBits;
+
+#define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
+  { UpdateBit0(p); mi <<= 1; A0; } else \
+  { UpdateBit1(p); mi = (mi + mi) + 1; A1; } 
+  
+#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)               
+
+#define RangeDecoderBitTreeDecode(probs, numLevels, res) \
+  { int i = numLevels; res = 1; \
+  do { CProb *p = probs + res; RC_GET_BIT(p, res) } while(--i != 0); \
+  res -= (1 << numLevels); }
+
+
+#define kNumPosBitsMax 4
+#define kNumPosStatesMax (1 << kNumPosBitsMax)
+
+#define kLenNumLowBits 3
+#define kLenNumLowSymbols (1 << kLenNumLowBits)
+#define kLenNumMidBits 3
+#define kLenNumMidSymbols (1 << kLenNumMidBits)
+#define kLenNumHighBits 8
+#define kLenNumHighSymbols (1 << kLenNumHighBits)
+
+#define LenChoice 0
+#define LenChoice2 (LenChoice + 1)
+#define LenLow (LenChoice2 + 1)
+#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
+#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
+#define kNumLenProbs (LenHigh + kLenNumHighSymbols) 
+
+
+#define kNumStates 12
+#define kNumLitStates 7
+
+#define kStartPosModelIndex 4
+#define kEndPosModelIndex 14
+#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
+
+#define kNumPosSlotBits 6
+#define kNumLenToPosStates 4
+
+#define kNumAlignBits 4
+#define kAlignTableSize (1 << kNumAlignBits)
+
+#define kMatchMinLen 2
+
+#define IsMatch 0
+#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax))
+#define IsRepG0 (IsRep + kNumStates)
+#define IsRepG1 (IsRepG0 + kNumStates)
+#define IsRepG2 (IsRepG1 + kNumStates)
+#define IsRep0Long (IsRepG2 + kNumStates)
+#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax))
+#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits))
+#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
+#define LenCoder (Align + kAlignTableSize)
+#define RepLenCoder (LenCoder + kNumLenProbs)
+#define Literal (RepLenCoder + kNumLenProbs)
+
+#if Literal != LZMA_BASE_SIZE
+StopCompilingDueBUG
+#endif
+
+int LzmaDecodeProperties(CLzmaProperties *propsRes, const unsigned char *propsData, int size)
+{
+  unsigned char prop0;
+  if (size < LZMA_PROPERTIES_SIZE)
+    return LZMA_RESULT_DATA_ERROR;
+  prop0 = propsData[0];
+  if (prop0 >= (9 * 5 * 5))
+    return LZMA_RESULT_DATA_ERROR;
+  {
+    for (propsRes->pb = 0; prop0 >= (9 * 5); propsRes->pb++, prop0 -= (9 * 5));
+    for (propsRes->lp = 0; prop0 >= 9; propsRes->lp++, prop0 -= 9);
+    propsRes->lc = prop0;
+    /*
+    unsigned char remainder = (unsigned char)(prop0 / 9);
+    propsRes->lc = prop0 % 9;
+    propsRes->pb = remainder / 5;
+    propsRes->lp = remainder % 5;
+    */
+  }
+
+  #ifdef _LZMA_OUT_READ
+  {
+    int i;
+    propsRes->DictionarySize = 0;
+    for (i = 0; i < 4; i++)
+      propsRes->DictionarySize += (UInt32)(propsData[1 + i]) << (i * 8);
+    if (propsRes->DictionarySize == 0)
+      propsRes->DictionarySize = 1;
+  }
+  #endif
+  return LZMA_RESULT_OK;
+}
+
+#define kLzmaStreamWasFinishedId (-1)
+
+int LzmaDecode(CLzmaDecoderState *vs,
+    #ifdef _LZMA_IN_CB
+    ILzmaInCallback *InCallback,
+    #else
+    const unsigned char *inStream, SizeT inSize, SizeT *inSizeProcessed,
+    #endif
+    unsigned char *outStream, SizeT outSize, SizeT *outSizeProcessed)
+{
+  CProb *p = vs->Probs;
+  SizeT nowPos = 0;
+  Byte previousByte = 0;
+  UInt32 posStateMask = (1 << (vs->Properties.pb)) - 1;
+  UInt32 literalPosMask = (1 << (vs->Properties.lp)) - 1;
+  int lc = vs->Properties.lc;
+
+  #ifdef _LZMA_OUT_READ
+  
+  UInt32 Range = vs->Range;
+  UInt32 Code = vs->Code;
+  #ifdef _LZMA_IN_CB
+  const Byte *Buffer = vs->Buffer;
+  const Byte *BufferLim = vs->BufferLim;
+  #else
+  const Byte *Buffer = inStream;
+  const Byte *BufferLim = inStream + inSize;
+  #endif
+  int state = vs->State;
+  UInt32 rep0 = vs->Reps[0], rep1 = vs->Reps[1], rep2 = vs->Reps[2], rep3 = vs->Reps[3];
+  int len = vs->RemainLen;
+  UInt32 globalPos = vs->GlobalPos;
+  UInt32 distanceLimit = vs->DistanceLimit;
+
+  Byte *dictionary = vs->Dictionary;
+  UInt32 dictionarySize = vs->Properties.DictionarySize;
+  UInt32 dictionaryPos = vs->DictionaryPos;
+
+  Byte tempDictionary[4];
+
+  #ifndef _LZMA_IN_CB
+  *inSizeProcessed = 0;
+  #endif
+  *outSizeProcessed = 0;
+  if (len == kLzmaStreamWasFinishedId)
+    return LZMA_RESULT_OK;
+
+  if (dictionarySize == 0)
+  {
+    dictionary = tempDictionary;
+    dictionarySize = 1;
+    tempDictionary[0] = vs->TempDictionary[0];
+  }
+
+  if (len == kLzmaNeedInitId)
+  {
+    {
+      UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
+      UInt32 i;
+      for (i = 0; i < numProbs; i++)
+        p[i] = kBitModelTotal >> 1; 
+      rep0 = rep1 = rep2 = rep3 = 1;
+      state = 0;
+      globalPos = 0;
+      distanceLimit = 0;
+      dictionaryPos = 0;
+      dictionary[dictionarySize - 1] = 0;
+      #ifdef _LZMA_IN_CB
+      RC_INIT;
+      #else
+      RC_INIT(inStream, inSize);
+      #endif
+    }
+    len = 0;
+  }
+  while(len != 0 && nowPos < outSize)
+  {
+    UInt32 pos = dictionaryPos - rep0;
+    if (pos >= dictionarySize)
+      pos += dictionarySize;
+    outStream[nowPos++] = dictionary[dictionaryPos] = dictionary[pos];
+    if (++dictionaryPos == dictionarySize)
+      dictionaryPos = 0;
+    len--;
+  }
+  if (dictionaryPos == 0)
+    previousByte = dictionary[dictionarySize - 1];
+  else
+    previousByte = dictionary[dictionaryPos - 1];
+
+  #else /* if !_LZMA_OUT_READ */
+
+  int state = 0;
+  UInt32 rep0 = 1, rep1 = 1, rep2 = 1, rep3 = 1;
+  int len = 0;
+  const Byte *Buffer;
+  const Byte *BufferLim;
+  UInt32 Range;
+  UInt32 Code;
+
+  #ifndef _LZMA_IN_CB
+  *inSizeProcessed = 0;
+  #endif
+  *outSizeProcessed = 0;
+
+  {
+    UInt32 i;
+    UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
+    for (i = 0; i < numProbs; i++)
+      p[i] = kBitModelTotal >> 1;
+  }
+  
+  #ifdef _LZMA_IN_CB
+  RC_INIT;
+  #else
+  RC_INIT(inStream, inSize);
+  #endif
+
+  #endif /* _LZMA_OUT_READ */
+
+  while(nowPos < outSize)
+  {
+    CProb *prob;
+    UInt32 bound;
+    int posState = (int)(
+        (nowPos 
+        #ifdef _LZMA_OUT_READ
+        + globalPos
+        #endif
+        )
+        & posStateMask);
+
+    prob = p + IsMatch + (state << kNumPosBitsMax) + posState;
+    IfBit0(prob)
+    {
+      int symbol = 1;
+      UpdateBit0(prob)
+      prob = p + Literal + (LZMA_LIT_SIZE * 
+        (((
+        (nowPos 
+        #ifdef _LZMA_OUT_READ
+        + globalPos
+        #endif
+        )
+        & literalPosMask) << lc) + (previousByte >> (8 - lc))));
+
+      if (state >= kNumLitStates)
+      {
+        int matchByte;
+        #ifdef _LZMA_OUT_READ
+        UInt32 pos = dictionaryPos - rep0;
+        if (pos >= dictionarySize)
+          pos += dictionarySize;
+        matchByte = dictionary[pos];
+        #else
+        matchByte = outStream[nowPos - rep0];
+        #endif
+        do
+        {
+          int bit;
+          CProb *probLit;
+          matchByte <<= 1;
+          bit = (matchByte & 0x100);
+          probLit = prob + 0x100 + bit + symbol;
+          RC_GET_BIT2(probLit, symbol, if (bit != 0) break, if (bit == 0) break)
+        }
+        while (symbol < 0x100);
+      }
+      while (symbol < 0x100)
+      {
+        CProb *probLit = prob + symbol;
+        RC_GET_BIT(probLit, symbol)
+      }
+      previousByte = (Byte)symbol;
+
+      outStream[nowPos++] = previousByte;
+      #ifdef _LZMA_OUT_READ
+      if (distanceLimit < dictionarySize)
+        distanceLimit++;
+
+      dictionary[dictionaryPos] = previousByte;
+      if (++dictionaryPos == dictionarySize)
+        dictionaryPos = 0;
+      #endif
+      if (state < 4) state = 0;
+      else if (state < 10) state -= 3;
+      else state -= 6;
+    }
+    else             
+    {
+      UpdateBit1(prob);
+      prob = p + IsRep + state;
+      IfBit0(prob)
+      {
+        UpdateBit0(prob);
+        rep3 = rep2;
+        rep2 = rep1;
+        rep1 = rep0;
+        state = state < kNumLitStates ? 0 : 3;
+        prob = p + LenCoder;
+      }
+      else
+      {
+        UpdateBit1(prob);
+        prob = p + IsRepG0 + state;
+        IfBit0(prob)
+        {
+          UpdateBit0(prob);
+          prob = p + IsRep0Long + (state << kNumPosBitsMax) + posState;
+          IfBit0(prob)
+          {
+            #ifdef _LZMA_OUT_READ
+            UInt32 pos;
+            #endif
+            UpdateBit0(prob);
+            
+            #ifdef _LZMA_OUT_READ
+            if (distanceLimit == 0)
+            #else
+            if (nowPos == 0)
+            #endif
+              return LZMA_RESULT_DATA_ERROR;
+            
+            state = state < kNumLitStates ? 9 : 11;
+            #ifdef _LZMA_OUT_READ
+            pos = dictionaryPos - rep0;
+            if (pos >= dictionarySize)
+              pos += dictionarySize;
+            previousByte = dictionary[pos];
+            dictionary[dictionaryPos] = previousByte;
+            if (++dictionaryPos == dictionarySize)
+              dictionaryPos = 0;
+            #else
+            previousByte = outStream[nowPos - rep0];
+            #endif
+            outStream[nowPos++] = previousByte;
+            #ifdef _LZMA_OUT_READ
+            if (distanceLimit < dictionarySize)
+              distanceLimit++;
+            #endif
+
+            continue;
+          }
+          else
+          {
+            UpdateBit1(prob);
+          }
+        }
+        else
+        {
+          UInt32 distance;
+          UpdateBit1(prob);
+          prob = p + IsRepG1 + state;
+          IfBit0(prob)
+          {
+            UpdateBit0(prob);
+            distance = rep1;
+          }
+          else 
+          {
+            UpdateBit1(prob);
+            prob = p + IsRepG2 + state;
+            IfBit0(prob)
+            {
+              UpdateBit0(prob);
+              distance = rep2;
+            }
+            else
+            {
+              UpdateBit1(prob);
+              distance = rep3;
+              rep3 = rep2;
+            }
+            rep2 = rep1;
+          }
+          rep1 = rep0;
+          rep0 = distance;
+        }
+        state = state < kNumLitStates ? 8 : 11;
+        prob = p + RepLenCoder;
+      }
+      {
+        int numBits, offset;
+        CProb *probLen = prob + LenChoice;
+        IfBit0(probLen)
+        {
+          UpdateBit0(probLen);
+          probLen = prob + LenLow + (posState << kLenNumLowBits);
+          offset = 0;
+          numBits = kLenNumLowBits;
+        }
+        else
+        {
+          UpdateBit1(probLen);
+          probLen = prob + LenChoice2;
+          IfBit0(probLen)
+          {
+            UpdateBit0(probLen);
+            probLen = prob + LenMid + (posState << kLenNumMidBits);
+            offset = kLenNumLowSymbols;
+            numBits = kLenNumMidBits;
+          }
+          else
+          {
+            UpdateBit1(probLen);
+            probLen = prob + LenHigh;
+            offset = kLenNumLowSymbols + kLenNumMidSymbols;
+            numBits = kLenNumHighBits;
+          }
+        }
+        RangeDecoderBitTreeDecode(probLen, numBits, len);
+        len += offset;
+      }
+
+      if (state < 4)
+      {
+        int posSlot;
+        state += kNumLitStates;
+        prob = p + PosSlot +
+            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << 
+            kNumPosSlotBits);
+        RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
+        if (posSlot >= kStartPosModelIndex)
+        {
+          int numDirectBits = ((posSlot >> 1) - 1);
+          rep0 = (2 | ((UInt32)posSlot & 1));
+          if (posSlot < kEndPosModelIndex)
+          {
+            rep0 <<= numDirectBits;
+            prob = p + SpecPos + rep0 - posSlot - 1;
+          }
+          else
+          {
+            numDirectBits -= kNumAlignBits;
+            do
+            {
+              RC_NORMALIZE
+              Range >>= 1;
+              rep0 <<= 1;
+              if (Code >= Range)
+              {
+                Code -= Range;
+                rep0 |= 1;
+              }
+            }
+            while (--numDirectBits != 0);
+            prob = p + Align;
+            rep0 <<= kNumAlignBits;
+            numDirectBits = kNumAlignBits;
+          }
+          {
+            int i = 1;
+            int mi = 1;
+            do
+            {
+              CProb *prob3 = prob + mi;
+              RC_GET_BIT2(prob3, mi, ; , rep0 |= i);
+              i <<= 1;
+            }
+            while(--numDirectBits != 0);
+          }
+        }
+        else
+          rep0 = posSlot;
+        if (++rep0 == (UInt32)(0))
+        {
+          /* it's for stream version */
+          len = kLzmaStreamWasFinishedId;
+          break;
+        }
+      }
+
+      len += kMatchMinLen;
+      #ifdef _LZMA_OUT_READ
+      if (rep0 > distanceLimit) 
+      #else
+      if (rep0 > nowPos)
+      #endif
+        return LZMA_RESULT_DATA_ERROR;
+
+      #ifdef _LZMA_OUT_READ
+      if (dictionarySize - distanceLimit > (UInt32)len)
+        distanceLimit += len;
+      else
+        distanceLimit = dictionarySize;
+      #endif
+
+      do
+      {
+        #ifdef _LZMA_OUT_READ
+        UInt32 pos = dictionaryPos - rep0;
+        if (pos >= dictionarySize)
+          pos += dictionarySize;
+        previousByte = dictionary[pos];
+        dictionary[dictionaryPos] = previousByte;
+        if (++dictionaryPos == dictionarySize)
+          dictionaryPos = 0;
+        #else
+        previousByte = outStream[nowPos - rep0];
+        #endif
+        len--;
+        outStream[nowPos++] = previousByte;
+      }
+      while(len != 0 && nowPos < outSize);
+    }
+  }
+  RC_NORMALIZE;
+
+  #ifdef _LZMA_OUT_READ
+  vs->Range = Range;
+  vs->Code = Code;
+  vs->DictionaryPos = dictionaryPos;
+  vs->GlobalPos = globalPos + (UInt32)nowPos;
+  vs->DistanceLimit = distanceLimit;
+  vs->Reps[0] = rep0;
+  vs->Reps[1] = rep1;
+  vs->Reps[2] = rep2;
+  vs->Reps[3] = rep3;
+  vs->State = state;
+  vs->RemainLen = len;
+  vs->TempDictionary[0] = tempDictionary[0];
+  #endif
+
+  #ifdef _LZMA_IN_CB
+  vs->Buffer = Buffer;
+  vs->BufferLim = BufferLim;
+  #else
+  *inSizeProcessed = (SizeT)(Buffer - inStream);
+  #endif
+  *outSizeProcessed = nowPos;
+  return LZMA_RESULT_OK;
+}
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/LzmaDecode.h b/target/linux/brcm63xx/image/lzma-loader/src/LzmaDecode.h
new file mode 100644
index 0000000..2870eeb
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/LzmaDecode.h
@@ -0,0 +1,113 @@
+/* 
+  LzmaDecode.h
+  LZMA Decoder interface
+
+  LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
+  http://www.7-zip.org/
+
+  LZMA SDK is licensed under two licenses:
+  1) GNU Lesser General Public License (GNU LGPL)
+  2) Common Public License (CPL)
+  It means that you can select one of these two licenses and 
+  follow rules of that license.
+
+  SPECIAL EXCEPTION:
+  Igor Pavlov, as the author of this code, expressly permits you to 
+  statically or dynamically link your code (or bind by name) to the 
+  interfaces of this file without subjecting your linked code to the 
+  terms of the CPL or GNU LGPL. Any modifications or additions 
+  to this file, however, are subject to the LGPL or CPL terms.
+*/
+
+#ifndef __LZMADECODE_H
+#define __LZMADECODE_H
+
+#include "LzmaTypes.h"
+
+/* #define _LZMA_IN_CB */
+/* Use callback for input data */
+
+/* #define _LZMA_OUT_READ */
+/* Use read function for output data */
+
+/* #define _LZMA_PROB32 */
+/* It can increase speed on some 32-bit CPUs, 
+   but memory usage will be doubled in that case */
+
+/* #define _LZMA_LOC_OPT */
+/* Enable local speed optimizations inside code */
+
+#ifdef _LZMA_PROB32
+#define CProb UInt32
+#else
+#define CProb UInt16
+#endif
+
+#define LZMA_RESULT_OK 0
+#define LZMA_RESULT_DATA_ERROR 1
+
+#ifdef _LZMA_IN_CB
+typedef struct _ILzmaInCallback
+{
+  int (*Read)(void *object, const unsigned char **buffer, SizeT *bufferSize);
+} ILzmaInCallback;
+#endif
+
+#define LZMA_BASE_SIZE 1846
+#define LZMA_LIT_SIZE 768
+
+#define LZMA_PROPERTIES_SIZE 5
+
+typedef struct _CLzmaProperties
+{
+  int lc;
+  int lp;
+  int pb;
+  #ifdef _LZMA_OUT_READ
+  UInt32 DictionarySize;
+  #endif
+}CLzmaProperties;
+
+int LzmaDecodeProperties(CLzmaProperties *propsRes, const unsigned char *propsData, int size);
+
+#define LzmaGetNumProbs(Properties) (LZMA_BASE_SIZE + (LZMA_LIT_SIZE << ((Properties)->lc + (Properties)->lp)))
+
+#define kLzmaNeedInitId (-2)
+
+typedef struct _CLzmaDecoderState
+{
+  CLzmaProperties Properties;
+  CProb *Probs;
+
+  #ifdef _LZMA_IN_CB
+  const unsigned char *Buffer;
+  const unsigned char *BufferLim;
+  #endif
+
+  #ifdef _LZMA_OUT_READ
+  unsigned char *Dictionary;
+  UInt32 Range;
+  UInt32 Code;
+  UInt32 DictionaryPos;
+  UInt32 GlobalPos;
+  UInt32 DistanceLimit;
+  UInt32 Reps[4];
+  int State;
+  int RemainLen;
+  unsigned char TempDictionary[4];
+  #endif
+} CLzmaDecoderState;
+
+#ifdef _LZMA_OUT_READ
+#define LzmaDecoderInit(vs) { (vs)->RemainLen = kLzmaNeedInitId; }
+#endif
+
+int LzmaDecode(CLzmaDecoderState *vs,
+    #ifdef _LZMA_IN_CB
+    ILzmaInCallback *inCallback,
+    #else
+    const unsigned char *inStream, SizeT inSize, SizeT *inSizeProcessed,
+    #endif
+    unsigned char *outStream, SizeT outSize, SizeT *outSizeProcessed);
+
+#endif
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/LzmaTypes.h b/target/linux/brcm63xx/image/lzma-loader/src/LzmaTypes.h
new file mode 100644
index 0000000..9c27290
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/LzmaTypes.h
@@ -0,0 +1,45 @@
+/* 
+LzmaTypes.h 
+
+Types for LZMA Decoder
+
+This file written and distributed to public domain by Igor Pavlov.
+This file is part of LZMA SDK 4.40 (2006-05-01)
+*/
+
+#ifndef __LZMATYPES_H
+#define __LZMATYPES_H
+
+#ifndef _7ZIP_BYTE_DEFINED
+#define _7ZIP_BYTE_DEFINED
+typedef unsigned char Byte;
+#endif 
+
+#ifndef _7ZIP_UINT16_DEFINED
+#define _7ZIP_UINT16_DEFINED
+typedef unsigned short UInt16;
+#endif 
+
+#ifndef _7ZIP_UINT32_DEFINED
+#define _7ZIP_UINT32_DEFINED
+#ifdef _LZMA_UINT32_IS_ULONG
+typedef unsigned long UInt32;
+#else
+typedef unsigned int UInt32;
+#endif
+#endif 
+
+/* #define _LZMA_NO_SYSTEM_SIZE_T */
+/* You can use it, if you don't want <stddef.h> */
+
+#ifndef _7ZIP_SIZET_DEFINED
+#define _7ZIP_SIZET_DEFINED
+#ifdef _LZMA_NO_SYSTEM_SIZE_T
+typedef UInt32 SizeT;
+#else
+#include <stddef.h>
+typedef size_t SizeT;
+#endif
+#endif
+
+#endif
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/Makefile b/target/linux/brcm63xx/image/lzma-loader/src/Makefile
new file mode 100644
index 0000000..50c22d8
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/Makefile
@@ -0,0 +1,86 @@
+#
+# Makefile for the LZMA compressed kernel loader for
+# Atheros AR7XXX/AR9XXX based boards
+#
+# Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+#
+# Some parts of this file was based on the OpenWrt specific lzma-loader
+# for the BCM47xx and ADM5120 based boards:
+#	Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
+#	Copyright (C) 2005 Mineharu Takahara <mtakahar@yahoo.com>
+#	Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License version 2 as published
+# by the Free Software Foundation.
+#
+
+LOADADDR	:=
+LZMA_TEXT_START	:= 0x80a00000
+LOADER_DATA	:=
+
+CC		:= $(CROSS_COMPILE)gcc
+LD		:= $(CROSS_COMPILE)ld
+OBJCOPY		:= $(CROSS_COMPILE)objcopy
+OBJDUMP		:= $(CROSS_COMPILE)objdump
+
+BIN_FLAGS	:= -O binary -R .reginfo -R .note -R .comment -R .mdebug -S
+
+CFLAGS		= -D__KERNEL__ -Wall -Wstrict-prototypes -Wno-trigraphs -Os \
+		  -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 \
+		  -mno-abicalls -fno-pic -ffunction-sections -pipe \
+		  -ffreestanding -fhonour-copts \
+		  -mabi=32 -march=mips32 \
+		  -Wa,-32 -Wa,-march=mips32 -Wa,-mips32 -Wa,--trap
+CFLAGS		+= -D_LZMA_PROB32
+
+ASFLAGS		= $(CFLAGS) -D__ASSEMBLY__
+
+LDFLAGS		= -static --gc-sections -no-warn-mismatch
+LDFLAGS		+= -e startup -T loader.lds -Ttext $(LZMA_TEXT_START)
+
+O_FORMAT 	= $(shell $(OBJDUMP) -i | head -2 | grep elf32)
+
+OBJECTS		:= head.o loader.o cache.o board.o printf.o LzmaDecode.o
+
+ifneq ($(strip $(LOADER_DATA)),)
+OBJECTS		+= data.o
+CFLAGS		+= -DLZMA_WRAPPER=1 -DLOADADDR=$(LOADADDR)
+endif
+
+
+all: loader.elf
+
+# Don't build dependencies, this may die if $(CC) isn't gcc
+dep:
+
+install:
+
+%.o : %.c
+	$(CC) $(CFLAGS) -c -o $@ $<
+
+%.o : %.S
+	$(CC) $(ASFLAGS) -c -o $@ $<
+
+data.o: $(LOADER_DATA)
+	$(LD) -r -b binary --oformat $(O_FORMAT) -T lzma-data.lds -o $@ $<
+
+loader: $(OBJECTS)
+	$(LD) $(LDFLAGS) -o $@ $(OBJECTS)
+
+loader.bin: loader
+	$(OBJCOPY) $(BIN_FLAGS) $< $@
+
+loader2.o: loader.bin
+	$(LD) -r -b binary --oformat $(O_FORMAT) -o $@ $<
+
+loader.elf: loader2.o
+	$(LD) -e startup -T loader2.lds -Ttext $(LOADADDR) -o $@ $<
+
+mrproper: clean
+
+clean:
+	rm -f loader *.elf *.bin *.o
+
+
+
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/board.c b/target/linux/brcm63xx/image/lzma-loader/src/board.c
new file mode 100644
index 0000000..1c715e3
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/board.c
@@ -0,0 +1,103 @@
+/*
+ * BCM63XX specific implementation parts
+ *
+ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <stddef.h>
+#include "config.h"
+#include "cp0regdef.h"
+
+#define READREG(r)	*(volatile unsigned int *)(r)
+#define WRITEREG(r,v)	*(volatile unsigned int *)(r) = v
+
+#define UART_IR_REG	0x10
+#define UART_FIFO_REG	0x14
+
+unsigned long uart_base;
+
+static void wait_xfered(void)
+{
+        unsigned int val;
+
+        do {
+                val = READREG(uart_base + UART_IR_REG);
+                if (val & (1 << 5))
+                        break;
+        } while (1);
+}
+
+void board_putc(int ch)
+{
+	if (!uart_base)
+		return;
+
+	wait_xfered();
+        WRITEREG(uart_base + UART_FIFO_REG, ch);
+	wait_xfered();
+}
+
+#define PRID_IMP_BMIPS32_REV4	0x4000
+#define PRID_IMP_BMIPS32_REV8	0x8000
+#define PRID_IMP_BMIPS3300	0x9000
+#define PRID_IMP_BMIPS3300_ALT	0x9100
+#define PRID_IMP_BMIPS3300_BUG	0x0000
+#define PRID_IMP_BMIPS43XX	0xa000
+
+void board_init(void)
+{
+	unsigned long prid, chipid, chipid_reg;
+
+	prid = read_32bit_c0_register($15, 0);
+
+	switch (prid & 0xff00) {
+	case PRID_IMP_BMIPS32_REV4:
+	case PRID_IMP_BMIPS32_REV8:
+	case PRID_IMP_BMIPS3300_ALT:
+	case PRID_IMP_BMIPS3300_BUG:
+		chipid_reg = 0xfffe0000;
+		break;
+	case PRID_IMP_BMIPS3300:
+		if ((prid & 0xff) >= 0x33)
+			chipid_reg = 0xb0000000;
+		else
+			chipid_reg = 0xfffe0000;
+		break;
+	case PRID_IMP_BMIPS43XX:
+		if ((prid & 0xff) >= 0x30)
+			chipid_reg = 0xb0000000;
+		else
+			chipid_reg = 0xfffe0000;
+		break;
+	default:
+		return;
+	}
+
+	chipid = READREG(chipid_reg);
+
+	switch (chipid >> 16) {
+	case 0x6318:
+	case 0x6328:
+	case 0x6358:
+	case 0x6362:
+	case 0x6368:
+	case 0x6369:
+		uart_base = chipid_reg + 0x100;
+		break;
+	case 0x6316:
+	case 0x6326:
+		uart_base = chipid_reg + 0x180;
+		break;
+	case 0x6338:
+	case 0x6345:
+	case 0x6348:
+		uart_base = chipid_reg + 0x300;
+		break;
+	default:
+		return;
+	}
+}
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/cache.c b/target/linux/brcm63xx/image/lzma-loader/src/cache.c
new file mode 100644
index 0000000..93751c3
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/cache.c
@@ -0,0 +1,46 @@
+/*
+ * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * The cache manipulation routine has been taken from the U-Boot project.
+ *	(C) Copyright 2003
+ *	Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ */
+
+#include "cache.h"
+#include "cacheops.h"
+#include "config.h"
+#include "printf.h"
+
+#define cache_op(op,addr)						\
+	__asm__ __volatile__(						\
+	"	.set	push					\n"	\
+	"	.set	noreorder				\n"	\
+	"	.set	mips3\n\t				\n"	\
+	"	cache	%0, %1					\n"	\
+	"	.set	pop					\n"	\
+	:								\
+	: "i" (op), "R" (*(unsigned char *)(addr)))
+
+void flush_cache(unsigned long start_addr, unsigned long size)
+{
+	unsigned long lsize = CONFIG_CACHELINE_SIZE;
+	unsigned long addr = start_addr & ~(lsize - 1);
+	unsigned long aend = (start_addr + size + (lsize - 1)) & ~(lsize - 1);
+
+	printf("blasting from 0x%08x to 0x%08x (0x%08x - 0x%08x)\n", start_addr, size, addr, aend);
+
+	while (1) {
+		cache_op(Hit_Writeback_Inv_D, addr);
+		cache_op(Hit_Invalidate_I, addr);
+		if (addr == aend)
+			break;
+		addr += lsize;
+	}
+}
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/cache.h b/target/linux/brcm63xx/image/lzma-loader/src/cache.h
new file mode 100644
index 0000000..506a235
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/cache.h
@@ -0,0 +1,17 @@
+/*
+ * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ */
+
+#ifndef __CACHE_H
+#define __CACHE_H
+
+void flush_cache(unsigned long start_addr, unsigned long size);
+
+#endif /* __CACHE_H */
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/cacheops.h b/target/linux/brcm63xx/image/lzma-loader/src/cacheops.h
new file mode 100644
index 0000000..70bcad7
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/cacheops.h
@@ -0,0 +1,85 @@
+/*
+ * Cache operations for the cache instruction.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * (C) Copyright 1996, 97, 99, 2002, 03 Ralf Baechle
+ * (C) Copyright 1999 Silicon Graphics, Inc.
+ */
+#ifndef	__ASM_CACHEOPS_H
+#define	__ASM_CACHEOPS_H
+
+/*
+ * Cache Operations available on all MIPS processors with R4000-style caches
+ */
+#define Index_Invalidate_I      0x00
+#define Index_Writeback_Inv_D   0x01
+#define Index_Load_Tag_I	0x04
+#define Index_Load_Tag_D	0x05
+#define Index_Store_Tag_I	0x08
+#define Index_Store_Tag_D	0x09
+#if defined(CONFIG_CPU_LOONGSON2)
+#define Hit_Invalidate_I	0x00
+#else
+#define Hit_Invalidate_I	0x10
+#endif
+#define Hit_Invalidate_D	0x11
+#define Hit_Writeback_Inv_D	0x15
+
+/*
+ * R4000-specific cacheops
+ */
+#define Create_Dirty_Excl_D	0x0d
+#define Fill			0x14
+#define Hit_Writeback_I		0x18
+#define Hit_Writeback_D		0x19
+
+/*
+ * R4000SC and R4400SC-specific cacheops
+ */
+#define Index_Invalidate_SI     0x02
+#define Index_Writeback_Inv_SD  0x03
+#define Index_Load_Tag_SI	0x06
+#define Index_Load_Tag_SD	0x07
+#define Index_Store_Tag_SI	0x0A
+#define Index_Store_Tag_SD	0x0B
+#define Create_Dirty_Excl_SD	0x0f
+#define Hit_Invalidate_SI	0x12
+#define Hit_Invalidate_SD	0x13
+#define Hit_Writeback_Inv_SD	0x17
+#define Hit_Writeback_SD	0x1b
+#define Hit_Set_Virtual_SI	0x1e
+#define Hit_Set_Virtual_SD	0x1f
+
+/*
+ * R5000-specific cacheops
+ */
+#define R5K_Page_Invalidate_S	0x17
+
+/*
+ * RM7000-specific cacheops
+ */
+#define Page_Invalidate_T	0x16
+
+/*
+ * R10000-specific cacheops
+ *
+ * Cacheops 0x02, 0x06, 0x0a, 0x0c-0x0e, 0x16, 0x1a and 0x1e are unused.
+ * Most of the _S cacheops are identical to the R4000SC _SD cacheops.
+ */
+#define Index_Writeback_Inv_S	0x03
+#define Index_Load_Tag_S	0x07
+#define Index_Store_Tag_S	0x0B
+#define Hit_Invalidate_S	0x13
+#define Cache_Barrier		0x14
+#define Hit_Writeback_Inv_S	0x17
+#define Index_Load_Data_I	0x18
+#define Index_Load_Data_D	0x19
+#define Index_Load_Data_S	0x1b
+#define Index_Store_Data_I	0x1c
+#define Index_Store_Data_D	0x1d
+#define Index_Store_Data_S	0x1f
+
+#endif	/* __ASM_CACHEOPS_H */
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/config.h b/target/linux/brcm63xx/image/lzma-loader/src/config.h
new file mode 100644
index 0000000..ce391f8
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/config.h
@@ -0,0 +1,31 @@
+/*
+ * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ */
+
+#ifndef _CONFIG_H_
+#define _CONFIG_H_
+
+#define CONFIG_ICACHE_SIZE	(32 * 1024)
+#define CONFIG_DCACHE_SIZE	(32 * 1024)
+#define CONFIG_CACHELINE_SIZE	16
+
+#ifndef CONFIG_FLASH_OFFS
+#define CONFIG_FLASH_OFFS	0
+#endif
+
+#ifndef CONFIG_FLASH_MAX
+#define CONFIG_FLASH_MAX	0
+#endif
+
+#ifndef CONFIG_FLASH_STEP
+#define CONFIG_FLASH_STEP	0x1000
+#endif
+
+#endif /* _CONFIG_H_ */
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/cp0regdef.h b/target/linux/brcm63xx/image/lzma-loader/src/cp0regdef.h
new file mode 100644
index 0000000..0d824f4
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/cp0regdef.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 1994, 1995, 1996, 1997, 2000, 2001 by Ralf Baechle
+ *
+ * Copyright (C) 2001, Monta Vista Software
+ * Author: jsun@mvista.com or jsun@junsun.net
+ */
+#ifndef _cp0regdef_h_
+#define _cp0regdef_h_
+
+#define CP0_INDEX $0
+#define CP0_RANDOM $1
+#define CP0_ENTRYLO0 $2
+#define CP0_ENTRYLO1 $3
+#define CP0_CONTEXT $4
+#define CP0_PAGEMASK $5
+#define CP0_WIRED $6
+#define CP0_BADVADDR $8
+#define CP0_COUNT $9
+#define CP0_ENTRYHI $10
+#define CP0_COMPARE $11
+#define CP0_STATUS $12
+#define CP0_CAUSE $13
+#define CP0_EPC $14
+#define CP0_PRID $15
+#define CP0_CONFIG $16
+#define CP0_LLADDR $17
+#define CP0_WATCHLO $18
+#define CP0_WATCHHI $19
+#define CP0_XCONTEXT $20
+#define CP0_FRAMEMASK $21
+#define CP0_DIAGNOSTIC $22
+#define CP0_PERFORMANCE $25
+#define CP0_ECC $26
+#define CP0_CACHEERR $27
+#define CP0_TAGLO $28
+#define CP0_TAGHI $29
+#define CP0_ERROREPC $30
+
+#define read_32bit_c0_register(reg,sel)					\
+({	int __res;							\
+	if (sel == 0)							\
+		__asm__ __volatile__(					\
+			"mfc0\t%0, " #reg "\n\t"			\
+			: "=r" (__res));				\
+	else								\
+		__asm__ __volatile__(					\
+			".set\tmips32\n\t"				\
+			"mfc0\t%0, " #reg ", " #sel "\n\t"		\
+			".set mips0\n\t"				\
+			: "=r" (__res));				\
+	__res;								\
+})
+
+#endif
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/head.S b/target/linux/brcm63xx/image/lzma-loader/src/head.S
new file mode 100644
index 0000000..543996a
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/head.S
@@ -0,0 +1,118 @@
+/*
+ * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Some parts of this code was based on the OpenWrt specific lzma-loader
+ * for the BCM47xx and ADM5120 based boards:
+ *	Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
+ *	Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <asm/asm.h>
+#include <asm/regdef.h>
+#include "cp0regdef.h"
+#include "cacheops.h"
+#include "config.h"
+
+#define KSEG0		0x80000000
+
+	.macro	ehb
+	sll     zero, 3
+	.endm
+
+	.text
+
+LEAF(startup)
+	.set noreorder
+	.set mips32
+
+	mtc0	zero, CP0_WATCHLO	# clear watch registers
+	mtc0	zero, CP0_WATCHHI
+	mtc0	zero, CP0_CAUSE		# clear before writing status register
+
+	mfc0	t0, CP0_STATUS
+	li	t1, 0x1000001f
+	or	t0, t1
+	xori	t0, 0x1f
+	mtc0	t0, CP0_STATUS
+	ehb
+
+	mtc0	zero, CP0_COUNT
+	mtc0	zero, CP0_COMPARE
+	ehb
+
+	la	t0, __reloc_label	# get linked address of label
+	bal	__reloc_label		# branch and link to label to
+	nop				# get actual address
+__reloc_label:
+	subu	t0, ra, t0		# get reloc_delta
+
+	beqz	t0, __reloc_done         # if delta is 0 we are in the right place
+	nop
+
+	/* Copy our code to the right place */
+	la	t1, _code_start		# get linked address of _code_start
+	la	t2, _code_end		# get linked address of _code_end
+	addu	t0, t0, t1		# calculate actual address of _code_start
+
+__reloc_copy:
+	lw	t3, 0(t0)
+	sw	t3, 0(t1)
+	add	t1, 4
+	blt	t1, t2, __reloc_copy
+	add	t0, 4
+
+	/* flush cache */
+	la	t0, _code_start
+	la	t1, _code_end
+
+	li	t2, ~(CONFIG_CACHELINE_SIZE - 1)
+	and	t0, t2
+	and	t1, t2
+	li	t2, CONFIG_CACHELINE_SIZE
+
+	b	__flush_check
+	nop
+
+__flush_line:
+	cache	Hit_Writeback_Inv_D, 0(t0)
+	cache	Hit_Invalidate_I, 0(t0)
+	add	t0, t2
+
+__flush_check:
+	bne	t0, t1, __flush_line
+	nop
+
+	sync
+
+__reloc_done:
+
+	/* clear bss */
+	la	t0, _bss_start
+	la	t1, _bss_end
+	b	__bss_check
+	nop
+
+__bss_fill:
+	sw	zero, 0(t0)
+	addi	t0, 4
+
+__bss_check:
+	bne	t0, t1, __bss_fill
+	nop
+
+	/* Setup new "C" stack */
+	la	sp, _stack
+
+	/* jump to the decompressor routine */
+	la	t0, loader_main
+	jr	t0
+	nop
+
+	.set reorder
+END(startup)
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/loader.c b/target/linux/brcm63xx/image/lzma-loader/src/loader.c
new file mode 100644
index 0000000..0848ce6
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/loader.c
@@ -0,0 +1,175 @@
+/*
+ * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Some parts of this code was based on the OpenWrt specific lzma-loader
+ * for the BCM47xx and ADM5120 based boards:
+ *	Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
+ *	Copyright (C) 2005 Mineharu Takahara <mtakahar@yahoo.com>
+ *	Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
+ *
+ * The image_header structure has been taken from the U-Boot project.
+ *	(C) Copyright 2008 Semihalf
+ *	(C) Copyright 2000-2005
+ *	Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "config.h"
+#include "cache.h"
+#include "printf.h"
+#include "LzmaDecode.h"
+
+#define KSEG0			0x80000000
+#define KSEG1			0xa0000000
+
+#define KSEG1ADDR(a)		((((unsigned)(a)) & 0x1fffffffU) | KSEG1)
+
+#undef LZMA_DEBUG
+
+#ifdef LZMA_DEBUG
+#  define DBG(f, a...)	printf(f, ## a)
+#else
+#  define DBG(f, a...)	do {} while (0)
+#endif
+
+/* beyond the image end, size not known in advance */
+extern unsigned char workspace[];
+
+
+extern void board_init(void);
+
+static CLzmaDecoderState lzma_state;
+static unsigned char *lzma_data;
+static unsigned long lzma_datasize;
+static unsigned long lzma_outsize;
+static unsigned long kernel_la;
+
+static void halt(void)
+{
+	printf("\nSystem halted!\n");
+	for(;;);
+}
+
+static __inline__ unsigned char lzma_get_byte(void)
+{
+	unsigned char c;
+
+	lzma_datasize--;
+	c = *lzma_data++;
+
+	return c;
+}
+
+static int lzma_init_props(void)
+{
+	unsigned char props[LZMA_PROPERTIES_SIZE];
+	int res;
+	int i;
+
+	/* read lzma properties */
+	for (i = 0; i < LZMA_PROPERTIES_SIZE; i++)
+		props[i] = lzma_get_byte();
+
+	/* read the lower half of uncompressed size in the header */
+	lzma_outsize = ((SizeT) lzma_get_byte()) +
+		       ((SizeT) lzma_get_byte() << 8) +
+		       ((SizeT) lzma_get_byte() << 16) +
+		       ((SizeT) lzma_get_byte() << 24);
+
+	/* skip rest of the header (upper half of uncompressed size) */
+	for (i = 0; i < 4; i++)
+		lzma_get_byte();
+
+	res = LzmaDecodeProperties(&lzma_state.Properties, props,
+					LZMA_PROPERTIES_SIZE);
+	return res;
+}
+
+static int lzma_decompress(unsigned char *outStream)
+{
+	SizeT ip, op;
+	int ret;
+
+	lzma_state.Probs = (CProb *) workspace;
+
+	ret = LzmaDecode(&lzma_state, lzma_data, lzma_datasize, &ip, outStream,
+			 lzma_outsize, &op);
+
+	if (ret != LZMA_RESULT_OK) {
+		int i;
+
+		DBG("LzmaDecode error %d at %08x, osize:%d ip:%d op:%d\n",
+		    ret, lzma_data + ip, lzma_outsize, ip, op);
+
+		for (i = 0; i < 16; i++)
+			DBG("%02x ", lzma_data[ip + i]);
+
+		DBG("\n");
+	}
+
+	return ret;
+}
+
+static void lzma_init_data(void)
+{
+	extern unsigned char _lzma_data_start[];
+	extern unsigned char _lzma_data_end[];
+
+	kernel_la = LOADADDR;
+	lzma_data = _lzma_data_start;
+	lzma_datasize = _lzma_data_end - _lzma_data_start;
+}
+
+void loader_main(unsigned long reg_a0, unsigned long reg_a1,
+		 unsigned long reg_a2, unsigned long reg_a3)
+{
+	void (*kernel_entry) (unsigned long, unsigned long, unsigned long,
+			      unsigned long);
+	int res;
+
+	board_init();
+
+	printf("\n\nOpenWrt kernel loader for BCM63XX\n");
+	printf("Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>\n");
+	printf("Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>\n");
+
+	lzma_init_data();
+
+	res = lzma_init_props();
+	if (res != LZMA_RESULT_OK) {
+		printf("Incorrect LZMA stream properties!\n");
+		halt();
+	}
+
+	printf("Decompressing kernel... ");
+
+	res = lzma_decompress((unsigned char *) kernel_la);
+	if (res != LZMA_RESULT_OK) {
+		printf("failed, ");
+		switch (res) {
+		case LZMA_RESULT_DATA_ERROR:
+			printf("data error!\n");
+			break;
+		default:
+			printf("unknown error %d!\n", res);
+		}
+		halt();
+	} else {
+		printf("done!\n");
+	}
+
+	flush_cache(kernel_la, lzma_outsize);
+
+	printf("Starting kernel at %08x...\n\n", kernel_la);
+
+	kernel_entry = (void *) kernel_la;
+	kernel_entry(reg_a0, reg_a1, reg_a2, reg_a3);
+}
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/loader.lds b/target/linux/brcm63xx/image/lzma-loader/src/loader.lds
new file mode 100644
index 0000000..01ff852
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/loader.lds
@@ -0,0 +1,34 @@
+OUTPUT_ARCH(mips)
+SECTIONS {
+	.text : {
+		_code_start = .;
+		*(.text)
+		*(.text.*)
+		*(.rodata)
+		*(.rodata.*)
+		*(.data.lzma)
+	}
+
+	. = ALIGN(32);
+	.data : {
+		*(.data)
+		*(.data.*)
+	}
+
+	. = ALIGN(32);
+	_code_end = .;
+
+	_bss_start = .;
+	.bss : {
+		*(.bss)
+		*(.bss.*)
+	}
+
+	. = ALIGN(32);
+	_bss_end = .;
+
+	. = . + 8192;
+	_stack = .;
+
+	workspace = .;
+}
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/loader2.lds b/target/linux/brcm63xx/image/lzma-loader/src/loader2.lds
new file mode 100644
index 0000000..db0bb46
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/loader2.lds
@@ -0,0 +1,10 @@
+OUTPUT_ARCH(mips)
+SECTIONS {
+	.text : {
+		startup = .;
+		*(.text)
+		*(.text.*)
+		*(.data)
+		*(.data.*)
+	}
+}
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/lzma-data.lds b/target/linux/brcm63xx/image/lzma-loader/src/lzma-data.lds
new file mode 100644
index 0000000..abf756b
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/lzma-data.lds
@@ -0,0 +1,8 @@
+OUTPUT_ARCH(mips)
+SECTIONS {
+	.data.lzma : {
+		_lzma_data_start = .;
+		*(.data)
+		_lzma_data_end = .;
+	}
+}
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/printf.c b/target/linux/brcm63xx/image/lzma-loader/src/printf.c
new file mode 100644
index 0000000..7bb5a86
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/printf.c
@@ -0,0 +1,350 @@
+/*
+ * Copyright (C) 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include	"printf.h"
+
+extern void board_putc(int ch);
+
+/* this is the maximum width for a variable */
+#define		LP_MAX_BUF	256
+
+/* macros */
+#define		IsDigit(x)	( ((x) >= '0') && ((x) <= '9') )
+#define		Ctod(x)		( (x) - '0')
+
+/* forward declaration */
+static int PrintChar(char *, char, int, int);
+static int PrintString(char *, char *, int, int);
+static int PrintNum(char *, unsigned long, int, int, int, int, char, int);
+
+/* private variable */
+static const char theFatalMsg[] = "fatal error in lp_Print!";
+
+/* -*-
+ * A low level printf() function.
+ */
+static void
+lp_Print(void (*output)(void *, char *, int),
+	 void * arg,
+	 char *fmt,
+	 va_list ap)
+{
+
+#define 	OUTPUT(arg, s, l)  \
+  { if (((l) < 0) || ((l) > LP_MAX_BUF)) { \
+       (*output)(arg, (char*)theFatalMsg, sizeof(theFatalMsg)-1); for(;;); \
+    } else { \
+      (*output)(arg, s, l); \
+    } \
+  }
+
+    char buf[LP_MAX_BUF];
+
+    char c;
+    char *s;
+    long int num;
+
+    int longFlag;
+    int negFlag;
+    int width;
+    int prec;
+    int ladjust;
+    char padc;
+
+    int length;
+
+    for(;;) {
+	{
+	    /* scan for the next '%' */
+	    char *fmtStart = fmt;
+	    while ( (*fmt != '\0') && (*fmt != '%')) {
+		fmt ++;
+	    }
+
+	    /* flush the string found so far */
+	    OUTPUT(arg, fmtStart, fmt-fmtStart);
+
+	    /* are we hitting the end? */
+	    if (*fmt == '\0') break;
+	}
+
+	/* we found a '%' */
+	fmt ++;
+
+	/* check for long */
+	if (*fmt == 'l') {
+	    longFlag = 1;
+	    fmt ++;
+	} else {
+	    longFlag = 0;
+	}
+
+	/* check for other prefixes */
+	width = 0;
+	prec = -1;
+	ladjust = 0;
+	padc = ' ';
+
+	if (*fmt == '-') {
+	    ladjust = 1;
+	    fmt ++;
+	}
+
+	if (*fmt == '0') {
+	    padc = '0';
+	    fmt++;
+	}
+
+	if (IsDigit(*fmt)) {
+	    while (IsDigit(*fmt)) {
+		width = 10 * width + Ctod(*fmt++);
+	    }
+	}
+
+	if (*fmt == '.') {
+	    fmt ++;
+	    if (IsDigit(*fmt)) {
+		prec = 0;
+		while (IsDigit(*fmt)) {
+		    prec = prec*10 + Ctod(*fmt++);
+		}
+	    }
+	}
+
+
+	/* check format flag */
+	negFlag = 0;
+	switch (*fmt) {
+	 case 'b':
+	    if (longFlag) {
+		num = va_arg(ap, long int);
+	    } else {
+		num = va_arg(ap, int);
+	    }
+	    length = PrintNum(buf, num, 2, 0, width, ladjust, padc, 0);
+	    OUTPUT(arg, buf, length);
+	    break;
+
+	 case 'd':
+	 case 'D':
+	    if (longFlag) {
+		num = va_arg(ap, long int);
+	    } else {
+		num = va_arg(ap, int);
+	    }
+	    if (num < 0) {
+		num = - num;
+		negFlag = 1;
+	    }
+	    length = PrintNum(buf, num, 10, negFlag, width, ladjust, padc, 0);
+	    OUTPUT(arg, buf, length);
+	    break;
+
+	 case 'o':
+	 case 'O':
+	    if (longFlag) {
+		num = va_arg(ap, long int);
+	    } else {
+		num = va_arg(ap, int);
+	    }
+	    length = PrintNum(buf, num, 8, 0, width, ladjust, padc, 0);
+	    OUTPUT(arg, buf, length);
+	    break;
+
+	 case 'u':
+	 case 'U':
+	    if (longFlag) {
+		num = va_arg(ap, long int);
+	    } else {
+		num = va_arg(ap, int);
+	    }
+	    length = PrintNum(buf, num, 10, 0, width, ladjust, padc, 0);
+	    OUTPUT(arg, buf, length);
+	    break;
+
+	 case 'x':
+	    if (longFlag) {
+		num = va_arg(ap, long int);
+	    } else {
+		num = va_arg(ap, int);
+	    }
+	    length = PrintNum(buf, num, 16, 0, width, ladjust, padc, 0);
+	    OUTPUT(arg, buf, length);
+	    break;
+
+	 case 'X':
+	    if (longFlag) {
+		num = va_arg(ap, long int);
+	    } else {
+		num = va_arg(ap, int);
+	    }
+	    length = PrintNum(buf, num, 16, 0, width, ladjust, padc, 1);
+	    OUTPUT(arg, buf, length);
+	    break;
+
+	 case 'c':
+	    c = (char)va_arg(ap, int);
+	    length = PrintChar(buf, c, width, ladjust);
+	    OUTPUT(arg, buf, length);
+	    break;
+
+	 case 's':
+	    s = (char*)va_arg(ap, char *);
+	    length = PrintString(buf, s, width, ladjust);
+	    OUTPUT(arg, buf, length);
+	    break;
+
+	 case '\0':
+	    fmt --;
+	    break;
+
+	 default:
+	    /* output this char as it is */
+	    OUTPUT(arg, fmt, 1);
+	}	/* switch (*fmt) */
+
+	fmt ++;
+    }		/* for(;;) */
+
+    /* special termination call */
+    OUTPUT(arg, "\0", 1);
+}
+
+
+/* --------------- local help functions --------------------- */
+static int
+PrintChar(char * buf, char c, int length, int ladjust)
+{
+    int i;
+
+    if (length < 1) length = 1;
+    if (ladjust) {
+	*buf = c;
+	for (i=1; i< length; i++) buf[i] = ' ';
+    } else {
+	for (i=0; i< length-1; i++) buf[i] = ' ';
+	buf[length - 1] = c;
+    }
+    return length;
+}
+
+static int
+PrintString(char * buf, char* s, int length, int ladjust)
+{
+    int i;
+    int len=0;
+    char* s1 = s;
+    while (*s1++) len++;
+    if (length < len) length = len;
+
+    if (ladjust) {
+	for (i=0; i< len; i++) buf[i] = s[i];
+	for (i=len; i< length; i++) buf[i] = ' ';
+    } else {
+	for (i=0; i< length-len; i++) buf[i] = ' ';
+	for (i=length-len; i < length; i++) buf[i] = s[i-length+len];
+    }
+    return length;
+}
+
+static int
+PrintNum(char * buf, unsigned long u, int base, int negFlag,
+	 int length, int ladjust, char padc, int upcase)
+{
+    /* algorithm :
+     *  1. prints the number from left to right in reverse form.
+     *  2. fill the remaining spaces with padc if length is longer than
+     *     the actual length
+     *     TRICKY : if left adjusted, no "0" padding.
+     *		    if negtive, insert  "0" padding between "0" and number.
+     *  3. if (!ladjust) we reverse the whole string including paddings
+     *  4. otherwise we only reverse the actual string representing the num.
+     */
+
+    int actualLength =0;
+    char *p = buf;
+    int i;
+
+    do {
+	int tmp = u %base;
+	if (tmp <= 9) {
+	    *p++ = '0' + tmp;
+	} else if (upcase) {
+	    *p++ = 'A' + tmp - 10;
+	} else {
+	    *p++ = 'a' + tmp - 10;
+	}
+	u /= base;
+    } while (u != 0);
+
+    if (negFlag) {
+	*p++ = '-';
+    }
+
+    /* figure out actual length and adjust the maximum length */
+    actualLength = p - buf;
+    if (length < actualLength) length = actualLength;
+
+    /* add padding */
+    if (ladjust) {
+	padc = ' ';
+    }
+    if (negFlag && !ladjust && (padc == '0')) {
+	for (i = actualLength-1; i< length-1; i++) buf[i] = padc;
+	buf[length -1] = '-';
+    } else {
+	for (i = actualLength; i< length; i++) buf[i] = padc;
+    }
+
+
+    /* prepare to reverse the string */
+    {
+	int begin = 0;
+	int end;
+	if (ladjust) {
+	    end = actualLength - 1;
+	} else {
+	    end = length -1;
+	}
+
+	while (end > begin) {
+	    char tmp = buf[begin];
+	    buf[begin] = buf[end];
+	    buf[end] = tmp;
+	    begin ++;
+	    end --;
+	}
+    }
+
+    /* adjust the string pointer */
+    return length;
+}
+
+static void printf_output(void *arg, char *s, int l)
+{
+    int i;
+
+    // special termination call
+    if ((l==1) && (s[0] == '\0')) return;
+
+    for (i=0; i< l; i++) {
+	board_putc(s[i]);
+	if (s[i] == '\n') board_putc('\r');
+    }
+}
+
+void printf(char *fmt, ...)
+{
+    va_list ap;
+    va_start(ap, fmt);
+    lp_Print(printf_output, 0, fmt, ap);
+    va_end(ap);
+}
diff --git a/target/linux/brcm63xx/image/lzma-loader/src/printf.h b/target/linux/brcm63xx/image/lzma-loader/src/printf.h
new file mode 100644
index 0000000..9b1c1df
--- /dev/null
+++ b/target/linux/brcm63xx/image/lzma-loader/src/printf.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifndef _printf_h_
+#define _printf_h_
+
+#include <stdarg.h>
+void printf(char *fmt, ...);
+
+#endif /* _printf_h_ */
diff --git a/target/linux/brcm63xx/modules.mk b/target/linux/brcm63xx/modules.mk
new file mode 100644
index 0000000..6f6aa38
--- /dev/null
+++ b/target/linux/brcm63xx/modules.mk
@@ -0,0 +1,38 @@
+#
+# Copyright (C) 2010 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define KernelPackage/pcmcia-bcm63xx
+  SUBMENU:=$(PCMCIA_MENU)
+  TITLE:=Broadcom BCM63xx PCMCIA support
+  DEPENDS:=@TARGET_brcm63xx +kmod-pcmcia-rsrc
+  KCONFIG:=CONFIG_PCMCIA_BCM63XX
+  FILES:=$(LINUX_DIR)/drivers/pcmcia/bcm63xx_pcmcia.ko
+  AUTOLOAD:=$(call AutoLoad,41,bcm63xx_pcmcia)
+endef
+
+define KernelPackage/pcmcia-bcm63xx/description
+  Kernel support for PCMCIA/CardBus controller on the BCM63xx SoC
+endef
+
+$(eval $(call KernelPackage,pcmcia-bcm63xx))
+
+define KernelPackage/bcm63xx-udc
+  SUBMENU:=$(USB_MENU)
+  TITLE:=Broadcom BCM63xx UDC support
+  DEPENDS:=@TARGET_brcm63xx +kmod-usb-gadget
+  KCONFIG:=CONFIG_USB_BCM63XX_UDC
+  FILES:= \
+	$(LINUX_DIR)/drivers/usb/gadget/udc/bcm63xx_udc.ko
+  AUTOLOAD:=$(call AutoLoad,51,bcm63xx_udc)
+  $(call AddDepends/usb)
+endef
+
+define KernelPackage/bcm63xx-udc/description
+  Kernel support for the USB gadget (device) controller on the BCM63xx SoC
+endef
+
+$(eval $(call KernelPackage,bcm63xx-udc))
diff --git a/target/linux/brcm63xx/patches-3.18/001-spi-spi-gpio-Add-dt-support-for-a-single-device-with.patch b/target/linux/brcm63xx/patches-3.18/001-spi-spi-gpio-Add-dt-support-for-a-single-device-with.patch
new file mode 100644
index 0000000..437448f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/001-spi-spi-gpio-Add-dt-support-for-a-single-device-with.patch
@@ -0,0 +1,91 @@
+From d1d81802522ade84128a2c66c0d500e372474dca Mon Sep 17 00:00:00 2001
+From: Torsten Fleischer <torfl6749@gmail.com>
+Date: Mon, 3 Nov 2014 17:17:55 +0100
+Subject: [PATCH] spi: spi-gpio: Add dt support for a single device with no
+ chip select
+
+In order to describe a single slave device that has no chip select line
+the 'num-chipselects' property has to be <0> and the 'cs-gpios' property
+doesn't need to be set.
+
+Signed-off-by: Torsten Fleischer <torfl6749@gmail.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ Documentation/devicetree/bindings/spi/spi-gpio.txt |  6 ++++--
+ drivers/spi/spi-gpio.c                             | 21 +++++++++++++++------
+ 2 files changed, 19 insertions(+), 8 deletions(-)
+
+--- a/Documentation/devicetree/bindings/spi/spi-gpio.txt
++++ b/Documentation/devicetree/bindings/spi/spi-gpio.txt
+@@ -8,8 +8,10 @@ Required properties:
+  - gpio-sck: GPIO spec for the SCK line to use
+  - gpio-miso: GPIO spec for the MISO line to use
+  - gpio-mosi: GPIO spec for the MOSI line to use
+- - cs-gpios: GPIOs to use for chipselect lines
+- - num-chipselects: number of chipselect lines
++ - cs-gpios: GPIOs to use for chipselect lines.
++             Not needed if num-chipselects = <0>.
++ - num-chipselects: Number of chipselect lines. Should be <0> if a single device
++                    with no chip select is connected.
+ 
+ Example:
+ 
+--- a/drivers/spi/spi-gpio.c
++++ b/drivers/spi/spi-gpio.c
+@@ -424,6 +424,7 @@ static int spi_gpio_probe(struct platfor
+ 	struct spi_gpio_platform_data	*pdata;
+ 	u16 master_flags = 0;
+ 	bool use_of = 0;
++	int num_devices;
+ 
+ 	status = spi_gpio_probe_dt(pdev);
+ 	if (status < 0)
+@@ -433,16 +434,21 @@ static int spi_gpio_probe(struct platfor
+ 
+ 	pdata = dev_get_platdata(&pdev->dev);
+ #ifdef GENERIC_BITBANG
+-	if (!pdata || !pdata->num_chipselect)
++	if (!pdata || (!use_of && !pdata->num_chipselect))
+ 		return -ENODEV;
+ #endif
+ 
++	if (use_of && !SPI_N_CHIPSEL)
++		num_devices = 1;
++	else
++		num_devices = SPI_N_CHIPSEL;
++
+ 	status = spi_gpio_request(pdata, dev_name(&pdev->dev), &master_flags);
+ 	if (status < 0)
+ 		return status;
+ 
+ 	master = spi_alloc_master(&pdev->dev, sizeof(*spi_gpio) +
+-					(sizeof(int) * SPI_N_CHIPSEL));
++					(sizeof(int) * num_devices));
+ 	if (!master) {
+ 		status = -ENOMEM;
+ 		goto gpio_free;
+@@ -457,7 +463,7 @@ static int spi_gpio_probe(struct platfor
+ 	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
+ 	master->flags = master_flags;
+ 	master->bus_num = pdev->id;
+-	master->num_chipselect = SPI_N_CHIPSEL;
++	master->num_chipselect = num_devices;
+ 	master->setup = spi_gpio_setup;
+ 	master->cleanup = spi_gpio_cleanup;
+ #ifdef CONFIG_OF
+@@ -472,9 +478,12 @@ static int spi_gpio_probe(struct platfor
+ 		 * property of the node.
+ 		 */
+ 
+-		for (i = 0; i < SPI_N_CHIPSEL; i++)
+-			spi_gpio->cs_gpios[i] =
+-				of_get_named_gpio(np, "cs-gpios", i);
++		if (!SPI_N_CHIPSEL)
++			spi_gpio->cs_gpios[0] = SPI_GPIO_NO_CHIPSELECT;
++		else
++			for (i = 0; i < SPI_N_CHIPSEL; i++)
++				spi_gpio->cs_gpios[i] =
++					of_get_named_gpio(np, "cs-gpios", i);
+ 	}
+ #endif
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/030-MIPS-Always-use-IRQ-domains-for-CPU-IRQs.patch b/target/linux/brcm63xx/patches-3.18/030-MIPS-Always-use-IRQ-domains-for-CPU-IRQs.patch
new file mode 100644
index 0000000..cfa7298
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/030-MIPS-Always-use-IRQ-domains-for-CPU-IRQs.patch
@@ -0,0 +1,98 @@
+From 0f84c305351c993e4307e1e8c128d44760314e31 Mon Sep 17 00:00:00 2001
+From: Andrew Bresticker <abrestic@chromium.org>
+Date: Thu, 18 Sep 2014 14:47:07 -0700
+Subject: [PATCH 1/3] MIPS: Always use IRQ domains for CPU IRQs
+
+Use an IRQ domain for the 8 CPU IRQs in both the DT and non-DT cases.
+
+Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
+Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
+Tested-by: Qais Yousef <qais.yousef@imgtec.com>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: Jason Cooper <jason@lakedaemon.net>
+Cc: Andrew Bresticker <abrestic@chromium.org>
+Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
+Cc: Markos Chandras <markos.chandras@imgtec.com>
+Cc: Paul Burton <paul.burton@imgtec.com>
+Cc: Qais Yousef <qais.yousef@imgtec.com>
+Cc: Jonas Gorski <jogo@openwrt.org>
+Cc: John Crispin <blogic@openwrt.org>
+Cc: David Daney <ddaney.cavm@gmail.com>
+Cc: linux-mips@linux-mips.org
+Cc: linux-kernel@vger.kernel.org
+Patchwork: https://patchwork.linux-mips.org/patch/7799/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+---
+ arch/mips/Kconfig          |    1 +
+ arch/mips/kernel/irq_cpu.c |   36 +++++++++++-------------------------
+ 2 files changed, 12 insertions(+), 25 deletions(-)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -1056,6 +1056,7 @@ config MIPS_HUGE_TLB_SUPPORT
+ 
+ config IRQ_CPU
+ 	bool
++	select IRQ_DOMAIN
+ 
+ config IRQ_CPU_RM7K
+ 	bool
+--- a/arch/mips/kernel/irq_cpu.c
++++ b/arch/mips/kernel/irq_cpu.c
+@@ -98,28 +98,6 @@ static struct irq_chip mips_mt_cpu_irq_c
+ 	.irq_enable	= unmask_mips_irq,
+ };
+ 
+-void __init mips_cpu_irq_init(void)
+-{
+-	int irq_base = MIPS_CPU_IRQ_BASE;
+-	int i;
+-
+-	/* Mask interrupts. */
+-	clear_c0_status(ST0_IM);
+-	clear_c0_cause(CAUSEF_IP);
+-
+-	/* Software interrupts are used for MT/CMT IPI */
+-	for (i = irq_base; i < irq_base + 2; i++)
+-		irq_set_chip_and_handler(i, cpu_has_mipsmt ?
+-					 &mips_mt_cpu_irq_controller :
+-					 &mips_cpu_irq_controller,
+-					 handle_percpu_irq);
+-
+-	for (i = irq_base + 2; i < irq_base + 8; i++)
+-		irq_set_chip_and_handler(i, &mips_cpu_irq_controller,
+-					 handle_percpu_irq);
+-}
+-
+-#ifdef CONFIG_IRQ_DOMAIN
+ static int mips_cpu_intc_map(struct irq_domain *d, unsigned int irq,
+ 			     irq_hw_number_t hw)
+ {
+@@ -142,8 +120,7 @@ static const struct irq_domain_ops mips_
+ 	.xlate = irq_domain_xlate_onecell,
+ };
+ 
+-int __init mips_cpu_intc_init(struct device_node *of_node,
+-			      struct device_node *parent)
++static void __init __mips_cpu_irq_init(struct device_node *of_node)
+ {
+ 	struct irq_domain *domain;
+ 
+@@ -155,7 +132,16 @@ int __init mips_cpu_intc_init(struct dev
+ 				       &mips_cpu_intc_irq_domain_ops, NULL);
+ 	if (!domain)
+ 		panic("Failed to add irqdomain for MIPS CPU");
++}
+ 
++void __init mips_cpu_irq_init(void)
++{
++	__mips_cpu_irq_init(NULL);
++}
++
++int __init mips_cpu_intc_init(struct device_node *of_node,
++			      struct device_node *parent)
++{
++	__mips_cpu_irq_init(of_node);
+ 	return 0;
+ }
+-#endif /* CONFIG_IRQ_DOMAIN */
diff --git a/target/linux/brcm63xx/patches-3.18/031-MIPS-Rename-mips_cpu_intc_init-mips_cpu_irq_of_init.patch b/target/linux/brcm63xx/patches-3.18/031-MIPS-Rename-mips_cpu_intc_init-mips_cpu_irq_of_init.patch
new file mode 100644
index 0000000..141644f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/031-MIPS-Rename-mips_cpu_intc_init-mips_cpu_irq_of_init.patch
@@ -0,0 +1,89 @@
+From afe8dc254711b72ba8144295f4a8fcc66d30572d Mon Sep 17 00:00:00 2001
+From: Andrew Bresticker <abrestic@chromium.org>
+Date: Thu, 18 Sep 2014 14:47:08 -0700
+Subject: [PATCH 2/3] MIPS: Rename mips_cpu_intc_init() ->
+ mips_cpu_irq_of_init()
+
+mips_cpu_intc_init() is used for DT-based initialization of the CPU
+IRQ domain.  Give it a more appropriate name.
+
+Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
+Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
+Tested-by: Qais Yousef <qais.yousef@imgtec.com>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: Jason Cooper <jason@lakedaemon.net>
+Cc: Andrew Bresticker <abrestic@chromium.org>
+Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
+Cc: Markos Chandras <markos.chandras@imgtec.com>
+Cc: Paul Burton <paul.burton@imgtec.com>
+Cc: Qais Yousef <qais.yousef@imgtec.com>
+Cc: Jonas Gorski <jogo@openwrt.org>
+Cc: John Crispin <blogic@openwrt.org>
+Cc: David Daney <ddaney.cavm@gmail.com>
+Cc: linux-mips@linux-mips.org
+Cc: linux-kernel@vger.kernel.org
+Patchwork: https://patchwork.linux-mips.org/patch/7800/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+---
+ Documentation/devicetree/bindings/mips/cpu_irq.txt |    4 ++--
+ arch/mips/include/asm/irq_cpu.h                    |    4 ++--
+ arch/mips/kernel/irq_cpu.c                         |    4 ++--
+ arch/mips/ralink/irq.c                             |    2 +-
+ 4 files changed, 7 insertions(+), 7 deletions(-)
+
+--- a/Documentation/devicetree/bindings/mips/cpu_irq.txt
++++ b/Documentation/devicetree/bindings/mips/cpu_irq.txt
+@@ -1,6 +1,6 @@
+ MIPS CPU interrupt controller
+ 
+-On MIPS the mips_cpu_intc_init() helper can be used to initialize the 8 CPU
++On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU
+ IRQs from a devicetree file and create a irq_domain for IRQ controller.
+ 
+ With the irq_domain in place we can describe how the 8 IRQs are wired to the
+@@ -36,7 +36,7 @@ Example devicetree:
+ 
+ Example platform irq.c:
+ static struct of_device_id __initdata of_irq_ids[] = {
+-	{ .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_intc_init },
++	{ .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init },
+ 	{ .compatible = "ralink,rt2880-intc", .data = intc_of_init },
+ 	{},
+ };
+--- a/arch/mips/include/asm/irq_cpu.h
++++ b/arch/mips/include/asm/irq_cpu.h
+@@ -19,8 +19,8 @@ extern void rm9k_cpu_irq_init(void);
+ 
+ #ifdef CONFIG_IRQ_DOMAIN
+ struct device_node;
+-extern int mips_cpu_intc_init(struct device_node *of_node,
+-			      struct device_node *parent);
++extern int mips_cpu_irq_of_init(struct device_node *of_node,
++				struct device_node *parent);
+ #endif
+ 
+ #endif /* _ASM_IRQ_CPU_H */
+--- a/arch/mips/kernel/irq_cpu.c
++++ b/arch/mips/kernel/irq_cpu.c
+@@ -139,8 +139,8 @@ void __init mips_cpu_irq_init(void)
+ 	__mips_cpu_irq_init(NULL);
+ }
+ 
+-int __init mips_cpu_intc_init(struct device_node *of_node,
+-			      struct device_node *parent)
++int __init mips_cpu_irq_of_init(struct device_node *of_node,
++				struct device_node *parent)
+ {
+ 	__mips_cpu_irq_init(of_node);
+ 	return 0;
+--- a/arch/mips/ralink/irq.c
++++ b/arch/mips/ralink/irq.c
+@@ -173,7 +173,7 @@ static int __init intc_of_init(struct de
+ }
+ 
+ static struct of_device_id __initdata of_irq_ids[] = {
+-	{ .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_intc_init },
++	{ .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init },
+ 	{ .compatible = "ralink,rt2880-intc", .data = intc_of_init },
+ 	{},
+ };
diff --git a/target/linux/brcm63xx/patches-3.18/032-MIPS-Provide-a-generic-plat_irq_dispatch.patch b/target/linux/brcm63xx/patches-3.18/032-MIPS-Provide-a-generic-plat_irq_dispatch.patch
new file mode 100644
index 0000000..8f5bd31
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/032-MIPS-Provide-a-generic-plat_irq_dispatch.patch
@@ -0,0 +1,58 @@
+From 85f7cdacbb81db8c4cc8e474837eab1f0e4ff77b Mon Sep 17 00:00:00 2001
+From: Andrew Bresticker <abrestic@chromium.org>
+Date: Thu, 18 Sep 2014 14:47:09 -0700
+Subject: [PATCH 3/3] MIPS: Provide a generic plat_irq_dispatch
+
+For platforms which boot with device-tree or have correctly chained
+all external interrupt controllers, a generic plat_irq_dispatch() can
+be used.  Implement a plat_irq_dispatch() which simply handles all the
+pending interrupts as reported by C0_Cause.
+
+Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
+Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
+Tested-by: Qais Yousef <qais.yousef@imgtec.com>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: Jason Cooper <jason@lakedaemon.net>
+Cc: Andrew Bresticker <abrestic@chromium.org>
+Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
+Cc: Markos Chandras <markos.chandras@imgtec.com>
+Cc: Paul Burton <paul.burton@imgtec.com>
+Cc: Qais Yousef <qais.yousef@imgtec.com>
+Cc: Jonas Gorski <jogo@openwrt.org>
+Cc: John Crispin <blogic@openwrt.org>
+Cc: David Daney <ddaney.cavm@gmail.com>
+Cc: linux-mips@linux-mips.org
+Cc: linux-kernel@vger.kernel.org
+Patchwork: https://patchwork.linux-mips.org/patch/7801/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+---
+ arch/mips/kernel/irq_cpu.c |   18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+--- a/arch/mips/kernel/irq_cpu.c
++++ b/arch/mips/kernel/irq_cpu.c
+@@ -98,6 +98,24 @@ static struct irq_chip mips_mt_cpu_irq_c
+ 	.irq_enable	= unmask_mips_irq,
+ };
+ 
++asmlinkage void __weak plat_irq_dispatch(void)
++{
++	unsigned long pending = read_c0_cause() & read_c0_status() & ST0_IM;
++	int irq;
++
++	if (!pending) {
++		spurious_interrupt();
++		return;
++	}
++
++	pending >>= CAUSEB_IP;
++	while (pending) {
++		irq = fls(pending) - 1;
++		do_IRQ(MIPS_CPU_IRQ_BASE + irq);
++		pending &= ~BIT(irq);
++	}
++}
++
+ static int mips_cpu_intc_map(struct irq_domain *d, unsigned int irq,
+ 			     irq_hw_number_t hw)
+ {
diff --git a/target/linux/brcm63xx/patches-3.18/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch b/target/linux/brcm63xx/patches-3.18/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch
new file mode 100644
index 0000000..63d385b
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch
@@ -0,0 +1,28 @@
+From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:19 +0100
+Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay
+
+Knowledge of the clock setup delay should remain at the clock level (so
+it can be clock specific and CPU specific). Add the 100 milliseconds
+required clock delay for the USB host clock when it gets enabled.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/clk.c |    5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -177,6 +177,11 @@ static void usbh_set(struct clk *clk, in
+ 		bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
+ 	else if (BCMCPU_IS_6368())
+ 		bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
++	else
++		return;
++
++	if (enable)
++		msleep(100);
+ }
+ 
+ static struct clk clk_usbh = {
diff --git a/target/linux/brcm63xx/patches-3.18/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch b/target/linux/brcm63xx/patches-3.18/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch
new file mode 100644
index 0000000..5b2c03f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch
@@ -0,0 +1,41 @@
+From 8e9bf528a122741f0171b89c297b63041116d704 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:20 +0100
+Subject: [PATCH 02/11] MIPS: BCM63XX: add USB device clock enable delay to
+ clock code
+
+This patch adds the required 10 micro seconds delay to the USB device
+clock enable operation. Put this where the correct clock knowledege is,
+which is in the clock code, and remove this delay from the bcm63xx_udc
+gadget driver where it was before.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/clk.c          |    5 +++++
+ drivers/usb/gadget/bcm63xx_udc.c |    1 -
+ 2 files changed, 5 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -199,6 +199,11 @@ static void usbd_set(struct clk *clk, in
+ 		bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
+ 	else if (BCMCPU_IS_6368())
+ 		bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
++	else
++		return;
++
++	if (enable)
++		udelay(10);
+ }
+ 
+ static struct clk clk_usbd = {
+--- a/drivers/usb/gadget/udc/bcm63xx_udc.c
++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
+@@ -391,7 +391,6 @@ static inline void set_clocks(struct bcm
+ 	if (is_enabled) {
+ 		clk_enable(udc->usbh_clk);
+ 		clk_enable(udc->usbd_clk);
+-		udelay(10);
+ 	} else {
+ 		clk_disable(udc->usbd_clk);
+ 		clk_disable(udc->usbh_clk);
diff --git a/target/linux/brcm63xx/patches-3.18/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch b/target/linux/brcm63xx/patches-3.18/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch
new file mode 100644
index 0000000..5d106f8
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch
@@ -0,0 +1,151 @@
+From ac9b0b574d54be28b300bf99ffe092a2c589484f Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:21 +0100
+Subject: [PATCH 03/11] MIPS: BCM63XX: move code touching the USB private
+ register
+
+This patch moves the code touching the USB private register in the
+bcm63xx USB gadget driver to arch/mips/bcm63xx/usb-common.c in
+preparation for adding support for OHCI and EHCI host controllers which
+will also touch the USB private register.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile                         |    2 +-
+ arch/mips/bcm63xx/usb-common.c                     |   53 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h    |    9 ++++
+ drivers/usb/gadget/bcm63xx_udc.c                   |   27 ++--------
+ 4 files changed, 67 insertions(+), 24 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/usb-common.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,7 +1,7 @@
+ obj-y		+= clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
+ 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
+-		   dev-wdt.o dev-usb-usbd.o
++		   dev-wdt.o dev-usb-usbd.o usb-common.o
+ obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+ 
+ obj-y		+= boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -0,0 +1,53 @@
++/*
++ * Broadcom BCM63xx common USB device configuration code
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
++ * Copyright (C) 2012 Broadcom Corporation
++ *
++ */
++#include <linux/export.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_usb_priv.h>
++
++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
++{
++	u32 val;
++
++	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
++	if (is_device) {
++		val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
++		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++	} else {
++		val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
++		val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++	}
++	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++
++	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++	if (is_device)
++		val |= USBH_PRIV_SWAP_USBD_MASK;
++	else
++		val &= ~USBH_PRIV_SWAP_USBD_MASK;
++	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
++}
++EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
++
++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
++{
++	u32 val;
++
++	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
++	if (is_on)
++		val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++	else
++		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++}
++EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
+@@ -0,0 +1,9 @@
++#ifndef BCM63XX_USB_PRIV_H_
++#define BCM63XX_USB_PRIV_H_
++
++#include <linux/types.h>
++
++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
++
++#endif /* BCM63XX_USB_PRIV_H_ */
+--- a/drivers/usb/gadget/udc/bcm63xx_udc.c
++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
+@@ -40,6 +40,7 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_regs.h>
++#include <bcm63xx_usb_priv.h>
+ 
+ #define DRV_MODULE_NAME		"bcm63xx_udc"
+ 
+@@ -868,22 +869,7 @@ static void bcm63xx_select_phy_mode(stru
+ 		bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG);
+ 	}
+ 
+-	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+-	if (is_device) {
+-		val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
+-		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+-	} else {
+-		val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
+-		val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+-	}
+-	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
+-
+-	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
+-	if (is_device)
+-		val |= USBH_PRIV_SWAP_USBD_MASK;
+-	else
+-		val &= ~USBH_PRIV_SWAP_USBD_MASK;
+-	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
++	bcm63xx_usb_priv_select_phy_mode(portmask, is_device);
+ }
+ 
+ /**
+@@ -897,14 +883,9 @@ static void bcm63xx_select_phy_mode(stru
+  */
+ static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on)
+ {
+-	u32 val, portmask = BIT(udc->pd->port_no);
++	u32 portmask = BIT(udc->pd->port_no);
+ 
+-	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+-	if (is_on)
+-		val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+-	else
+-		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+-	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++	bcm63xx_usb_priv_select_pullup(portmask, is_on);
+ }
+ 
+ /**
diff --git a/target/linux/brcm63xx/patches-3.18/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch b/target/linux/brcm63xx/patches-3.18/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch
new file mode 100644
index 0000000..40bbe08
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch
@@ -0,0 +1,169 @@
+From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:22 +0100
+Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to
+ common USB code
+
+This patch updates the common USB code touching the USB private
+registers with the specific bits to properly enable OHCI and EHCI
+controllers on BCM63xx SoCs. As a result we now need to protect access
+to Read Modify Write sequences using a spinlock because we cannot
+guarantee that any of the exposed helper will not be called
+concurrently.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/usb-common.c                     |   97 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h    |    2 +
+ 2 files changed, 99 insertions(+)
+
+--- a/arch/mips/bcm63xx/usb-common.c
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -5,10 +5,12 @@
+  * License.  See the file "COPYING" in the main directory of this archive
+  * for more details.
+  *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+  * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
+  * Copyright (C) 2012 Broadcom Corporation
+  *
+  */
++#include <linux/spinlock.h>
+ #include <linux/export.h>
+ 
+ #include <bcm63xx_cpu.h>
+@@ -16,9 +18,14 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_usb_priv.h>
+ 
++static DEFINE_SPINLOCK(usb_priv_reg_lock);
++
+ void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
+ {
+ 	u32 val;
++	unsigned long flags;
++
++	spin_lock_irqsave(&usb_priv_reg_lock, flags);
+ 
+ 	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+ 	if (is_device) {
+@@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3
+ 	else
+ 		val &= ~USBH_PRIV_SWAP_USBD_MASK;
+ 	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
++
++	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+ }
+ EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
+ 
+ void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
+ {
+ 	u32 val;
++	unsigned long flags;
++
++	spin_lock_irqsave(&usb_priv_reg_lock, flags);
+ 
+ 	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+ 	if (is_on)
+@@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32
+ 	else
+ 		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+ 	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++
++	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+ }
+ EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
++
++/* The following array represents the meaning of the DESC/DATA
++ * endian swapping with respect to the CPU configured endianness
++ *
++ * DATA	ENDN	mmio	descriptor
++ * 0	0	BE	invalid
++ * 0	1	BE	LE
++ * 1	0	BE	BE
++ * 1	1	BE	invalid
++ *
++ * Since BCM63XX SoCs are configured to be in big-endian mode
++ * we want configuration at line 3.
++ */
++void bcm63xx_usb_priv_ohci_cfg_set(void)
++{
++	u32 reg;
++	unsigned long flags;
++
++	spin_lock_irqsave(&usb_priv_reg_lock, flags);
++
++	if (BCMCPU_IS_6348())
++		bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG);
++	else if (BCMCPU_IS_6358()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
++		reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
++		/*
++		 * The magic value comes for the original vendor BSP
++		 * and is needed for USB to work. Datasheet does not
++		 * help, so the magic value is used as-is.
++		 */
++		bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
++				USBH_PRIV_TEST_6358_REG);
++
++	} else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++		reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++		reg |= USBH_PRIV_SETUP_IOC_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++	}
++
++	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
++}
++
++void bcm63xx_usb_priv_ehci_cfg_set(void)
++{
++	u32 reg;
++	unsigned long flags;
++
++	spin_lock_irqsave(&usb_priv_reg_lock, flags);
++
++	if (BCMCPU_IS_6358()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
++		reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
++
++		/*
++		 * The magic value comes for the original vendor BSP
++		 * and is needed for USB to work. Datasheet does not
++		 * help, so the magic value is used as-is.
++		 */
++		bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
++				USBH_PRIV_TEST_6358_REG);
++
++	} else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++		reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++		reg |= USBH_PRIV_SETUP_IOC_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++	}
++
++	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
+@@ -5,5 +5,7 @@
+ 
+ void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
+ void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
++void bcm63xx_usb_priv_ohci_cfg_set(void);
++void bcm63xx_usb_priv_ehci_cfg_set(void);
+ 
+ #endif /* BCM63XX_USB_PRIV_H_ */
diff --git a/target/linux/brcm63xx/patches-3.18/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch b/target/linux/brcm63xx/patches-3.18/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch
new file mode 100644
index 0000000..768dcca
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch
@@ -0,0 +1,62 @@
+From 94ec618bd1a6b07fafbbfc9bcc54e7f9360ff9a0 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:23 +0100
+Subject: [PATCH 05/11] MIPS: BCM63XX: introduce BCM63XX_OHCI configuration
+ symbol
+
+This configuration symbol can be used by CPUs supporting the on-chip
+OHCI controller, and ensures that all relevant OHCI-related
+configuration options are correctly selected. So far, OHCI support is
+available for the 6328, 6348, 6358 and 6358 SoCs.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Kconfig |   15 ++++++++++-----
+ 1 file changed, 10 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -6,10 +6,17 @@ config BCM63XX_CPU_3368
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
+ 
++config BCM63XX_OHCI
++	bool
++	select USB_ARCH_HAS_OHCI
++	select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
++	select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
++
+ config BCM63XX_CPU_6328
+ 	bool "support 6328 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
+ 
+ config BCM63XX_CPU_6338
+ 	bool "support 6338 CPU"
+@@ -24,21 +31,25 @@ config BCM63XX_CPU_6348
+ 	bool "support 6348 CPU"
+ 	select SYS_HAS_CPU_BMIPS32_3300
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
+ 
+ config BCM63XX_CPU_6358
+ 	bool "support 6358 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
+ 
+ config BCM63XX_CPU_6362
+ 	bool "support 6362 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
+ 
+ config BCM63XX_CPU_6368
+ 	bool "support 6368 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
+ endmenu
+ 
+ source "arch/mips/bcm63xx/boards/Kconfig"
diff --git a/target/linux/brcm63xx/patches-3.18/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch b/target/linux/brcm63xx/patches-3.18/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch
new file mode 100644
index 0000000..111d481
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch
@@ -0,0 +1,138 @@
+From 30d22baef255c99a12c4858ce4ab0d45f0d8c9ae Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:24 +0100
+Subject: [PATCH 06/11] MIPS: BCM63XX: add support for the on-chip OHCI
+ controller
+
+Broadcom BCM63XX SoCs include an on-chip OHCI controller which can be
+driven by the ohci-platform generic driver by using specific power
+on/off/suspend callback to manage clocks and hardware specific
+configuration.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile                         |    2 +-
+ arch/mips/bcm63xx/dev-usb-ohci.c                   |   94 ++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h        |    6 ++
+ 3 files changed, 101 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,7 +1,7 @@
+ obj-y		+= clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
+ 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
+-		   dev-wdt.o dev-usb-usbd.o usb-common.o
++		   dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
+ obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+ 
+ obj-y		+= boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/dev-usb-ohci.c
+@@ -0,0 +1,94 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/usb/ohci_pdriver.h>
++#include <linux/dma-mapping.h>
++#include <linux/clk.h>
++#include <linux/delay.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_usb_priv.h>
++#include <bcm63xx_dev_usb_ohci.h>
++
++static struct resource ohci_resources[] = {
++	{
++		.start		= -1, /* filled at runtime */
++		.end		= -1, /* filled at runtime */
++		.flags		= IORESOURCE_MEM,
++	},
++	{
++		.start		= -1, /* filled at runtime */
++		.flags		= IORESOURCE_IRQ,
++	},
++};
++
++static u64 ohci_dmamask = DMA_BIT_MASK(32);
++
++static struct clk *usb_host_clock;
++
++static int bcm63xx_ohci_power_on(struct platform_device *pdev)
++{
++	usb_host_clock = clk_get(&pdev->dev, "usbh");
++	if (IS_ERR_OR_NULL(usb_host_clock))
++		return -ENODEV;
++
++	clk_prepare_enable(usb_host_clock);
++
++	bcm63xx_usb_priv_ohci_cfg_set();
++
++	return 0;
++}
++
++static void bcm63xx_ohci_power_off(struct platform_device *pdev)
++{
++	if (!IS_ERR_OR_NULL(usb_host_clock)) {
++		clk_disable_unprepare(usb_host_clock);
++		clk_put(usb_host_clock);
++	}
++}
++
++static struct usb_ohci_pdata bcm63xx_ohci_pdata = {
++	.big_endian_desc	= 1,
++	.big_endian_mmio	= 1,
++	.no_big_frame_no	= 1,
++	.num_ports		= 1,
++	.power_on		= bcm63xx_ohci_power_on,
++	.power_off		= bcm63xx_ohci_power_off,
++	.power_suspend		= bcm63xx_ohci_power_off,
++};
++
++static struct platform_device bcm63xx_ohci_device = {
++	.name		= "ohci-platform",
++	.id		= -1,
++	.num_resources	= ARRAY_SIZE(ohci_resources),
++	.resource	= ohci_resources,
++	.dev		= {
++		.platform_data		= &bcm63xx_ohci_pdata,
++		.dma_mask		= &ohci_dmamask,
++		.coherent_dma_mask	= DMA_BIT_MASK(32),
++	},
++};
++
++int __init bcm63xx_ohci_register(void)
++{
++	if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
++		return -ENODEV;
++
++	ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
++	ohci_resources[0].end = ohci_resources[0].start;
++	ohci_resources[0].end += RSET_OHCI_SIZE - 1;
++	ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0);
++
++	return platform_device_register(&bcm63xx_ohci_device);
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+@@ -0,0 +1,6 @@
++#ifndef BCM63XX_DEV_USB_OHCI_H_
++#define BCM63XX_DEV_USB_OHCI_H_
++
++int bcm63xx_ohci_register(void);
++
++#endif /* BCM63XX_DEV_USB_OHCI_H_ */
diff --git a/target/linux/brcm63xx/patches-3.18/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-3.18/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch
new file mode 100644
index 0000000..2c26482
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch
@@ -0,0 +1,36 @@
+From 33ef960aed15f9a98a2c51d8d794cd72418e0be4 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:25 +0100
+Subject: [PATCH 07/11] MIPS: BCM63XX: register OHCI controller if board
+ enables it
+
+BCM63XX-based boards can control the registration of the OHCI controller
+by setting their has_ohci0 flag to 1. Handle this in the generic
+code dealing with board registration and call the actual helper to
+register the OHCI controller.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |    4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -26,6 +26,7 @@
+ #include <bcm63xx_dev_hsspi.h>
+ #include <bcm63xx_dev_pcmcia.h>
+ #include <bcm63xx_dev_spi.h>
++#include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+ 
+@@ -898,6 +899,9 @@ int __init board_register_devices(void)
+ 	if (board.has_usbd)
+ 		bcm63xx_usbd_register(&board.usbd);
+ 
++	if (board.has_ohci0)
++		bcm63xx_ohci_register();
++
+ 	if (board.has_dsp)
+ 		bcm63xx_dsp_register(&board.dsp);
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch b/target/linux/brcm63xx/patches-3.18/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch
new file mode 100644
index 0000000..bce91e3
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch
@@ -0,0 +1,62 @@
+From 00da1683364e58c6430a4577123d01037f8faddc Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:26 +0100
+Subject: [PATCH 08/11] MIPS: BCM63XX: introduce BCM63XX_EHCI configuration
+ symbol
+
+This configuration symbol can be used by CPUs supporting the on-chip
+EHCI controller, and ensures that all relevant EHCI-related
+configuration options are selected. So far BCM6328, BCM6358 and BCM6368
+have an EHCI controller and do select this symbol. Update
+drivers/usb/host/Kconfig with BCM63XX to update direct unmet
+dependencies.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Kconfig |    9 +++++++++
+ drivers/usb/host/Kconfig  |    5 +++--
+ 2 files changed, 12 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -12,11 +12,18 @@ config BCM63XX_OHCI
+ 	select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
+ 	select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
+ 
++config BCM63XX_EHCI
++	bool
++	select USB_ARCH_HAS_EHCI
++	select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
++	select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
++
+ config BCM63XX_CPU_6328
+ 	bool "support 6328 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
+ 	select BCM63XX_OHCI
++	select BCM63XX_EHCI
+ 
+ config BCM63XX_CPU_6338
+ 	bool "support 6338 CPU"
+@@ -38,18 +45,21 @@ config BCM63XX_CPU_6358
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
+ 	select BCM63XX_OHCI
++	select BCM63XX_EHCI
+ 
+ config BCM63XX_CPU_6362
+ 	bool "support 6362 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
+ 	select BCM63XX_OHCI
++	select BCM63XX_EHCI
+ 
+ config BCM63XX_CPU_6368
+ 	bool "support 6368 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
+ 	select BCM63XX_OHCI
++	select BCM63XX_EHCI
+ endmenu
+ 
+ source "arch/mips/bcm63xx/boards/Kconfig"
diff --git a/target/linux/brcm63xx/patches-3.18/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch b/target/linux/brcm63xx/patches-3.18/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch
new file mode 100644
index 0000000..8b1f8d2
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch
@@ -0,0 +1,137 @@
+From e38f13bd6408769c0b565bb1079024f496eee121 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:27 +0100
+Subject: [PATCH 09/11] MIPS: BCM63XX: add support for the on-chip EHCI
+ controller
+
+Broadcom BCM63XX SoCs include an on-chip EHCI controller which can be
+driven by the generic ehci-platform driver by using specific power
+on/off/suspend callbacks to manage clocks and hardware specific
+configuration.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile                         |    2 +-
+ arch/mips/bcm63xx/dev-usb-ehci.c                   |   92 ++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h        |    6 ++
+ 3 files changed, 99 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,7 +1,8 @@
+ obj-y		+= clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
+ 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
+-		   dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
++		   dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
++		   usb-common.o
+ obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+ 
+ obj-y		+= boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -0,0 +1,92 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/usb/ehci_pdriver.h>
++#include <linux/dma-mapping.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_usb_priv.h>
++#include <bcm63xx_dev_usb_ehci.h>
++
++static struct resource ehci_resources[] = {
++	{
++		.start		= -1, /* filled at runtime */
++		.end		= -1, /* filled at runtime */
++		.flags		= IORESOURCE_MEM,
++	},
++	{
++		.start		= -1, /* filled at runtime */
++		.flags		= IORESOURCE_IRQ,
++	},
++};
++
++static u64 ehci_dmamask = DMA_BIT_MASK(32);
++
++static struct clk *usb_host_clock;
++
++static int bcm63xx_ehci_power_on(struct platform_device *pdev)
++{
++	usb_host_clock = clk_get(&pdev->dev, "usbh");
++	if (IS_ERR_OR_NULL(usb_host_clock))
++		return -ENODEV;
++
++	clk_prepare_enable(usb_host_clock);
++
++	bcm63xx_usb_priv_ehci_cfg_set();
++
++	return 0;
++}
++
++static void bcm63xx_ehci_power_off(struct platform_device *pdev)
++{
++	if (!IS_ERR_OR_NULL(usb_host_clock)) {
++		clk_disable_unprepare(usb_host_clock);
++		clk_put(usb_host_clock);
++	}
++}
++
++static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
++	.big_endian_desc	= 1,
++	.big_endian_mmio	= 1,
++	.power_on		= bcm63xx_ehci_power_on,
++	.power_off		= bcm63xx_ehci_power_off,
++	.power_suspend		= bcm63xx_ehci_power_off,
++};
++
++static struct platform_device bcm63xx_ehci_device = {
++	.name		= "ehci-platform",
++	.id		= -1,
++	.num_resources	= ARRAY_SIZE(ehci_resources),
++	.resource	= ehci_resources,
++	.dev		= {
++		.platform_data		= &bcm63xx_ehci_pdata,
++		.dma_mask		= &ehci_dmamask,
++		.coherent_dma_mask	= DMA_BIT_MASK(32),
++	},
++};
++
++int __init bcm63xx_ehci_register(void)
++{
++	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++		return 0;
++
++	ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
++	ehci_resources[0].end = ehci_resources[0].start;
++	ehci_resources[0].end += RSET_EHCI_SIZE - 1;
++	ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0);
++
++	return platform_device_register(&bcm63xx_ehci_device);
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+@@ -0,0 +1,6 @@
++#ifndef BCM63XX_DEV_USB_EHCI_H_
++#define BCM63XX_DEV_USB_EHCI_H_
++
++int bcm63xx_ehci_register(void);
++
++#endif /* BCM63XX_DEV_USB_EHCI_H_ */
diff --git a/target/linux/brcm63xx/patches-3.18/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-3.18/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch
new file mode 100644
index 0000000..641a57c
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch
@@ -0,0 +1,36 @@
+From 709ef2034f5ba06da35f89856ad7baf2b7a41287 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:28 +0100
+Subject: [PATCH 10/11] MIPS: BCM63XX: register EHCI controller if board
+ enables it
+
+BCM63XX-based board can control the registration of the EHCI controller
+by setting their has_ehci0 flag to 1. Handle this in the generic
+code dealing with board registration and call the actual helper to register
+the EHCI controller.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |    4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -26,6 +26,7 @@
+ #include <bcm63xx_dev_hsspi.h>
+ #include <bcm63xx_dev_pcmcia.h>
+ #include <bcm63xx_dev_spi.h>
++#include <bcm63xx_dev_usb_ehci.h>
+ #include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+@@ -899,6 +900,9 @@ int __init board_register_devices(void)
+ 	if (board.has_usbd)
+ 		bcm63xx_usbd_register(&board.usbd);
+ 
++	if (board.has_ehci0)
++		bcm63xx_ehci_register();
++
+ 	if (board.has_ohci0)
+ 		bcm63xx_ohci_register();
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch b/target/linux/brcm63xx/patches-3.18/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch
new file mode 100644
index 0000000..6d91129
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch
@@ -0,0 +1,24 @@
+From 111bbd770441ab34f9da5bb1d85767a9b75227b4 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:30 +0100
+Subject: [PATCH 12/12] MIPS: BCM63XX: EHCI controller does not support
+ overcurrent
+
+This patch sets the ignore_oc flag for the BCM63XX EHCI controller as it
+does not support proper overcurrent reporting.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-usb-ehci.c |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -61,6 +61,7 @@ static void bcm63xx_ehci_power_off(struc
+ static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
+ 	.big_endian_desc	= 1,
+ 	.big_endian_mmio	= 1,
++	.ignore_oc		= 1,
+ 	.power_on		= bcm63xx_ehci_power_on,
+ 	.power_off		= bcm63xx_ehci_power_off,
+ 	.power_suspend		= bcm63xx_ehci_power_off,
diff --git a/target/linux/brcm63xx/patches-3.18/201-SPI-Allow-specifying-the-parsers-for-SPI-flash.patch b/target/linux/brcm63xx/patches-3.18/201-SPI-Allow-specifying-the-parsers-for-SPI-flash.patch
new file mode 100644
index 0000000..00dc9c9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/201-SPI-Allow-specifying-the-parsers-for-SPI-flash.patch
@@ -0,0 +1,38 @@
+From 3f650fc30aa0badf9d02842ce396cea3eef2eeaa Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 1 Jul 2011 23:16:47 +0200
+Subject: [PATCH 49/79] SPI: Allow specifying the parsers for SPI flash
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ include/linux/spi/flash.h |    5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/include/linux/spi/flash.h
++++ b/include/linux/spi/flash.h
+@@ -2,7 +2,7 @@
+ #define LINUX_SPI_FLASH_H
+ 
+ struct mtd_partition;
+-
++struct mtd_part_parser_data;
+ /**
+  * struct flash_platform_data: board-specific flash data
+  * @name: optional flash device name (eg, as used with mtdparts=)
+@@ -10,6 +10,8 @@ struct mtd_partition;
+  * @nr_parts: number of mtd_partitions for static partitoning
+  * @type: optional flash device type (e.g. m25p80 vs m25p64), for use
+  *	with chips that can't be queried for JEDEC or other IDs
++ * @part_probe_types: optional list of MTD parser names to use for
++ *	partitioning
+  *
+  * Board init code (in arch/.../mach-xxx/board-yyy.c files) can
+  * provide information about SPI flash parts (such as DataFlash) to
+@@ -25,6 +27,7 @@ struct flash_platform_data {
+ 
+ 	char		*type;
+ 
++	const char	**part_probe_types;
+ 	/* we'll likely add more ... use JEDEC IDs, etc */
+ };
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/202-MTD-DEVICES-m25p80-use-parsers-if-provided-in-flash-.patch b/target/linux/brcm63xx/patches-3.18/202-MTD-DEVICES-m25p80-use-parsers-if-provided-in-flash-.patch
new file mode 100644
index 0000000..b949694
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/202-MTD-DEVICES-m25p80-use-parsers-if-provided-in-flash-.patch
@@ -0,0 +1,23 @@
+From c7c3c338cb25d7f55ddb3f6bfbf3572758ca3896 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 10 Nov 2011 16:53:08 +0100
+Subject: [PATCH 50/79] MTD: DEVICES: m25p80: use parsers if provided in flash
+ platform data
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/mtd/devices/m25p80.c |    3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -246,7 +246,8 @@ static int m25p_probe(struct spi_device
+ 
+ 	ppdata.of_node = spi->dev.of_node;
+ 
+-	return mtd_device_parse_register(&flash->mtd, NULL, &ppdata,
++	return mtd_device_parse_register(&flash->mtd,
++			data ? data->part_probe_types : NULL, &ppdata,
+ 			data ? data->parts : NULL,
+ 			data ? data->nr_parts : 0);
+ }
diff --git a/target/linux/brcm63xx/patches-3.18/203-MTD-DEVICES-m25p80-add-support-for-limiting-reads.patch b/target/linux/brcm63xx/patches-3.18/203-MTD-DEVICES-m25p80-add-support-for-limiting-reads.patch
new file mode 100644
index 0000000..740fb2d
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/203-MTD-DEVICES-m25p80-add-support-for-limiting-reads.patch
@@ -0,0 +1,90 @@
+From 5fb4e8d7287ac8fcb33aae8b1e9e22c5a3c392bd Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 10 Nov 2011 17:33:40 +0100
+Subject: [PATCH 51/79] MTD: DEVICES: m25p80: add support for limiting reads
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/mtd/devices/m25p80.c |   29 +++++++++++++++++++++++++++--
+ include/linux/spi/flash.h    |    4 ++++
+ 2 files changed, 31 insertions(+), 2 deletions(-)
+
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -32,6 +32,7 @@ struct m25p {
+ 	struct spi_device	*spi;
+ 	struct spi_nor		spi_nor;
+ 	struct mtd_info		mtd;
++	int			max_transfer_len;
+ 	u8			command[MAX_CMD_SIZE];
+ };
+ 
+@@ -121,7 +122,7 @@ static inline unsigned int m25p80_rx_nbi
+  * Read an address range from the nor chip.  The address range
+  * may be any size provided it is within the physical boundaries.
+  */
+-static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
++static int __m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
+ 			size_t *retlen, u_char *buf)
+ {
+ 	struct m25p *flash = nor->priv;
+@@ -157,6 +158,29 @@ static int m25p80_read(struct spi_nor *n
+ 	return 0;
+ }
+ 
++static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
++	size_t *retlen, u_char *buf)
++{
++	struct m25p *flash = nor->priv;
++	size_t off;
++	size_t read_len = flash->max_transfer_len;
++	size_t part_len;
++	int ret = 0;
++
++	if (!read_len)
++		return __m25p80_read(nor, from, len, retlen, buf);
++
++	*retlen = 0;
++
++	for (off = 0; off < len && !ret; off += read_len) {
++		ret = __m25p80_read(nor, from + off, min(len - off, read_len),
++				    &part_len, buf + off);
++			*retlen += part_len;
++	}
++
++	return ret;
++}
++
+ static int m25p80_erase(struct spi_nor *nor, loff_t offset)
+ {
+ 	struct m25p *flash = nor->priv;
+@@ -240,6 +264,9 @@ static int m25p_probe(struct spi_device
+ 	else
+ 		flash_name = spi->modalias;
+ 
++	if (data)
++		flash->max_transfer_len = data->max_transfer_len;
++
+ 	ret = spi_nor_scan(nor, flash_name, mode);
+ 	if (ret)
+ 		return ret;
+--- a/include/linux/spi/flash.h
++++ b/include/linux/spi/flash.h
+@@ -13,6 +13,8 @@ struct mtd_part_parser_data;
+  * @part_probe_types: optional list of MTD parser names to use for
+  *	partitioning
+  *
++ * @max_transfer_len: option maximum read/write length limitation for
++ *	SPI controllers not able to transfer any length commands.
+  * Board init code (in arch/.../mach-xxx/board-yyy.c files) can
+  * provide information about SPI flash parts (such as DataFlash) to
+  * help set up the device and its appropriate default partitioning.
+@@ -28,6 +30,8 @@ struct flash_platform_data {
+ 	char		*type;
+ 
+ 	const char	**part_probe_types;
++
++	unsigned int	max_transfer_len;
+ 	/* we'll likely add more ... use JEDEC IDs, etc */
+ };
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/204-USB-OHCI-allow-other-arches-to-use-the-BE-frame-numb.patch b/target/linux/brcm63xx/patches-3.18/204-USB-OHCI-allow-other-arches-to-use-the-BE-frame-numb.patch
new file mode 100644
index 0000000..4b3d44a
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/204-USB-OHCI-allow-other-arches-to-use-the-BE-frame-numb.patch
@@ -0,0 +1,31 @@
+From b2f399dcd674a692a64bb3b300b77b78ae57b530 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 12 Jan 2014 16:47:35 +0100
+Subject: [PATCH] USB: OHCI: allow other arches to use the BE frame number
+ quirk
+
+Intead of guarding it with a certain PPC SoC and expanding the list
+for each SoC requiring it, just guard it with USB_OHCI_BIG_ENDIAN_DESC.
+
+This makes it less suprising that passing no_big_frame_no = 1 for the
+platform data does not do what expected (or
+
+Checking it for all big endian descriptor setups should not impact
+performance much as USB1.1 is rather slow anyway.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/usb/host/ohci.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/usb/host/ohci.h
++++ b/drivers/usb/host/ohci.h
+@@ -652,7 +652,7 @@ static inline u32 hc32_to_cpup (const st
+  * some big-endian SOC implementations.  Same thing happens with PSW access.
+  */
+ 
+-#ifdef CONFIG_PPC_MPC52xx
++#ifdef CONFIG_USB_OHCI_BIG_ENDIAN_DESC
+ #define big_endian_frame_no_quirk(ohci)	(ohci->flags & OHCI_QUIRK_FRAME_NO)
+ #else
+ #define big_endian_frame_no_quirk(ohci)	0
diff --git a/target/linux/brcm63xx/patches-3.18/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch b/target/linux/brcm63xx/patches-3.18/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch
new file mode 100644
index 0000000..404bea9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch
@@ -0,0 +1,66 @@
+From 6ac09efa8f0e189ffe7dd7b0889289de56ee44cc Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 19 Jan 2014 12:18:03 +0100
+Subject: [PATCH] USB: EHCI: allow limiting ports for ehci-platform
+
+In the same way as the ohci platform driver allows limiting ports,
+enable the same for ehci. This prevents a mismatch in the available
+ports between ehci/ohci on USB 2.0 controllers.
+
+This is needed if the USB host controller always reports the maximum
+number of ports regardless of the number of available ports (because
+one might be set to be usb device).
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/usb/host/ehci-hcd.c      | 4 ++++
+ drivers/usb/host/ehci-platform.c | 2 ++
+ drivers/usb/host/ehci.h          | 1 +
+ include/linux/usb/ehci_pdriver.h | 1 +
+ 4 files changed, 8 insertions(+)
+
+--- a/drivers/usb/host/ehci-hcd.c
++++ b/drivers/usb/host/ehci-hcd.c
+@@ -660,6 +660,10 @@ int ehci_setup(struct usb_hcd *hcd)
+ 
+ 	/* cache this readonly data; minimize chip reads */
+ 	ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
++	if (ehci->num_ports) {
++		ehci->hcs_params &= ~0xf; /* bits 3:0, ports on HC */
++		ehci->hcs_params |= ehci->num_ports;
++	}
+ 
+ 	ehci->sbrn = HCD_USB2;
+ 
+--- a/drivers/usb/host/ehci-platform.c
++++ b/drivers/usb/host/ehci-platform.c
+@@ -58,6 +58,9 @@ static int ehci_platform_reset(struct us
+ 	hcd->has_tt = pdata->has_tt;
+ 	ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug;
+ 
++	if (pdata->num_ports && pdata->num_ports <= 15)
++		ehci->num_ports = pdata->num_ports;
++
+ 	if (pdata->pre_setup) {
+ 		retval = pdata->pre_setup(hcd);
+ 		if (retval < 0)
+--- a/drivers/usb/host/ehci.h
++++ b/drivers/usb/host/ehci.h
+@@ -213,6 +213,7 @@ struct ehci_hcd {			/* one per controlle
+ 	u32			command;
+ 
+ 	/* SILICON QUIRKS */
++	unsigned int		num_ports;
+ 	unsigned		no_selective_suspend:1;
+ 	unsigned		has_fsl_port_bug:1; /* FreeScale */
+ 	unsigned		big_endian_mmio:1;
+--- a/include/linux/usb/ehci_pdriver.h
++++ b/include/linux/usb/ehci_pdriver.h
+@@ -40,6 +40,7 @@ struct usb_hcd;
+  */
+ struct usb_ehci_pdata {
+ 	int		caps_offset;
++	unsigned int	num_ports;
+ 	unsigned	has_tt:1;
+ 	unsigned	has_synopsys_hc_bug:1;
+ 	unsigned	big_endian_desc:1;
diff --git a/target/linux/brcm63xx/patches-3.18/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch b/target/linux/brcm63xx/patches-3.18/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch
new file mode 100644
index 0000000..4e5e611
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch
@@ -0,0 +1,493 @@
+From 5a50cb0d53344a2429831b00925d6183d4d332e1 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 03:54:05 +0100
+Subject: [PATCH 40/44] MIPS: BCM63XX: move device registration code into its
+ own file
+
+Move device registration code into its own file to allow sharing it
+between board implementations.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Makefile         |   1 +
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 188 +-------------------------
+ arch/mips/bcm63xx/boards/board_common.c   | 215 ++++++++++++++++++++++++++++++
+ arch/mips/bcm63xx/boards/board_common.h   |   8 ++
+ 4 files changed, 223 insertions(+), 183 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/boards/board_common.c
+ create mode 100644 arch/mips/bcm63xx/boards/board_common.h
+
+--- a/arch/mips/bcm63xx/boards/Makefile
++++ b/arch/mips/bcm63xx/boards/Makefile
+@@ -1 +1,2 @@
++obj-y					+= board_common.o
+ obj-$(CONFIG_BOARD_BCM963XX)		+= board_bcm963xx.o
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -10,35 +10,22 @@
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
+-#include <linux/platform_device.h>
+-#include <linux/ssb/ssb.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+-#include <bcm63xx_dev_uart.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_nvram.h>
+-#include <bcm63xx_dev_pci.h>
+-#include <bcm63xx_dev_enet.h>
+-#include <bcm63xx_dev_dsp.h>
+-#include <bcm63xx_dev_flash.h>
+-#include <bcm63xx_dev_hsspi.h>
+-#include <bcm63xx_dev_pcmcia.h>
+-#include <bcm63xx_dev_spi.h>
+-#include <bcm63xx_dev_usb_ehci.h>
+-#include <bcm63xx_dev_usb_ohci.h>
+-#include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+ 
++#include "board_common.h"
++
+ #include <uapi/linux/bcm933xx_hcs.h>
+ 
+ #define PFX	"board_bcm963xx: "
+ 
+ #define HCS_OFFSET_128K			0x20000
+ 
+-static struct board_info board;
+-
+ /*
+  * known 3368 boards
+  */
+@@ -711,52 +698,6 @@ static const struct board_info __initcon
+ };
+ 
+ /*
+- * Register a sane SPROMv2 to make the on-board
+- * bcm4318 WLAN work
+- */
+-#ifdef CONFIG_SSB_PCIHOST
+-static struct ssb_sprom bcm63xx_sprom = {
+-	.revision		= 0x02,
+-	.board_rev		= 0x17,
+-	.country_code		= 0x0,
+-	.ant_available_bg	= 0x3,
+-	.pa0b0			= 0x15ae,
+-	.pa0b1			= 0xfa85,
+-	.pa0b2			= 0xfe8d,
+-	.pa1b0			= 0xffff,
+-	.pa1b1			= 0xffff,
+-	.pa1b2			= 0xffff,
+-	.gpio0			= 0xff,
+-	.gpio1			= 0xff,
+-	.gpio2			= 0xff,
+-	.gpio3			= 0xff,
+-	.maxpwr_bg		= 0x004c,
+-	.itssi_bg		= 0x00,
+-	.boardflags_lo		= 0x2848,
+-	.boardflags_hi		= 0x0000,
+-};
+-
+-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+-{
+-	if (bus->bustype == SSB_BUSTYPE_PCI) {
+-		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
+-		return 0;
+-	} else {
+-		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+-		return -EINVAL;
+-	}
+-}
+-#endif
+-
+-/*
+- * return board name for /proc/cpuinfo
+- */
+-const char *board_get_name(void)
+-{
+-	return board.name;
+-}
+-
+-/*
+  * early init callback, read nvram data from flash and checksum it
+  */
+ void __init board_prom_init(void)
+@@ -801,141 +742,16 @@ void __init board_prom_init(void)
+ 		if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
+ 			continue;
+ 		/* copy, board desc array is marked initdata */
+-		memcpy(&board, bcm963xx_boards[i], sizeof(board));
++		board_early_setup(bcm963xx_boards[i]);
+ 		break;
+ 	}
+ 
+-	/* bail out if board is not found, will complain later */
+-	if (!board.name[0]) {
++	/* warn if board is not found, will complain later */
++	if (i == ARRAY_SIZE(bcm963xx_boards)) {
+ 		char name[17];
+ 		memcpy(name, board_name, 16);
+ 		name[16] = 0;
+ 		printk(KERN_ERR PFX "unknown bcm963xx board: %s\n",
+ 		       name);
+-		return;
+-	}
+-
+-	/* setup pin multiplexing depending on board enabled device,
+-	 * this has to be done this early since PCI init is done
+-	 * inside arch_initcall */
+-	val = 0;
+-
+-#ifdef CONFIG_PCI
+-	if (board.has_pci) {
+-		bcm63xx_pci_enabled = 1;
+-		if (BCMCPU_IS_6348())
+-			val |= GPIO_MODE_6348_G2_PCI;
+-	}
+-#endif
+-
+-	if (board.has_pccard) {
+-		if (BCMCPU_IS_6348())
+-			val |= GPIO_MODE_6348_G1_MII_PCCARD;
+-	}
+-
+-	if (board.has_enet0 && !board.enet0.use_internal_phy) {
+-		if (BCMCPU_IS_6348())
+-			val |= GPIO_MODE_6348_G3_EXT_MII |
+-				GPIO_MODE_6348_G0_EXT_MII;
+-	}
+-
+-	if (board.has_enet1 && !board.enet1.use_internal_phy) {
+-		if (BCMCPU_IS_6348())
+-			val |= GPIO_MODE_6348_G3_EXT_MII |
+-				GPIO_MODE_6348_G0_EXT_MII;
+-	}
+-
+-	bcm_gpio_writel(val, GPIO_MODE_REG);
+-}
+-
+-/*
+- * second stage init callback, good time to panic if we couldn't
+- * identify on which board we're running since early printk is working
+- */
+-void __init board_setup(void)
+-{
+-	if (!board.name[0])
+-		panic("unable to detect bcm963xx board");
+-	printk(KERN_INFO PFX "board name: %s\n", board.name);
+-
+-	/* make sure we're running on expected cpu */
+-	if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
+-		panic("unexpected CPU for bcm963xx board");
+-}
+-
+-static struct gpio_led_platform_data bcm63xx_led_data;
+-
+-static struct platform_device bcm63xx_gpio_leds = {
+-	.name			= "leds-gpio",
+-	.id			= 0,
+-	.dev.platform_data	= &bcm63xx_led_data,
+-};
+-
+-/*
+- * third stage init callback, register all board devices.
+- */
+-int __init board_register_devices(void)
+-{
+-	if (board.has_uart0)
+-		bcm63xx_uart_register(0);
+-
+-	if (board.has_uart1)
+-		bcm63xx_uart_register(1);
+-
+-	if (board.has_pccard)
+-		bcm63xx_pcmcia_register();
+-
+-	if (board.has_enet0 &&
+-	    !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
+-		bcm63xx_enet_register(0, &board.enet0);
+-
+-	if (board.has_enet1 &&
+-	    !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
+-		bcm63xx_enet_register(1, &board.enet1);
+-
+-	if (board.has_enetsw &&
+-	    !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
+-		bcm63xx_enetsw_register(&board.enetsw);
+-
+-	if (board.has_usbd)
+-		bcm63xx_usbd_register(&board.usbd);
+-
+-	if (board.has_ehci0)
+-		bcm63xx_ehci_register();
+-
+-	if (board.has_ohci0)
+-		bcm63xx_ohci_register();
+-
+-	if (board.has_dsp)
+-		bcm63xx_dsp_register(&board.dsp);
+-
+-	/* Generate MAC address for WLAN and register our SPROM,
+-	 * do this after registering enet devices
+-	 */
+-#ifdef CONFIG_SSB_PCIHOST
+-	if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
+-		memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+-		memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+-		if (ssb_arch_register_fallback_sprom(
+-				&bcm63xx_get_fallback_sprom) < 0)
+-			pr_err(PFX "failed to register fallback SPROM\n");
+ 	}
+-#endif
+-
+-	bcm63xx_spi_register();
+-
+-	bcm63xx_hsspi_register();
+-
+-	bcm63xx_flash_register();
+-
+-	bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
+-	bcm63xx_led_data.leds = board.leds;
+-
+-	platform_device_register(&bcm63xx_gpio_leds);
+-
+-	if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
+-		gpio_request_one(board.ephy_reset_gpio,
+-				board.ephy_reset_gpio_flags, "ephy-reset");
+-
+-	return 0;
+ }
+--- /dev/null
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -0,0 +1,217 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/platform_device.h>
++#include <linux/ssb/ssb.h>
++#include <asm/addrspace.h>
++#include <bcm63xx_board.h>
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_dev_uart.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_nvram.h>
++#include <bcm63xx_dev_pci.h>
++#include <bcm63xx_dev_enet.h>
++#include <bcm63xx_dev_dsp.h>
++#include <bcm63xx_dev_flash.h>
++#include <bcm63xx_dev_hsspi.h>
++#include <bcm63xx_dev_pcmcia.h>
++#include <bcm63xx_dev_spi.h>
++#include <bcm63xx_dev_usb_ehci.h>
++#include <bcm63xx_dev_usb_ohci.h>
++#include <bcm63xx_dev_usb_usbd.h>
++#include <board_bcm963xx.h>
++
++#define PFX	"board: "
++
++static struct board_info board;
++
++/*
++ * Register a sane SPROMv2 to make the on-board
++ * bcm4318 WLAN work
++ */
++#ifdef CONFIG_SSB_PCIHOST
++static struct ssb_sprom bcm63xx_sprom = {
++	.revision		= 0x02,
++	.board_rev		= 0x17,
++	.country_code		= 0x0,
++	.ant_available_bg	= 0x3,
++	.pa0b0			= 0x15ae,
++	.pa0b1			= 0xfa85,
++	.pa0b2			= 0xfe8d,
++	.pa1b0			= 0xffff,
++	.pa1b1			= 0xffff,
++	.pa1b2			= 0xffff,
++	.gpio0			= 0xff,
++	.gpio1			= 0xff,
++	.gpio2			= 0xff,
++	.gpio3			= 0xff,
++	.maxpwr_bg		= 0x004c,
++	.itssi_bg		= 0x00,
++	.boardflags_lo		= 0x2848,
++	.boardflags_hi		= 0x0000,
++};
++
++int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
++{
++	if (bus->bustype == SSB_BUSTYPE_PCI) {
++		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++		return 0;
++	} else {
++		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
++		return -EINVAL;
++	}
++}
++#endif
++
++/*
++ * return board name for /proc/cpuinfo
++ */
++const char *board_get_name(void)
++{
++	return board.name;
++}
++
++/*
++ * setup board for device registration
++ */
++void __init board_early_setup(const struct board_info *target)
++{
++	u32 val;
++
++	memcpy(&board, target, sizeof(board));
++
++	/* setup pin multiplexing depending on board enabled device,
++	 * this has to be done this early since PCI init is done
++	 * inside arch_initcall */
++	val = 0;
++
++#ifdef CONFIG_PCI
++	if (board.has_pci) {
++		bcm63xx_pci_enabled = 1;
++		if (BCMCPU_IS_6348())
++			val |= GPIO_MODE_6348_G2_PCI;
++	}
++#endif
++
++	if (board.has_pccard) {
++		if (BCMCPU_IS_6348())
++			val |= GPIO_MODE_6348_G1_MII_PCCARD;
++	}
++
++	if (board.has_enet0 && !board.enet0.use_internal_phy) {
++		if (BCMCPU_IS_6348())
++			val |= GPIO_MODE_6348_G3_EXT_MII |
++				GPIO_MODE_6348_G0_EXT_MII;
++	}
++
++	if (board.has_enet1 && !board.enet1.use_internal_phy) {
++		if (BCMCPU_IS_6348())
++			val |= GPIO_MODE_6348_G3_EXT_MII |
++				GPIO_MODE_6348_G0_EXT_MII;
++	}
++
++	bcm_gpio_writel(val, GPIO_MODE_REG);
++}
++
++
++/*
++ * second stage init callback, good time to panic if we couldn't
++ * identify on which board we're running since early printk is working
++ */
++void __init board_setup(void)
++{
++	if (!board.name[0])
++		panic("unable to detect bcm963xx board");
++	printk(KERN_INFO PFX "board name: %s\n", board.name);
++
++	/* make sure we're running on expected cpu */
++	if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
++		panic("unexpected CPU for bcm963xx board");
++}
++
++static struct gpio_led_platform_data bcm63xx_led_data;
++
++static struct platform_device bcm63xx_gpio_leds = {
++	.name			= "leds-gpio",
++	.id			= 0,
++	.dev.platform_data	= &bcm63xx_led_data,
++};
++
++/*
++ * third stage init callback, register all board devices.
++ */
++int __init board_register_devices(void)
++{
++	if (board.has_uart0)
++		bcm63xx_uart_register(0);
++
++	if (board.has_uart1)
++		bcm63xx_uart_register(1);
++
++	if (board.has_pccard)
++		bcm63xx_pcmcia_register();
++
++	if (board.has_enet0 &&
++	    !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
++		bcm63xx_enet_register(0, &board.enet0);
++
++	if (board.has_enet1 &&
++	    !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
++		bcm63xx_enet_register(1, &board.enet1);
++
++	if (board.has_enetsw &&
++	    !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
++		bcm63xx_enetsw_register(&board.enetsw);
++
++	if (board.has_usbd)
++		bcm63xx_usbd_register(&board.usbd);
++
++	if (board.has_ehci0)
++		bcm63xx_ehci_register();
++
++	if (board.has_ohci0)
++		bcm63xx_ohci_register();
++
++	if (board.has_dsp)
++		bcm63xx_dsp_register(&board.dsp);
++
++	/* Generate MAC address for WLAN and register our SPROM,
++	 * do this after registering enet devices
++	 */
++#ifdef CONFIG_SSB_PCIHOST
++	if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
++		memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
++		memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
++		if (ssb_arch_register_fallback_sprom(
++				&bcm63xx_get_fallback_sprom) < 0)
++			pr_err(PFX "failed to register fallback SPROM\n");
++	}
++#endif
++
++	bcm63xx_spi_register();
++
++	bcm63xx_hsspi_register();
++
++	bcm63xx_flash_register();
++
++	bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
++	bcm63xx_led_data.leds = board.leds;
++
++	platform_device_register(&bcm63xx_gpio_leds);
++
++	if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
++		gpio_request_one(board.ephy_reset_gpio,
++				board.ephy_reset_gpio_flags, "ephy-reset");
++
++	return 0;
++}
+--- /dev/null
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -0,0 +1,8 @@
++#ifndef __BOARD_COMMON_H
++#define __BOARD_COMMON_H
++
++#include <board_bcm963xx.h>
++
++void board_early_setup(const struct board_info *board);
++
++#endif /* __BOARD_COMMON_H */
diff --git a/target/linux/brcm63xx/patches-3.18/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch b/target/linux/brcm63xx/patches-3.18/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch
new file mode 100644
index 0000000..877030f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch
@@ -0,0 +1,100 @@
+From 4e9c34a37bd3442b286ba55441bfe22c1ac5b65f Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 04:08:06 +0100
+Subject: [PATCH 41/44] MIPS: BCM63XX: pass a mac addresss allocator to board
+ setup
+
+Pass a mac address allocator to board setup code to allow board
+implementations to work with third party bootloaders not using nvram
+for configuration storage.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |  3 ++-
+ arch/mips/bcm63xx/boards/board_common.c   | 16 ++++++++++------
+ arch/mips/bcm63xx/boards/board_common.h   |  3 ++-
+ 3 files changed, 14 insertions(+), 8 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -742,7 +742,8 @@ void __init board_prom_init(void)
+ 		if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
+ 			continue;
+ 		/* copy, board desc array is marked initdata */
+-		board_early_setup(bcm963xx_boards[i]);
++		board_early_setup(bcm963xx_boards[i],
++				  bcm63xx_nvram_get_mac_address);
+ 		break;
+ 	}
+ 
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -18,7 +18,6 @@
+ #include <bcm63xx_dev_uart.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+-#include <bcm63xx_nvram.h>
+ #include <bcm63xx_dev_pci.h>
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_dsp.h>
+@@ -81,15 +80,20 @@ const char *board_get_name(void)
+ 	return board.name;
+ }
+ 
++static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
++
+ /*
+  * setup board for device registration
+  */
+-void __init board_early_setup(const struct board_info *target)
++void __init board_early_setup(const struct board_info *target,
++			      int (*get_mac_address)(u8 mac[ETH_ALEN]))
+ {
+ 	u32 val;
+ 
+ 	memcpy(&board, target, sizeof(board));
+ 
++	board_get_mac_address = get_mac_address;
++
+ 	/* setup pin multiplexing depending on board enabled device,
+ 	 * this has to be done this early since PCI init is done
+ 	 * inside arch_initcall */
+@@ -162,15 +166,15 @@ int __init board_register_devices(void)
+ 		bcm63xx_pcmcia_register();
+ 
+ 	if (board.has_enet0 &&
+-	    !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
++	    !board_get_mac_address(board.enet0.mac_addr))
+ 		bcm63xx_enet_register(0, &board.enet0);
+ 
+ 	if (board.has_enet1 &&
+-	    !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
++	    !board_get_mac_address(board.enet1.mac_addr))
+ 		bcm63xx_enet_register(1, &board.enet1);
+ 
+ 	if (board.has_enetsw &&
+-	    !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
++	    !board_get_mac_address(board.enetsw.mac_addr))
+ 		bcm63xx_enetsw_register(&board.enetsw);
+ 
+ 	if (board.has_usbd)
+@@ -189,7 +193,7 @@ int __init board_register_devices(void)
+ 	 * do this after registering enet devices
+ 	 */
+ #ifdef CONFIG_SSB_PCIHOST
+-	if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
++	if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+ 		memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+ 		memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+ 		if (ssb_arch_register_fallback_sprom(
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -3,6 +3,7 @@
+ 
+ #include <board_bcm963xx.h>
+ 
+-void board_early_setup(const struct board_info *board);
++void board_early_setup(const struct board_info *board,
++		       int (*get_mac_address)(u8 mac[ETH_ALEN]));
+ 
+ #endif /* __BOARD_COMMON_H */
diff --git a/target/linux/brcm63xx/patches-3.18/300-reset_buttons.patch b/target/linux/brcm63xx/patches-3.18/300-reset_buttons.patch
new file mode 100644
index 0000000..2263b49
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/300-reset_buttons.patch
@@ -0,0 +1,101 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -10,6 +10,8 @@
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
++#include <linux/gpio_keys.h>
++#include <linux/input.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -26,6 +28,9 @@
+ 
+ #define HCS_OFFSET_128K			0x20000
+ 
++#define BCM963XX_KEYS_POLL_INTERVAL	20
++#define BCM963XX_KEYS_DEBOUNCE_INTERVAL	(BCM963XX_KEYS_POLL_INTERVAL * 3)
++
+ /*
+  * known 3368 boards
+  */
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -12,6 +12,7 @@
+ #include <linux/string.h>
+ #include <linux/platform_device.h>
+ #include <linux/ssb/ssb.h>
++#include <linux/gpio_keys.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -32,6 +33,8 @@
+ 
+ #define PFX	"board: "
+ 
++#define BCM963XX_KEYS_POLL_INTERVAL	20
++
+ static struct board_info board;
+ 
+ /*
+@@ -151,11 +154,23 @@ static struct platform_device bcm63xx_gp
+ 	.dev.platform_data	= &bcm63xx_led_data,
+ };
+ 
++static struct gpio_keys_platform_data bcm63xx_gpio_keys_data = {
++	.poll_interval  = BCM963XX_KEYS_POLL_INTERVAL,
++};
++
++static struct platform_device bcm63xx_gpio_keys_device = {
++	.name		= "gpio-keys-polled",
++	.id		= 0,
++	.dev.platform_data = &bcm63xx_gpio_keys_data,
++};
++
+ /*
+  * third stage init callback, register all board devices.
+  */
+ int __init board_register_devices(void)
+ {
++	int button_count = 0;
++
+ 	if (board.has_uart0)
+ 		bcm63xx_uart_register(0);
+ 
+@@ -217,5 +232,16 @@ int __init board_register_devices(void)
+ 		gpio_request_one(board.ephy_reset_gpio,
+ 				board.ephy_reset_gpio_flags, "ephy-reset");
+ 
++	/* count number of BUTTONs defined by this device */
++	while (button_count < ARRAY_SIZE(board.buttons) && board.buttons[button_count].desc)
++		button_count++;
++
++	if (button_count) {
++		bcm63xx_gpio_keys_data.nbuttons = button_count;
++		bcm63xx_gpio_keys_data.buttons = board.buttons;
++
++		platform_device_register(&bcm63xx_gpio_keys_device);
++	}
++
+ 	return 0;
+ }
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -3,6 +3,7 @@
+ 
+ #include <linux/types.h>
+ #include <linux/gpio.h>
++#include <linux/gpio_keys.h>
+ #include <linux/leds.h>
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+@@ -48,6 +49,9 @@ struct board_info {
+ 	/* GPIO LEDs */
+ 	struct gpio_led leds[5];
+ 
++	/* Buttons */
++	struct gpio_keys_button buttons[4];
++
+ 	/* External PHY reset GPIO */
+ 	unsigned int ephy_reset_gpio;
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/301-led_count.patch b/target/linux/brcm63xx/patches-3.18/301-led_count.patch
new file mode 100644
index 0000000..49a1825
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/301-led_count.patch
@@ -0,0 +1,41 @@
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -170,6 +170,7 @@ static struct platform_device bcm63xx_gp
+ int __init board_register_devices(void)
+ {
+ 	int button_count = 0;
++	int led_count = 0;
+ 
+ 	if (board.has_uart0)
+ 		bcm63xx_uart_register(0);
+@@ -223,10 +224,16 @@ int __init board_register_devices(void)
+ 
+ 	bcm63xx_flash_register();
+ 
+-	bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
+-	bcm63xx_led_data.leds = board.leds;
++	/* count number of LEDs defined by this device */
++	while (led_count < ARRAY_SIZE(board.leds) && board.leds[led_count].name)
++		led_count++;
++
++	if (led_count) {
++		bcm63xx_led_data.num_leds = led_count;
++		bcm63xx_led_data.leds = board.leds;
+ 
+-	platform_device_register(&bcm63xx_gpio_leds);
++		platform_device_register(&bcm63xx_gpio_leds);
++	}
+ 
+ 	if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
+ 		gpio_request_one(board.ephy_reset_gpio,
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -47,7 +47,7 @@ struct board_info {
+ 	struct bcm63xx_dsp_platform_data dsp;
+ 
+ 	/* GPIO LEDs */
+-	struct gpio_led leds[5];
++	struct gpio_led leds[14];
+ 
+ 	/* Buttons */
+ 	struct gpio_keys_button buttons[4];
diff --git a/target/linux/brcm63xx/patches-3.18/302-extended-platform-devices.patch b/target/linux/brcm63xx/patches-3.18/302-extended-platform-devices.patch
new file mode 100644
index 0000000..cc61cee
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/302-extended-platform-devices.patch
@@ -0,0 +1,25 @@
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -222,6 +222,9 @@ int __init board_register_devices(void)
+ 
+ 	bcm63xx_hsspi_register();
+ 
++	if (board.num_devs)
++		platform_add_devices(board.devs, board.num_devs);
++
+ 	bcm63xx_flash_register();
+ 
+ 	/* count number of LEDs defined by this device */
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -57,6 +57,10 @@ struct board_info {
+ 
+ 	/* External PHY reset GPIO flags from gpio.h */
+ 	unsigned long ephy_reset_gpio_flags;
++
++	/* Additional platform devices */
++	struct platform_device **devs;
++	unsigned int	num_devs;
+ };
+ 
+ #endif /* ! BOARD_BCM963XX_H_ */
diff --git a/target/linux/brcm63xx/patches-3.18/303-spi-board-info.patch b/target/linux/brcm63xx/patches-3.18/303-spi-board-info.patch
new file mode 100644
index 0000000..878e626
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/303-spi-board-info.patch
@@ -0,0 +1,33 @@
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -13,6 +13,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/ssb/ssb.h>
+ #include <linux/gpio_keys.h>
++#include <linux/spi/spi.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -225,6 +226,9 @@ int __init board_register_devices(void)
+ 	if (board.num_devs)
+ 		platform_add_devices(board.devs, board.num_devs);
+ 
++	if (board.num_spis)
++		spi_register_board_info(board.spis, board.num_spis);
++
+ 	bcm63xx_flash_register();
+ 
+ 	/* count number of LEDs defined by this device */
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -61,6 +61,10 @@ struct board_info {
+ 	/* Additional platform devices */
+ 	struct platform_device **devs;
+ 	unsigned int	num_devs;
++
++	/* Additional platform devices */
++	struct spi_board_info *spis;
++	unsigned int	num_spis;
+ };
+ 
+ #endif /* ! BOARD_BCM963XX_H_ */
diff --git a/target/linux/brcm63xx/patches-3.18/309-cfe_version_mod.patch b/target/linux/brcm63xx/patches-3.18/309-cfe_version_mod.patch
new file mode 100644
index 0000000..42af6ae
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/309-cfe_version_mod.patch
@@ -0,0 +1,27 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -727,10 +727,20 @@ void __init board_prom_init(void)
+ 
+ 	/* dump cfe version */
+ 	cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
+-	if (!memcmp(cfe, "cfe-v", 5))
+-		snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
+-			 cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
+-	else
++	if (strstarts(cfe, "cfe-")) {
++		if(cfe[4] == 'v') {
++			if(cfe[5] == 'd')
++				snprintf(cfe_version, 11, "%s", (char *) &cfe[5]);
++			else if (cfe[10] > 0)
++				snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u-%u",
++					 cfe[5], cfe[6], cfe[7], cfe[8], cfe[9], cfe[10]);
++			else
++				snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
++					 cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
++		} else {
++			snprintf(cfe_version, 12, "%s", (char *) &cfe[4]);
++		}
++	} else
+ 		strcpy(cfe_version, "unknown");
+ 	printk(KERN_INFO PFX "CFE version: %s\n", cfe_version);
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/310-cfe_simplify_detection.patch b/target/linux/brcm63xx/patches-3.18/310-cfe_simplify_detection.patch
new file mode 100644
index 0000000..e05c91d
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/310-cfe_simplify_detection.patch
@@ -0,0 +1,20 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
+@@ -1,6 +1,8 @@
+ #ifndef BCM63XX_BOARD_H_
+ #define BCM63XX_BOARD_H_
+ 
++#include <asm/bootinfo.h>
++
+ const char *board_get_name(void);
+ 
+ void board_prom_init(void);
+@@ -9,4 +11,8 @@ void board_setup(void);
+ 
+ int board_register_devices(void);
+ 
++static inline bool bcm63xx_is_cfe_present(void) {
++	return fw_arg3 == 0x43464531;
++}
++
+ #endif /* ! BCM63XX_BOARD_H_ */
diff --git a/target/linux/brcm63xx/patches-3.18/311-bcm63xxpart_use_cfedetection.patch b/target/linux/brcm63xx/patches-3.18/311-bcm63xxpart_use_cfedetection.patch
new file mode 100644
index 0000000..46d9b47
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/311-bcm63xxpart_use_cfedetection.patch
@@ -0,0 +1,51 @@
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -35,7 +35,7 @@
+ 
+ #include <asm/mach-bcm63xx/bcm63xx_nvram.h>
+ #include <asm/mach-bcm63xx/bcm963xx_tag.h>
+-#include <asm/mach-bcm63xx/board_bcm963xx.h>
++#include <asm/mach-bcm63xx/bcm63xx_board.h>
+ 
+ #define BCM63XX_EXTENDED_SIZE	0xBFC00000	/* Extended flash address */
+ 
+@@ -43,30 +43,6 @@
+ 
+ #define BCM63XX_CFE_MAGIC_OFFSET 0x4e0
+ 
+-static int bcm63xx_detect_cfe(struct mtd_info *master)
+-{
+-	char buf[9];
+-	int ret;
+-	size_t retlen;
+-
+-	ret = mtd_read(master, BCM963XX_CFE_VERSION_OFFSET, 5, &retlen,
+-		       (void *)buf);
+-	buf[retlen] = 0;
+-
+-	if (ret)
+-		return ret;
+-
+-	if (strncmp("cfe-v", buf, 5) == 0)
+-		return 0;
+-
+-	/* very old CFE's do not have the cfe-v string, so check for magic */
+-	ret = mtd_read(master, BCM63XX_CFE_MAGIC_OFFSET, 8, &retlen,
+-		       (void *)buf);
+-	buf[retlen] = 0;
+-
+-	return strncmp("CFE1CFE1", buf, 8);
+-}
+-
+ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,
+ 					struct mtd_partition **pparts,
+ 					struct mtd_part_parser_data *data)
+@@ -85,7 +61,7 @@ static int bcm63xx_parse_cfe_partitions(
+ 	u32 computed_crc;
+ 	bool rootfs_first = false;
+ 
+-	if (bcm63xx_detect_cfe(master))
++	if (!bcm63xx_is_cfe_present())
+ 		return -EINVAL;
+ 
+ 	cfe_erasesize = max_t(uint32_t, master->erasesize,
diff --git a/target/linux/brcm63xx/patches-3.18/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch b/target/linux/brcm63xx/patches-3.18/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch
new file mode 100644
index 0000000..11eedf9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch
@@ -0,0 +1,455 @@
+From 301744ecbeece89ab3a9d6beef7802fa22598f00 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 14:53:12 +0100
+Subject: [PATCH 1/5] irqchip: add support for bcm6345-style periphery irq
+ controller
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ .../brcm,bcm6345-periph-intc.txt                   |   50 +++
+ drivers/irqchip/Kconfig                            |    4 +
+ drivers/irqchip/Makefile                           |    1 +
+ drivers/irqchip/irq-bcm6345-periph.c               |  339 ++++++++++++++++++++
+ include/linux/irqchip/irq-bcm6345-periph.h         |   16 +
+ 5 files changed, 410 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
+ create mode 100644 drivers/irqchip/irq-bcm6345-periph.c
+ create mode 100644 include/linux/irqchip/irq-bcm6345-periph.h
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
+@@ -0,0 +1,50 @@
++Broadcom BCM6345 Level 1 periphery interrupt controller
++
++This block is a  interrupt controller that is typically connected directly
++to one of the HW INT lines on each CPU.  Every BCM63XX xDSL chip since
++BCM6345 has contained this hardware.
++
++Key elements of the hardware design include:
++
++- 32, 64, or 128 incoming level IRQ lines
++
++- All onchip peripherals are wired directly to an L2 input
++
++- A separate instance of the register set for each CPU, allowing individual
++  peripheral IRQs to be routed to any CPU
++
++- No atomic mask/unmask operations
++
++- No polarity/level/edge settings
++
++- No FIFO or priority encoder logic; software is expected to read all
++  1-4 status words to determine which IRQs are pending
++
++Required properties:
++
++- compatible: Should be "brcm,bcm6345-periph-intc".
++- reg: Specifies the base physical address and size of the registers.
++  Multiple register addresses may be specified, and must match the amount of
++  parent interrupts.
++- interrupt-controller: Identifies the node as an interrupt controller.
++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
++  source, should be 1.
++- interrupt-parent: Specifies the phandle to the parent interrupt controller
++  this one is cascaded from.
++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
++  node, valid values depend on the type of parent interrupt controller.
++  Multiple lines are used to route interrupts to different cpus, with the first
++  assumed to be for the boot CPU.
++
++Example:
++
++periph_intc: interrupt-controller@f0406800 {
++	compatible = "brcm,bcm6345-periph-intc";
++	reg = <0x10000020 0x10>, <0x10000030 0x10>;
++
++	interrupt-controller;
++	#interrupt-cells = <1>;
++
++	interrupt-parent = <&cpu_intc>;
++	interrupts = <2>, <3>;
++};
+--- a/drivers/irqchip/Kconfig
++++ b/drivers/irqchip/Kconfig
+@@ -54,6 +54,10 @@ config BRCMSTB_L2_IRQ
+ 	select GENERIC_IRQ_CHIP
+ 	select IRQ_DOMAIN
+ 
++config BCM6345_PERIPH_IRQ
++	bool
++	select IRQ_DOMAIN
++
+ config DW_APB_ICTL
+ 	bool
+ 	select IRQ_DOMAIN
+--- a/drivers/irqchip/Makefile
++++ b/drivers/irqchip/Makefile
+@@ -7,6 +7,7 @@ obj-$(CONFIG_ARCH_MMP)			+= irq-mmp.o
+ obj-$(CONFIG_ARCH_MVEBU)		+= irq-armada-370-xp.o
+ obj-$(CONFIG_ARCH_MXS)			+= irq-mxs.o
+ obj-$(CONFIG_ARCH_S3C24XX)		+= irq-s3c24xx.o
++obj-$(CONFIG_BCM6345_PERIPH_IRQ)	+= irq-bcm6345-periph.o
+ obj-$(CONFIG_DW_APB_ICTL)		+= irq-dw-apb-ictl.o
+ obj-$(CONFIG_METAG)			+= irq-metag-ext.o
+ obj-$(CONFIG_METAG_PERFCOUNTER_IRQS)	+= irq-metag.o
+--- /dev/null
++++ b/drivers/irqchip/irq-bcm6345-periph.c
+@@ -0,0 +1,339 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
++ */
++
++#include <linux/ioport.h>
++#include <linux/irq.h>
++#include <linux/irqchip/chained_irq.h>
++#include <linux/irqchip/irq-bcm6345-periph.h>
++#include <linux/kernel.h>
++#include <linux/of.h>
++#include <linux/of_irq.h>
++#include <linux/of_address.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++
++#ifdef CONFIG_BCM63XX
++#include <asm/mach-bcm63xx/bcm63xx_irq.h>
++
++#define VIRQ_BASE	IRQ_INTERNAL_BASE
++#else
++#define VIRQ_BASE	0
++#endif
++
++#include "irqchip.h"
++
++#define MAX_WORDS	4
++#define MAX_PARENT_IRQS	2
++#define IRQS_PER_WORD	32
++
++struct intc_block {
++	int parent_irq;
++	void __iomem *base;
++	void __iomem *en_reg[MAX_WORDS];
++	void __iomem *status_reg[MAX_WORDS];
++	u32 mask_cache[MAX_WORDS];
++};
++
++struct intc_data {
++	struct irq_chip chip;
++	struct intc_block block[MAX_PARENT_IRQS];
++
++	int num_words;
++
++	struct irq_domain *domain;
++	raw_spinlock_t lock;
++};
++
++static void bcm6345_periph_irq_handle(unsigned int irq, struct irq_desc *desc)
++{
++	struct intc_data *data = irq_desc_get_handler_data(desc);
++	struct irq_chip *chip = irq_desc_get_chip(desc);
++	struct intc_block *block;
++	unsigned int idx;
++
++	chained_irq_enter(chip, desc);
++
++	for (idx = 0; idx < MAX_PARENT_IRQS; idx++)
++		if (irq == data->block[idx].parent_irq)
++			block = &data->block[idx];
++
++	for (idx = 0; idx < data->num_words; idx++) {
++		int base = idx * IRQS_PER_WORD;
++		unsigned long pending;
++		int hw_irq;
++
++		raw_spin_lock(&data->lock);
++		pending = __raw_readl(block->en_reg[idx]) &
++			  __raw_readl(block->status_reg[idx]);
++		raw_spin_unlock(&data->lock);
++
++		for_each_set_bit(hw_irq, &pending, IRQS_PER_WORD) {
++			int virq;
++
++			virq  = irq_find_mapping(data->domain, base + hw_irq);
++			generic_handle_irq(virq);
++		}
++	}
++
++	chained_irq_exit(chip, desc);
++}
++
++static void __bcm6345_periph_enable(struct intc_block *block, int reg, int bit,
++				    bool enable)
++{
++	u32 val;
++
++	val = __raw_readl(block->en_reg[reg]);
++	if (enable)
++		val |= BIT(bit);
++	else
++		val &= ~BIT(bit);
++	__raw_writel(val, block->en_reg[reg]);
++}
++
++static void bcm6345_periph_irq_mask(struct irq_data *data)
++{
++	unsigned int i, reg, bit;
++	struct intc_data *priv = data->domain->host_data;
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++
++	reg = hwirq / IRQS_PER_WORD;
++	bit = hwirq % IRQS_PER_WORD;
++
++	raw_spin_lock(&priv->lock);
++	for (i = 0; i < MAX_PARENT_IRQS; i++) {
++		struct intc_block *block = &priv->block[i];
++
++		if (!block->parent_irq)
++			break;
++
++		__bcm6345_periph_enable(block, reg, bit, false);
++	}
++	raw_spin_unlock(&priv->lock);
++}
++
++static void bcm6345_periph_irq_unmask(struct irq_data *data)
++{
++	struct intc_data *priv = data->domain->host_data;
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++	unsigned int i, reg, bit;
++
++	reg = hwirq / IRQS_PER_WORD;
++	bit = hwirq % IRQS_PER_WORD;
++
++	raw_spin_lock(&priv->lock);
++	for (i = 0; i < MAX_PARENT_IRQS; i++) {
++		struct intc_block *block = &priv->block[i];
++
++		if (!block->parent_irq)
++			break;
++
++		if (block->mask_cache[reg] & BIT(bit))
++			__bcm6345_periph_enable(block, reg, bit, true);
++		else
++			__bcm6345_periph_enable(block, reg, bit, false);
++	}
++	raw_spin_unlock(&priv->lock);
++}
++
++#ifdef CONFIG_SMP
++static int bcm6345_periph_set_affinity(struct irq_data *data,
++				       const struct cpumask *mask, bool force)
++{
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++	struct intc_data *priv = data->domain->host_data;
++	unsigned int i, reg, bit;
++	unsigned long flags;
++	bool enabled;
++	int cpu;
++
++	reg = hwirq / IRQS_PER_WORD;
++	bit = hwirq % IRQS_PER_WORD;
++
++	/* we could route to more than one cpu, but performance
++	   suffers, so fix it to one.
++	 */
++	cpu = cpumask_any_and(mask, cpu_online_mask);
++	if (cpu >= nr_cpu_ids)
++		return -EINVAL;
++
++	if (cpu >= MAX_PARENT_IRQS)
++		return -EINVAL;
++
++	if (!priv->block[cpu].parent_irq)
++		return -EINVAL;
++
++	raw_spin_lock_irqsave(&priv->lock, flags);
++	enabled = !irqd_irq_masked(data);
++	for (i = 0; i < MAX_PARENT_IRQS; i++) {
++		struct intc_block *block = &priv->block[i];
++
++		if (!block->parent_irq)
++			break;
++
++		if (i == cpu) {
++			block->mask_cache[reg] |= BIT(bit);
++			__bcm6345_periph_enable(block, reg, bit, enabled);
++		} else {
++			block->mask_cache[reg] &= ~BIT(bit);
++			__bcm6345_periph_enable(block, reg, bit, false);
++		}
++	}
++	raw_spin_unlock_irqrestore(&priv->lock, flags);
++
++	return 0;
++}
++#endif
++
++static int bcm6345_periph_map(struct irq_domain *d, unsigned int irq,
++			      irq_hw_number_t hw)
++{
++	struct intc_data *priv = d->host_data;
++
++	irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
++
++	return 0;
++}
++
++static const struct irq_domain_ops bcm6345_periph_domain_ops = {
++	.xlate = irq_domain_xlate_onecell,
++	.map = bcm6345_periph_map,
++};
++
++static int __init __bcm6345_periph_intc_init(struct device_node *node,
++					     int num_blocks, int *irq,
++					     void __iomem **base, int num_words)
++{
++	struct intc_data *data;
++	unsigned int i, w, status_offset;
++
++	data = kzalloc(sizeof(*data), GFP_KERNEL);
++	if (!data)
++		return -ENOMEM;
++
++	raw_spin_lock_init(&data->lock);
++
++	status_offset = num_words * sizeof(u32);
++
++	for (i = 0; i < num_blocks; i++) {
++		struct intc_block *block = &data->block[i];
++
++		block->parent_irq = irq[i];
++		block->base = base[i];
++
++		for (w = 0; w < num_words; w++) {
++			int word_offset = sizeof(u32) * ((num_words - w) - 1);
++
++			block->en_reg[w] = base[i] + word_offset;
++			block->status_reg[w] = base[i] + status_offset;
++			block->status_reg[w] += word_offset;
++
++			/* route all interrupts to line 0 by default */
++			if (i == 0)
++				block->mask_cache[w] = 0xffffffff;
++		}
++
++		irq_set_handler_data(block->parent_irq, data);
++		irq_set_chained_handler(block->parent_irq,
++					bcm6345_periph_irq_handle);
++	}
++
++	data->num_words = num_words;
++
++	data->chip.name = "bcm6345-periph-intc";
++	data->chip.irq_mask = bcm6345_periph_irq_mask;
++	data->chip.irq_unmask = bcm6345_periph_irq_unmask;
++
++#ifdef CONFIG_SMP
++	if (num_blocks > 1)
++		data->chip.irq_set_affinity = bcm6345_periph_set_affinity;
++#endif
++
++	data->domain = irq_domain_add_simple(node, IRQS_PER_WORD * num_words,
++					     VIRQ_BASE,
++					     &bcm6345_periph_domain_ops, data);
++	if (!data->domain) {
++		kfree(data);
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++void __init bcm6345_periph_intc_init(int num_blocks, int *irq,
++				     void __iomem **base, int num_words)
++{
++	__bcm6345_periph_intc_init(NULL, num_blocks, irq, base, num_words);
++}
++
++#ifdef CONFIG_OF
++static int __init bcm6345_periph_of_init(struct device_node *node,
++					 struct device_node *parent)
++{
++	struct resource res;
++	int num_irqs, ret = -EINVAL;
++	int irqs[MAX_PARENT_IRQS] = { 0 };
++	void __iomem *bases[MAX_PARENT_IRQS] = { NULL };
++	int words = 0;
++	int i;
++
++	num_irqs = of_irq_count(node);
++
++	if (num_irqs < 1 || num_irqs > MAX_PARENT_IRQS)
++		return -EINVAL;
++
++	for (i = 0; i < num_irqs; i++) {
++		resource_size_t size;
++
++		irqs[i] = irq_of_parse_and_map(node, i);
++		if (!irqs[i])
++			goto out_unmap;
++
++		if (of_address_to_resource(node, i, &res))
++			goto out_unmap;
++
++		size = resource_size(&res);
++		switch (size) {
++		case 8:
++		case 16:
++		case 32:
++			size = size / 8;
++			break;
++		default:
++			goto out_unmap;
++		}
++
++		if (words && words != size) {
++			ret = -EINVAL;
++			goto out_unmap;
++		}
++		words = size;
++
++		bases[i] = of_iomap(node, i);
++		if (!bases[i]) {
++			ret = -ENOMEM;
++			goto out_unmap;
++		}
++	}
++
++	ret = __bcm6345_periph_intc_init(node, num_irqs, irqs, bases, words);
++	if (!ret)
++		return 0;
++
++out_unmap:
++	for (i = 0; i < num_irqs; i++) {
++		iounmap(bases[i]);
++		irq_dispose_mapping(irqs[i]);
++	}
++
++	return ret;
++}
++
++IRQCHIP_DECLARE(bcm6345_periph_intc, "brcm,bcm6345-periph-intc",
++		bcm6345_periph_of_init);
++#endif
+--- /dev/null
++++ b/include/linux/irqchip/irq-bcm6345-periph.h
+@@ -0,0 +1,16 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr>
++ */
++
++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
++
++void bcm6345_periph_intc_init(int num_blocks, int *irq, void __iomem **base,
++			      int num_words);
++
++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H */
diff --git a/target/linux/brcm63xx/patches-3.18/321-irqchip-add-support-for-bcm6345-style-external-inter.patch b/target/linux/brcm63xx/patches-3.18/321-irqchip-add-support-for-bcm6345-style-external-inter.patch
new file mode 100644
index 0000000..547b2f1
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/321-irqchip-add-support-for-bcm6345-style-external-inter.patch
@@ -0,0 +1,380 @@
+From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 14:54:27 +0100
+Subject: [PATCH 2/5] irqchip: add support for bcm6345-style external
+ interrupt controller
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ .../interrupt-controller/brcm,bcm6345-ext-intc.txt |   29 ++
+ drivers/irqchip/Kconfig                            |    4 +
+ drivers/irqchip/Makefile                           |    1 +
+ drivers/irqchip/irq-bcm6345-ext.c                  |  287 ++++++++++++++++++++
+ include/linux/irqchip/irq-bcm6345-ext.h            |   14 +
+ 5 files changed, 335 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
+ create mode 100644 drivers/irqchip/irq-bcm6345-ext.c
+ create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
+@@ -0,0 +1,29 @@
++Broadcom BCM6345-style external interrupt controller
++
++Required properties:
++
++- compatible: Should be "brcm,bcm6345-l2-intc".
++- reg: Specifies the base physical addresses and size of the registers.
++- interrupt-controller: identifies the node as an interrupt controller.
++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
++  source, Should be 2.
++- interrupt-parent: Specifies the phandle to the parent interrupt controller
++  this one is cascaded from.
++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
++  node, valid values depend on the type of parent interrupt controller.
++
++Optional properties:
++
++- brcm,field-width: Size of each field (mask, clear, sense, ...) in bits in the
++  register. Defaults to 4.
++
++Example:
++
++ext_intc: interrupt-controller@10000018 {
++	compatible = "brcm,bcm6345-l2-intc";
++	interrupt-parent = <&periph_intc>;
++	#interrupt-cells = <2>;
++	reg = <0x10000018 0x4>;
++	interrupt-controller;
++	interrupts = <24>, <25>, <26>, <27>;
++};
+--- a/drivers/irqchip/Kconfig
++++ b/drivers/irqchip/Kconfig
+@@ -54,6 +54,10 @@ config BRCMSTB_L2_IRQ
+ 	select GENERIC_IRQ_CHIP
+ 	select IRQ_DOMAIN
+ 
++config BCM6345_EXT_IRQ
++	bool
++	select IRQ_DOMAIN
++
+ config BCM6345_PERIPH_IRQ
+ 	bool
+ 	select IRQ_DOMAIN
+--- a/drivers/irqchip/Makefile
++++ b/drivers/irqchip/Makefile
+@@ -7,6 +7,7 @@ obj-$(CONFIG_ARCH_MMP)			+= irq-mmp.o
+ obj-$(CONFIG_ARCH_MVEBU)		+= irq-armada-370-xp.o
+ obj-$(CONFIG_ARCH_MXS)			+= irq-mxs.o
+ obj-$(CONFIG_ARCH_S3C24XX)		+= irq-s3c24xx.o
++obj-$(CONFIG_BCM6345_EXT_IRQ)		+= irq-bcm6345-ext.o
+ obj-$(CONFIG_BCM6345_PERIPH_IRQ)	+= irq-bcm6345-periph.o
+ obj-$(CONFIG_DW_APB_ICTL)		+= irq-dw-apb-ictl.o
+ obj-$(CONFIG_METAG)			+= irq-metag-ext.o
+--- /dev/null
++++ b/drivers/irqchip/irq-bcm6345-ext.c
+@@ -0,0 +1,287 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
++ */
++
++#include <linux/ioport.h>
++#include <linux/irq.h>
++#include <linux/irqchip/chained_irq.h>
++#include <linux/irqchip/irq-bcm6345-ext.h>
++#include <linux/kernel.h>
++#include <linux/of.h>
++#include <linux/of_irq.h>
++#include <linux/of_address.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++
++#include "irqchip.h"
++
++#ifdef CONFIG_BCM63XX
++#include <asm/mach-bcm63xx/bcm63xx_irq.h>
++
++#define VIRQ_BASE		IRQ_EXTERNAL_BASE
++#else
++#define VIRQ_BASE		0
++#endif
++
++#define MAX_IRQS		4
++
++#define EXTIRQ_CFG_SENSE	0
++#define EXTIRQ_CFG_STAT		1
++#define EXTIRQ_CFG_CLEAR	2
++#define EXTIRQ_CFG_MASK		3
++#define EXTIRQ_CFG_BOTHEDGE	4
++#define EXTIRQ_CFG_LEVELSENSE	5
++
++struct intc_data {
++	struct irq_chip chip;
++	struct irq_domain *domain;
++	raw_spinlock_t lock;
++
++	int parent_irq[MAX_IRQS];
++	void __iomem *reg;
++	int shift;
++};
++
++static void bcm6345_ext_intc_irq_handle(unsigned int irq, struct irq_desc *desc)
++{
++	struct intc_data *data = irq_desc_get_handler_data(desc);
++	struct irq_chip *chip = irq_desc_get_chip(desc);
++	unsigned int idx;
++
++	chained_irq_enter(chip, desc);
++
++	for (idx = 0; idx < MAX_IRQS; idx++) {
++		if (data->parent_irq[idx] != irq)
++			continue;
++
++		generic_handle_irq(irq_find_mapping(data->domain, idx));
++	}
++
++	chained_irq_exit(chip, desc);
++}
++
++static void bcm6345_ext_intc_irq_ack(struct irq_data *data)
++{
++	struct intc_data *priv = data->domain->host_data;
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++	u32 reg;
++
++	raw_spin_lock(&priv->lock);
++	reg = __raw_readl(priv->reg);
++	reg |= hwirq << (EXTIRQ_CFG_CLEAR * priv->shift);
++	__raw_writel(reg, priv->reg);
++	raw_spin_unlock(&priv->lock);
++}
++
++static void bcm6345_ext_intc_irq_mask(struct irq_data *data)
++{
++	struct intc_data *priv = data->domain->host_data;
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++	u32 reg;
++
++	raw_spin_lock(&priv->lock);
++	reg = __raw_readl(priv->reg);
++	reg &= ~(hwirq << (EXTIRQ_CFG_MASK * priv->shift));
++	__raw_writel(reg, priv->reg);
++	raw_spin_unlock(&priv->lock);
++}
++
++static void bcm6345_ext_intc_irq_unmask(struct irq_data *data)
++{
++	struct intc_data *priv = data->domain->host_data;
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++	u32 reg;
++
++	raw_spin_lock(&priv->lock);
++	reg = __raw_readl(priv->reg);
++	reg |= hwirq << (EXTIRQ_CFG_MASK * priv->shift);
++	__raw_writel(reg, priv->reg);
++	raw_spin_unlock(&priv->lock);
++}
++
++static int bcm6345_ext_intc_set_type(struct irq_data *data,
++				     unsigned int flow_type)
++{
++	struct intc_data *priv = data->domain->host_data;
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++	bool levelsense = 0, sense = 0, bothedge = 0;
++	u32 reg;
++
++	flow_type &= IRQ_TYPE_SENSE_MASK;
++
++	if (flow_type == IRQ_TYPE_NONE)
++		flow_type = IRQ_TYPE_LEVEL_LOW;
++
++	switch (flow_type) {
++	case IRQ_TYPE_EDGE_BOTH:
++		bothedge = 1;
++		break;
++
++	case IRQ_TYPE_EDGE_RISING:
++		break;
++
++	case IRQ_TYPE_EDGE_FALLING:
++		sense = 1;
++		break;
++
++	case IRQ_TYPE_LEVEL_HIGH:
++		levelsense = 1;
++		sense = 1;
++		break;
++
++	case IRQ_TYPE_LEVEL_LOW:
++		levelsense = 1;
++		break;
++
++	default:
++		pr_err("bogus flow type combination given!\n");
++		return -EINVAL;
++	}
++
++	raw_spin_lock(&priv->lock);
++	reg = __raw_readl(priv->reg);
++
++	if (levelsense)
++		reg |= hwirq << (EXTIRQ_CFG_LEVELSENSE * priv->shift);
++	else
++		reg &= ~(hwirq << (EXTIRQ_CFG_LEVELSENSE * priv->shift));
++	if (sense)
++		reg |= hwirq << (EXTIRQ_CFG_SENSE * priv->shift);
++	else
++		reg &= ~(hwirq << (EXTIRQ_CFG_SENSE * priv->shift));
++	if (bothedge)
++		reg |= hwirq << (EXTIRQ_CFG_BOTHEDGE * priv->shift);
++	else
++		reg &= ~(hwirq << (EXTIRQ_CFG_BOTHEDGE * priv->shift));
++
++	__raw_writel(reg, priv->reg);
++	raw_spin_unlock(&priv->lock);
++
++	irqd_set_trigger_type(data, flow_type);
++	if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
++		__irq_set_handler_locked(data->irq, handle_level_irq);
++	else
++		__irq_set_handler_locked(data->irq, handle_edge_irq);
++
++	return 0;
++}
++
++static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq,
++				irq_hw_number_t hw)
++{
++	struct intc_data *priv = d->host_data;
++
++	irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
++
++	return 0;
++}
++
++static const struct irq_domain_ops bcm6345_ext_domain_ops = {
++	.xlate = irq_domain_xlate_twocell,
++	.map = bcm6345_ext_intc_map,
++};
++
++static int __init __bcm6345_ext_intc_init(struct device_node *node,
++					  int num_irqs, int *irqs,
++					  void __iomem *reg, int shift)
++{
++	struct intc_data *data;
++	unsigned int i;
++	int start = VIRQ_BASE;
++
++	data = kzalloc(sizeof(*data), GFP_KERNEL);
++	if (!data)
++		return -ENOMEM;
++
++	raw_spin_lock_init(&data->lock);
++
++	for (i = 0; i < num_irqs; i++) {
++		data->parent_irq[i] = irqs[i];
++
++		irq_set_handler_data(irqs[i], data);
++		irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle);
++	}
++
++	data->reg = reg;
++
++	data->chip.name = "bcm6345-ext-intc";
++	data->chip.irq_ack = bcm6345_ext_intc_irq_ack;
++	data->chip.irq_mask = bcm6345_ext_intc_irq_mask;
++	data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask;
++	data->chip.irq_set_type = bcm6345_ext_intc_set_type;
++
++	/*
++	 * If we have less than 4 irqs, this is the second controller on
++	 * bcm63xx. So increase the VIRQ start to not overlap with the first
++	 * one, but only do so if we actually use a non-zero start.
++	 *
++	 * This can be removed when bcm63xx has no legacy users anymore.
++	 */
++	if (start && num_irqs < 4)
++		start += 4;
++
++	data->domain = irq_domain_add_simple(node, num_irqs, start,
++					     &bcm6345_ext_domain_ops, data);
++	if (!data->domain) {
++		kfree(data);
++		return -ENOMEM;
++	}
++
++	return 0;
++}
++
++void __init bcm6345_ext_intc_init(int num_irqs, int *irqs, void __iomem *reg,
++				  int shift)
++{
++	__bcm6345_ext_intc_init(NULL, num_irqs, irqs, reg, shift);
++}
++
++#ifdef CONFIG_OF
++static int __init bcm6345_ext_intc_of_init(struct device_node *node,
++					   struct device_node *parent)
++{
++	int num_irqs, ret = -EINVAL;
++	unsigned i;
++	void __iomem *base;
++	int irqs[MAX_IRQS] = { 0 };
++	u32 shift;
++
++	num_irqs = of_irq_count(node);
++
++	if (!num_irqs || num_irqs > MAX_IRQS)
++		return -EINVAL;
++
++	if (of_property_read_u32(node, "brcm,field-width", &shift))
++		shift = 4;
++
++	for (i = 0; i < num_irqs; i++) {
++		irqs[i] = irq_of_parse_and_map(node, i);
++		if (!irqs[i]) {
++			ret = -ENOMEM;
++			goto out_unmap;
++		}
++	}
++
++	base = of_iomap(node, 0);
++	if (!base)
++		goto out_unmap;
++
++	ret = __bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift);
++	if (!ret)
++		return 0;
++out_unmap:
++	iounmap(base);
++
++	for (i = 0; i < num_irqs; i++)
++		irq_dispose_mapping(irqs[i]);
++
++	return ret;
++}
++
++IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc",
++		bcm6345_ext_intc_of_init);
++#endif
+--- /dev/null
++++ b/include/linux/irqchip/irq-bcm6345-ext.h
+@@ -0,0 +1,14 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
++ */
++
++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
++
++void bcm6345_ext_intc_init(int n_irqs, int *irqs, void __iomem *reg, int shift);
++
++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H */
diff --git a/target/linux/brcm63xx/patches-3.18/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch b/target/linux/brcm63xx/patches-3.18/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch
new file mode 100644
index 0000000..54d9094
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch
@@ -0,0 +1,695 @@
+From cfe7647c2a4decf874dff8abb60704e9917f76fe Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 14:55:02 +0100
+Subject: [PATCH 3/5] MIPS: BCM63XX: switch to IRQ_DOMAIN
+
+Now that we have working IRQ_DOMAIN drivers for both interrupt controllers,
+switch to using them.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/Kconfig       |    3 +
+ arch/mips/bcm63xx/irq.c |  609 +++++++++--------------------------------------
+ 2 files changed, 109 insertions(+), 503 deletions(-)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -144,6 +144,9 @@ config BCM63XX
+ 	select SYNC_R4K
+ 	select DMA_NONCOHERENT
+ 	select IRQ_CPU
++	select BCM6345_EXT_IRQ
++	select BCM6345_PERIPH_IRQ
++	select IRQ_DOMAIN
+ 	select SYS_SUPPORTS_32BIT_KERNEL
+ 	select SYS_SUPPORTS_BIG_ENDIAN
+ 	select SYS_HAS_EARLY_PRINTK
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -12,7 +12,9 @@
+ #include <linux/interrupt.h>
+ #include <linux/module.h>
+ #include <linux/irq.h>
+-#include <linux/spinlock.h>
++#include <linux/irqchip.h>
++#include <linux/irqchip/irq-bcm6345-ext.h>
++#include <linux/irqchip/irq-bcm6345-periph.h>
+ #include <asm/irq_cpu.h>
+ #include <asm/mipsregs.h>
+ #include <bcm63xx_cpu.h>
+@@ -20,544 +22,145 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
+ 
+-
+-static DEFINE_SPINLOCK(ipic_lock);
+-static DEFINE_SPINLOCK(epic_lock);
+-
+-static u32 irq_stat_addr[2];
+-static u32 irq_mask_addr[2];
+-static void (*dispatch_internal)(int cpu);
+-static int is_ext_irq_cascaded;
+-static unsigned int ext_irq_count;
+-static unsigned int ext_irq_start, ext_irq_end;
+-static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
+-static void (*internal_irq_mask)(struct irq_data *d);
+-static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m);
+-
+-
+-static inline u32 get_ext_irq_perf_reg(int irq)
+-{
+-	if (irq < 4)
+-		return ext_irq_cfg_reg1;
+-	return ext_irq_cfg_reg2;
+-}
+-
+-static inline void handle_internal(int intbit)
+-{
+-	if (is_ext_irq_cascaded &&
+-	    intbit >= ext_irq_start && intbit <= ext_irq_end)
+-		do_IRQ(intbit - ext_irq_start + IRQ_EXTERNAL_BASE);
+-	else
+-		do_IRQ(intbit + IRQ_INTERNAL_BASE);
+-}
+-
+-static inline int enable_irq_for_cpu(int cpu, struct irq_data *d,
+-				     const struct cpumask *m)
+-{
+-	bool enable = cpu_online(cpu);
+-
+-#ifdef CONFIG_SMP
+-	if (m)
+-		enable &= cpu_isset(cpu, *m);
+-	else if (irqd_affinity_was_set(d))
+-		enable &= cpu_isset(cpu, *d->affinity);
+-#endif
+-	return enable;
+-}
+-
+-/*
+- * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
+- * prioritize any interrupt relatively to another. the static counter
+- * will resume the loop where it ended the last time we left this
+- * function.
+- */
+-
+-#define BUILD_IPIC_INTERNAL(width)					\
+-void __dispatch_internal_##width(int cpu)				\
+-{									\
+-	u32 pending[width / 32];					\
+-	unsigned int src, tgt;						\
+-	bool irqs_pending = false;					\
+-	static unsigned int i[2];					\
+-	unsigned int *next = &i[cpu];					\
+-	unsigned long flags;						\
+-									\
+-	/* read registers in reverse order */				\
+-	spin_lock_irqsave(&ipic_lock, flags);				\
+-	for (src = 0, tgt = (width / 32); src < (width / 32); src++) {	\
+-		u32 val;						\
+-									\
+-		val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \
+-		val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \
+-		pending[--tgt] = val;					\
+-									\
+-		if (val)						\
+-			irqs_pending = true;				\
+-	}								\
+-	spin_unlock_irqrestore(&ipic_lock, flags);			\
+-									\
+-	if (!irqs_pending)						\
+-		return;							\
+-									\
+-	while (1) {							\
+-		unsigned int to_call = *next;				\
+-									\
+-		*next = (*next + 1) & (width - 1);			\
+-		if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {	\
+-			handle_internal(to_call);			\
+-			break;						\
+-		}							\
+-	}								\
+-}									\
+-									\
+-static void __internal_irq_mask_##width(struct irq_data *d)		\
+-{									\
+-	u32 val;							\
+-	unsigned irq = d->irq - IRQ_INTERNAL_BASE;			\
+-	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
+-	unsigned bit = irq & 0x1f;					\
+-	unsigned long flags;						\
+-	int cpu;							\
+-									\
+-	spin_lock_irqsave(&ipic_lock, flags);				\
+-	for_each_present_cpu(cpu) {					\
+-		if (!irq_mask_addr[cpu])				\
+-			break;						\
+-									\
+-		val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
+-		val &= ~(1 << bit);					\
+-		bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
+-	}								\
+-	spin_unlock_irqrestore(&ipic_lock, flags);			\
+-}									\
+-									\
+-static void __internal_irq_unmask_##width(struct irq_data *d,		\
+-					  const struct cpumask *m)	\
+-{									\
+-	u32 val;							\
+-	unsigned irq = d->irq - IRQ_INTERNAL_BASE;			\
+-	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
+-	unsigned bit = irq & 0x1f;					\
+-	unsigned long flags;						\
+-	int cpu;							\
+-									\
+-	spin_lock_irqsave(&ipic_lock, flags);				\
+-	for_each_present_cpu(cpu) {					\
+-		if (!irq_mask_addr[cpu])				\
+-			break;						\
+-									\
+-		val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
+-		if (enable_irq_for_cpu(cpu, d, m))			\
+-			val |= (1 << bit);				\
+-		else							\
+-			val &= ~(1 << bit);				\
+-		bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
+-	}								\
+-	spin_unlock_irqrestore(&ipic_lock, flags);			\
+-}
+-
+-BUILD_IPIC_INTERNAL(32);
+-BUILD_IPIC_INTERNAL(64);
+-
+-asmlinkage void plat_irq_dispatch(void)
+-{
+-	u32 cause;
+-
+-	do {
+-		cause = read_c0_cause() & read_c0_status() & ST0_IM;
+-
+-		if (!cause)
+-			break;
+-
+-		if (cause & CAUSEF_IP7)
+-			do_IRQ(7);
+-		if (cause & CAUSEF_IP0)
+-			do_IRQ(0);
+-		if (cause & CAUSEF_IP1)
+-			do_IRQ(1);
+-		if (cause & CAUSEF_IP2)
+-			dispatch_internal(0);
+-		if (is_ext_irq_cascaded) {
+-			if (cause & CAUSEF_IP3)
+-				dispatch_internal(1);
+-		} else {
+-			if (cause & CAUSEF_IP3)
+-				do_IRQ(IRQ_EXT_0);
+-			if (cause & CAUSEF_IP4)
+-				do_IRQ(IRQ_EXT_1);
+-			if (cause & CAUSEF_IP5)
+-				do_IRQ(IRQ_EXT_2);
+-			if (cause & CAUSEF_IP6)
+-				do_IRQ(IRQ_EXT_3);
+-		}
+-	} while (1);
+-}
+-
+-/*
+- * internal IRQs operations: only mask/unmask on PERF irq mask
+- * register.
+- */
+-static void bcm63xx_internal_irq_mask(struct irq_data *d)
+-{
+-	internal_irq_mask(d);
+-}
+-
+-static void bcm63xx_internal_irq_unmask(struct irq_data *d)
+-{
+-	internal_irq_unmask(d, NULL);
+-}
+-
+-/*
+- * external IRQs operations: mask/unmask and clear on PERF external
+- * irq control register.
+- */
+-static void bcm63xx_external_irq_mask(struct irq_data *d)
+-{
+-	unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+-	u32 reg, regaddr;
+-	unsigned long flags;
+-
+-	regaddr = get_ext_irq_perf_reg(irq);
+-	spin_lock_irqsave(&epic_lock, flags);
+-	reg = bcm_perf_readl(regaddr);
+-
+-	if (BCMCPU_IS_6348())
+-		reg &= ~EXTIRQ_CFG_MASK_6348(irq % 4);
+-	else
+-		reg &= ~EXTIRQ_CFG_MASK(irq % 4);
+-
+-	bcm_perf_writel(reg, regaddr);
+-	spin_unlock_irqrestore(&epic_lock, flags);
+-
+-	if (is_ext_irq_cascaded)
+-		internal_irq_mask(irq_get_irq_data(irq + ext_irq_start));
+-}
+-
+-static void bcm63xx_external_irq_unmask(struct irq_data *d)
+-{
+-	unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+-	u32 reg, regaddr;
+-	unsigned long flags;
+-
+-	regaddr = get_ext_irq_perf_reg(irq);
+-	spin_lock_irqsave(&epic_lock, flags);
+-	reg = bcm_perf_readl(regaddr);
+-
+-	if (BCMCPU_IS_6348())
+-		reg |= EXTIRQ_CFG_MASK_6348(irq % 4);
+-	else
+-		reg |= EXTIRQ_CFG_MASK(irq % 4);
+-
+-	bcm_perf_writel(reg, regaddr);
+-	spin_unlock_irqrestore(&epic_lock, flags);
+-
+-	if (is_ext_irq_cascaded)
+-		internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start),
+-				    NULL);
+-}
+-
+-static void bcm63xx_external_irq_clear(struct irq_data *d)
+-{
+-	unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+-	u32 reg, regaddr;
+-	unsigned long flags;
+-
+-	regaddr = get_ext_irq_perf_reg(irq);
+-	spin_lock_irqsave(&epic_lock, flags);
+-	reg = bcm_perf_readl(regaddr);
+-
+-	if (BCMCPU_IS_6348())
+-		reg |= EXTIRQ_CFG_CLEAR_6348(irq % 4);
+-	else
+-		reg |= EXTIRQ_CFG_CLEAR(irq % 4);
+-
+-	bcm_perf_writel(reg, regaddr);
+-	spin_unlock_irqrestore(&epic_lock, flags);
+-}
+-
+-static int bcm63xx_external_irq_set_type(struct irq_data *d,
+-					 unsigned int flow_type)
+-{
+-	unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+-	u32 reg, regaddr;
+-	int levelsense, sense, bothedge;
+-	unsigned long flags;
+-
+-	flow_type &= IRQ_TYPE_SENSE_MASK;
+-
+-	if (flow_type == IRQ_TYPE_NONE)
+-		flow_type = IRQ_TYPE_LEVEL_LOW;
+-
+-	levelsense = sense = bothedge = 0;
+-	switch (flow_type) {
+-	case IRQ_TYPE_EDGE_BOTH:
+-		bothedge = 1;
+-		break;
+-
+-	case IRQ_TYPE_EDGE_RISING:
+-		sense = 1;
+-		break;
+-
+-	case IRQ_TYPE_EDGE_FALLING:
+-		break;
+-
+-	case IRQ_TYPE_LEVEL_HIGH:
+-		levelsense = 1;
+-		sense = 1;
+-		break;
+-
+-	case IRQ_TYPE_LEVEL_LOW:
+-		levelsense = 1;
+-		break;
+-
+-	default:
+-		printk(KERN_ERR "bogus flow type combination given !\n");
+-		return -EINVAL;
+-	}
+-
+-	regaddr = get_ext_irq_perf_reg(irq);
+-	spin_lock_irqsave(&epic_lock, flags);
+-	reg = bcm_perf_readl(regaddr);
+-	irq %= 4;
+-
+-	switch (bcm63xx_get_cpu_id()) {
+-	case BCM6348_CPU_ID:
+-		if (levelsense)
+-			reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq);
+-		else
+-			reg &= ~EXTIRQ_CFG_LEVELSENSE_6348(irq);
+-		if (sense)
+-			reg |= EXTIRQ_CFG_SENSE_6348(irq);
+-		else
+-			reg &= ~EXTIRQ_CFG_SENSE_6348(irq);
+-		if (bothedge)
+-			reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq);
+-		else
+-			reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
+-		break;
+-
+-	case BCM3368_CPU_ID:
+-	case BCM6328_CPU_ID:
+-	case BCM6338_CPU_ID:
+-	case BCM6345_CPU_ID:
+-	case BCM6358_CPU_ID:
+-	case BCM6362_CPU_ID:
+-	case BCM6368_CPU_ID:
+-		if (levelsense)
+-			reg |= EXTIRQ_CFG_LEVELSENSE(irq);
+-		else
+-			reg &= ~EXTIRQ_CFG_LEVELSENSE(irq);
+-		if (sense)
+-			reg |= EXTIRQ_CFG_SENSE(irq);
+-		else
+-			reg &= ~EXTIRQ_CFG_SENSE(irq);
+-		if (bothedge)
+-			reg |= EXTIRQ_CFG_BOTHEDGE(irq);
+-		else
+-			reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
+-		break;
+-	default:
+-		BUG();
+-	}
+-
+-	bcm_perf_writel(reg, regaddr);
+-	spin_unlock_irqrestore(&epic_lock, flags);
+-
+-	irqd_set_trigger_type(d, flow_type);
+-	if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
+-		__irq_set_handler_locked(d->irq, handle_level_irq);
+-	else
+-		__irq_set_handler_locked(d->irq, handle_edge_irq);
+-
+-	return IRQ_SET_MASK_OK_NOCOPY;
+-}
+-
+-#ifdef CONFIG_SMP
+-static int bcm63xx_internal_set_affinity(struct irq_data *data,
+-					 const struct cpumask *dest,
+-					 bool force)
+-{
+-	if (!irqd_irq_disabled(data))
+-		internal_irq_unmask(data, dest);
+-
+-	return 0;
+-}
+-#endif
+-
+-static struct irq_chip bcm63xx_internal_irq_chip = {
+-	.name		= "bcm63xx_ipic",
+-	.irq_mask	= bcm63xx_internal_irq_mask,
+-	.irq_unmask	= bcm63xx_internal_irq_unmask,
+-};
+-
+-static struct irq_chip bcm63xx_external_irq_chip = {
+-	.name		= "bcm63xx_epic",
+-	.irq_ack	= bcm63xx_external_irq_clear,
+-
+-	.irq_mask	= bcm63xx_external_irq_mask,
+-	.irq_unmask	= bcm63xx_external_irq_unmask,
+-
+-	.irq_set_type	= bcm63xx_external_irq_set_type,
+-};
+-
+-static struct irqaction cpu_ip2_cascade_action = {
+-	.handler	= no_action,
+-	.name		= "cascade_ip2",
+-	.flags		= IRQF_NO_THREAD,
+-};
+-
+-#ifdef CONFIG_SMP
+-static struct irqaction cpu_ip3_cascade_action = {
+-	.handler	= no_action,
+-	.name		= "cascade_ip3",
+-	.flags		= IRQF_NO_THREAD,
+-};
+-#endif
+-
+-static struct irqaction cpu_ext_cascade_action = {
+-	.handler	= no_action,
+-	.name		= "cascade_extirq",
+-	.flags		= IRQF_NO_THREAD,
+-};
+-
+ static void bcm63xx_init_irq(void)
+ {
+-	int irq_bits;
+-
+-	irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
+-	irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
+-	irq_stat_addr[1] = bcm63xx_regset_address(RSET_PERF);
+-	irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF);
++	void __iomem *periph_bases[2];
++	void __iomem *ext_intc_bases[2];
++	int periph_irq_count, periph_width, ext_irq_count, ext_shift;
++	int periph_irqs[2] = { 2, 3 };
++	int ext_irqs[6];
++
++	periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
++	periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
++	ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
++	ext_intc_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+ 
+ 	switch (bcm63xx_get_cpu_id()) {
+ 	case BCM3368_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
+-		irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
+-		irq_stat_addr[1] = 0;
+-		irq_mask_addr[1] = 0;
+-		irq_bits = 32;
+-		ext_irq_count = 4;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
++		periph_bases[0] += PERF_IRQMASK_3368_REG;
++		periph_irq_count = 1;
++		periph_width = 1;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_3368;
++		ext_irq_count = 4;
++		ext_irqs[0] = BCM_3368_EXT_IRQ0;
++		ext_irqs[1] = BCM_3368_EXT_IRQ1;
++		ext_irqs[2] = BCM_3368_EXT_IRQ2;
++		ext_irqs[3] = BCM_3368_EXT_IRQ3;
++		ext_shift = 4;
+ 		break;
+ 	case BCM6328_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
+-		irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
+-		irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1);
+-		irq_mask_addr[1] += PERF_IRQMASK_6328_REG(1);
+-		irq_bits = 64;
+-		ext_irq_count = 4;
+-		is_ext_irq_cascaded = 1;
+-		ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+-		ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
++		periph_bases[0] += PERF_IRQMASK_6328_REG(0);
++		periph_bases[1] += PERF_IRQMASK_6328_REG(1);
++		periph_irq_count = 2;
++		periph_width = 2;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6328;
++		ext_irq_count = 4;
++		ext_irqs[0] = BCM_6328_EXT_IRQ0;
++		ext_irqs[1] = BCM_6328_EXT_IRQ1;
++		ext_irqs[2] = BCM_6328_EXT_IRQ2;
++		ext_irqs[3] = BCM_6328_EXT_IRQ3;
++		ext_shift = 4;
+ 		break;
+ 	case BCM6338_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
+-		irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
+-		irq_stat_addr[1] = 0;
+-		irq_mask_addr[1] = 0;
+-		irq_bits = 32;
+-		ext_irq_count = 4;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
++		periph_bases[0] += PERF_IRQMASK_6338_REG;
++		periph_irq_count = 1;
++		periph_width = 1;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6338;
++		ext_irq_count = 4;
++		ext_irqs[0] = 3;
++		ext_irqs[1] = 4;
++		ext_irqs[2] = 5;
++		ext_irqs[3] = 6;
++		ext_shift = 4;
+ 		break;
+ 	case BCM6345_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
+-		irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
+-		irq_stat_addr[1] = 0;
+-		irq_mask_addr[1] = 0;
+-		irq_bits = 32;
+-		ext_irq_count = 4;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
++		periph_bases[0] += PERF_IRQMASK_6345_REG;
++		periph_irq_count = 1;
++		periph_width = 1;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6345;
++		ext_irq_count = 4;
++		ext_irqs[0] = 3;
++		ext_irqs[1] = 4;
++		ext_irqs[2] = 5;
++		ext_irqs[3] = 6;
++		ext_shift = 4;
+ 		break;
+ 	case BCM6348_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
+-		irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
+-		irq_stat_addr[1] = 0;
+-		irq_mask_addr[1] = 0;
+-		irq_bits = 32;
+-		ext_irq_count = 4;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
++		periph_bases[0] += PERF_IRQMASK_6348_REG;
++		periph_irq_count = 1;
++		periph_width = 1;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6348;
++		ext_irq_count = 4;
++		ext_irqs[0] = 3;
++		ext_irqs[1] = 4;
++		ext_irqs[2] = 5;
++		ext_irqs[3] = 6;
++		ext_shift = 5;
+ 		break;
+ 	case BCM6358_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
+-		irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
+-		irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1);
+-		irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1);
+-		irq_bits = 32;
+-		ext_irq_count = 4;
+-		is_ext_irq_cascaded = 1;
+-		ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+-		ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
++		periph_bases[0] += PERF_IRQMASK_6358_REG(0);
++		periph_bases[1] += PERF_IRQMASK_6358_REG(1);
++		periph_irq_count = 2;
++		periph_width = 1;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
++		ext_irq_count = 4;
++		ext_irqs[0] = BCM_6358_EXT_IRQ0;
++		ext_irqs[1] = BCM_6358_EXT_IRQ1;
++		ext_irqs[2] = BCM_6358_EXT_IRQ2;
++		ext_irqs[3] = BCM_6358_EXT_IRQ3;
++		ext_shift = 4;
+ 		break;
+ 	case BCM6362_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
+-		irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
+-		irq_stat_addr[1] += PERF_IRQSTAT_6362_REG(1);
+-		irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1);
+-		irq_bits = 64;
+-		ext_irq_count = 4;
+-		is_ext_irq_cascaded = 1;
+-		ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+-		ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
++		periph_bases[0] += PERF_IRQMASK_6362_REG(0);
++		periph_bases[1] += PERF_IRQMASK_6362_REG(1);
++		periph_irq_count = 2;
++		periph_width = 2;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6362;
++		ext_irq_count = 4;
++		ext_irqs[0] = BCM_6362_EXT_IRQ0;
++		ext_irqs[1] = BCM_6362_EXT_IRQ1;
++		ext_irqs[2] = BCM_6362_EXT_IRQ2;
++		ext_irqs[3] = BCM_6362_EXT_IRQ3;
++		ext_shift = 4;
+ 		break;
+ 	case BCM6368_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
+-		irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
+-		irq_stat_addr[1] += PERF_IRQSTAT_6368_REG(1);
+-		irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1);
+-		irq_bits = 64;
++		periph_bases[0] += PERF_IRQMASK_6368_REG(0);
++		periph_bases[1] += PERF_IRQMASK_6368_REG(1);
++		periph_irq_count = 2;
++		periph_width = 2;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6368;
++		ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6368;
+ 		ext_irq_count = 6;
+-		is_ext_irq_cascaded = 1;
+-		ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+-		ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
+-		ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
++		ext_irqs[0] = BCM_6368_EXT_IRQ0;
++		ext_irqs[1] = BCM_6368_EXT_IRQ1;
++		ext_irqs[2] = BCM_6368_EXT_IRQ2;
++		ext_irqs[3] = BCM_6368_EXT_IRQ3;
++		ext_irqs[4] = BCM_6368_EXT_IRQ4;
++		ext_irqs[5] = BCM_6368_EXT_IRQ5;
++		ext_shift = 4;
+ 		break;
+ 	default:
+ 		BUG();
+ 	}
+ 
+-	if (irq_bits == 32) {
+-		dispatch_internal = __dispatch_internal_32;
+-		internal_irq_mask = __internal_irq_mask_32;
+-		internal_irq_unmask = __internal_irq_unmask_32;
+-	} else {
+-		dispatch_internal = __dispatch_internal_64;
+-		internal_irq_mask = __internal_irq_mask_64;
+-		internal_irq_unmask = __internal_irq_unmask_64;
+-	}
++	mips_cpu_irq_init();
++	bcm6345_periph_intc_init(periph_irq_count, periph_irqs, periph_bases,
++				 periph_width);
++	bcm6345_ext_intc_init(4, ext_irqs, ext_intc_bases[0], ext_shift);
++	if (ext_irq_count > 4)
++		bcm6345_ext_intc_init(2, &ext_irqs[4], ext_intc_bases[1],
++				      ext_shift);
+ }
+ 
+ void __init arch_init_irq(void)
+ {
+-	int i;
+-
+ 	bcm63xx_init_irq();
+-	mips_cpu_irq_init();
+-	for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i)
+-		irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip,
+-					 handle_level_irq);
+-
+-	for (i = IRQ_EXTERNAL_BASE; i < IRQ_EXTERNAL_BASE + ext_irq_count; ++i)
+-		irq_set_chip_and_handler(i, &bcm63xx_external_irq_chip,
+-					 handle_edge_irq);
+-
+-	if (!is_ext_irq_cascaded) {
+-		for (i = 3; i < 3 + ext_irq_count; ++i)
+-			setup_irq(MIPS_CPU_IRQ_BASE + i, &cpu_ext_cascade_action);
+-	}
+-
+-	setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
+-#ifdef CONFIG_SMP
+-	if (is_ext_irq_cascaded) {
+-		setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
+-		bcm63xx_internal_irq_chip.irq_set_affinity =
+-			bcm63xx_internal_set_affinity;
+-
+-		cpumask_clear(irq_default_affinity);
+-		cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
+-	}
+-#endif
+ }
diff --git a/target/linux/brcm63xx/patches-3.18/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch b/target/linux/brcm63xx/patches-3.18/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch
new file mode 100644
index 0000000..a2ee1b6
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch
@@ -0,0 +1,57 @@
+From 4fd286c3e5a5bebab0391cf1937695b3ed6721a3 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 20:20:30 +0100
+Subject: [PATCH 4/5] MIPS: BCM63XX: wire up BCM6358's external interrupts 4
+ and 5
+
+Due to the external interrupts being non consecutive, the previous
+implementation did not support them. Now that we treat both registers
+as separate irq controllers, there is no such limitation anymore and
+we can expose them for drivers to use.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c                           |    5 ++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h  |    2 ++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |    1 +
+ 3 files changed, 7 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -109,11 +109,14 @@ static void bcm63xx_init_irq(void)
+ 		periph_width = 1;
+ 
+ 		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
+-		ext_irq_count = 4;
++		ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6358;
++		ext_irq_count = 6;
+ 		ext_irqs[0] = BCM_6358_EXT_IRQ0;
+ 		ext_irqs[1] = BCM_6358_EXT_IRQ1;
+ 		ext_irqs[2] = BCM_6358_EXT_IRQ2;
+ 		ext_irqs[3] = BCM_6358_EXT_IRQ3;
++		ext_irqs[4] = BCM_6358_EXT_IRQ4;
++		ext_irqs[5] = BCM_6358_EXT_IRQ5;
+ 		ext_shift = 4;
+ 		break;
+ 	case BCM6362_CPU_ID:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -895,6 +895,8 @@ enum bcm63xx_irq {
+ #define BCM_6358_EXT_IRQ1		(IRQ_INTERNAL_BASE + 26)
+ #define BCM_6358_EXT_IRQ2		(IRQ_INTERNAL_BASE + 27)
+ #define BCM_6358_EXT_IRQ3		(IRQ_INTERNAL_BASE + 28)
++#define BCM_6358_EXT_IRQ4		(IRQ_INTERNAL_BASE + 20)
++#define BCM_6358_EXT_IRQ5		(IRQ_INTERNAL_BASE + 21)
+ 
+ /*
+  * 6362 irqs
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -243,6 +243,7 @@
+ #define PERF_EXTIRQ_CFG_REG_6362	0x18
+ #define PERF_EXTIRQ_CFG_REG_6368	0x18
+ 
++#define PERF_EXTIRQ_CFG_REG2_6358	0x1c
+ #define PERF_EXTIRQ_CFG_REG2_6368	0x1c
+ 
+ /* for 6348 only */
diff --git a/target/linux/brcm63xx/patches-3.18/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch b/target/linux/brcm63xx/patches-3.18/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch
new file mode 100644
index 0000000..661abf6
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch
@@ -0,0 +1,77 @@
+From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:08:36 +0100
+Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper
+
+---
+ arch/mips/bcm63xx/cpu.c                          | 10 ++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
+ 2 files changed, 28 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs);
+ u16 bcm63xx_cpu_id __read_mostly;
+ EXPORT_SYMBOL(bcm63xx_cpu_id);
+ 
++static u32 bcm63xx_cpu_variant __read_mostly;
++
+ static u8 bcm63xx_cpu_rev;
+ static unsigned int bcm63xx_cpu_freq;
+ static unsigned int bcm63xx_memory_size;
+@@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = {
+ 
+ };
+ 
++u32 bcm63xx_get_cpu_variant(void)
++{
++	return bcm63xx_cpu_variant;
++}
++
++EXPORT_SYMBOL(bcm63xx_get_cpu_variant);
++
+ u8 bcm63xx_get_cpu_rev(void)
+ {
+ 	return bcm63xx_cpu_rev;
+@@ -333,6 +342,7 @@ void __init bcm63xx_cpu_init(void)
+ 	/* read out CPU type */
+ 	tmp = bcm_readl(chipid_reg);
+ 	bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
++	bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ 	bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
+ 
+ 	switch (bcm63xx_cpu_id) {
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -19,6 +19,7 @@
+ #define BCM6368_CPU_ID		0x6368
+ 
+ void __init bcm63xx_cpu_init(void);
++u32 bcm63xx_get_cpu_variant(void);
+ u8 bcm63xx_get_cpu_rev(void);
+ unsigned int bcm63xx_get_cpu_freq(void);
+ 
+@@ -82,6 +83,23 @@ static inline u16 __pure bcm63xx_get_cpu
+ #define BCMCPU_IS_6362()	(bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
+ #define BCMCPU_IS_6368()	(bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
+ 
++#define BCMCPU_VARIANT_IS_3368() \
++	(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6328() \
++	(bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
++#define BCMCPU_VARIANT_IS_6338() \
++	(bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
++#define BCMCPU_VARIANT_IS_6345() \
++	(bcm63xx_get_cpu_variant() == BCM6345_CPU_ID)
++#define BCMCPU_VARIANT_IS_6348() \
++	(bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
++#define BCMCPU_VARIANT_IS_6358() \
++	(bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
++#define BCMCPU_VARIANT_IS_6362() \
++	(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
++#define BCMCPU_VARIANT_IS_6368() \
++	(bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
++
+ /*
+  * While registers sets are (mostly) the same across 63xx CPU, base
+  * address of these sets do change.
diff --git a/target/linux/brcm63xx/patches-3.18/331-MIPS-BCM63XX-define-variant-id-field.patch b/target/linux/brcm63xx/patches-3.18/331-MIPS-BCM63XX-define-variant-id-field.patch
new file mode 100644
index 0000000..2e21c65
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/331-MIPS-BCM63XX-define-variant-id-field.patch
@@ -0,0 +1,23 @@
+From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:22:41 +0100
+Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field
+
+Some SoC have a variant id field in the chip id register.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -9,6 +9,8 @@
+ #define PERF_REV_REG			0x0
+ #define REV_CHIPID_SHIFT		16
+ #define REV_CHIPID_MASK			(0xffff << REV_CHIPID_SHIFT)
++#define REV_VARID_SHIFT			12
++#define REV_VARID_MASK			(0xf << REV_VARID_SHIFT)
+ #define REV_REVID_SHIFT			0
+ #define REV_REVID_MASK			(0xff << REV_REVID_SHIFT)
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/332-MIPS-BCM63XX-detect-BCM6328-variants.patch b/target/linux/brcm63xx/patches-3.18/332-MIPS-BCM63XX-detect-BCM6328-variants.patch
new file mode 100644
index 0000000..faa002e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/332-MIPS-BCM63XX-detect-BCM6328-variants.patch
@@ -0,0 +1,68 @@
+From d59120f23279ef62a48d9f94847254b061d0a8b6 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:30:59 +0100
+Subject: [PATCH 22/45] MIPS: BCM63XX: detect BCM6328 variants
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/cpu.c                          | 10 ++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h |  8 ++++++--
+ 2 files changed, 16 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -305,6 +305,7 @@ void __init bcm63xx_cpu_init(void)
+ 	unsigned int tmp;
+ 	unsigned int cpu = smp_processor_id();
+ 	u32 chipid_reg;
++	u8 __maybe_unused varid = 0;
+ 
+ 	/* soc registers location depends on cpu type */
+ 	chipid_reg = 0;
+@@ -344,6 +345,7 @@ void __init bcm63xx_cpu_init(void)
+ 	bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
+ 	bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ 	bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
++	varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
+ 
+ 	switch (bcm63xx_cpu_id) {
+ 	case BCM3368_CPU_ID:
+@@ -353,6 +355,14 @@ void __init bcm63xx_cpu_init(void)
+ 	case BCM6328_CPU_ID:
+ 		bcm63xx_regs_base = bcm6328_regs_base;
+ 		bcm63xx_irqs = bcm6328_irqs;
++
++		if (varid == 1)
++			bcm63xx_cpu_variant = BCM63281_CPU_ID;
++		else if (varid == 3)
++			bcm63xx_cpu_variant = BCM63283_CPU_ID;
++		else
++			pr_warn("unknown BCM6328 variant: %x\n", varid);
++
+ 		break;
+ 	case BCM6338_CPU_ID:
+ 		bcm63xx_regs_base = bcm6338_regs_base;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -11,6 +11,8 @@
+  */
+ #define BCM3368_CPU_ID		0x3368
+ #define BCM6328_CPU_ID		0x6328
++#define BCM63281_CPU_ID		0x63281
++#define BCM63283_CPU_ID		0x63283
+ #define BCM6338_CPU_ID		0x6338
+ #define BCM6345_CPU_ID		0x6345
+ #define BCM6348_CPU_ID		0x6348
+@@ -85,8 +87,10 @@ static inline u16 __pure bcm63xx_get_cpu
+ 
+ #define BCMCPU_VARIANT_IS_3368() \
+ 	(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
+-#define BCMCPU_VARIANT_IS_6328() \
+-	(bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
++#define BCMCPU_VARIANT_IS_63281() \
++	(bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
++#define BCMCPU_VARIANT_IS_63283() \
++	(bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6338() \
+ 	(bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6345() \
diff --git a/target/linux/brcm63xx/patches-3.18/333-MIPS-BCM63XX-detect-BCM6362-variants.patch b/target/linux/brcm63xx/patches-3.18/333-MIPS-BCM63XX-detect-BCM6362-variants.patch
new file mode 100644
index 0000000..62ce12e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/333-MIPS-BCM63XX-detect-BCM6362-variants.patch
@@ -0,0 +1,46 @@
+From 04458c3db8eb79da21ecde40ab36a1dde52bef06 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:33:28 +0100
+Subject: [PATCH 23/45] MIPS: BCM63XX: detect BCM6362 variants
+
+---
+ arch/mips/bcm63xx/cpu.c                          | 8 ++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
+ 2 files changed, 11 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -383,6 +383,14 @@ void __init bcm63xx_cpu_init(void)
+ 	case BCM6362_CPU_ID:
+ 		bcm63xx_regs_base = bcm6362_regs_base;
+ 		bcm63xx_irqs = bcm6362_irqs;
++
++		if (varid == 1)
++			bcm63xx_cpu_variant = BCM6362_CPU_ID;
++		else if (varid == 2)
++			bcm63xx_cpu_variant = BCM6361_CPU_ID;
++		else
++			pr_warn("unknown BCM6362 variant: %x\n", varid);
++
+ 		break;
+ 	case BCM6368_CPU_ID:
+ 		bcm63xx_regs_base = bcm6368_regs_base;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -17,6 +17,7 @@
+ #define BCM6345_CPU_ID		0x6345
+ #define BCM6348_CPU_ID		0x6348
+ #define BCM6358_CPU_ID		0x6358
++#define BCM6361_CPU_ID		0x6361
+ #define BCM6362_CPU_ID		0x6362
+ #define BCM6368_CPU_ID		0x6368
+ 
+@@ -99,6 +100,8 @@ static inline u16 __pure bcm63xx_get_cpu
+ 	(bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6358() \
+ 	(bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
++#define BCMCPU_VARIANT_IS_6361() \
++	(bcm63xx_get_cpu_variant() == BCM6361_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6362() \
+ 	(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6368() \
diff --git a/target/linux/brcm63xx/patches-3.18/334-MIPS-BCM63XX-detect-BCM6368-variants.patch b/target/linux/brcm63xx/patches-3.18/334-MIPS-BCM63XX-detect-BCM6368-variants.patch
new file mode 100644
index 0000000..a993e23
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/334-MIPS-BCM63XX-detect-BCM6368-variants.patch
@@ -0,0 +1,48 @@
+From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:36:56 +0100
+Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants
+
+The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart
+from missing DSL, there is no difference to BCM6368, so treat it such.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/cpu.c                          | 4 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -393,8 +393,12 @@ void __init bcm63xx_cpu_init(void)
+ 
+ 		break;
+ 	case BCM6368_CPU_ID:
++	case BCM6369_CPU_ID:
+ 		bcm63xx_regs_base = bcm6368_regs_base;
+ 		bcm63xx_irqs = bcm6368_irqs;
++
++		/* BCM6369 is a BCM6368 without xDSL, so treat it the same */
++		bcm63xx_cpu_id = BCM6368_CPU_ID;
+ 		break;
+ 	default:
+ 		panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -20,6 +20,7 @@
+ #define BCM6361_CPU_ID		0x6361
+ #define BCM6362_CPU_ID		0x6362
+ #define BCM6368_CPU_ID		0x6368
++#define BCM6369_CPU_ID		0x6369
+ 
+ void __init bcm63xx_cpu_init(void);
+ u32 bcm63xx_get_cpu_variant(void);
+@@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu
+ 	(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6368() \
+ 	(bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6369() \
++	(bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
+ 
+ /*
+  * While registers sets are (mostly) the same across 63xx CPU, base
diff --git a/target/linux/brcm63xx/patches-3.18/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch b/target/linux/brcm63xx/patches-3.18/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch
new file mode 100644
index 0000000..3230add
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch
@@ -0,0 +1,20 @@
+From f67f8134b4537c8bbafe7e1975edfe808b813997 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 03:05:54 +0100
+Subject: [PATCH 45/53] MIPS: BCM63XX: fix PCIe memory window size
+
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -41,7 +41,7 @@
+ 					BCM_CB_MEM_SIZE - 1)
+ 
+ #define BCM_PCIE_MEM_BASE_PA		0x10f00000
+-#define BCM_PCIE_MEM_SIZE		(16 * 1024 * 1024)
++#define BCM_PCIE_MEM_SIZE		(1 * 1024 * 1024)
+ #define BCM_PCIE_MEM_END_PA		(BCM_PCIE_MEM_BASE_PA +		\
+ 					BCM_PCIE_MEM_SIZE - 1)
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch b/target/linux/brcm63xx/patches-3.18/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch
new file mode 100644
index 0000000..d6eb54d
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch
@@ -0,0 +1,70 @@
+From aa05464973bc176478af462ca7c53a9239c651d4 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 03:13:06 +0100
+Subject: [PATCH 46/53] MIPS: BCM63XX: dynamically set the pcie memory windows
+
+Different SoCs use different memory windows (and sizes), so don't
+hardcode it.
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h |  8 ++++----
+ arch/mips/pci/pci-bcm63xx.c                     | 15 ++++++++++-----
+ 2 files changed, 14 insertions(+), 9 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -40,10 +40,10 @@
+ #define BCM_CB_MEM_END_PA		(BCM_CB_MEM_BASE_PA +		\
+ 					BCM_CB_MEM_SIZE - 1)
+ 
+-#define BCM_PCIE_MEM_BASE_PA		0x10f00000
+-#define BCM_PCIE_MEM_SIZE		(1 * 1024 * 1024)
+-#define BCM_PCIE_MEM_END_PA		(BCM_PCIE_MEM_BASE_PA +		\
+-					BCM_PCIE_MEM_SIZE - 1)
++#define BCM_PCIE_MEM_BASE_PA_6328	0x10f00000
++#define BCM_PCIE_MEM_SIZE_6328		(1 * 1024 * 1024)
++#define BCM_PCIE_MEM_END_PA_6328	(BCM_PCIE_MEM_BASE_PA_6328 +	\
++					BCM_PCIE_MEM_SIZE_6328 - 1)
+ 
+ /*
+  * Internal registers are accessed through KSEG3
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -77,8 +77,8 @@ struct pci_controller bcm63xx_cb_control
+ 
+ static struct resource bcm_pcie_mem_resource = {
+ 	.name	= "bcm63xx PCIe memory space",
+-	.start	= BCM_PCIE_MEM_BASE_PA,
+-	.end	= BCM_PCIE_MEM_END_PA,
++	.start	= 0,
++	.end	= 0,
+ 	.flags	= IORESOURCE_MEM,
+ };
+ 
+@@ -195,12 +195,12 @@ static int __init bcm63xx_register_pcie(
+ 	bcm_pcie_writel(val, PCIE_CONFIG2_REG);
+ 
+ 	/* set bar0 to little endian */
+-	val = (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_BASE_SHIFT;
+-	val |= (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_MASK_SHIFT;
++	val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
++	val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
+ 	val |= BASEMASK_REMAP_EN;
+ 	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
+ 
+-	val = (BCM_PCIE_MEM_BASE_PA >> 20) << REBASE_ADDR_BASE_SHIFT;
++	val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
+ 	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
+ 
+ 	register_pci_controller(&bcm63xx_pcie_controller);
+@@ -334,6 +334,11 @@ static int __init bcm63xx_pci_init(void)
+ 	if (!bcm63xx_pci_enabled)
+ 		return -ENODEV;
+ 
++	if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
++		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
++		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
++	}
++
+ 	switch (bcm63xx_get_cpu_id()) {
+ 	case BCM6328_CPU_ID:
+ 	case BCM6362_CPU_ID:
diff --git a/target/linux/brcm63xx/patches-3.18/337-MIPS-BCM63XX-widen-cpuid-field.patch b/target/linux/brcm63xx/patches-3.18/337-MIPS-BCM63XX-widen-cpuid-field.patch
new file mode 100644
index 0000000..0ead82e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/337-MIPS-BCM63XX-widen-cpuid-field.patch
@@ -0,0 +1,56 @@
+From f1477f6e3551fd6beecfee5368fed1325dcd421f Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:54:51 +0100
+Subject: [PATCH 47/53] MIPS: BCM63XX: widen cpuid field
+
+---
+ arch/mips/bcm63xx/cpu.c                          | 2 +-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++----
+ 2 files changed, 5 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -24,7 +24,7 @@ EXPORT_SYMBOL(bcm63xx_regs_base);
+ const int *bcm63xx_irqs;
+ EXPORT_SYMBOL(bcm63xx_irqs);
+ 
+-u16 bcm63xx_cpu_id __read_mostly;
++u32 bcm63xx_cpu_id __read_mostly;
+ EXPORT_SYMBOL(bcm63xx_cpu_id);
+ 
+ static u32 bcm63xx_cpu_variant __read_mostly;
+@@ -127,7 +127,7 @@ unsigned int bcm63xx_get_memory_size(voi
+ 
+ static unsigned int detect_cpu_clock(void)
+ {
+-	u16 cpu_id = bcm63xx_get_cpu_id();
++	u32 cpu_id = bcm63xx_get_cpu_id();
+ 
+ 	switch (cpu_id) {
+ 	case BCM3368_CPU_ID:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -27,7 +27,7 @@ u32 bcm63xx_get_cpu_variant(void);
+ u8 bcm63xx_get_cpu_rev(void);
+ unsigned int bcm63xx_get_cpu_freq(void);
+ 
+-static inline u16 __pure __bcm63xx_get_cpu_id(const u16 cpu_id)
++static inline u32 __pure __bcm63xx_get_cpu_id(const u32 cpu_id)
+ {
+ 	switch (cpu_id) {
+ #ifdef CONFIG_BCM63XX_CPU_3368
+@@ -69,11 +69,11 @@ static inline u16 __pure __bcm63xx_get_c
+ 	return cpu_id;
+ }
+ 
+-extern u16 bcm63xx_cpu_id;
++extern u32 bcm63xx_cpu_id;
+ 
+-static inline u16 __pure bcm63xx_get_cpu_id(void)
++static inline u32 __pure bcm63xx_get_cpu_id(void)
+ {
+-	const u16 cpu_id = bcm63xx_cpu_id;
++	const u32 cpu_id = bcm63xx_cpu_id;
+ 
+ 	return __bcm63xx_get_cpu_id(cpu_id);
+ }
diff --git a/target/linux/brcm63xx/patches-3.18/338-MIPS-BCM63XX-increase-number-of-IRQs.patch b/target/linux/brcm63xx/patches-3.18/338-MIPS-BCM63XX-increase-number-of-IRQs.patch
new file mode 100644
index 0000000..9132e42
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/338-MIPS-BCM63XX-increase-number-of-IRQs.patch
@@ -0,0 +1,39 @@
+From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 15 Dec 2013 20:46:26 +0100
+Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs
+
+Newer SoCs have 128 bit wide irq registers, thus 128 available internal
+interupts.
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++-
+ arch/mips/include/asm/mach-bcm63xx/irq.h         | 2 +-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
+@@ -1,10 +1,12 @@
+ #ifndef BCM63XX_IRQ_H_
+ #define BCM63XX_IRQ_H_
+ 
++#include <irq.h>
+ #include <bcm63xx_cpu.h>
+ 
+ #define IRQ_INTERNAL_BASE		8
+-#define IRQ_EXTERNAL_BASE		100
++#define NR_INTERNAL_IRQS		128
++#define IRQ_EXTERNAL_BASE		(IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS)
+ #define IRQ_EXT_0			(IRQ_EXTERNAL_BASE + 0)
+ #define IRQ_EXT_1			(IRQ_EXTERNAL_BASE + 1)
+ #define IRQ_EXT_2			(IRQ_EXTERNAL_BASE + 2)
+--- a/arch/mips/include/asm/mach-bcm63xx/irq.h
++++ b/arch/mips/include/asm/mach-bcm63xx/irq.h
+@@ -1,7 +1,7 @@
+ #ifndef __ASM_MACH_BCM63XX_IRQ_H
+ #define __ASM_MACH_BCM63XX_IRQ_H
+ 
+-#define NR_IRQS 128
++#define NR_IRQS 256
+ #define MIPS_CPU_IRQ_BASE 0
+ 
+ #endif
diff --git a/target/linux/brcm63xx/patches-3.18/339-MIPS-BCM63XX-add-support-for-BCM63268.patch b/target/linux/brcm63xx/patches-3.18/339-MIPS-BCM63XX-add-support-for-BCM63268.patch
new file mode 100644
index 0000000..1f8a37a
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/339-MIPS-BCM63XX-add-support-for-BCM63268.patch
@@ -0,0 +1,735 @@
+From 98f63141190ac02c58b78d58f771bd263c61d756 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 17:14:17 +0100
+Subject: [PATCH 48/56] MIPS: BCM63XX: add support for BCM63268
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/Kconfig                         |   5 +
+ arch/mips/bcm63xx/boards/board_bcm963xx.c         |   2 +-
+ arch/mips/bcm63xx/clk.c                           |  25 ++++-
+ arch/mips/bcm63xx/cpu.c                           |  59 +++++++++-
+ arch/mips/bcm63xx/dev-flash.c                     |   6 +
+ arch/mips/bcm63xx/dev-spi.c                       |   4 +-
+ arch/mips/bcm63xx/irq.c                           |  20 +++-
+ arch/mips/bcm63xx/reset.c                         |  21 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h  | 130 ++++++++++++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h |   2 +
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |  79 +++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/ioremap.h      |   1 +
+ 12 files changed, 342 insertions(+), 12 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -60,6 +60,11 @@ config BCM63XX_CPU_6368
+ 	select HW_HAS_PCI
+ 	select BCM63XX_OHCI
+ 	select BCM63XX_EHCI
++
++config BCM63XX_CPU_63268
++	bool "support 63268 CPU"
++	select SYS_HAS_CPU_BMIPS4350
++	select HW_HAS_PCI
+ endmenu
+ 
+ source "arch/mips/bcm63xx/boards/Kconfig"
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -717,7 +717,7 @@ void __init board_prom_init(void)
+ 	/* read base address of boot chip select (0)
+ 	 * 6328/6362 do not have MPI but boot from a fixed address
+ 	 */
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
++	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
+ 		val = 0x18000000;
+ 	} else {
+ 		val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -133,6 +133,8 @@ static void enetsw_set(struct clk *clk,
+ 				CKCTL_6368_SWPKT_USB_EN |
+ 				CKCTL_6368_SWPKT_SAR_EN,
+ 				enable);
++	else if (BCMCPU_IS_63268())
++		bcm_hwclock_set(CKCTL_63268_ROBOSW_EN, enable);
+ 	else
+ 		return;
+ 
+@@ -177,6 +179,8 @@ static void usbh_set(struct clk *clk, in
+ 		bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
+ 	else if (BCMCPU_IS_6368())
+ 		bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
++	else if (BCMCPU_IS_63268())
++		bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
+ 	else
+ 		return;
+ 
+@@ -199,6 +203,8 @@ static void usbd_set(struct clk *clk, in
+ 		bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
+ 	else if (BCMCPU_IS_6368())
+ 		bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
++	else if (BCMCPU_IS_63268())
++		bcm_hwclock_set(CKCTL_63268_USBD_EN, enable);
+ 	else
+ 		return;
+ 
+@@ -225,9 +231,13 @@ static void spi_set(struct clk *clk, int
+ 		mask = CKCTL_6358_SPI_EN;
+ 	else if (BCMCPU_IS_6362())
+ 		mask = CKCTL_6362_SPI_EN;
+-	else
+-		/* BCMCPU_IS_6368 */
++	else if (BCMCPU_IS_6368())
+ 		mask = CKCTL_6368_SPI_EN;
++	else if (BCMCPU_IS_63268())
++		mask = CKCTL_63268_SPI_EN;
++	else
++		return;
++
+ 	bcm_hwclock_set(mask, enable);
+ }
+ 
+@@ -246,6 +256,8 @@ static void hsspi_set(struct clk *clk, i
+ 		mask = CKCTL_6328_HSSPI_EN;
+ 	else if (BCMCPU_IS_6362())
+ 		mask = CKCTL_6362_HSSPI_EN;
++	else if (BCMCPU_IS_63268())
++		mask = CKCTL_63268_HSSPI_EN;
+ 	else
+ 		return;
+ 
+@@ -307,6 +319,8 @@ static void pcie_set(struct clk *clk, in
+ 		bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
+ 	else if (BCMCPU_IS_6362())
+ 		bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
++	else if (BCMCPU_IS_63268())
++		bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
+ }
+ 
+ static struct clk clk_pcie = {
+@@ -386,9 +400,11 @@ struct clk *clk_get(struct device *dev,
+ 		return &clk_periph;
+ 	if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm"))
+ 		return &clk_pcm;
+-	if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec"))
++	if ((BCMCPU_IS_6362() || BCMCPU_IS_6368() || BCMCPU_IS_63268()) &&
++	    !strcmp(id, "ipsec"))
+ 		return &clk_ipsec;
+-	if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie"))
++	if ((BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) &&
++	    !strcmp(id, "pcie"))
+ 		return &clk_pcie;
+ 	return ERR_PTR(-ENOENT);
+ }
+@@ -411,6 +427,7 @@ static int __init bcm63xx_clk_init(void)
+ 		clk_hsspi.rate = HSSPI_PLL_HZ_6328;
+ 		break;
+ 	case BCM6362_CPU_ID:
++	case BCM63268_CPU_ID:
+ 		clk_hsspi.rate = HSSPI_PLL_HZ_6362;
+ 		break;
+ 	}
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -101,6 +101,15 @@ static const int bcm6368_irqs[] = {
+ 
+ };
+ 
++static const unsigned long bcm63268_regs_base[] = {
++	__GEN_CPU_REGS_TABLE(63268)
++};
++
++static const int bcm63268_irqs[] = {
++	__GEN_CPU_IRQ_TABLE(63268)
++
++};
++
+ u32 bcm63xx_get_cpu_variant(void)
+ {
+ 	return bcm63xx_cpu_variant;
+@@ -253,6 +262,27 @@ static unsigned int detect_cpu_clock(voi
+ 
+ 		return (((64 * 1000000) / p1) * p2 * ndiv) / m1;
+ 	}
++	case BCM63268_CPU_ID:
++	{
++		unsigned int tmp, mips_pll_fcvo;
++
++		tmp = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
++		mips_pll_fcvo = (tmp & STRAPBUS_63268_FCVO_MASK) >>
++				STRAPBUS_63268_FCVO_SHIFT;
++		switch (mips_pll_fcvo) {
++		case 0x3:
++		case 0xe:
++			return 320000000;
++		case 0xa:
++			return 333000000;
++		case 0x2:
++		case 0xb:
++		case 0xf:
++			return 400000000;
++		default:
++			return 0;
++		}
++	}
+ 
+ 	default:
+ 		panic("Failed to detect clock for CPU with id=%04X\n", cpu_id);
+@@ -267,7 +297,7 @@ static unsigned int detect_memory_size(v
+ 	unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
+ 	u32 val;
+ 
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
++	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
+ 		return bcm_ddr_readl(DDR_CSEND_REG) << 24;
+ 
+ 	if (BCMCPU_IS_6345()) {
+@@ -305,6 +335,7 @@ void __init bcm63xx_cpu_init(void)
+ 	unsigned int tmp;
+ 	unsigned int cpu = smp_processor_id();
+ 	u32 chipid_reg;
++	bool long_chipid = false;
+ 	u8 __maybe_unused varid = 0;
+ 
+ 	/* soc registers location depends on cpu type */
+@@ -326,6 +357,9 @@ void __init bcm63xx_cpu_init(void)
+ 		case 0x10:
+ 			chipid_reg = BCM_6345_PERF_BASE;
+ 			break;
++		case 0x80:
++			long_chipid = true;
++			/* fall-through */
+ 		default:
+ 			chipid_reg = BCM_6368_PERF_BASE;
+ 			break;
+@@ -333,6 +367,7 @@ void __init bcm63xx_cpu_init(void)
+ 		break;
+ 	}
+ 
++
+ 	/*
+ 	 * really early to panic, but delaying panic would not help since we
+ 	 * will never get any working console
+@@ -342,10 +377,17 @@ void __init bcm63xx_cpu_init(void)
+ 
+ 	/* read out CPU type */
+ 	tmp = bcm_readl(chipid_reg);
+-	bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
+-	bcm63xx_cpu_variant = bcm63xx_cpu_id;
++
++	if (long_chipid) {
++		bcm63xx_cpu_id = tmp & REV_LONG_CHIPID_MASK;
++		bcm63xx_cpu_id >>= REV_LONG_CHIPID_SHIFT;
++	} else {
++		bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
++		varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
++	}
++
+ 	bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
+-	varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
++	bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ 
+ 	switch (bcm63xx_cpu_id) {
+ 	case BCM3368_CPU_ID:
+@@ -400,6 +442,15 @@ void __init bcm63xx_cpu_init(void)
+ 		/* BCM6369 is a BCM6368 without xDSL, so treat it the same */
+ 		bcm63xx_cpu_id = BCM6368_CPU_ID;
+ 		break;
++	case BCM63168_CPU_ID:
++	case BCM63169_CPU_ID:
++	case BCM63268_CPU_ID:
++	case BCM63269_CPU_ID:
++		bcm63xx_regs_base = bcm63268_regs_base;
++		bcm63xx_irqs = bcm63268_irqs;
++
++		bcm63xx_cpu_id = BCM63268_CPU_ID;
++		break;
+ 	default:
+ 		panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
+ 		break;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -94,6 +94,12 @@ static int __init bcm63xx_detect_flash_t
+ 		case STRAPBUS_6368_BOOT_SEL_PARALLEL:
+ 			return BCM63XX_FLASH_TYPE_PARALLEL;
+ 		}
++	case BCM63268_CPU_ID:
++		val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
++		if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
++			return BCM63XX_FLASH_TYPE_SERIAL;
++		else
++			return BCM63XX_FLASH_TYPE_NAND;
+ 	default:
+ 		return -EINVAL;
+ 	}
+--- a/arch/mips/bcm63xx/dev-spi.c
++++ b/arch/mips/bcm63xx/dev-spi.c
+@@ -37,7 +37,7 @@ static __init void bcm63xx_spi_regs_init
+ 	if (BCMCPU_IS_6338() || BCMCPU_IS_6348())
+ 		bcm63xx_regs_spi = bcm6348_regs_spi;
+ 	if (BCMCPU_IS_3368() || BCMCPU_IS_6358() ||
+-		BCMCPU_IS_6362() || BCMCPU_IS_6368())
++		BCMCPU_IS_6362() || BCMCPU_IS_6368() || BCMCPU_IS_63268())
+ 		bcm63xx_regs_spi = bcm6358_regs_spi;
+ }
+ 
+@@ -85,7 +85,7 @@ int __init bcm63xx_spi_register(void)
+ 	}
+ 
+ 	if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
+-		BCMCPU_IS_6368()) {
++		BCMCPU_IS_6368() || BCMCPU_IS_63268()) {
+ 		spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
+ 		spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
+ 		spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT;
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -150,6 +150,20 @@ static void bcm63xx_init_irq(void)
+ 		ext_irqs[5] = BCM_6368_EXT_IRQ5;
+ 		ext_shift = 4;
+ 		break;
++	case BCM63268_CPU_ID:
++		periph_bases[0] += PERF_IRQMASK_63268_REG(0);
++		periph_bases[1] += PERF_IRQMASK_63268_REG(1);
++		periph_irq_count = 2;
++		periph_width = 4;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_63268;
++		ext_irq_count = 4;
++		ext_irqs[0] = BCM_63268_EXT_IRQ0;
++		ext_irqs[1] = BCM_63268_EXT_IRQ1;
++		ext_irqs[2] = BCM_63268_EXT_IRQ2;
++		ext_irqs[3] = BCM_63268_EXT_IRQ3;
++		ext_shift = 4;
++		break;
+ 	default:
+ 		BUG();
+ 	}
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -125,6 +125,20 @@
+ #define BCM6368_RESET_PCIE	0
+ #define BCM6368_RESET_PCIE_EXT	0
+ 
++#define BCM63268_RESET_SPI	SOFTRESET_63268_SPI_MASK
++#define BCM63268_RESET_ENET	0
++#define BCM63268_RESET_USBH	SOFTRESET_63268_USBH_MASK
++#define BCM63268_RESET_USBD	SOFTRESET_63268_USBS_MASK
++#define BCM63268_RESET_DSL	0
++#define BCM63268_RESET_SAR	SOFTRESET_63268_SAR_MASK
++#define BCM63268_RESET_EPHY	0
++#define BCM63268_RESET_ENETSW	SOFTRESET_63268_ENETSW_MASK
++#define BCM63268_RESET_PCM	SOFTRESET_63268_PCM_MASK
++#define BCM63268_RESET_MPI	0
++#define BCM63268_RESET_PCIE	(SOFTRESET_63268_PCIE_MASK | \
++				 SOFTRESET_63268_PCIE_CORE_MASK)
++#define BCM63268_RESET_PCIE_EXT	SOFTRESET_63268_PCIE_EXT_MASK
++
+ /*
+  * core reset bits
+  */
+@@ -156,6 +170,10 @@ static const u32 bcm6368_reset_bits[] =
+ 	__GEN_RESET_BITS_TABLE(6368)
+ };
+ 
++static const u32 bcm63268_reset_bits[] = {
++	__GEN_RESET_BITS_TABLE(63268)
++};
++
+ const u32 *bcm63xx_reset_bits;
+ static int reset_reg;
+ 
+@@ -182,6 +200,9 @@ static int __init bcm63xx_reset_bits_ini
+ 	} else if (BCMCPU_IS_6368()) {
+ 		reset_reg = PERF_SOFTRESET_6368_REG;
+ 		bcm63xx_reset_bits = bcm6368_reset_bits;
++	} else if (BCMCPU_IS_63268()) {
++		reset_reg = PERF_SOFTRESET_63268_REG;
++		bcm63xx_reset_bits = bcm63268_reset_bits;
+ 	}
+ 
+ 	return 0;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -21,6 +21,10 @@
+ #define BCM6362_CPU_ID		0x6362
+ #define BCM6368_CPU_ID		0x6368
+ #define BCM6369_CPU_ID		0x6369
++#define BCM63168_CPU_ID		0x63168
++#define BCM63169_CPU_ID		0x63169
++#define BCM63268_CPU_ID		0x63268
++#define BCM63269_CPU_ID		0x63269
+ 
+ void __init bcm63xx_cpu_init(void);
+ u32 bcm63xx_get_cpu_variant(void);
+@@ -61,6 +65,10 @@ static inline u32 __pure __bcm63xx_get_c
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 		case BCM6368_CPU_ID:
+ #endif
++
++#ifdef CONFIG_BCM63XX_CPU_63268
++		case BCM63268_CPU_ID:
++#endif
+ 		break;
+ 	default:
+ 		unreachable();
+@@ -86,6 +94,7 @@ static inline u32 __pure bcm63xx_get_cpu
+ #define BCMCPU_IS_6358()	(bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
+ #define BCMCPU_IS_6362()	(bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
+ #define BCMCPU_IS_6368()	(bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
++#define BCMCPU_IS_63268()	(bcm63xx_get_cpu_id() == BCM63268_CPU_ID)
+ 
+ #define BCMCPU_VARIANT_IS_3368() \
+ 	(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
+@@ -109,6 +118,14 @@ static inline u32 __pure bcm63xx_get_cpu
+ 	(bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6369() \
+ 	(bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
++#define BCMCPU_VARIANT_IS_63168() \
++	(bcm63xx_get_cpu_variant() == BCM63168_CPU_ID)
++#define BCMCPU_VARIANT_IS_63169() \
++	(bcm63xx_get_cpu_variant() == BCM63169_CPU_ID)
++#define BCMCPU_VARIANT_IS_63268() \
++	(bcm63xx_get_cpu_variant() == BCM63268_CPU_ID)
++#define BCMCPU_VARIANT_IS_63269() \
++	(bcm63xx_get_cpu_variant() == BCM63269_CPU_ID)
+ 
+ /*
+  * While registers sets are (mostly) the same across 63xx CPU, base
+@@ -573,6 +590,52 @@ enum bcm63xx_regs_set {
+ #define BCM_6368_RNG_BASE		(0xb0004180)
+ #define BCM_6368_MISC_BASE		(0xdeadbeef)
+ 
++/*
++ * 63268 register sets base address
++ */
++#define BCM_63268_DSL_LMEM_BASE		(0xdeadbeef)
++#define BCM_63268_PERF_BASE		(0xb0000000)
++#define BCM_63268_TIMER_BASE		(0xb0000080)
++#define BCM_63268_WDT_BASE		(0xb000009c)
++#define BCM_63268_UART0_BASE		(0xb0000180)
++#define BCM_63268_UART1_BASE		(0xb00001a0)
++#define BCM_63268_GPIO_BASE		(0xb00000c0)
++#define BCM_63268_SPI_BASE		(0xb0000800)
++#define BCM_63268_HSSPI_BASE		(0xb0001000)
++#define BCM_63268_UDC0_BASE		(0xdeadbeef)
++#define BCM_63268_USBDMA_BASE		(0xb000c800)
++#define BCM_63268_OHCI0_BASE		(0xb0002600)
++#define BCM_63268_OHCI_PRIV_BASE	(0xdeadbeef)
++#define BCM_63268_USBH_PRIV_BASE	(0xb0002700)
++#define BCM_63268_USBD_BASE		(0xb0002400)
++#define BCM_63268_MPI_BASE		(0xdeadbeef)
++#define BCM_63268_PCMCIA_BASE		(0xdeadbeef)
++#define BCM_63268_PCIE_BASE		(0xb06e0000)
++#define BCM_63268_SDRAM_REGS_BASE	(0xdeadbeef)
++#define BCM_63268_DSL_BASE		(0xdeadbeef)
++#define BCM_63268_UBUS_BASE		(0xdeadbeef)
++#define BCM_63268_ENET0_BASE		(0xdeadbeef)
++#define BCM_63268_ENET1_BASE		(0xdeadbeef)
++#define BCM_63268_ENETDMA_BASE		(0xb000d800)
++#define BCM_63268_ENETDMAC_BASE		(0xb000da00)
++#define BCM_63268_ENETDMAS_BASE		(0xb000dc00)
++#define BCM_63268_ENETSW_BASE		(0xb0700000)
++#define BCM_63268_EHCI0_BASE		(0xb0002500)
++#define BCM_63268_SDRAM_BASE		(0xdeadbeef)
++#define BCM_63268_MEMC_BASE		(0xdeadbeef)
++#define BCM_63268_DDR_BASE		(0xb0003000)
++#define BCM_63268_M2M_BASE		(0xdeadbeef)
++#define BCM_63268_ATM_BASE		(0xdeadbeef)
++#define BCM_63268_XTM_BASE		(0xb0007000)
++#define BCM_63268_XTMDMA_BASE		(0xb000b800)
++#define BCM_63268_XTMDMAC_BASE		(0xdeadbeef)
++#define BCM_63268_XTMDMAS_BASE		(0xdeadbeef)
++#define BCM_63268_PCM_BASE		(0xb000b000)
++#define BCM_63268_PCMDMA_BASE		(0xb000b800)
++#define BCM_63268_PCMDMAC_BASE		(0xdeadbeef)
++#define BCM_63268_PCMDMAS_BASE		(0xdeadbeef)
++#define BCM_63268_RNG_BASE		(0xdeadbeef)
++#define BCM_63268_MISC_BASE		(0xb0001800)
+ 
+ extern const unsigned long *bcm63xx_regs_base;
+ 
+@@ -1041,6 +1104,73 @@ enum bcm63xx_irq {
+ #define BCM_6368_EXT_IRQ4		(IRQ_INTERNAL_BASE + 24)
+ #define BCM_6368_EXT_IRQ5		(IRQ_INTERNAL_BASE + 25)
+ 
++/*
++ * 63268 irqs
++ */
++#define BCM_63268_HIGH_IRQ_BASE		(IRQ_INTERNAL_BASE + 32)
++#define BCM_63268_VERY_HIGH_IRQ_BASE	(BCM_63268_HIGH_IRQ_BASE + 32)
++
++#define BCM_63268_TIMER_IRQ		(IRQ_INTERNAL_BASE + 0)
++#define BCM_63268_SPI_IRQ		(BCM_63268_VERY_HIGH_IRQ_BASE + 16)
++#define BCM_63268_UART0_IRQ		(IRQ_INTERNAL_BASE + 5)
++#define BCM_63268_UART1_IRQ		(BCM_63268_HIGH_IRQ_BASE + 2)
++#define BCM_63268_DSL_IRQ		(IRQ_INTERNAL_BASE + 23)
++#define BCM_63268_UDC0_IRQ		0
++#define BCM_63268_ENET0_IRQ		0
++#define BCM_63268_ENET1_IRQ		0
++#define BCM_63268_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 13)
++#define BCM_63268_HSSPI_IRQ		(IRQ_INTERNAL_BASE + 6)
++#define BCM_63268_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 9)
++#define BCM_63268_EHCI0_IRQ		(IRQ_INTERNAL_BASE + 10)
++#define BCM_63268_USBD_IRQ		(IRQ_INTERNAL_BASE + 11)
++#define BCM_63268_USBD_RXDMA0_IRQ	(IRQ_INTERNAL_BASE + 19)
++#define BCM_63268_USBD_TXDMA0_IRQ	(BCM_63268_HIGH_IRQ_BASE + 4)
++#define BCM_63268_USBD_RXDMA1_IRQ	(IRQ_INTERNAL_BASE + 20)
++#define BCM_63268_USBD_TXDMA1_IRQ	(BCM_63268_HIGH_IRQ_BASE + 5)
++#define BCM_63268_USBD_RXDMA2_IRQ	(IRQ_INTERNAL_BASE + 21)
++#define BCM_63268_USBD_TXDMA2_IRQ	(BCM_63268_HIGH_IRQ_BASE + 6)
++#define BCM_63268_PCMCIA_IRQ		0
++#define BCM_63268_ENET0_RXDMA_IRQ	0
++#define BCM_63268_ENET0_TXDMA_IRQ	0
++#define BCM_63268_ENET1_RXDMA_IRQ	0
++#define BCM_63268_ENET1_TXDMA_IRQ	0
++#define BCM_63268_PCI_IRQ		(BCM_63268_HIGH_IRQ_BASE + 8)
++#define BCM_63268_ATM_IRQ		0
++#define BCM_63268_ENETSW_RXDMA0_IRQ	(IRQ_INTERNAL_BASE + 1)
++#define BCM_63268_ENETSW_RXDMA1_IRQ	(IRQ_INTERNAL_BASE + 2)
++#define BCM_63268_ENETSW_RXDMA2_IRQ	(IRQ_INTERNAL_BASE + 3)
++#define BCM_63268_ENETSW_RXDMA3_IRQ	(IRQ_INTERNAL_BASE + 4)
++#define BCM_63268_ENETSW_TXDMA0_IRQ	(BCM_63268_VERY_HIGH_IRQ_BASE + 0)
++#define BCM_63268_ENETSW_TXDMA1_IRQ	(BCM_63268_VERY_HIGH_IRQ_BASE + 1)
++#define BCM_63268_ENETSW_TXDMA2_IRQ	(BCM_63268_VERY_HIGH_IRQ_BASE + 2)
++#define BCM_63268_ENETSW_TXDMA3_IRQ	(BCM_63268_VERY_HIGH_IRQ_BASE + 3)
++#define BCM_63268_XTM_IRQ		(BCM_63268_HIGH_IRQ_BASE + 17)
++#define BCM_63268_XTM_DMA0_IRQ		(IRQ_INTERNAL_BASE + 26)
++
++#define BCM_63268_RING_OSC_IRQ		(BCM_63268_HIGH_IRQ_BASE + 20)
++#define BCM_63268_WLAN_GPIO_IRQ		(BCM_63268_HIGH_IRQ_BASE + 3)
++#define BCM_63268_WLAN_IRQ		(IRQ_INTERNAL_BASE + 7)
++#define BCM_63268_IPSEC_IRQ		(IRQ_INTERNAL_BASE + 8)
++#define BCM_63268_NAND_IRQ		(BCM_63268_HIGH_IRQ_BASE + 18)
++#define BCM_63268_PCM_IRQ		(IRQ_INTERNAL_BASE + 13)
++#define BCM_63268_DG_IRQ		(IRQ_INTERNAL_BASE + 15)
++#define BCM_63268_EPHY_ENERGY0_IRQ	(IRQ_INTERNAL_BASE + 16)
++#define BCM_63268_EPHY_ENERGY1_IRQ	(IRQ_INTERNAL_BASE + 17)
++#define BCM_63268_EPHY_ENERGY2_IRQ	(IRQ_INTERNAL_BASE + 18)
++#define BCM_63268_EPHY_ENERGY3_IRQ	(IRQ_INTERNAL_BASE + 19)
++#define BCM_63268_IPSEC_DMA0_IRQ	(IRQ_INTERNAL_BASE + 22)
++#define BCM_63268_IPSEC_DMA1_IRQ	(BCM_63268_HIGH_IRQ_BASE + 7)
++#define BCM_63268_FAP0_IRQ		(IRQ_INTERNAL_BASE + 24)
++#define BCM_63268_FAP1_IRQ		(IRQ_INTERNAL_BASE + 25)
++#define BCM_63268_PCM_DMA0_IRQ		(BCM_63268_HIGH_IRQ_BASE + 10)
++#define BCM_63268_PCM_DMA1_IRQ		(BCM_63268_HIGH_IRQ_BASE + 11)
++#define BCM_63268_DECT0_IRQ		(BCM_63268_HIGH_IRQ_BASE + 0)
++#define BCM_63268_DECT1_IRQ		(BCM_63268_HIGH_IRQ_BASE + 1)
++#define BCM_63268_EXT_IRQ0		(BCM_63268_HIGH_IRQ_BASE + 12)
++#define BCM_63268_EXT_IRQ1		(BCM_63268_HIGH_IRQ_BASE + 13)
++#define BCM_63268_EXT_IRQ2		(BCM_63268_HIGH_IRQ_BASE + 14)
++#define BCM_63268_EXT_IRQ3		(BCM_63268_HIGH_IRQ_BASE + 15)
++
+ extern const int *bcm63xx_irqs;
+ 
+ #define __GEN_CPU_IRQ_TABLE(__cpu)					\
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+@@ -22,6 +22,8 @@ static inline unsigned long bcm63xx_gpio
+ 		return 48;
+ 	case BCM6368_CPU_ID:
+ 		return 38;
++	case BCM63268_CPU_ID:
++		return 52;
+ 	case BCM6348_CPU_ID:
+ 	default:
+ 		return 37;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -9,6 +9,8 @@
+ #define PERF_REV_REG			0x0
+ #define REV_CHIPID_SHIFT		16
+ #define REV_CHIPID_MASK			(0xffff << REV_CHIPID_SHIFT)
++#define REV_LONG_CHIPID_SHIFT		12
++#define REV_LONG_CHIPID_MASK		(0xfffff << REV_LONG_CHIPID_SHIFT)
+ #define REV_VARID_SHIFT			12
+ #define REV_VARID_MASK			(0xf << REV_VARID_SHIFT)
+ #define REV_REVID_SHIFT			0
+@@ -211,6 +213,52 @@
+ 					CKCTL_6368_NAND_EN |		\
+ 					CKCTL_6368_IPSEC_EN)
+ 
++#define CKCTL_63268_DISABLE_GLESS	(1 << 0)
++#define CKCTL_63268_VDSL_QPROC_EN	(1 << 1)
++#define CKCTL_63268_VDSL_AFE_EN		(1 << 2)
++#define CKCTL_63268_VDSL_EN		(1 << 3)
++#define CKCTL_63268_MIPS_EN		(1 << 4)
++#define CKCTL_63268_WLAN_OCP_EN		(1 << 5)
++#define CKCTL_63268_DECT_EN		(1 << 6)
++#define CKCTL_63268_FAP0_EN		(1 << 7)
++#define CKCTL_63268_FAP1_EN		(1 << 8)
++#define CKCTL_63268_SAR_EN		(1 << 9)
++#define CKCTL_63268_ROBOSW_EN		(1 << 10)
++#define CKCTL_63268_PCM_EN		(1 << 11)
++#define CKCTL_63268_USBD_EN		(1 << 12)
++#define CKCTL_63268_USBH_EN		(1 << 13)
++#define CKCTL_63268_IPSEC_EN		(1 << 14)
++#define CKCTL_63268_SPI_EN		(1 << 15)
++#define CKCTL_63268_HSSPI_EN		(1 << 16)
++#define CKCTL_63268_PCIE_EN		(1 << 17)
++#define CKCTL_63268_PHYMIPS_EN		(1 << 18)
++#define CKCTL_63268_GMAC_EN		(1 << 19)
++#define CKCTL_63268_NAND_EN		(1 << 20)
++#define CKCTL_63268_TBUS_EN		(1 << 27)
++#define CKCTL_63268_ROBOSW250_EN	(1 << 31)
++
++#define CKCTL_63268_ALL_SAFE_EN		(CKCTL_63268_VDSL_QPROC_EN |	\
++					CKCTL_63268_VDSL_AFE_EN |	\
++					CKCTL_63268_VDSL_EN |		\
++					CKCTL_63268_WLAN_OCP_EN |	\
++					CKCTL_63268_DECT_EN |		\
++					CKCTL_63268_FAP0_EN |		\
++					CKCTL_63268_FAP1_EN |		\
++					CKCTL_63268_SAR_EN |		\
++					CKCTL_63268_ROBOSW_EN |		\
++					CKCTL_63268_PCM_EN |		\
++					CKCTL_63268_USBD_EN |		\
++					CKCTL_63268_USBH_EN |		\
++					CKCTL_63268_IPSEC_EN |		\
++					CKCTL_63268_SPI_EN |		\
++					CKCTL_63268_HSSPI_EN |		\
++					CKCTL_63268_PCIE_EN |		\
++					CKCTL_63268_PHYMIPS_EN |	\
++					CKCTL_63268_GMAC_EN |		\
++					CKCTL_63268_NAND_EN |		\
++					CKCTL_63268_TBUS_EN |		\
++					CKCTL_63268_ROBOSW250_EN)
++
+ /* System PLL Control register	*/
+ #define PERF_SYS_PLL_CTL_REG		0x8
+ #define SYS_PLL_SOFT_RESET		0x1
+@@ -224,6 +272,7 @@
+ #define PERF_IRQMASK_6358_REG(x)	(0xc + (x) * 0x2c)
+ #define PERF_IRQMASK_6362_REG(x)	(0x20 + (x) * 0x10)
+ #define PERF_IRQMASK_6368_REG(x)	(0x20 + (x) * 0x10)
++#define PERF_IRQMASK_63268_REG(x)	(0x20 + (x) * 0x20)
+ 
+ /* Interrupt Status register */
+ #define PERF_IRQSTAT_3368_REG		0x10
+@@ -234,6 +283,7 @@
+ #define PERF_IRQSTAT_6358_REG(x)	(0x10 + (x) * 0x2c)
+ #define PERF_IRQSTAT_6362_REG(x)	(0x28 + (x) * 0x10)
+ #define PERF_IRQSTAT_6368_REG(x)	(0x28 + (x) * 0x10)
++#define PERF_IRQSTAT_63268_REG(x)	(0x30 + (x) * 0x20)
+ 
+ /* External Interrupt Configuration register */
+ #define PERF_EXTIRQ_CFG_REG_3368	0x14
+@@ -244,6 +294,7 @@
+ #define PERF_EXTIRQ_CFG_REG_6358	0x14
+ #define PERF_EXTIRQ_CFG_REG_6362	0x18
+ #define PERF_EXTIRQ_CFG_REG_6368	0x18
++#define PERF_EXTIRQ_CFG_REG_63268	0x18
+ 
+ #define PERF_EXTIRQ_CFG_REG2_6358	0x1c
+ #define PERF_EXTIRQ_CFG_REG2_6368	0x1c
+@@ -274,6 +325,7 @@
+ #define PERF_SOFTRESET_6358_REG		0x34
+ #define PERF_SOFTRESET_6362_REG		0x10
+ #define PERF_SOFTRESET_6368_REG		0x10
++#define PERF_SOFTRESET_63268_REG	0x10
+ 
+ #define SOFTRESET_3368_SPI_MASK		(1 << 0)
+ #define SOFTRESET_3368_ENET_MASK	(1 << 2)
+@@ -367,6 +419,26 @@
+ #define SOFTRESET_6368_USBH_MASK	(1 << 12)
+ #define SOFTRESET_6368_PCM_MASK		(1 << 13)
+ 
++#define SOFTRESET_63268_SPI_MASK	(1 << 0)
++#define SOFTRESET_63268_IPSEC_MASK	(1 << 1)
++#define SOFTRESET_63268_EPHY_MASK	(1 << 2)
++#define SOFTRESET_63268_SAR_MASK	(1 << 3)
++#define SOFTRESET_63268_ENETSW_MASK	(1 << 4)
++#define SOFTRESET_63268_USBS_MASK	(1 << 5)
++#define SOFTRESET_63268_USBH_MASK	(1 << 6)
++#define SOFTRESET_63268_PCM_MASK	(1 << 7)
++#define SOFTRESET_63268_PCIE_CORE_MASK	(1 << 8)
++#define SOFTRESET_63268_PCIE_MASK	(1 << 9)
++#define SOFTRESET_63268_PCIE_EXT_MASK	(1 << 10)
++#define SOFTRESET_63268_WLAN_SHIM_MASK	(1 << 11)
++#define SOFTRESET_63268_DDR_PHY_MASK	(1 << 12)
++#define SOFTRESET_63268_FAP0_MASK	(1 << 13)
++#define SOFTRESET_63268_WLAN_UBUS_MASK	(1 << 14)
++#define SOFTRESET_63268_DECT_MASK	(1 << 15)
++#define SOFTRESET_63268_FAP1_MASK	(1 << 16)
++#define SOFTRESET_63268_PCIE_HARD_MASK	(1 << 17)
++#define SOFTRESET_63268_GPHY_MASK	(1 << 18)
++
+ /* MIPS PLL control register */
+ #define PERF_MIPSPLLCTL_REG		0x34
+ #define MIPSPLLCTL_N1_SHIFT		20
+@@ -1380,6 +1452,13 @@
+ #define STRAPBUS_6362_BOOT_SEL_SERIAL	(1 << 15)
+ #define STRAPBUS_6362_BOOT_SEL_NAND	(0 << 15)
+ 
++#define MISC_STRAPBUS_63268_REG		0x14
++#define STRAPBUS_63268_HSSPI_CLK_FAST	(1 << 9)
++#define STRAPBUS_63268_BOOT_SEL_SERIAL	(1 << 11)
++#define STRAPBUS_63268_BOOT_SEL_NAND	(0 << 11)
++#define STRAPBUS_63268_FCVO_SHIFT	21
++#define STRAPBUS_63268_FCVO_MASK	(0xf << STRAPBUS_63268_FCVO_SHIFT)
++
+ #define MISC_STRAPBUS_6328_REG		0x240
+ #define STRAPBUS_6328_FCVO_SHIFT	7
+ #define STRAPBUS_6328_FCVO_MASK		(0x1f << STRAPBUS_6328_FCVO_SHIFT)
+--- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
++++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
+@@ -25,6 +25,7 @@ static inline int is_bcm63xx_internal_re
+ 	case BCM6328_CPU_ID:
+ 	case BCM6362_CPU_ID:
+ 	case BCM6368_CPU_ID:
++	case BCM63268_CPU_ID:
+ 		if (offset >= 0xb0000000 && offset < 0xb1000000)
+ 			return 1;
+ 		break;
+--- a/arch/mips/bcm63xx/dev-hsspi.c
++++ b/arch/mips/bcm63xx/dev-hsspi.c
+@@ -35,7 +35,7 @@ static struct platform_device bcm63xx_hs
+ 
+ int __init bcm63xx_hsspi_register(void)
+ {
+-	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362())
++	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
+ 		return -ENODEV;
+ 
+ 	spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
+--- a/arch/mips/bcm63xx/dev-enet.c
++++ b/arch/mips/bcm63xx/dev-enet.c
+@@ -176,7 +176,8 @@ static int __init register_shared(void)
+ 	else
+ 		shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
+ 
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
++	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
++		BCMCPU_IS_63268())
+ 		chan_count = 32;
+ 	else if (BCMCPU_IS_6345())
+ 		chan_count = 8;
+@@ -276,7 +277,8 @@ bcm63xx_enetsw_register(const struct bcm
+ {
+ 	int ret;
+ 
+-	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
++		!BCMCPU_IS_63268())
+ 		return -ENODEV;
+ 
+ 	ret = register_shared();
+@@ -297,6 +299,8 @@ bcm63xx_enetsw_register(const struct bcm
+ 		enetsw_pd.num_ports = ENETSW_PORTS_6328;
+ 	else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
+ 		enetsw_pd.num_ports = ENETSW_PORTS_6368;
++	else if (BCMCPU_IS_63268())
++		enetsw_pd.num_ports = ENETSW_PORTS_63268;
+ 
+ 	enetsw_pd.dma_has_sram = true;
+ 	enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
+@@ -62,6 +62,7 @@ struct bcm63xx_enet_platform_data {
+ #define ENETSW_MAX_PORT	8
+ #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
+ #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
++#define ENETSW_PORTS_63268 8 /* 3 FE PHY + 1 GE PHY + 4 RGMII */
+ 
+ #define ENETSW_RGMII_PORT0	4
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch b/target/linux/brcm63xx/patches-3.18/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch
new file mode 100644
index 0000000..4e8a090
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch
@@ -0,0 +1,55 @@
+From 5c290c81dbdb4433600593fe80c88eb4af86e791 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 03:22:40 +0100
+Subject: [PATCH 50/53] MIPS: BCM63XX: add pcie support for BCM63268
+
+---
+ arch/mips/bcm63xx/reset.c                       | 3 ++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 5 +++++
+ arch/mips/pci/pci-bcm63xx.c                     | 4 ++++
+ 3 files changed, 11 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -136,7 +136,8 @@
+ #define BCM63268_RESET_PCM	SOFTRESET_63268_PCM_MASK
+ #define BCM63268_RESET_MPI	0
+ #define BCM63268_RESET_PCIE	(SOFTRESET_63268_PCIE_MASK | \
+-				 SOFTRESET_63268_PCIE_CORE_MASK)
++				 SOFTRESET_63268_PCIE_CORE_MASK | \
++				 SOFTRESET_63268_PCIE_HARD_MASK)
+ #define BCM63268_RESET_PCIE_EXT	SOFTRESET_63268_PCIE_EXT_MASK
+ 
+ /*
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -45,6 +45,11 @@
+ #define BCM_PCIE_MEM_END_PA_6328	(BCM_PCIE_MEM_BASE_PA_6328 +	\
+ 					BCM_PCIE_MEM_SIZE_6328 - 1)
+ 
++#define BCM_PCIE_MEM_BASE_PA_63268	0x11000000
++#define BCM_PCIE_MEM_SIZE_63268		(15 * 1024 * 1024)
++#define BCM_PCIE_MEM_END_PA_63268	(BCM_PCIE_MEM_BASE_PA_63268 +	\
++					BCM_PCIE_MEM_SIZE_63268 - 1)
++
+ /*
+  * Internal registers are accessed through KSEG3
+  */
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -337,11 +337,15 @@ static int __init bcm63xx_pci_init(void)
+ 	if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
+ 		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
+ 		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
++	} else if (BCMCPU_IS_63268()) {
++		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_63268;
++		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_63268;
+ 	}
+ 
+ 	switch (bcm63xx_get_cpu_id()) {
+ 	case BCM6328_CPU_ID:
+ 	case BCM6362_CPU_ID:
++	case BCM63268_CPU_ID:
+ 		return bcm63xx_register_pcie();
+ 	case BCM3368_CPU_ID:
+ 	case BCM6348_CPU_ID:
diff --git a/target/linux/brcm63xx/patches-3.18/341-MIPS-BCM63XX-add-support-for-BCM6318.patch b/target/linux/brcm63xx/patches-3.18/341-MIPS-BCM63XX-add-support-for-BCM6318.patch
new file mode 100644
index 0000000..f3f4c6a
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/341-MIPS-BCM63XX-add-support-for-BCM6318.patch
@@ -0,0 +1,675 @@
+From 60c29522a8c77d96145d965589c56befda7d4c3d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 01:24:09 +0100
+Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
+
+---
+ arch/mips/bcm63xx/Kconfig                         |   5 +
+ arch/mips/bcm63xx/boards/board_bcm963xx.c         |   2 +-
+ arch/mips/bcm63xx/clk.c                           |   8 +-
+ arch/mips/bcm63xx/cpu.c                           |  53 +++++++++++
+ arch/mips/bcm63xx/dev-flash.c                     |   3 +
+ arch/mips/bcm63xx/dev-spi.c                       |   2 +-
+ arch/mips/bcm63xx/irq.c                           |  10 ++
+ arch/mips/bcm63xx/prom.c                          |   2 +-
+ arch/mips/bcm63xx/reset.c                         |  24 +++++
+ arch/mips/bcm63xx/setup.c                         |   5 +-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h  | 107 ++++++++++++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |  75 ++++++++++++++-
+ arch/mips/include/asm/mach-bcm63xx/ioremap.h      |   1 +
+ 13 files changed, 291 insertions(+), 6 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -18,6 +18,11 @@ config BCM63XX_EHCI
+ 	select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
+ 	select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
+ 
++config BCM63XX_CPU_6318
++	bool "support 6318 CPU"
++	select SYS_HAS_CPU_BMIPS32_3300
++	select HW_HAS_PCI
++
+ config BCM63XX_CPU_6328
+ 	bool "support 6328 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -717,7 +717,7 @@ void __init board_prom_init(void)
+ 	/* read base address of boot chip select (0)
+ 	 * 6328/6362 do not have MPI but boot from a fixed address
+ 	 */
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
++	if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
+ 		val = 0x18000000;
+ 	} else {
+ 		val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -252,7 +252,9 @@ static void hsspi_set(struct clk *clk, i
+ {
+ 	u32 mask;
+ 
+-	if (BCMCPU_IS_6328())
++	if (BCMCPU_IS_6318())
++		mask = CKCTL_6318_HSSPI_EN;
++	else if (BCMCPU_IS_6328())
+ 		mask = CKCTL_6328_HSSPI_EN;
+ 	else if (BCMCPU_IS_6362())
+ 		mask = CKCTL_6362_HSSPI_EN;
+@@ -417,12 +419,16 @@ void clk_put(struct clk *clk)
+ 
+ EXPORT_SYMBOL(clk_put);
+ 
++#define HSSPI_PLL_HZ_6318	250000000
+ #define HSSPI_PLL_HZ_6328	133333333
+ #define HSSPI_PLL_HZ_6362	400000000
+ 
+ static int __init bcm63xx_clk_init(void)
+ {
+ 	switch (bcm63xx_get_cpu_id()) {
++	case BCM6318_CPU_ID:
++		clk_hsspi.rate = HSSPI_PLL_HZ_6318;
++		break;
+ 	case BCM6328_CPU_ID:
+ 		clk_hsspi.rate = HSSPI_PLL_HZ_6328;
+ 		break;
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -41,6 +41,14 @@ static const int bcm3368_irqs[] = {
+ 	__GEN_CPU_IRQ_TABLE(3368)
+ };
+ 
++static const unsigned long bcm6318_regs_base[] = {
++	__GEN_CPU_REGS_TABLE(6318)
++};
++
++static const int bcm6318_irqs[] = {
++	__GEN_CPU_IRQ_TABLE(6318)
++};
++
+ static const unsigned long bcm6328_regs_base[] = {
+ 	__GEN_CPU_REGS_TABLE(6328)
+ };
+@@ -134,6 +142,10 @@ unsigned int bcm63xx_get_memory_size(voi
+ 	return bcm63xx_memory_size;
+ }
+ 
++#define STRAP_OVERRIDE_BUS_REG		0x0
++#define OVERRIDE_BUS_MIPS_FREQ_SHIFT	23
++#define OVERRIDE_BUS_MIPS_FREQ_MASK	(0x3 << OVERRIDE_BUS_MIPS_FREQ_SHIFT)
++
+ static unsigned int detect_cpu_clock(void)
+ {
+ 	u32 cpu_id = bcm63xx_get_cpu_id();
+@@ -142,6 +154,28 @@ static unsigned int detect_cpu_clock(voi
+ 	case BCM3368_CPU_ID:
+ 		return 300000000;
+ 
++	case BCM6318_CPU_ID:
++	{
++		unsigned int tmp, mips_pll_fcvo;
++
++		tmp = bcm_readl(BCM_6318_STRAP_BASE + STRAP_OVERRIDE_BUS_REG);
++
++		pr_info("strap_override_bus = %08x\n", tmp);
++
++		mips_pll_fcvo = (tmp & OVERRIDE_BUS_MIPS_FREQ_MASK)
++				>> OVERRIDE_BUS_MIPS_FREQ_SHIFT;
++
++		switch (mips_pll_fcvo) {
++		case 0:
++			return 166000000;
++		case 1:
++			return 400000000;
++		case 2:
++			return 250000000;
++		case 3:
++			return 333000000;
++		};
++	}
+ 	case BCM6328_CPU_ID:
+ 	{
+ 		unsigned int tmp, mips_pll_fcvo;
+@@ -297,6 +331,13 @@ static unsigned int detect_memory_size(v
+ 	unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
+ 	u32 val;
+ 
++	if (BCMCPU_IS_6318()) {
++		val = bcm_sdram_readl(SDRAM_CFG_REG);
++		val = val & SDRAM_CFG_6318_SPACE_MASK;
++		val >>= SDRAM_CFG_6318_SPACE_SHIFT;
++		return 1 << (val + 20);
++	}
++
+ 	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
+ 		return bcm_ddr_readl(DDR_CSEND_REG) << 24;
+ 
+@@ -343,6 +384,12 @@ void __init bcm63xx_cpu_init(void)
+ 
+ 	switch (current_cpu_type()) {
+ 	case CPU_BMIPS3300:
++		if ((read_c0_prid() & 0xff) >= 0x33) {
++			/* BCM6318 */
++			chipid_reg = BCM_6368_PERF_BASE;
++			break;
++		}
++
+ 		if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT)
+ 			__cpu_name[cpu] = "Broadcom BCM6338";
+ 		/* fall-through */
+@@ -390,6 +437,10 @@ void __init bcm63xx_cpu_init(void)
+ 	bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ 
+ 	switch (bcm63xx_cpu_id) {
++	case BCM6318_CPU_ID:
++		bcm63xx_regs_base = bcm6318_regs_base;
++		bcm63xx_irqs = bcm6318_irqs;
++		break;
+ 	case BCM3368_CPU_ID:
+ 		bcm63xx_regs_base = bcm3368_regs_base;
+ 		bcm63xx_irqs = bcm3368_irqs;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -60,6 +60,9 @@ static int __init bcm63xx_detect_flash_t
+ 	u32 val;
+ 
+ 	switch (bcm63xx_get_cpu_id()) {
++	case BCM6318_CPU_ID:
++		/* only support serial flash */
++		return BCM63XX_FLASH_TYPE_SERIAL;
+ 	case BCM6328_CPU_ID:
+ 		val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
+ 		if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
+--- a/arch/mips/bcm63xx/dev-spi.c
++++ b/arch/mips/bcm63xx/dev-spi.c
+@@ -70,7 +70,7 @@ static struct platform_device bcm63xx_sp
+ 
+ int __init bcm63xx_spi_register(void)
+ {
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6345())
++	if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345())
+ 		return -ENODEV;
+ 
+ 	spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -49,6 +49,19 @@ static void bcm63xx_init_irq(void)
+ 		ext_irqs[3] = BCM_3368_EXT_IRQ3;
+ 		ext_shift = 4;
+ 		break;
++	case BCM6318_CPU_ID:
++		periph_bases[0] += PERF_IRQMASK_6318_REG;
++		periph_irq_count = 1;
++		periph_width = 4;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6318;
++		ext_irq_count = 4;
++		ext_irqs[0] = BCM_6318_EXT_IRQ0;
++		ext_irqs[1] = BCM_6318_EXT_IRQ0;
++		ext_irqs[2] = BCM_6318_EXT_IRQ0;
++		ext_irqs[3] = BCM_6318_EXT_IRQ0;
++		ext_shift = 4;
++		break;
+ 	case BCM6328_CPU_ID:
+ 		periph_bases[0] += PERF_IRQMASK_6328_REG(0);
+ 		periph_bases[1] += PERF_IRQMASK_6328_REG(1);
+--- a/arch/mips/bcm63xx/prom.c
++++ b/arch/mips/bcm63xx/prom.c
+@@ -68,7 +68,7 @@ void __init prom_init(void)
+ 
+ 			if (reg & OTP_6328_REG3_TP1_DISABLED)
+ 				bmips_smp_enabled = 0;
+-		} else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
++		} else if (BCMCPU_IS_6318() || BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
+ 			bmips_smp_enabled = 0;
+ 		}
+ 
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -43,6 +43,23 @@
+ #define BCM3368_RESET_PCIE	0
+ #define BCM3368_RESET_PCIE_EXT	0
+ 
++
++#define BCM6318_RESET_SPI	SOFTRESET_6318_SPI_MASK
++#define BCM6318_RESET_ENET	0
++#define BCM6318_RESET_USBH	SOFTRESET_6318_USBH_MASK
++#define BCM6318_RESET_USBD	SOFTRESET_6318_USBS_MASK
++#define BCM6318_RESET_DSL	0
++#define BCM6318_RESET_SAR	SOFTRESET_6318_SAR_MASK
++#define BCM6318_RESET_EPHY	SOFTRESET_6318_EPHY_MASK
++#define BCM6318_RESET_ENETSW	SOFTRESET_6318_ENETSW_MASK
++#define BCM6318_RESET_PCM	0
++#define BCM6318_RESET_MPI	0
++#define BCM6318_RESET_PCIE	\
++				(SOFTRESET_6318_PCIE_MASK |		\
++				 SOFTRESET_6318_PCIE_CORE_MASK |	\
++				 SOFTRESET_6318_PCIE_HARD_MASK)
++#define BCM6318_RESET_PCIE_EXT	SOFTRESET_6318_PCIE_EXT_MASK
++
+ #define BCM6328_RESET_SPI	SOFTRESET_6328_SPI_MASK
+ #define BCM6328_RESET_ENET	0
+ #define BCM6328_RESET_USBH	SOFTRESET_6328_USBH_MASK
+@@ -147,6 +164,10 @@ static const u32 bcm3368_reset_bits[] =
+ 	__GEN_RESET_BITS_TABLE(3368)
+ };
+ 
++static const u32 bcm6318_reset_bits[] = {
++	__GEN_RESET_BITS_TABLE(6318)
++};
++
+ static const u32 bcm6328_reset_bits[] = {
+ 	__GEN_RESET_BITS_TABLE(6328)
+ };
+@@ -183,6 +204,9 @@ static int __init bcm63xx_reset_bits_ini
+ 	if (BCMCPU_IS_3368()) {
+ 		reset_reg = PERF_SOFTRESET_6358_REG;
+ 		bcm63xx_reset_bits = bcm3368_reset_bits;
++	} else if (BCMCPU_IS_6318()) {
++		reset_reg = PERF_SOFTRESET_6318_REG;
++		bcm63xx_reset_bits = bcm6318_reset_bits;
+ 	} else if (BCMCPU_IS_6328()) {
+ 		reset_reg = PERF_SOFTRESET_6328_REG;
+ 		bcm63xx_reset_bits = bcm6328_reset_bits;
+--- a/arch/mips/bcm63xx/setup.c
++++ b/arch/mips/bcm63xx/setup.c
+@@ -72,6 +72,9 @@ void bcm63xx_machine_reboot(void)
+ 	case BCM3368_CPU_ID:
+ 		perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368;
+ 		break;
++	case BCM6318_CPU_ID:
++		perf_regs[0] = PERF_EXTIRQ_CFG_REG_6318;
++		break;
+ 	case BCM6328_CPU_ID:
+ 		perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328;
+ 		break;
+@@ -111,7 +114,7 @@ void bcm63xx_machine_reboot(void)
+ 		bcm6348_a1_reboot();
+ 
+ 	printk(KERN_INFO "triggering watchdog soft-reset...\n");
+-	if (BCMCPU_IS_6328()) {
++	if (BCMCPU_IS_6318() || BCMCPU_IS_6328()) {
+ 		bcm_wdt_writel(1, WDT_SOFTRESET_REG);
+ 	} else {
+ 		reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -10,6 +10,7 @@
+  * arm mach-types)
+  */
+ #define BCM3368_CPU_ID		0x3368
++#define BCM6318_CPU_ID		0x6318
+ #define BCM6328_CPU_ID		0x6328
+ #define BCM63281_CPU_ID		0x63281
+ #define BCM63283_CPU_ID		0x63283
+@@ -38,6 +39,10 @@ static inline u32 __pure __bcm63xx_get_c
+ 		case BCM3368_CPU_ID:
+ #endif
+ 
++#ifdef CONFIG_BCM63XX_CPU_6318
++		case BCM6318_CPU_ID:
++#endif
++
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 		case BCM6328_CPU_ID:
+ #endif
+@@ -87,6 +92,7 @@ static inline u32 __pure bcm63xx_get_cpu
+ }
+ 
+ #define BCMCPU_IS_3368()	(bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
++#define BCMCPU_IS_6318()	(bcm63xx_get_cpu_id() == BCM6318_CPU_ID)
+ #define BCMCPU_IS_6328()	(bcm63xx_get_cpu_id() == BCM6328_CPU_ID)
+ #define BCMCPU_IS_6338()	(bcm63xx_get_cpu_id() == BCM6338_CPU_ID)
+ #define BCMCPU_IS_6345()	(bcm63xx_get_cpu_id() == BCM6345_CPU_ID)
+@@ -98,6 +104,8 @@ static inline u32 __pure bcm63xx_get_cpu
+ 
+ #define BCMCPU_VARIANT_IS_3368() \
+ 	(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6318() \
++	(bcm63xx_get_cpu_variant() == BCM6318_CPU_ID)
+ #define BCMCPU_VARIANT_IS_63281() \
+ 	(bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
+ #define BCMCPU_VARIANT_IS_63283() \
+@@ -252,6 +260,56 @@ enum bcm63xx_regs_set {
+ #define BCM_3368_MISC_BASE		(0xdeadbeef)
+ 
+ /*
++ * 6318 register sets base address
++ */
++#define BCM_6318_DSL_LMEM_BASE		(0xdeadbeef)
++#define BCM_6318_PERF_BASE		(0xb0000000)
++#define BCM_6318_TIMER_BASE		(0xb0000040)
++#define BCM_6318_WDT_BASE		(0xb0000068)
++#define BCM_6318_UART0_BASE		(0xb0000100)
++#define BCM_6318_UART1_BASE		(0xdeadbeef)
++#define BCM_6318_GPIO_BASE		(0xb0000080)
++#define BCM_6318_SPI_BASE		(0xdeadbeef)
++#define BCM_6318_HSSPI_BASE		(0xb0003000)
++#define BCM_6318_UDC0_BASE		(0xdeadbeef)
++#define BCM_6318_USBDMA_BASE		(0xb0006800)
++#define BCM_6318_OHCI0_BASE		(0xb0005100)
++#define BCM_6318_OHCI_PRIV_BASE		(0xdeadbeef)
++#define BCM_6318_USBH_PRIV_BASE		(0xb0005200)
++#define BCM_6318_USBD_BASE		(0xb0006000)
++#define BCM_6318_MPI_BASE		(0xdeadbeef)
++#define BCM_6318_PCMCIA_BASE		(0xdeadbeef)
++#define BCM_6318_PCIE_BASE		(0xb0010000)
++#define BCM_6318_SDRAM_REGS_BASE	(0xdeadbeef)
++#define BCM_6318_DSL_BASE		(0xdeadbeef)
++#define BCM_6318_UBUS_BASE		(0xdeadbeef)
++#define BCM_6318_ENET0_BASE		(0xdeadbeef)
++#define BCM_6318_ENET1_BASE		(0xdeadbeef)
++#define BCM_6318_ENETDMA_BASE		(0xb0088000)
++#define BCM_6318_ENETDMAC_BASE		(0xb0088200)
++#define BCM_6318_ENETDMAS_BASE		(0xb0088400)
++#define BCM_6318_ENETSW_BASE		(0xb0080000)
++#define BCM_6318_EHCI0_BASE		(0xb0005000)
++#define BCM_6318_SDRAM_BASE		(0xb0004000)
++#define BCM_6318_MEMC_BASE		(0xdeadbeef)
++#define BCM_6318_DDR_BASE		(0xdeadbeef)
++#define BCM_6318_M2M_BASE		(0xdeadbeef)
++#define BCM_6318_ATM_BASE		(0xdeadbeef)
++#define BCM_6318_XTM_BASE		(0xdeadbeef)
++#define BCM_6318_XTMDMA_BASE		(0xb000c000)
++#define BCM_6318_XTMDMAC_BASE		(0xdeadbeef)
++#define BCM_6318_XTMDMAS_BASE		(0xdeadbeef)
++#define BCM_6318_PCM_BASE		(0xdeadbeef)
++#define BCM_6318_PCMDMA_BASE		(0xdeadbeef)
++#define BCM_6318_PCMDMAC_BASE		(0xdeadbeef)
++#define BCM_6318_PCMDMAS_BASE		(0xdeadbeef)
++#define BCM_6318_RNG_BASE		(0xdeadbeef)
++#define BCM_6318_MISC_BASE		(0xb0000280)
++#define BCM_6318_OTP_BASE		(0xdeadbeef)
++
++#define BCM_6318_STRAP_BASE		(0xb0000900)
++
++/*
+  * 6328 register sets base address
+  */
+ #define BCM_6328_DSL_LMEM_BASE		(0xdeadbeef)
+@@ -774,6 +832,55 @@ enum bcm63xx_irq {
+ #define BCM_3368_EXT_IRQ2		(IRQ_INTERNAL_BASE + 27)
+ #define BCM_3368_EXT_IRQ3		(IRQ_INTERNAL_BASE + 28)
+ 
++/*
++ * 6318 irqs
++ */
++#define BCM_6318_HIGH_IRQ_BASE		(IRQ_INTERNAL_BASE + 32)
++#define BCM_6318_VERY_HIGH_IRQ_BASE	(BCM_6318_HIGH_IRQ_BASE + 32)
++
++#define BCM_6318_TIMER_IRQ		(IRQ_INTERNAL_BASE + 31)
++#define BCM_6318_SPI_IRQ		0
++#define BCM_6318_UART0_IRQ		(IRQ_INTERNAL_BASE + 28)
++#define BCM_6318_UART1_IRQ		0
++#define BCM_6318_DSL_IRQ		(IRQ_INTERNAL_BASE + 21)
++#define BCM_6318_UDC0_IRQ		0
++#define BCM_6318_ENET0_IRQ		0
++#define BCM_6318_ENET1_IRQ		0
++#define BCM_6318_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 12)
++#define BCM_6318_HSSPI_IRQ		(IRQ_INTERNAL_BASE + 29)
++#define BCM_6318_OHCI0_IRQ		(BCM_6318_HIGH_IRQ_BASE + 9)
++#define BCM_6318_EHCI0_IRQ		(BCM_6318_HIGH_IRQ_BASE + 10)
++#define BCM_6318_USBD_IRQ		(IRQ_INTERNAL_BASE + 4)
++#define BCM_6318_USBD_RXDMA0_IRQ	(IRQ_INTERNAL_BASE + 5)
++#define BCM_6318_USBD_TXDMA0_IRQ	(IRQ_INTERNAL_BASE + 6)
++#define BCM_6318_USBD_RXDMA1_IRQ	(IRQ_INTERNAL_BASE + 7)
++#define BCM_6318_USBD_TXDMA1_IRQ	(IRQ_INTERNAL_BASE + 8)
++#define BCM_6318_USBD_RXDMA2_IRQ	(IRQ_INTERNAL_BASE + 9)
++#define BCM_6318_USBD_TXDMA2_IRQ	(IRQ_INTERNAL_BASE + 10)
++#define BCM_6318_PCMCIA_IRQ		0
++#define BCM_6318_ENET0_RXDMA_IRQ	0
++#define BCM_6318_ENET0_TXDMA_IRQ	0
++#define BCM_6318_ENET1_RXDMA_IRQ	0
++#define BCM_6318_ENET1_TXDMA_IRQ	0
++#define BCM_6318_PCI_IRQ		(IRQ_INTERNAL_BASE + 23)
++#define BCM_6318_ATM_IRQ		0
++#define BCM_6318_ENETSW_RXDMA0_IRQ	(BCM_6318_HIGH_IRQ_BASE + 0)
++#define BCM_6318_ENETSW_RXDMA1_IRQ	(BCM_6318_HIGH_IRQ_BASE + 1)
++#define BCM_6318_ENETSW_RXDMA2_IRQ	(BCM_6318_HIGH_IRQ_BASE + 2)
++#define BCM_6318_ENETSW_RXDMA3_IRQ	(BCM_6318_HIGH_IRQ_BASE + 3)
++#define BCM_6318_ENETSW_TXDMA0_IRQ	(BCM_6318_VERY_HIGH_IRQ_BASE + 10)
++#define BCM_6318_ENETSW_TXDMA1_IRQ	(BCM_6318_VERY_HIGH_IRQ_BASE + 11)
++#define BCM_6318_ENETSW_TXDMA2_IRQ	(BCM_6318_VERY_HIGH_IRQ_BASE + 12)
++#define BCM_6318_ENETSW_TXDMA3_IRQ	(BCM_6318_VERY_HIGH_IRQ_BASE + 13)
++#define BCM_6318_XTM_IRQ		(BCM_6318_HIGH_IRQ_BASE + 31)
++#define BCM_6318_XTM_DMA0_IRQ		(BCM_6318_HIGH_IRQ_BASE + 11)
++
++#define BCM_6318_PCM_DMA0_IRQ		(IRQ_INTERNAL_BASE + 2)
++#define BCM_6318_PCM_DMA1_IRQ		(IRQ_INTERNAL_BASE + 3)
++#define BCM_6318_EXT_IRQ0		(IRQ_INTERNAL_BASE + 24)
++#define BCM_6318_EXT_IRQ1		(IRQ_INTERNAL_BASE + 25)
++#define BCM_6318_EXT_IRQ2		(IRQ_INTERNAL_BASE + 26)
++#define BCM_6318_EXT_IRQ3		(IRQ_INTERNAL_BASE + 27)
+ 
+ /*
+  * 6328 irqs
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -52,6 +52,39 @@
+ 					 CKCTL_3368_EMUSB_EN | \
+ 					 CKCTL_3368_USBU_EN)
+ 
++#define CKCTL_6318_ADSL_ASB_EN		(1 << 0)
++#define CKCTL_6318_USB_ASB_EN		(1 << 1)
++#define CKCTL_6318_MIPS_ASB_EN		(1 << 2)
++#define CKCTL_6318_PCIE_ASB_EN		(1 << 3)
++#define CKCTL_6318_PHYMIPS_ASB_EN	(1 << 4)
++#define CKCTL_6318_ROBOSW_ASB_EN	(1 << 5)
++#define CKCTL_6318_SAR_ASB_EN		(1 << 6)
++#define CKCTL_6318_SDR_ASB_EN		(1 << 7)
++#define CKCTL_6318_SWREG_ASB_EN		(1 << 8)
++#define CKCTL_6318_PERIPH_ASB_EN	(1 << 9)
++#define CKCTL_6318_CPUBUS160_EN		(1 << 10)
++#define CKCTL_6318_ADSL_EN		(1 << 11)
++#define CKCTL_6318_SAR125_EN		(1 << 12)
++#define CKCTL_6318_MIPS_EN		(1 << 13)
++#define CKCTL_6318_PCIE_EN		(1 << 14)
++#define CKCTL_6318_ROBOSW250_EN		(1 << 16)
++#define CKCTL_6318_ROBOSW025_EN		(1 << 17)
++#define CKCTL_6318_SDR_EN		(1 << 19)
++#define CKCTL_6318_USB_EN		(1 << 20) /* both device and host */
++#define CKCTL_6318_HSSPI_EN		(1 << 25)
++#define CKCTL_6318_PCIE25_EN		(1 << 27)
++#define CKCTL_6318_PHYMIPS_EN		(1 << 28)
++#define CKCTL_6318_ADSL_AFE_EN		(1 << 29)
++#define CKCTL_6318_ADSL_QPROC_EN	(1 << 30)
++
++#define CKCTL_6318_ALL_SAFE_EN		(CKCTL_6318_PHYMIPS_EN |	\
++					CKCTL_6318_ADSL_QPROC_EN |	\
++					CKCTL_6318_ADSL_AFE_EN |	\
++					CKCTL_6318_ADSL_EN |		\
++					CKCTL_6318_SAR_EN  |		\
++					CKCTL_6318_USB_EN |		\
++					CKCTL_6318_PCIE_EN)
++
+ #define CKCTL_6328_PHYMIPS_EN		(1 << 0)
+ #define CKCTL_6328_ADSL_QPROC_EN	(1 << 1)
+ #define CKCTL_6328_ADSL_AFE_EN		(1 << 2)
+@@ -259,12 +292,27 @@
+ 					CKCTL_63268_TBUS_EN |		\
+ 					CKCTL_63268_ROBOSW250_EN)
+ 
++/* UBUS Clock Control register */
++#define PERF_UB_CKCTL_REG		0x10
++
++#define UB_CKCTL_6318_ADSL_EN		(1 << 0)
++#define UB_CKCTL_6318_ARB_EN		(1 << 1)
++#define UB_CKCTL_6318_MIPS_EN		(1 << 2)
++#define UB_CKCTL_6318_PCIE_EN		(1 << 3)
++#define UB_CKCTL_6318_PERIPH_EN		(1 << 4)
++#define UB_CKCTL_6318_PHYMIPS_EN	(1 << 5)
++#define UB_CKCTL_6318_ROBOSW_EN		(1 << 6)
++#define UB_CKCTL_6318_SAR_EN		(1 << 7)
++#define UB_CKCTL_6318_SDR_EN		(1 << 8)
++#define UB_CKCTL_6318_USB_EN		(1 << 9)
++
+ /* System PLL Control register	*/
+ #define PERF_SYS_PLL_CTL_REG		0x8
+ #define SYS_PLL_SOFT_RESET		0x1
+ 
+ /* Interrupt Mask register */
+ #define PERF_IRQMASK_3368_REG		0xc
++#define PERF_IRQMASK_6318_REG		0x20
+ #define PERF_IRQMASK_6328_REG(x)	(0x20 + (x) * 0x10)
+ #define PERF_IRQMASK_6338_REG		0xc
+ #define PERF_IRQMASK_6345_REG		0xc
+@@ -276,6 +324,7 @@
+ 
+ /* Interrupt Status register */
+ #define PERF_IRQSTAT_3368_REG		0x10
++#define PERF_IRQSTAT_6318_REG		0x30
+ #define PERF_IRQSTAT_6328_REG(x)	(0x28 + (x) * 0x10)
+ #define PERF_IRQSTAT_6338_REG		0x10
+ #define PERF_IRQSTAT_6345_REG		0x10
+@@ -287,6 +336,7 @@
+ 
+ /* External Interrupt Configuration register */
+ #define PERF_EXTIRQ_CFG_REG_3368	0x14
++#define PERF_EXTIRQ_CFG_REG_6318	0x18
+ #define PERF_EXTIRQ_CFG_REG_6328	0x18
+ #define PERF_EXTIRQ_CFG_REG_6338	0x14
+ #define PERF_EXTIRQ_CFG_REG_6345	0x14
+@@ -321,6 +371,7 @@
+ 
+ /* Soft Reset register */
+ #define PERF_SOFTRESET_REG		0x28
++#define PERF_SOFTRESET_6318_REG		0x10
+ #define PERF_SOFTRESET_6328_REG		0x10
+ #define PERF_SOFTRESET_6358_REG		0x34
+ #define PERF_SOFTRESET_6362_REG		0x10
+@@ -334,6 +385,18 @@
+ #define SOFTRESET_3368_USBS_MASK	(1 << 11)
+ #define SOFTRESET_3368_PCM_MASK		(1 << 13)
+ 
++#define SOFTRESET_6318_SPI_MASK		(1 << 0)
++#define SOFTRESET_6318_EPHY_MASK	(1 << 1)
++#define SOFTRESET_6318_SAR_MASK		(1 << 2)
++#define SOFTRESET_6318_ENETSW_MASK	(1 << 3)
++#define SOFTRESET_6318_USBS_MASK	(1 << 4)
++#define SOFTRESET_6318_USBH_MASK	(1 << 5)
++#define SOFTRESET_6318_PCIE_CORE_MASK	(1 << 6)
++#define SOFTRESET_6318_PCIE_MASK	(1 << 7)
++#define SOFTRESET_6318_PCIE_EXT_MASK	(1 << 8)
++#define SOFTRESET_6318_PCIE_HARD_MASK	(1 << 9)
++#define SOFTRESET_6318_ADSL_MASK	(1 << 10)
++
+ #define SOFTRESET_6328_SPI_MASK		(1 << 0)
+ #define SOFTRESET_6328_EPHY_MASK	(1 << 1)
+ #define SOFTRESET_6328_SAR_MASK		(1 << 2)
+@@ -505,8 +568,17 @@
+ #define TIMER_IRQSTAT_TIMER1_IR_EN	(1 << 9)
+ #define TIMER_IRQSTAT_TIMER2_IR_EN	(1 << 10)
+ 
++#define TIMER_IRQMASK_6318_REG		0x0
++#define TIMER_IRQSTAT_6318_REG		0x4
++#define IRQSTATMASK_TIMER0		(1 << 0)
++#define IRQSTATMASK_TIMER1		(1 << 1)
++#define IRQSTATMASK_TIMER2		(1 << 2)
++#define IRQSTATMASK_TIMER3		(1 << 3)
++#define IRQSTATMASK_WDT			(1 << 4)
++
+ /* Timer control register */
+ #define TIMER_CTLx_REG(x)		(0x4 + (x * 4))
++#define TIMER_CTRx_6318_REG(x)		(0x8 + (x * 4))
+ #define TIMER_CTL0_REG			0x4
+ #define TIMER_CTL1_REG			0x8
+ #define TIMER_CTL2_REG			0xC
+@@ -1253,6 +1325,8 @@
+ #define SDRAM_CFG_32B_MASK		(1 << SDRAM_CFG_32B_SHIFT)
+ #define SDRAM_CFG_BANK_SHIFT		13
+ #define SDRAM_CFG_BANK_MASK		(1 << SDRAM_CFG_BANK_SHIFT)
++#define SDRAM_CFG_6318_SPACE_SHIFT	4
++#define SDRAM_CFG_6318_SPACE_MASK	(0xf << SDRAM_CFG_6318_SPACE_SHIFT)
+ 
+ #define SDRAM_MBASE_REG			0xc
+ 
+--- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
++++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
+@@ -22,6 +22,7 @@ static inline int is_bcm63xx_internal_re
+ 		if (offset >= 0xfff00000)
+ 			return 1;
+ 		break;
++	case BCM6318_CPU_ID:
+ 	case BCM6328_CPU_ID:
+ 	case BCM6362_CPU_ID:
+ 	case BCM6368_CPU_ID:
+--- a/arch/mips/bcm63xx/dev-hsspi.c
++++ b/arch/mips/bcm63xx/dev-hsspi.c
+@@ -35,7 +35,8 @@ static struct platform_device bcm63xx_hs
+ 
+ int __init bcm63xx_hsspi_register(void)
+ {
+-	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
++	if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
++		!BCMCPU_IS_63268())
+ 		return -ENODEV;
+ 
+ 	spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
+--- a/arch/mips/bcm63xx/dev-usb-usbd.c
++++ b/arch/mips/bcm63xx/dev-usb-usbd.c
+@@ -41,7 +41,7 @@ int __init bcm63xx_usbd_register(const s
+ 		IRQ_USBD_RXDMA2, IRQ_USBD_TXDMA2 };
+ 	int i;
+ 
+-	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
++	if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6368())
+ 		return 0;
+ 
+ 	usbd_resources[0].start = bcm63xx_regset_address(RSET_USBD);
+--- a/arch/mips/bcm63xx/dev-enet.c
++++ b/arch/mips/bcm63xx/dev-enet.c
+@@ -176,8 +176,8 @@ static int __init register_shared(void)
+ 	else
+ 		shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
+ 
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
+-		BCMCPU_IS_63268())
++	if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
++		BCMCPU_IS_6368() || BCMCPU_IS_63268())
+ 		chan_count = 32;
+ 	else if (BCMCPU_IS_6345())
+ 		chan_count = 8;
+@@ -277,8 +277,8 @@ bcm63xx_enetsw_register(const struct bcm
+ {
+ 	int ret;
+ 
+-	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
+-		!BCMCPU_IS_63268())
++	if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
++		!BCMCPU_IS_6368() && !BCMCPU_IS_63268())
+ 		return -ENODEV;
+ 
+ 	ret = register_shared();
+@@ -295,7 +295,7 @@ bcm63xx_enetsw_register(const struct bcm
+ 
+ 	memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd));
+ 
+-	if (BCMCPU_IS_6328())
++	if (BCMCPU_IS_6318() || BCMCPU_IS_6328())
+ 		enetsw_pd.num_ports = ENETSW_PORTS_6328;
+ 	else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
+ 		enetsw_pd.num_ports = ENETSW_PORTS_6368;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+@@ -9,6 +9,8 @@ int __init bcm63xx_gpio_init(void);
+ static inline unsigned long bcm63xx_gpio_count(void)
+ {
+ 	switch (bcm63xx_get_cpu_id()) {
++	case BCM6318_CPU_ID:
++		return 50;
+ 	case BCM6328_CPU_ID:
+ 		return 32;
+ 	case BCM3368_CPU_ID:
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -81,7 +81,8 @@ static struct platform_device bcm63xx_eh
+ 
+ int __init bcm63xx_ehci_register(void)
+ {
+-	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++	if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
++		!BCMCPU_IS_6362() && !BCMCPU_IS_6368())
+ 		return 0;
+ 
+ 	ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
diff --git a/target/linux/brcm63xx/patches-3.18/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch b/target/linux/brcm63xx/patches-3.18/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch
new file mode 100644
index 0000000..71044f8
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch
@@ -0,0 +1,156 @@
+From 4bdfacdeaf3c988c4f3256c88118893eac640b03 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 14:17:50 +0100
+Subject: [PATCH 52/53] MIPS: BCM63XX: split PCIE reset signals
+
+---
+ arch/mips/bcm63xx/reset.c                          | 39 ++++++++++++++--------
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h |  2 ++
+ arch/mips/pci/pci-bcm63xx.c                        |  7 ++++
+ 3 files changed, 34 insertions(+), 14 deletions(-)
+
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -28,7 +28,9 @@
+ 	[BCM63XX_RESET_PCM]		= BCM## __cpu ##_RESET_PCM,	\
+ 	[BCM63XX_RESET_MPI]		= BCM## __cpu ##_RESET_MPI,	\
+ 	[BCM63XX_RESET_PCIE]		= BCM## __cpu ##_RESET_PCIE,	\
+-	[BCM63XX_RESET_PCIE_EXT]	= BCM## __cpu ##_RESET_PCIE_EXT,
++	[BCM63XX_RESET_PCIE_EXT]	= BCM## __cpu ##_RESET_PCIE_EXT, \
++	[BCM63XX_RESET_PCIE_CORE]	= BCM## __cpu ##_RESET_PCIE_CORE, \
++	[BCM63XX_RESET_PCIE_HARD]	= BCM## __cpu ##_RESET_PCIE_HARD,
+ 
+ #define BCM3368_RESET_SPI	SOFTRESET_3368_SPI_MASK
+ #define BCM3368_RESET_ENET	SOFTRESET_3368_ENET_MASK
+@@ -42,6 +44,8 @@
+ #define BCM3368_RESET_MPI	SOFTRESET_3368_MPI_MASK
+ #define BCM3368_RESET_PCIE	0
+ #define BCM3368_RESET_PCIE_EXT	0
++#define BCM3368_RESET_PCIE_CORE	0
++#define BCM3368_RESET_PCIE_HARD	0
+ 
+ 
+ #define BCM6318_RESET_SPI	SOFTRESET_6318_SPI_MASK
+@@ -54,11 +58,10 @@
+ #define BCM6318_RESET_ENETSW	SOFTRESET_6318_ENETSW_MASK
+ #define BCM6318_RESET_PCM	0
+ #define BCM6318_RESET_MPI	0
+-#define BCM6318_RESET_PCIE	\
+-				(SOFTRESET_6318_PCIE_MASK |		\
+-				 SOFTRESET_6318_PCIE_CORE_MASK |	\
+-				 SOFTRESET_6318_PCIE_HARD_MASK)
++#define BCM6318_RESET_PCIE	SOFTRESET_6318_PCIE_MASK
+ #define BCM6318_RESET_PCIE_EXT	SOFTRESET_6318_PCIE_EXT_MASK
++#define BCM6318_RESET_PCIE_CORE	SOFTRESET_6318_PCIE_CORE_MASK
++#define BCM6318_RESET_PCIE_HARD	SOFTRESET_6318_PCIE_HARD_MASK
+ 
+ #define BCM6328_RESET_SPI	SOFTRESET_6328_SPI_MASK
+ #define BCM6328_RESET_ENET	0
+@@ -70,11 +73,10 @@
+ #define BCM6328_RESET_ENETSW	SOFTRESET_6328_ENETSW_MASK
+ #define BCM6328_RESET_PCM	SOFTRESET_6328_PCM_MASK
+ #define BCM6328_RESET_MPI	0
+-#define BCM6328_RESET_PCIE	\
+-				(SOFTRESET_6328_PCIE_MASK |		\
+-				 SOFTRESET_6328_PCIE_CORE_MASK |	\
+-				 SOFTRESET_6328_PCIE_HARD_MASK)
++#define BCM6328_RESET_PCIE	SOFTRESET_6328_PCIE_MASK
+ #define BCM6328_RESET_PCIE_EXT	SOFTRESET_6328_PCIE_EXT_MASK
++#define BCM6328_RESET_PCIE_CORE	SOFTRESET_6328_PCIE_CORE_MASK
++#define BCM6328_RESET_PCIE_HARD	SOFTRESET_6328_PCIE_HARD_MASK
+ 
+ #define BCM6338_RESET_SPI	SOFTRESET_6338_SPI_MASK
+ #define BCM6338_RESET_ENET	SOFTRESET_6338_ENET_MASK
+@@ -88,6 +90,8 @@
+ #define BCM6338_RESET_MPI	0
+ #define BCM6338_RESET_PCIE	0
+ #define BCM6338_RESET_PCIE_EXT	0
++#define BCM6338_RESET_PCIE_CORE	0
++#define BCM6338_RESET_PCIE_HARD	0
+ 
+ #define BCM6348_RESET_SPI	SOFTRESET_6348_SPI_MASK
+ #define BCM6348_RESET_ENET	SOFTRESET_6348_ENET_MASK
+@@ -101,6 +105,8 @@
+ #define BCM6348_RESET_MPI	0
+ #define BCM6348_RESET_PCIE	0
+ #define BCM6348_RESET_PCIE_EXT	0
++#define BCM6348_RESET_PCIE_CORE	0
++#define BCM6348_RESET_PCIE_HARD	0
+ 
+ #define BCM6358_RESET_SPI	SOFTRESET_6358_SPI_MASK
+ #define BCM6358_RESET_ENET	SOFTRESET_6358_ENET_MASK
+@@ -114,6 +120,8 @@
+ #define BCM6358_RESET_MPI	SOFTRESET_6358_MPI_MASK
+ #define BCM6358_RESET_PCIE	0
+ #define BCM6358_RESET_PCIE_EXT	0
++#define BCM6358_RESET_PCIE_CORE	0
++#define BCM6358_RESET_PCIE_HARD	0
+ 
+ #define BCM6362_RESET_SPI	SOFTRESET_6362_SPI_MASK
+ #define BCM6362_RESET_ENET	0
+@@ -125,9 +133,10 @@
+ #define BCM6362_RESET_ENETSW	SOFTRESET_6362_ENETSW_MASK
+ #define BCM6362_RESET_PCM	SOFTRESET_6362_PCM_MASK
+ #define BCM6362_RESET_MPI	0
+-#define BCM6362_RESET_PCIE      (SOFTRESET_6362_PCIE_MASK | \
+-				 SOFTRESET_6362_PCIE_CORE_MASK)
++#define BCM6362_RESET_PCIE      SOFTRESET_6362_PCIE_MASK
+ #define BCM6362_RESET_PCIE_EXT	SOFTRESET_6362_PCIE_EXT_MASK
++#define BCM6362_RESET_PCIE_CORE	SOFTRESET_6362_PCIE_CORE_MASK
++#define BCM6362_RESET_PCIE_HARD	0
+ 
+ #define BCM6368_RESET_SPI	SOFTRESET_6368_SPI_MASK
+ #define BCM6368_RESET_ENET	0
+@@ -141,6 +150,8 @@
+ #define BCM6368_RESET_MPI	SOFTRESET_6368_MPI_MASK
+ #define BCM6368_RESET_PCIE	0
+ #define BCM6368_RESET_PCIE_EXT	0
++#define BCM6368_RESET_PCIE_CORE	0
++#define BCM6368_RESET_PCIE_HARD	0
+ 
+ #define BCM63268_RESET_SPI	SOFTRESET_63268_SPI_MASK
+ #define BCM63268_RESET_ENET	0
+@@ -152,10 +163,10 @@
+ #define BCM63268_RESET_ENETSW	SOFTRESET_63268_ENETSW_MASK
+ #define BCM63268_RESET_PCM	SOFTRESET_63268_PCM_MASK
+ #define BCM63268_RESET_MPI	0
+-#define BCM63268_RESET_PCIE	(SOFTRESET_63268_PCIE_MASK | \
+-				 SOFTRESET_63268_PCIE_CORE_MASK | \
+-				 SOFTRESET_63268_PCIE_HARD_MASK)
++#define BCM63268_RESET_PCIE	SOFTRESET_63268_PCIE_MASK
+ #define BCM63268_RESET_PCIE_EXT	SOFTRESET_63268_PCIE_EXT_MASK
++#define BCM63268_RESET_PCIE_CORE	SOFTRESET_63268_PCIE_CORE_MASK
++#define BCM63268_RESET_PCIE_HARD	SOFTRESET_63268_PCIE_HARD_MASK
+ 
+ /*
+  * core reset bits
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
+@@ -14,6 +14,8 @@ enum bcm63xx_core_reset {
+ 	BCM63XX_RESET_MPI,
+ 	BCM63XX_RESET_PCIE,
+ 	BCM63XX_RESET_PCIE_EXT,
++	BCM63XX_RESET_PCIE_CORE,
++	BCM63XX_RESET_PCIE_HARD,
+ };
+ 
+ void bcm63xx_core_set_reset(enum bcm63xx_core_reset, int reset);
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -135,9 +135,16 @@ static void __init bcm63xx_reset_pcie(vo
+ 
+ 	/* reset the PCIe core */
+ 	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
+ 	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
++	if (BCMCPU_IS_6328() || BCMCPU_IS_63268()) {
++		bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 1);
++		mdelay(10);
++		bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
++	}
+ 	mdelay(10);
+ 
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
+ 	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
+ 	mdelay(10);
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch b/target/linux/brcm63xx/patches-3.18/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch
new file mode 100644
index 0000000..3ac08b4
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch
@@ -0,0 +1,342 @@
+From 11a8ab8dac4ef5d0d70199843043927edce1d4db Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 15 Dec 2013 20:47:34 +0100
+Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318
+
+---
+ arch/mips/bcm63xx/clk.c                           |  25 ++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h   |   6 ++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |  60 +++++++++++-
+ arch/mips/pci/ops-bcm63xx.c                       |  16 +++-
+ arch/mips/pci/pci-bcm63xx.c                       | 106 ++++++++++++++++++----
+ 5 files changed, 184 insertions(+), 29 deletions(-)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -50,6 +50,18 @@ static void bcm_hwclock_set(u32 mask, in
+ 	bcm_perf_writel(reg, PERF_CKCTL_REG);
+ }
+ 
++static void bcm_ub_hwclock_set(u32 mask, int enable)
++{
++	u32 reg;
++
++	reg = bcm_perf_readl(PERF_UB_CKCTL_REG);
++	if (enable)
++		reg |= mask;
++	else
++		reg &= ~mask;
++	bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
++}
++
+ /*
+  * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
+  */
+@@ -317,12 +329,17 @@ static struct clk clk_ipsec = {
+ 
+ static void pcie_set(struct clk *clk, int enable)
+ {
+-	if (BCMCPU_IS_6328())
++	if (BCMCPU_IS_6318()) {
++		bcm_hwclock_set(CKCTL_6318_PCIE_EN, enable);
++		bcm_hwclock_set(CKCTL_6318_PCIE25_EN, enable);
++		bcm_ub_hwclock_set(UB_CKCTL_6318_PCIE_EN, enable);
++	} else if (BCMCPU_IS_6328()) {
+ 		bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
+-	else if (BCMCPU_IS_6362())
++	} else if (BCMCPU_IS_6362()) {
+ 		bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
+-	else if (BCMCPU_IS_63268())
++	} else if (BCMCPU_IS_63268()) {
+ 		bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
++	}
+ }
+ 
+ static struct clk clk_pcie = {
+@@ -405,7 +422,7 @@ struct clk *clk_get(struct device *dev,
+ 	if ((BCMCPU_IS_6362() || BCMCPU_IS_6368() || BCMCPU_IS_63268()) &&
+ 	    !strcmp(id, "ipsec"))
+ 		return &clk_ipsec;
+-	if ((BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) &&
++	if ((BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) &&
+ 	    !strcmp(id, "pcie"))
+ 		return &clk_pcie;
+ 	return ERR_PTR(-ENOENT);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -40,6 +40,12 @@
+ #define BCM_CB_MEM_END_PA		(BCM_CB_MEM_BASE_PA +		\
+ 					BCM_CB_MEM_SIZE - 1)
+ 
++#define BCM_PCIE_MEM_BASE_PA_6318	0x10200000
++#define BCM_PCIE_MEM_SIZE_6318		(1 * 1024 * 1024)
++#define BCM_PCIE_MEM_END_PA_6318	(BCM_PCIE_MEM_BASE_PA_6318 +	\
++					BCM_PCIE_MEM_SIZE_6318 - 1)
++
++
+ #define BCM_PCIE_MEM_BASE_PA_6328	0x10f00000
+ #define BCM_PCIE_MEM_SIZE_6328		(1 * 1024 * 1024)
+ #define BCM_PCIE_MEM_END_PA_6328	(BCM_PCIE_MEM_BASE_PA_6328 +	\
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -1543,6 +1543,17 @@
+  * _REG relative to RSET_PCIE
+  *************************************************************************/
+ 
++#define PCIE_SPECIFIC_REG		0x188
++#define SPECIFIC_ENDIAN_MODE_BAR1_SHIFT	0
++#define SPECIFIC_ENDIAN_MODE_BAR1_MASK	(0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
++#define SPECIFIC_ENDIAN_MODE_BAR2_SHIFT	2
++#define SPECIFIC_ENDIAN_MODE_BAR2_MASK	(0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
++#define SPECIFIC_ENDIAN_MODE_BAR3_SHIFT	4
++#define SPECIFIC_ENDIAN_MODE_BAR3_MASK	(0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
++#define SPECIFIC_ENDIAN_MODE_WORD_ALIGN	0
++#define SPECIFIC_ENDIAN_MODE_HALFWORD_ALIGN 1
++#define SPECIFIC_ENDIAN_MODE_BYTE_ALIGN	2
++
+ #define PCIE_CONFIG2_REG		0x408
+ #define CONFIG2_BAR1_SIZE_EN		1
+ #define CONFIG2_BAR1_SIZE_MASK		0xf
+@@ -1588,7 +1599,54 @@
+ #define PCIE_RC_INT_C			(1 << 2)
+ #define PCIE_RC_INT_D			(1 << 3)
+ 
+-#define PCIE_DEVICE_OFFSET		0x8000
++#define PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG	0x400c
++#define C2P_MEM_WIN_ENDIAN_MODE_MASK	0x3
++#define C2P_MEM_WIN_ENDIAN_NO_SWAP	0
++#define C2P_MEM_WIN_ENDIAN_HALF_WORD_SWAP 1
++#define C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP 2
++#define C2P_MEM_WIN_BASE_ADDR_SHIFT	20
++#define C2P_MEM_WIN_BASE_ADDR_MASK	(0xfff << C2P_MEM_WIN_BASE_ADDR_SHIFT)
++
++#define PCIE_RC_BAR1_CONFIG_LO_REG	0x402c
++#define RC_BAR_CFG_LO_SIZE_256MB	0xd
++#define RC_BAR_CFG_LO_MATCH_ADDR_SHIFT	20
++#define RC_BAR_CFG_LO_MATCH_ADDR_MASK	(0xfff << RC_BAR_CFG_LO_MATCH_ADDR_SHIFT)
++
++#define PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG 0x4070
++#define C2P_BASELIMIT_LIMIT_SHIFT	20
++#define C2P_BASELIMIT_LIMIT_MASK	(0xfff << C2P_BASELIMIT_LIMIT_SHIFT)
++#define C2P_BASELIMIT_BASE_SHIFT	4
++#define C2P_BASELIMIT_BASE_MASK		(0xfff << C2P_BASELIMIT_BASE_SHIFT)
++
++#define PCIE_UBUS_BAR1_CFG_REMAP_REG	0x4088
++#define BAR1_CFG_REMAP_OFFSET_SHIFT	20
++#define BAR1_CFG_REMAP_OFFSET_MASK	(0xfff << BAR1_CFG_REMAP_OFFSET_SHIFT)
++#define BAR1_CFG_REMAP_ACCESS_EN	1
++
++#define PCIE_HARD_DEBUG_REG		0x4204
++#define HARD_DEBUG_SERDES_IDDQ		(1 << 23)
++
++#define PCIE_CPU_INT1_MASK_CLEAR_REG	0x830c
++#define CPU_INT_PCIE_ERR_ATTN_CPU	(1 << 0)
++#define CPU_INT_PCIE_INTA		(1 << 1)
++#define CPU_INT_PCIE_INTB		(1 << 2)
++#define CPU_INT_PCIE_INTC		(1 << 3)
++#define CPU_INT_PCIE_INTD		(1 << 4)
++#define CPU_INT_PCIE_INTR		(1 << 5)
++#define CPU_INT_PCIE_NMI		(1 << 6)
++#define CPU_INT_PCIE_UBUS		(1 << 7)
++#define CPU_INT_IPI			(1 << 8)
++
++#define PCIE_EXT_CFG_INDEX_REG		0x8400
++#define EXT_CFG_FUNC_NUM_SHIFT		12
++#define EXT_CFG_FUNC_NUM_MASK		(0x7 << EXT_CFG_FUNC_NUM_SHIFT)
++#define EXT_CFG_DEV_NUM_SHIFT		15
++#define EXT_CFG_DEV_NUM_MASK		(0xf << EXT_CFG_DEV_NUM_SHIFT)
++#define EXT_CFG_BUS_NUM_SHIFT		20
++#define EXT_CFG_BUS_NUM_MASK		(0xff << EXT_CFG_BUS_NUM_SHIFT)
++
++#define PCIE_DEVICE_OFFSET_6318		0x9000
++#define PCIE_DEVICE_OFFSET_6328		0x8000
+ 
+ /*************************************************************************
+  * _REG relative to RSET_OTP
+--- a/arch/mips/pci/ops-bcm63xx.c
++++ b/arch/mips/pci/ops-bcm63xx.c
+@@ -488,8 +488,12 @@ static int bcm63xx_pcie_read(struct pci_
+ 	if (!bcm63xx_pcie_can_access(bus, devfn))
+ 		return PCIBIOS_DEVICE_NOT_FOUND;
+ 
+-	if (bus->number == PCIE_BUS_DEVICE)
+-		reg += PCIE_DEVICE_OFFSET;
++	if (bus->number == PCIE_BUS_DEVICE) {
++		if (BCMCPU_IS_6318())
++			reg += PCIE_DEVICE_OFFSET_6318;
++		else
++			reg += PCIE_DEVICE_OFFSET_6328;
++	}
+ 
+ 	data = bcm_pcie_readl(reg);
+ 
+@@ -508,8 +512,12 @@ static int bcm63xx_pcie_write(struct pci
+ 	if (!bcm63xx_pcie_can_access(bus, devfn))
+ 		return PCIBIOS_DEVICE_NOT_FOUND;
+ 
+-	if (bus->number == PCIE_BUS_DEVICE)
+-		reg += PCIE_DEVICE_OFFSET;
++	if (bus->number == PCIE_BUS_DEVICE) {
++		if (BCMCPU_IS_6318())
++			reg += PCIE_DEVICE_OFFSET_6318;
++		else
++			reg += PCIE_DEVICE_OFFSET_6328;
++	}
+ 
+ 
+ 	data = bcm_pcie_readl(reg);
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -118,7 +118,7 @@ static void bcm63xx_int_cfg_writel(u32 v
+ 
+ void __iomem *pci_iospace_start;
+ 
+-static void __init bcm63xx_reset_pcie(void)
++static void __init bcm63xx_reset_pcie_gen1(void)
+ {
+ 	u32 val;
+ 	u32 reg;
+@@ -152,20 +152,32 @@ static void __init bcm63xx_reset_pcie(vo
+ 	mdelay(200);
+ }
+ 
+-static struct clk *pcie_clk;
+-
+-static int __init bcm63xx_register_pcie(void)
++static void __init bcm63xx_reset_pcie_gen2(void)
+ {
+ 	u32 val;
+ 
+-	/* enable clock */
+-	pcie_clk = clk_get(NULL, "pcie");
+-	if (IS_ERR_OR_NULL(pcie_clk))
+-		return -ENODEV;
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
+ 
+-	clk_prepare_enable(pcie_clk);
++	/* reset the PCIe core */
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
++	mdelay(10);
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 0);
++	mdelay(10);
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
++	mdelay(10);
++	val = bcm_pcie_readl(PCIE_HARD_DEBUG_REG);
++	val &= ~HARD_DEBUG_SERDES_IDDQ;
++	bcm_pcie_writel(val, PCIE_HARD_DEBUG_REG);
++	mdelay(10);
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
++	mdelay(200);
++}
+ 
+-	bcm63xx_reset_pcie();
++static void __init bcm63xx_init_pcie_gen1(void)
++{
++	u32 val;
+ 
+ 	/* configure the PCIe bridge */
+ 	val = bcm_pcie_readl(PCIE_BRIDGE_OPT1_REG);
+@@ -190,6 +202,65 @@ static int __init bcm63xx_register_pcie(
+ 	val |= OPT2_CFG_TYPE1_BD_SEL;
+ 	bcm_pcie_writel(val, PCIE_BRIDGE_OPT2_REG);
+ 
++	/* set bar0 to little endian */
++	val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
++	val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
++	val |= BASEMASK_REMAP_EN;
++	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
++
++	val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
++	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
++}
++
++static void __init bcm63xx_init_pcie_gen2(void)
++{
++	u32 val;
++
++	bcm_pcie_writel(CPU_INT_PCIE_INTA | CPU_INT_PCIE_INTB |
++			CPU_INT_PCIE_INTC | CPU_INT_PCIE_INTD,
++			PCIE_CPU_INT1_MASK_CLEAR_REG);
++
++	val = bcm_pcie_mem_resource.end & C2P_BASELIMIT_LIMIT_MASK;
++	val |= (bcm_pcie_mem_resource.start >> C2P_BASELIMIT_LIMIT_SHIFT) <<
++	       C2P_BASELIMIT_BASE_SHIFT;
++
++	bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG);
++
++	/* set bar0 to little endian */
++	val = bcm_pcie_readl(PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
++	val |= bcm_pcie_mem_resource.start & C2P_MEM_WIN_BASE_ADDR_MASK;
++	val |= C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP;
++	bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
++
++	bcm_pcie_writel(SPECIFIC_ENDIAN_MODE_BYTE_ALIGN, PCIE_SPECIFIC_REG);
++	bcm_pcie_writel(RC_BAR_CFG_LO_SIZE_256MB, PCIE_RC_BAR1_CONFIG_LO_REG);
++	bcm_pcie_writel(BAR1_CFG_REMAP_ACCESS_EN, PCIE_UBUS_BAR1_CFG_REMAP_REG);
++
++	bcm_pcie_writel(PCIE_BUS_DEVICE << EXT_CFG_BUS_NUM_SHIFT,
++			PCIE_EXT_CFG_INDEX_REG);
++}
++
++static struct clk *pcie_clk;
++
++static int __init bcm63xx_register_pcie(void)
++{
++	u32 val;
++
++	/* enable clock */
++	pcie_clk = clk_get(NULL, "pcie");
++	if (IS_ERR_OR_NULL(pcie_clk))
++		return -ENODEV;
++
++	clk_prepare_enable(pcie_clk);
++
++	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
++		bcm63xx_reset_pcie_gen1();
++		bcm63xx_init_pcie_gen1();
++	} else {
++		bcm63xx_reset_pcie_gen2();
++		bcm63xx_init_pcie_gen2();
++	}
++
+ 	/* setup class code as bridge */
+ 	val = bcm_pcie_readl(PCIE_IDVAL3_REG);
+ 	val &= ~IDVAL3_CLASS_CODE_MASK;
+@@ -201,15 +272,6 @@ static int __init bcm63xx_register_pcie(
+ 	val &= ~CONFIG2_BAR1_SIZE_MASK;
+ 	bcm_pcie_writel(val, PCIE_CONFIG2_REG);
+ 
+-	/* set bar0 to little endian */
+-	val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
+-	val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
+-	val |= BASEMASK_REMAP_EN;
+-	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
+-
+-	val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
+-	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
+-
+ 	register_pci_controller(&bcm63xx_pcie_controller);
+ 
+ 	return 0;
+@@ -341,7 +403,10 @@ static int __init bcm63xx_pci_init(void)
+ 	if (!bcm63xx_pci_enabled)
+ 		return -ENODEV;
+ 
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
++	if (BCMCPU_IS_6318()) {
++		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6318;
++		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6318;
++	} if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
+ 		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
+ 		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
+ 	} else if (BCMCPU_IS_63268()) {
+@@ -350,6 +415,7 @@ static int __init bcm63xx_pci_init(void)
+ 	}
+ 
+ 	switch (bcm63xx_get_cpu_id()) {
++	case BCM6318_CPU_ID:
+ 	case BCM6328_CPU_ID:
+ 	case BCM6362_CPU_ID:
+ 	case BCM63268_CPU_ID:
diff --git a/target/linux/brcm63xx/patches-3.18/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch b/target/linux/brcm63xx/patches-3.18/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch
new file mode 100644
index 0000000..f5b0e77
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch
@@ -0,0 +1,74 @@
+From 9a97177b907330971aa7bf41855fafc2602e1c18 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Dec 2013 12:26:57 +0100
+Subject: [PATCH 51/56] MIPS: BCM63XX: detect flash type early and store the
+ result
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c                          | 10 +++++++---
+ arch/mips/bcm63xx/prom.c                               |  4 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h |  2 ++
+ 3 files changed, 13 insertions(+), 3 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -22,6 +22,8 @@
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+ 
++static int flash_type;
++
+ static struct mtd_partition mtd_partitions[] = {
+ 	{
+ 		.name		= "cfe",
+@@ -108,13 +110,15 @@ static int __init bcm63xx_detect_flash_t
+ 	}
+ }
+ 
++void __init bcm63xx_flash_detect(void)
++{
++	flash_type = bcm63xx_detect_flash_type();
++}
++
+ int __init bcm63xx_flash_register(void)
+ {
+-	int flash_type;
+ 	u32 val;
+ 
+-	flash_type = bcm63xx_detect_flash_type();
+-
+ 	switch (flash_type) {
+ 	case BCM63XX_FLASH_TYPE_PARALLEL:
+ 		/* read base address of boot chip select (0) */
+--- a/arch/mips/bcm63xx/prom.c
++++ b/arch/mips/bcm63xx/prom.c
+@@ -17,6 +17,7 @@
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_regs.h>
++#include <bcm63xx_dev_flash.h>
+ 
+ void __init prom_init(void)
+ {
+@@ -52,6 +53,9 @@ void __init prom_init(void)
+ 	reg &= ~mask;
+ 	bcm_perf_writel(reg, PERF_CKCTL_REG);
+ 
++	/* detect and setup flash access */
++	bcm63xx_flash_detect();
++
+ 	/* do low level board init */
+ 	board_prom_init();
+ 
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -7,6 +7,8 @@ enum {
+ 	BCM63XX_FLASH_TYPE_NAND,
+ };
+ 
++void bcm63xx_flash_detect(void);
++
+ int __init bcm63xx_flash_register(void);
+ 
+ #endif /* __BCM63XX_FLASH_H */
diff --git a/target/linux/brcm63xx/patches-3.18/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch b/target/linux/brcm63xx/patches-3.18/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch
new file mode 100644
index 0000000..c8bef13
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch
@@ -0,0 +1,84 @@
+From 1cacd0f7b0d35f8e3d3f8a69ecb3b5e436d6b9e8 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Dec 2013 13:25:25 +0100
+Subject: [PATCH 52/56] MIPS: BCM63XX: fixup mapped SPI flash access on boot
+
+Some bootloaders leave the flash access in an invalid state with dual
+read enabled; fix it by disabling it and falling back to simple fast
+reads.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 51 ++++++++++++++++++++++++++++++++++++
+ 1 file changed, 51 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -16,6 +16,7 @@
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
+ #include <linux/mtd/physmap.h>
++#include <linux/mtd/spi-nor.h>
+ 
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
+@@ -110,9 +111,59 @@ static int __init bcm63xx_detect_flash_t
+ 	}
+ }
+ 
++#define HSSPI_FLASH_CTRL_REG		0x14
++#define FLASH_CTRL_READ_OPCODE_MASK	0xff
++#define FLASH_CTRL_ADDR_BYTES_MASK	(0x3 << 8)
++#define FLASH_CTRL_ADDR_BYTES_2		(0 << 8)
++#define FLASH_CTRL_ADDR_BYTES_3		(1 << 8)
++#define FLASH_CTRL_ADDR_BYTES_4		(2 << 8)
++#define FLASH_CTRL_DUMMY_BYTES_SHIFT	10
++#define FLASH_CTRL_DUMMY_BYTES_MASK	(0x3 << FLASH_CTRL_DUMMY_BYTES_SHIFT)
++#define FLASH_CTRL_MB_EN		(1 << 23)
++
+ void __init bcm63xx_flash_detect(void)
+ {
+ 	flash_type = bcm63xx_detect_flash_type();
++
++	/* ensure flash mapping has sane values */
++	if (flash_type == BCM63XX_FLASH_TYPE_SERIAL &&
++	    (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
++	     BCMCPU_IS_63268())) {
++		u32 val = bcm_rset_readl(RSET_HSSPI, HSSPI_FLASH_CTRL_REG);
++
++		if (val & FLASH_CTRL_MB_EN) {
++			/* cfe might configure non working dual-io mode */
++			val &= ~FLASH_CTRL_MB_EN;
++			val &= ~FLASH_CTRL_READ_OPCODE_MASK;
++			val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
++			val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
++
++			switch (val & FLASH_CTRL_ADDR_BYTES_MASK) {
++			case FLASH_CTRL_ADDR_BYTES_3:
++				val |= SPINOR_OP_READ_FAST;
++				break;
++			case FLASH_CTRL_ADDR_BYTES_4:
++				val |= SPINOR_OP_READ4_FAST;
++				break;
++			case FLASH_CTRL_ADDR_BYTES_2:
++			default:
++				pr_warn("unsupported address byte mode (%x), not fixing up\n",
++					val & FLASH_CTRL_ADDR_BYTES_MASK);
++				return;
++			}
++		} else {
++			/* ensure dummy bytes is set to 1 for _FAST reads */
++			u8 cmd = val & FLASH_CTRL_READ_OPCODE_MASK;
++
++			if (cmd != SPINOR_OP_READ_FAST && cmd != SPINOR_OP_READ4_FAST)
++				return;
++
++			val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
++			val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
++		}
++
++		bcm_rset_writel(RSET_HSSPI, val, HSSPI_FLASH_CTRL_REG);
++	}
+ }
+ 
+ int __init bcm63xx_flash_register(void)
diff --git a/target/linux/brcm63xx/patches-3.18/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch b/target/linux/brcm63xx/patches-3.18/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch
new file mode 100644
index 0000000..384702c
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch
@@ -0,0 +1,56 @@
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -136,7 +136,11 @@ static struct clk clk_ephy = {
+  */
+ static void enetsw_set(struct clk *clk, int enable)
+ {
+-	if (BCMCPU_IS_6328())
++	if (BCMCPU_IS_6318()) {
++		bcm_hwclock_set(CKCTL_6318_ROBOSW250_EN |
++				CKCTL_6318_ROBOSW025_EN, enable);
++		bcm_ub_hwclock_set(UB_CKCTL_6318_ROBOSW_EN, enable);
++	} else if (BCMCPU_IS_6328())
+ 		bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
+ 	else if (BCMCPU_IS_6362())
+ 		bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
+@@ -183,18 +187,22 @@ static struct clk clk_pcm = {
+  */
+ static void usbh_set(struct clk *clk, int enable)
+ {
+-	if (BCMCPU_IS_6328())
++	if (BCMCPU_IS_6318()) {
++		bcm_hwclock_set(CKCTL_6318_USB_EN, enable);
++		bcm_ub_hwclock_set(UB_CKCTL_6318_USB_EN, enable);
++	} else if (BCMCPU_IS_6328()) {
+ 		bcm_hwclock_set(CKCTL_6328_USBH_EN, enable);
+-	else if (BCMCPU_IS_6348())
++	} else if (BCMCPU_IS_6348()) {
+ 		bcm_hwclock_set(CKCTL_6348_USBH_EN, enable);
+-	else if (BCMCPU_IS_6362())
++	} else if (BCMCPU_IS_6362()) {
+ 		bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
+-	else if (BCMCPU_IS_6368())
++	} else if (BCMCPU_IS_6368()) {
+ 		bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
+-	else if (BCMCPU_IS_63268())
++	} else if (BCMCPU_IS_63268()) {
+ 		bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
+-	else
++	} else {
+ 		return;
++	}
+ 
+ 	if (enable)
+ 		msleep(100);
+@@ -405,9 +413,9 @@ struct clk *clk_get(struct device *dev,
+ 		return &clk_enetsw;
+ 	if (!strcmp(id, "ephy"))
+ 		return &clk_ephy;
+-	if (!strcmp(id, "usbh"))
++	if (!strcmp(id, "usbh") || (BCMCPU_IS_6318() && !strcmp(id, "usbd")))
+ 		return &clk_usbh;
+-	if (!strcmp(id, "usbd"))
++	if (!strcmp(id, "usbd") && !BCMCPU_IS_6318())
+ 		return &clk_usbd;
+ 	if (!strcmp(id, "spi"))
+ 		return &clk_spi;
diff --git a/target/linux/brcm63xx/patches-3.18/347-MIPS-BCM6318-USB-support.patch b/target/linux/brcm63xx/patches-3.18/347-MIPS-BCM6318-USB-support.patch
new file mode 100644
index 0000000..904d0b7
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/347-MIPS-BCM6318-USB-support.patch
@@ -0,0 +1,124 @@
+--- a/arch/mips/bcm63xx/usb-common.c
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -109,6 +109,27 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ 		reg |= USBH_PRIV_SETUP_IOC_MASK;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++	} else if (BCMCPU_IS_6318()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++		reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
++		reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
++		reg |= USBH_PRIV_SETUP_IOC_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++		reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
++		reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
+ 	}
+ 
+ 	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+@@ -144,6 +165,27 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ 		reg |= USBH_PRIV_SETUP_IOC_MASK;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++	} else if (BCMCPU_IS_6318()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++		reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
++		reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
++		reg |= USBH_PRIV_SETUP_IOC_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++		reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
++		reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
+ 	}
+ 
+ 	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -681,6 +681,12 @@
+ #define GPIO_MODE_6368_SPI_SSN4		(1 << 30)
+ #define GPIO_MODE_6368_SPI_SSN5		(1 << 31)
+ 
++#define GPIO_PINMUX_SEL0_6318		0x1c
++#define GPIO_PINMUX_SEL0_GPIO13_SHIFT	26
++#define GPIO_PINMUX_SEL0_GPIO13_MASK	(0x3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
++#define GPIO_PINMUX_SEL0_GPIO13_PWRON	(1 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
++#define GPIO_PINMUX_SEL0_GPIO13_LED	(2 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
++#define GPIO_PINMUX_SEL0_GPIO13_GPIO	(3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
+ 
+ #define GPIO_PINMUX_OTHR_REG		0x24
+ #define GPIO_PINMUX_OTHR_6328_USB_SHIFT 12
+@@ -999,6 +1005,7 @@
+ 
+ #define USBH_PRIV_SWAP_6358_REG		0x0
+ #define USBH_PRIV_SWAP_6368_REG		0x1c
++#define USBH_PRIV_SWAP_6318_REG		0x0c
+ 
+ #define USBH_PRIV_SWAP_USBD_SHIFT	6
+ #define USBH_PRIV_SWAP_USBD_MASK	(1 << USBH_PRIV_SWAP_USBD_SHIFT)
+@@ -1024,6 +1031,13 @@
+ #define USBH_PRIV_SETUP_IOC_SHIFT	4
+ #define USBH_PRIV_SETUP_IOC_MASK	(1 << USBH_PRIV_SETUP_IOC_SHIFT)
+ 
++#define USBH_PRIV_SETUP_6318_REG	0x00
++#define USBH_PRIV_PLL_CTRL1_6318_REG	0x04
++#define USBH_PRIV_PLL_CTRL1_SUSP_EN	(1 << 27)
++#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN	(1 << 31)
++#define USBH_PRIV_SIM_CTRL_6318_REG	0x20
++#define USBH_PRIV_SIM_CTRL_LADDR_SEL	(1 << 5)
++
+ 
+ /*************************************************************************
+  * _REG relative to RSET_USBD
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -129,6 +129,15 @@ void __init board_early_setup(const stru
+ 	}
+ 
+ 	bcm_gpio_writel(val, GPIO_MODE_REG);
++
++#if IS_ENABLED(CONFIG_USB)
++	if (BCMCPU_IS_6318() && (board.has_ehci0 || board.has_ohci0)) {
++		val = bcm_gpio_readl(GPIO_PINMUX_SEL0_6318);
++		val &= ~GPIO_PINMUX_SEL0_GPIO13_MASK;
++		val |= GPIO_PINMUX_SEL0_GPIO13_PWRON;
++		bcm_gpio_writel(val, GPIO_PINMUX_SEL0_6318);
++	}
++#endif
+ }
+ 
+ 
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -22,6 +22,8 @@ config BCM63XX_CPU_6318
+ 	bool "support 6318 CPU"
+ 	select SYS_HAS_CPU_BMIPS32_3300
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
++	select BCM63XX_EHCI
+ 
+ config BCM63XX_CPU_6328
+ 	bool "support 6328 CPU"
diff --git a/target/linux/brcm63xx/patches-3.18/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch b/target/linux/brcm63xx/patches-3.18/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch
new file mode 100644
index 0000000..c758163
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch
@@ -0,0 +1,71 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -586,6 +586,9 @@
+ #define TIMER_CTL_MONOTONIC_MASK	(1 << 30)
+ #define TIMER_CTL_ENABLE_MASK		(1 << 31)
+ 
++/* Clock reset control (63268 only) */
++#define TIMER_CLK_RST_CTL_REG		0x2c
++#define CLK_RST_CTL_USB_REF_CLK_EN	(1 << 18)
+ 
+ /*************************************************************************
+  * _REG relative to RSET_WDT
+@@ -1547,6 +1550,11 @@
+ #define STRAPBUS_63268_FCVO_SHIFT	21
+ #define STRAPBUS_63268_FCVO_MASK	(0xf << STRAPBUS_63268_FCVO_SHIFT)
+ 
++#define MISC_IDDQ_CTRL_6328_REG		0x48
++#define MISC_IDDQ_CTRL_63268_REG	0x4c
++
++#define IDDQ_CTRL_63268_USBH		(1 << 4)
++
+ #define MISC_STRAPBUS_6328_REG		0x240
+ #define STRAPBUS_6328_FCVO_SHIFT	7
+ #define STRAPBUS_6328_FCVO_MASK		(0x1f << STRAPBUS_6328_FCVO_SHIFT)
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -62,6 +62,26 @@ static void bcm_ub_hwclock_set(u32 mask,
+ 	bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
+ }
+ 
++static void bcm_misc_iddq_set(u32 mask, int enable)
++{
++	u32 offset;
++	u32 reg;
++
++	if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
++		offset = MISC_IDDQ_CTRL_6328_REG;
++	else if (BCMCPU_IS_63268())
++		offset = MISC_IDDQ_CTRL_63268_REG;
++	else
++		return;
++
++	reg = bcm_misc_readl(offset);
++	if (enable)
++		reg &= ~mask;
++	else
++		reg |= mask;
++	bcm_misc_writel(reg, offset);
++}
++
+ /*
+  * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
+  */
+@@ -199,7 +219,17 @@ static void usbh_set(struct clk *clk, in
+ 	} else if (BCMCPU_IS_6368()) {
+ 		bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
+ 	} else if (BCMCPU_IS_63268()) {
++		u32 reg;
++
+ 		bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
++		bcm_misc_iddq_set(IDDQ_CTRL_63268_USBH, enable);
++		bcm63xx_core_set_reset(BCM63XX_RESET_USBH, !enable);
++		reg = bcm_timer_readl(TIMER_CLK_RST_CTL_REG);
++		if (enable)
++			reg |= CLK_RST_CTL_USB_REF_CLK_EN;
++		else
++			reg &= ~CLK_RST_CTL_USB_REF_CLK_EN;
++		bcm_timer_writel(reg, TIMER_CLK_RST_CTL_REG);
+ 	} else {
+ 		return;
+ 	}
diff --git a/target/linux/brcm63xx/patches-3.18/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch b/target/linux/brcm63xx/patches-3.18/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch
new file mode 100644
index 0000000..0b70991
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch
@@ -0,0 +1,117 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -1033,11 +1033,18 @@
+ #define USBH_PRIV_SETUP_6368_REG	0x28
+ #define USBH_PRIV_SETUP_IOC_SHIFT	4
+ #define USBH_PRIV_SETUP_IOC_MASK	(1 << USBH_PRIV_SETUP_IOC_SHIFT)
++#define USBH_PRIV_SETUP_IPP_SHIFT	5
++#define USBH_PRIV_SETUP_IPP_MASK	(1 << USBH_PRIV_SETUP_IPP_SHIFT)
+ 
+ #define USBH_PRIV_SETUP_6318_REG	0x00
++#define USBH_PRIV_PLL_CTRL1_6368_REG	0x18
+ #define USBH_PRIV_PLL_CTRL1_6318_REG	0x04
+-#define USBH_PRIV_PLL_CTRL1_SUSP_EN	(1 << 27)
+-#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN	(1 << 31)
++
++#define USBH_PRIV_PLL_CTRL1_6318_SUSP_EN	(1 << 27)
++#define USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN	(1 << 31)
++#define USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN	(1 << 9)
++#define USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY	(1 << 10)
++
+ #define USBH_PRIV_SIM_CTRL_6318_REG	0x20
+ #define USBH_PRIV_SIM_CTRL_LADDR_SEL	(1 << 5)
+ 
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -72,6 +72,8 @@ config BCM63XX_CPU_63268
+ 	bool "support 63268 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
++	select BCM63XX_EHCI
+ endmenu
+ 
+ source "arch/mips/bcm63xx/boards/Kconfig"
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -82,7 +82,7 @@ static struct platform_device bcm63xx_eh
+ int __init bcm63xx_ehci_register(void)
+ {
+ 	if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
+-		!BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++		!BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
+ 		return 0;
+ 
+ 	ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
+--- a/arch/mips/bcm63xx/usb-common.c
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -109,9 +109,24 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ 		reg |= USBH_PRIV_SETUP_IOC_MASK;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++	} else if (BCMCPU_IS_63268()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++		reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++		reg |= USBH_PRIV_SETUP_IOC_MASK;
++		reg &= ~USBH_PRIV_SETUP_IPP_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
++		reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
++			 USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
+ 	} else if (BCMCPU_IS_6318()) {
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+-		reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++		reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+ 
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
+@@ -124,7 +139,7 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
+ 
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+-		reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++		reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+ 
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
+@@ -165,9 +180,24 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ 		reg |= USBH_PRIV_SETUP_IOC_MASK;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++	} else if (BCMCPU_IS_63268()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++		reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++		reg |= USBH_PRIV_SETUP_IOC_MASK;
++		reg &= ~USBH_PRIV_SETUP_IPP_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
++		reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
++			 USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
+ 	} else if (BCMCPU_IS_6318()) {
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+-		reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++		reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+ 
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
+@@ -180,7 +210,7 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
+ 
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+-		reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++		reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+ 
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
diff --git a/target/linux/brcm63xx/patches-3.18/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch b/target/linux/brcm63xx/patches-3.18/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch
new file mode 100644
index 0000000..41747da
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch
@@ -0,0 +1,107 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -42,6 +42,7 @@ struct board_info {
+ 
+ 	/* USB config */
+ 	struct bcm63xx_usbd_platform_data usbd;
++	unsigned int num_usbh_ports:2;
+ 
+ 	/* DSP config */
+ 	struct bcm63xx_dsp_platform_data dsp;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+@@ -1,6 +1,6 @@
+ #ifndef BCM63XX_DEV_USB_EHCI_H_
+ #define BCM63XX_DEV_USB_EHCI_H_
+ 
+-int bcm63xx_ehci_register(void);
++int bcm63xx_ehci_register(unsigned int num_ports);
+ 
+ #endif /* BCM63XX_DEV_USB_EHCI_H_ */
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+@@ -1,6 +1,6 @@
+ #ifndef BCM63XX_DEV_USB_OHCI_H_
+ #define BCM63XX_DEV_USB_OHCI_H_
+ 
+-int bcm63xx_ohci_register(void);
++int bcm63xx_ohci_register(unsigned int num_ports);
+ 
+ #endif /* BCM63XX_DEV_USB_OHCI_H_ */
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -181,6 +181,7 @@ int __init board_register_devices(void)
+ {
+ 	int button_count = 0;
+ 	int led_count = 0;
++	int usbh_ports = 0;
+ 
+ 	if (board.has_uart0)
+ 		bcm63xx_uart_register(0);
+@@ -203,14 +204,21 @@ int __init board_register_devices(void)
+ 	    !board_get_mac_address(board.enetsw.mac_addr))
+ 		bcm63xx_enetsw_register(&board.enetsw);
+ 
++	if ((board.has_ohci0 || board.has_ehci0)) {
++		usbh_ports = board.num_usbh_ports;
++
++		if (!usbh_ports || WARN_ON(usbh_ports > 1 && board.has_usbd))
++			usbh_ports = 1;
++	}
++
+ 	if (board.has_usbd)
+ 		bcm63xx_usbd_register(&board.usbd);
+ 
+ 	if (board.has_ehci0)
+-		bcm63xx_ehci_register();
++		bcm63xx_ehci_register(usbh_ports);
+ 
+ 	if (board.has_ohci0)
+-		bcm63xx_ohci_register();
++		bcm63xx_ohci_register(usbh_ports);
+ 
+ 	if (board.has_dsp)
+ 		bcm63xx_dsp_register(&board.dsp);
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -79,12 +79,14 @@ static struct platform_device bcm63xx_eh
+ 	},
+ };
+ 
+-int __init bcm63xx_ehci_register(void)
++int __init bcm63xx_ehci_register(unsigned int num_ports)
+ {
+ 	if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
+ 		!BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
+ 		return 0;
+ 
++	bcm63xx_ehci_pdata.num_ports = num_ports;	
++
+ 	ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
+ 	ehci_resources[0].end = ehci_resources[0].start;
+ 	ehci_resources[0].end += RSET_EHCI_SIZE - 1;
+--- a/arch/mips/bcm63xx/dev-usb-ohci.c
++++ b/arch/mips/bcm63xx/dev-usb-ohci.c
+@@ -62,7 +62,6 @@ static struct usb_ohci_pdata bcm63xx_ohc
+ 	.big_endian_desc	= 1,
+ 	.big_endian_mmio	= 1,
+ 	.no_big_frame_no	= 1,
+-	.num_ports		= 1,
+ 	.power_on		= bcm63xx_ohci_power_on,
+ 	.power_off		= bcm63xx_ohci_power_off,
+ 	.power_suspend		= bcm63xx_ohci_power_off,
+@@ -80,11 +79,13 @@ static struct platform_device bcm63xx_oh
+ 	},
+ };
+ 
+-int __init bcm63xx_ohci_register(void)
++int __init bcm63xx_ohci_register(unsigned int num_ports)
+ {
+ 	if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
+ 		return -ENODEV;
+ 
++	bcm63xx_ohci_pdata.num_ports = num_ports;
++
+ 	ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
+ 	ohci_resources[0].end = ohci_resources[0].start;
+ 	ohci_resources[0].end += RSET_OHCI_SIZE - 1;
diff --git a/target/linux/brcm63xx/patches-3.18/351-set-board-usbh-ports.patch b/target/linux/brcm63xx/patches-3.18/351-set-board-usbh-ports.patch
new file mode 100644
index 0000000..285aa40
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/351-set-board-usbh-ports.patch
@@ -0,0 +1,10 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -596,6 +596,7 @@ static struct board_info __initdata boar
+ 	.has_ohci0 = 1,
+ 	.has_pccard = 1,
+ 	.has_ehci0 = 1,
++	.num_usbh_ports			= 2,
+ 
+ 	.leds = {
+ 		{
diff --git a/target/linux/brcm63xx/patches-3.18/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch b/target/linux/brcm63xx/patches-3.18/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch
new file mode 100644
index 0000000..c60f939
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch
@@ -0,0 +1,95 @@
+From 0daf361ea799fba0af5a232036d0f06cea85ad24 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Jun 2014 12:47:49 +0200
+Subject: [PATCH 42/44] MIPS: BCM63XX: allow building support for more than one
+ board type
+
+Use the arguments passed to the kernel to detect being booted with
+CFE as the indicator for bcm963xx board support, allowing the
+non presence of CFE_EPTSEAL to assume a different board type.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Kconfig          |  7 +++----
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |  2 +-
+ arch/mips/bcm63xx/boards/board_common.c   | 13 +++++++++++++
+ arch/mips/bcm63xx/boards/board_common.h   |  6 ++++++
+ 4 files changed, 23 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -1,11 +1,10 @@
+-choice
+-	prompt "Board support"
++menu "Board support"
+ 	depends on BCM63XX
+-	default BOARD_BCM963XX
+ 
+ config BOARD_BCM963XX
+        bool "Generic Broadcom 963xx boards"
+ 	select SSB
++	default y
+        help
+ 
+-endchoice
++endmenu
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -706,7 +706,7 @@ static const struct board_info __initcon
+ /*
+  * early init callback, read nvram data from flash and checksum it
+  */
+-void __init board_prom_init(void)
++void __init board_bcm963xx_init(void)
+ {
+ 	unsigned int i;
+ 	u8 *boot_addr, *cfe;
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -15,6 +15,8 @@
+ #include <linux/gpio_keys.h>
+ #include <linux/spi/spi.h>
+ #include <asm/addrspace.h>
++#include <asm/bootinfo.h>
++#include <asm/fw/cfe/cfe_api.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_uart.h>
+@@ -32,6 +34,8 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+ 
++#include "board_common.h"
++
+ #define PFX	"board: "
+ 
+ #define BCM963XX_KEYS_POLL_INTERVAL	20
+@@ -84,6 +88,15 @@ const char *board_get_name(void)
+ 	return board.name;
+ }
+ 
++void __init board_prom_init(void)
++{
++	/* detect bootloader */
++	if (fw_arg3 == CFE_EPTSEAL)
++		board_bcm963xx_init();
++	else
++		panic("unsupported bootloader detected");
++}
++
+ static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
+ 
+ /*
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -6,4 +6,10 @@
+ void board_early_setup(const struct board_info *board,
+ 		       int (*get_mac_address)(u8 mac[ETH_ALEN]));
+ 
++#if defined(CONFIG_BOARD_BCM963XX)
++void board_bcm963xx_init(void);
++#else
++static inline void board_bcm963xx_init(void) { }
++#endif
++
+ #endif /* __BOARD_COMMON_H */
diff --git a/target/linux/brcm63xx/patches-3.18/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch b/target/linux/brcm63xx/patches-3.18/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch
new file mode 100644
index 0000000..bdbba03
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch
@@ -0,0 +1,61 @@
+From 8a30097a899b975709f728666d5ad20c8b832d21 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 04:28:14 +0100
+Subject: [PATCH 43/44] MIPS: BCM63XX: allow board implementations to force
+ flash address
+
+Allow board implementations to force the physmap address.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c                         | 19 ++++++++++++++-----
+ .../mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h |  2 ++
+ 2 files changed, 16 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -58,6 +58,12 @@ static struct platform_device mtd_dev =
+ 	},
+ };
+ 
++void __init bcm63xx_flash_force_phys_base_address(u32 start, u32 end)
++{
++	mtd_resources[0].start = start;
++	mtd_resources[0].end = end;
++}
++
+ static int __init bcm63xx_detect_flash_type(void)
+ {
+ 	u32 val;
+@@ -172,12 +178,15 @@ int __init bcm63xx_flash_register(void)
+ 
+ 	switch (flash_type) {
+ 	case BCM63XX_FLASH_TYPE_PARALLEL:
+-		/* read base address of boot chip select (0) */
+-		val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+-		val &= MPI_CSBASE_BASE_MASK;
+ 
+-		mtd_resources[0].start = val;
+-		mtd_resources[0].end = 0x1FFFFFFF;
++		if (!mtd_resources[0].start) {
++			/* read base address of boot chip select (0) */
++			val = bcm_mpi_readl(MPI_CSBASE_REG(0));
++			val &= MPI_CSBASE_BASE_MASK;
++
++			mtd_resources[0].start = val;
++			mtd_resources[0].end = 0x1FFFFFFF;
++		}
+ 
+ 		return platform_device_register(&mtd_dev);
+ 	case BCM63XX_FLASH_TYPE_SERIAL:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -9,6 +9,8 @@ enum {
+ 
+ void bcm63xx_flash_detect(void);
+ 
++void bcm63xx_flash_force_phys_base_address(u32 start, u32 end);
++
+ int __init bcm63xx_flash_register(void);
+ 
+ #endif /* __BCM63XX_FLASH_H */
diff --git a/target/linux/brcm63xx/patches-3.18/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch b/target/linux/brcm63xx/patches-3.18/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch
new file mode 100644
index 0000000..450bc1d
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch
@@ -0,0 +1,188 @@
+From cc025e749a1fece61a6cc0d64bbe7b12472259cc Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:31:12 +0200
+Subject: [PATCH 01/10] MIPS: BCM63XX: move fallback sprom support into its own
+ unit
+
+In preparation for enhancing it, move it into its own file. Require a
+mac address to be passed as the argument to always "reserve" the mac
+regardless of the inclusion state of SSB.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile                         |  2 +-
+ arch/mips/bcm63xx/boards/board_common.c            | 53 ++--------------
+ arch/mips/bcm63xx/sprom.c                          | 70 ++++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h      |  6 ++
+ 4 files changed, 83 insertions(+), 48 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/sprom.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,7 @@ obj-y		+= clk.o cpu.o cs.o gpio.o irq.o
+ 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
+ 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
+ 		   dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
+-		   usb-common.o
++		   usb-common.o sprom.o
+ obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+ 
+ obj-y		+= boards/
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -43,44 +43,6 @@
+ static struct board_info board;
+ 
+ /*
+- * Register a sane SPROMv2 to make the on-board
+- * bcm4318 WLAN work
+- */
+-#ifdef CONFIG_SSB_PCIHOST
+-static struct ssb_sprom bcm63xx_sprom = {
+-	.revision		= 0x02,
+-	.board_rev		= 0x17,
+-	.country_code		= 0x0,
+-	.ant_available_bg	= 0x3,
+-	.pa0b0			= 0x15ae,
+-	.pa0b1			= 0xfa85,
+-	.pa0b2			= 0xfe8d,
+-	.pa1b0			= 0xffff,
+-	.pa1b1			= 0xffff,
+-	.pa1b2			= 0xffff,
+-	.gpio0			= 0xff,
+-	.gpio1			= 0xff,
+-	.gpio2			= 0xff,
+-	.gpio3			= 0xff,
+-	.maxpwr_bg		= 0x004c,
+-	.itssi_bg		= 0x00,
+-	.boardflags_lo		= 0x2848,
+-	.boardflags_hi		= 0x0000,
+-};
+-
+-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+-{
+-	if (bus->bustype == SSB_BUSTYPE_PCI) {
+-		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
+-		return 0;
+-	} else {
+-		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+-		return -EINVAL;
+-	}
+-}
+-#endif
+-
+-/*
+  * return board name for /proc/cpuinfo
+  */
+ const char *board_get_name(void)
+@@ -195,6 +157,7 @@ int __init board_register_devices(void)
+ 	int button_count = 0;
+ 	int led_count = 0;
+ 	int usbh_ports = 0;
++	u8 mac[ETH_ALEN];
+ 
+ 	if (board.has_uart0)
+ 		bcm63xx_uart_register(0);
+@@ -239,15 +202,10 @@ int __init board_register_devices(void)
+ 	/* Generate MAC address for WLAN and register our SPROM,
+ 	 * do this after registering enet devices
+ 	 */
+-#ifdef CONFIG_SSB_PCIHOST
+-	if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+-		memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+-		memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+-		if (ssb_arch_register_fallback_sprom(
+-				&bcm63xx_get_fallback_sprom) < 0)
+-			pr_err(PFX "failed to register fallback SPROM\n");
+-	}
+-#endif
++
++	if (board_get_mac_address(mac) ||
++	    bcm63xx_register_fallback_sprom(mac))
++		pr_err(PFX "failed to register fallback SPROM\n");
+ 
+ 	bcm63xx_spi_register();
+ 
+--- /dev/null
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -0,0 +1,70 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/platform_device.h>
++#include <linux/ssb/ssb.h>
++#include <bcm63xx_fallback_sprom.h>
++#include <board_bcm963xx.h>
++
++#define PFX	"sprom: "
++
++/*
++ * Register a sane SPROMv2 to make the on-board
++ * bcm4318 WLAN work
++ */
++#ifdef CONFIG_SSB_PCIHOST
++static struct ssb_sprom bcm63xx_sprom = {
++	.revision		= 0x02,
++	.board_rev		= 0x17,
++	.country_code		= 0x0,
++	.ant_available_bg	= 0x3,
++	.pa0b0			= 0x15ae,
++	.pa0b1			= 0xfa85,
++	.pa0b2			= 0xfe8d,
++	.pa1b0			= 0xffff,
++	.pa1b1			= 0xffff,
++	.pa1b2			= 0xffff,
++	.gpio0			= 0xff,
++	.gpio1			= 0xff,
++	.gpio2			= 0xff,
++	.gpio3			= 0xff,
++	.maxpwr_bg		= 0x004c,
++	.itssi_bg		= 0x00,
++	.boardflags_lo		= 0x2848,
++	.boardflags_hi		= 0x0000,
++};
++
++int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
++{
++	if (bus->bustype == SSB_BUSTYPE_PCI) {
++		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++		return 0;
++	} else {
++		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
++		return -EINVAL;
++	}
++}
++#endif
++
++int __init bcm63xx_register_fallback_sprom(u8 *mac)
++{
++	int ret = 0;
++
++#ifdef CONFIG_SSB_PCIHOST
++	memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
++	memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
++	memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
++
++	ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
++#endif
++	return ret;
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -0,0 +1,6 @@
++#ifndef __BCM63XX_FALLBACK_SPROM
++#define __BCM63XX_FALLBACK_SPROM
++
++int bcm63xx_register_fallback_sprom(u8 *mac);
++
++#endif
diff --git a/target/linux/brcm63xx/patches-3.18/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch b/target/linux/brcm63xx/patches-3.18/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch
new file mode 100644
index 0000000..bc35c25
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch
@@ -0,0 +1,95 @@
+From 9912a8b3c240a9b0af01ff496b7e8ed9e4cc5b82 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:43:49 +0200
+Subject: [PATCH 02/10] MIPS: BCM63XX: use platform data for the sprom
+
+Similar to ethernet setup, use a platform data struct for passing
+the mac. This eliminates the requirement to allocate an array on
+stack for the mac passed.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_common.c                     | 6 ++----
+ arch/mips/bcm63xx/sprom.c                                   | 8 ++++----
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +++++++-
+ arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h         | 4 ++++
+ 4 files changed, 17 insertions(+), 9 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -157,7 +157,6 @@ int __init board_register_devices(void)
+ 	int button_count = 0;
+ 	int led_count = 0;
+ 	int usbh_ports = 0;
+-	u8 mac[ETH_ALEN];
+ 
+ 	if (board.has_uart0)
+ 		bcm63xx_uart_register(0);
+@@ -203,8 +202,8 @@ int __init board_register_devices(void)
+ 	 * do this after registering enet devices
+ 	 */
+ 
+-	if (board_get_mac_address(mac) ||
+-	    bcm63xx_register_fallback_sprom(mac))
++	if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
++	    bcm63xx_register_fallback_sprom(&board.fallback_sprom))
+ 		pr_err(PFX "failed to register fallback SPROM\n");
+ 
+ 	bcm63xx_spi_register();
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -55,14 +55,14 @@ int bcm63xx_get_fallback_sprom(struct ss
+ }
+ #endif
+ 
+-int __init bcm63xx_register_fallback_sprom(u8 *mac)
++int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
+ {
+ 	int ret = 0;
+ 
+ #ifdef CONFIG_SSB_PCIHOST
+-	memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
+-	memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
+-	memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
++	memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
++	memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
++	memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
+ 
+ 	ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
+ #endif
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -1,6 +1,12 @@
+ #ifndef __BCM63XX_FALLBACK_SPROM
+ #define __BCM63XX_FALLBACK_SPROM
+ 
+-int bcm63xx_register_fallback_sprom(u8 *mac);
++#include <linux/if_ether.h>
++
++struct fallback_sprom_data {
++	u8 mac_addr[ETH_ALEN];
++};
++
++int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
+ 
+ #endif
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -8,6 +8,7 @@
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <bcm63xx_dev_dsp.h>
++#include <bcm63xx_fallback_sprom.h>
+ 
+ /*
+  * flash mapping
+@@ -59,6 +60,9 @@ struct board_info {
+ 	/* External PHY reset GPIO flags from gpio.h */
+ 	unsigned long ephy_reset_gpio_flags;
+ 
++	/* fallback sprom config */
++	struct fallback_sprom_data fallback_sprom;
++
+ 	/* Additional platform devices */
+ 	struct platform_device **devs;
+ 	unsigned int	num_devs;
diff --git a/target/linux/brcm63xx/patches-3.18/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch b/target/linux/brcm63xx/patches-3.18/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch
new file mode 100644
index 0000000..d7250d5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch
@@ -0,0 +1,140 @@
+From 83131acbfb59760a19f3711c09526e191c8aad54 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:52:56 +0200
+Subject: [PATCH 03/10] MIPS: BCM63XX: make fallback sprom optional
+
+Some devices do not provide enough mac addresses to populate wifi in
+addition to ethernet.
+
+Use having pci enabled as a rough heuristic which boards should have it
+enabled.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c           | 12 ++++++++++++
+ arch/mips/bcm63xx/boards/board_common.c             |  5 +++--
+ arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h |  1 +
+ 3 files changed, 16 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -74,6 +74,7 @@ static struct board_info __initdata boar
+ 	.has_uart0			= 1,
+ 	.has_pci			= 1,
+ 	.has_usbd			= 0,
++	.use_fallback_sprom		= 1,
+ 
+ 	.usbd = {
+ 		.use_fullspeed		= 0,
+@@ -223,6 +224,7 @@ static struct board_info __initdata boar
+ 	.has_uart0			= 1,
+ 	.has_enet0			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -268,6 +270,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -328,6 +331,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -382,6 +386,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -440,6 +445,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -463,6 +469,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -481,6 +488,7 @@ static struct board_info __initdata boar
+ 
+ 	.has_uart0			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 	.has_ohci0			= 1,
+ 
+ 	.has_enet0			= 1,
+@@ -503,6 +511,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -529,6 +538,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -581,6 +591,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -652,6 +663,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -202,8 +202,9 @@ int __init board_register_devices(void)
+ 	 * do this after registering enet devices
+ 	 */
+ 
+-	if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
+-	    bcm63xx_register_fallback_sprom(&board.fallback_sprom))
++	if (board.use_fallback_sprom &&
++	    (board_get_mac_address(board.fallback_sprom.mac_addr) ||
++	     bcm63xx_register_fallback_sprom(&board.fallback_sprom)))
+ 		pr_err(PFX "failed to register fallback SPROM\n");
+ 
+ 	bcm63xx_spi_register();
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -35,6 +35,7 @@ struct board_info {
+ 	unsigned int	has_dsp:1;
+ 	unsigned int	has_uart0:1;
+ 	unsigned int	has_uart1:1;
++	unsigned int	use_fallback_sprom:1;
+ 
+ 	/* ethernet config */
+ 	struct bcm63xx_enet_platform_data enet0;
diff --git a/target/linux/brcm63xx/patches-3.18/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch b/target/linux/brcm63xx/patches-3.18/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch
new file mode 100644
index 0000000..0c4a9be
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch
@@ -0,0 +1,66 @@
+From 1cece9f7aca1f0c193edce201f77a87008c5a405 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:58:38 +0200
+Subject: [PATCH 04/10] MIPS: BCM63XX: allow different types of sprom
+
+Different chips require different sprom contents, so prepare for
+supplying the appropriate sprom type.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c                                   | 13 ++++++++++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h |  5 +++++
+ 2 files changed, 17 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -22,7 +22,7 @@
+  * bcm4318 WLAN work
+  */
+ #ifdef CONFIG_SSB_PCIHOST
+-static struct ssb_sprom bcm63xx_sprom = {
++static __initconst struct ssb_sprom bcm63xx_default_sprom = {
+ 	.revision		= 0x02,
+ 	.board_rev		= 0x17,
+ 	.country_code		= 0x0,
+@@ -43,6 +43,8 @@ static struct ssb_sprom bcm63xx_sprom =
+ 	.boardflags_hi		= 0x0000,
+ };
+ 
++static struct ssb_sprom bcm63xx_sprom;
++
+ int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+ {
+ 	if (bus->bustype == SSB_BUSTYPE_PCI) {
+@@ -60,6 +62,15 @@ int __init bcm63xx_register_fallback_spr
+ 	int ret = 0;
+ 
+ #ifdef CONFIG_SSB_PCIHOST
++	switch (data->type) {
++	case SPROM_DEFAULT:
++		memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
++		       sizeof(bcm63xx_sprom));
++		break;
++	default:
++		return -EINVAL;
++	}
++
+ 	memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -3,8 +3,13 @@
+ 
+ #include <linux/if_ether.h>
+ 
++enum sprom_type {
++	SPROM_DEFAULT, /* default fallback sprom */
++};
++
+ struct fallback_sprom_data {
+ 	u8 mac_addr[ETH_ALEN];
++	enum sprom_type type;
+ };
+ 
+ int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
diff --git a/target/linux/brcm63xx/patches-3.18/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch b/target/linux/brcm63xx/patches-3.18/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch
new file mode 100644
index 0000000..42502eb
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch
@@ -0,0 +1,517 @@
+From cedee63bc73f8b7d45b8c0cba1236986812c1f83 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 22:16:36 +0200
+Subject: [PATCH 05/10] MIPS: BCM63XX: add support for "raw" sproms
+
+Allow using raw sprom content as templates.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 482 ++++++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 482 insertions(+)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -55,13 +55,492 @@ int bcm63xx_get_fallback_sprom(struct ss
+ 		return -EINVAL;
+ 	}
+ }
++
++/* FIXME: use lib_sprom after submission upstream */
++
++/* Get the word-offset for a SSB_SPROM_XXX define. */
++#define SPOFF(offset)	((offset) / sizeof(u16))
++/* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
++#define SPEX16(_outvar, _offset, _mask, _shift)	\
++	out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
++#define SPEX32(_outvar, _offset, _mask, _shift)	\
++	out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \
++			   in[SPOFF(_offset)]) & (_mask)) >> (_shift))
++#define SPEX(_outvar, _offset, _mask, _shift) \
++	SPEX16(_outvar, _offset, _mask, _shift)
++
++#define SPEX_ARRAY8(_field, _offset, _mask, _shift)	\
++	do {	\
++		SPEX(_field[0], _offset +  0, _mask, _shift);	\
++		SPEX(_field[1], _offset +  2, _mask, _shift);	\
++		SPEX(_field[2], _offset +  4, _mask, _shift);	\
++		SPEX(_field[3], _offset +  6, _mask, _shift);	\
++		SPEX(_field[4], _offset +  8, _mask, _shift);	\
++		SPEX(_field[5], _offset + 10, _mask, _shift);	\
++		SPEX(_field[6], _offset + 12, _mask, _shift);	\
++		SPEX(_field[7], _offset + 14, _mask, _shift);	\
++	} while (0)
++
++
++static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in,
++			       u16 mask, u16 shift)
++{
++	u16 v;
++	u8 gain;
++
++	v = in[SPOFF(SSB_SPROM1_AGAIN)];
++	gain = (v & mask) >> shift;
++	if (gain == 0xFF)
++		gain = 2; /* If unset use 2dBm */
++	if (sprom_revision == 1) {
++		/* Convert to Q5.2 */
++		gain <<= 2;
++	} else {
++		/* Q5.2 Fractional part is stored in 0xC0 */
++		gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
++	}
++
++	return (s8)gain;
++}
++
++static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
++{
++	SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
++	SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
++	SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
++	SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
++	SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
++	SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
++	SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
++	SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
++	SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
++	SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
++	     SSB_SPROM2_MAXP_A_LO_SHIFT);
++}
++
++static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
++{
++	u16 loc[3];
++
++	if (out->revision == 3)			/* rev 3 moved MAC */
++		loc[0] = SSB_SPROM3_IL0MAC;
++	else {
++		loc[0] = SSB_SPROM1_IL0MAC;
++		loc[1] = SSB_SPROM1_ET0MAC;
++		loc[2] = SSB_SPROM1_ET1MAC;
++	}
++
++	SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
++	SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
++	     SSB_SPROM1_ETHPHY_ET1A_SHIFT);
++	SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
++	SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
++	SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
++	SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
++	if (out->revision == 1)
++		SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
++		     SSB_SPROM1_BINF_CCODE_SHIFT);
++	SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
++	     SSB_SPROM1_BINF_ANTA_SHIFT);
++	SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
++	     SSB_SPROM1_BINF_ANTBG_SHIFT);
++	SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
++	SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
++	SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
++	SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0);
++	SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0);
++	SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0);
++	SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0);
++	SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1,
++	     SSB_SPROM1_GPIOA_P1_SHIFT);
++	SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0);
++	SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3,
++	     SSB_SPROM1_GPIOB_P3_SHIFT);
++	SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A,
++	     SSB_SPROM1_MAXPWR_A_SHIFT);
++	SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0);
++	SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A,
++	     SSB_SPROM1_ITSSI_A_SHIFT);
++	SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
++	SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
++
++	SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
++	SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
++
++	/* Extract the antenna gain values. */
++	out->antenna_gain.a0 = r123_extract_antgain(out->revision, in,
++						    SSB_SPROM1_AGAIN_BG,
++						    SSB_SPROM1_AGAIN_BG_SHIFT);
++	out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
++						    SSB_SPROM1_AGAIN_A,
++						    SSB_SPROM1_AGAIN_A_SHIFT);
++	if (out->revision >= 2)
++		sprom_extract_r23(out, in);
++}
++
++/* Revs 4 5 and 8 have partially shared layout */
++static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
++{
++	SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
++	     SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
++	SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
++	     SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
++	SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
++	     SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
++	SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
++	     SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
++
++	SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
++	     SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
++	SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
++	     SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
++	SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
++	     SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
++	SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
++	     SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
++
++	SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
++	     SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
++	SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
++	     SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
++	SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
++	     SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
++	SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
++	     SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
++
++	SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
++	     SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
++	SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
++	     SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
++	SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
++	     SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
++	SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
++	     SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
++}
++
++static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
++{
++	u16 il0mac_offset;
++
++	if (out->revision == 4)
++		il0mac_offset = SSB_SPROM4_IL0MAC;
++	else
++		il0mac_offset = SSB_SPROM5_IL0MAC;
++
++	SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
++	SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
++	     SSB_SPROM4_ETHPHY_ET1A_SHIFT);
++	SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
++	SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
++	if (out->revision == 4) {
++		SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
++		SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
++		SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
++		SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
++		SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
++		SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
++	} else {
++		SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
++		SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
++		SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
++		SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
++		SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
++		SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
++	}
++	SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
++	     SSB_SPROM4_ANTAVAIL_A_SHIFT);
++	SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG,
++	     SSB_SPROM4_ANTAVAIL_BG_SHIFT);
++	SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
++	SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
++	     SSB_SPROM4_ITSSI_BG_SHIFT);
++	SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
++	SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
++	     SSB_SPROM4_ITSSI_A_SHIFT);
++	if (out->revision == 4) {
++		SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
++		SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
++		     SSB_SPROM4_GPIOA_P1_SHIFT);
++		SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
++		SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
++		     SSB_SPROM4_GPIOB_P3_SHIFT);
++	} else {
++		SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0);
++		SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1,
++		     SSB_SPROM5_GPIOA_P1_SHIFT);
++		SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0);
++		SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3,
++		     SSB_SPROM5_GPIOB_P3_SHIFT);
++	}
++
++	/* Extract the antenna gain values. */
++	SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01,
++	     SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
++	SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01,
++	     SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
++	SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23,
++	     SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
++	SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23,
++	     SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
++
++	sprom_extract_r458(out, in);
++
++	/* TODO - get remaining rev 4 stuff needed */
++}
++
++static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
++{
++	int i;
++	u16 o;
++	u16 pwr_info_offset[] = {
++		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
++		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
++	};
++	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
++			ARRAY_SIZE(out->core_pwr_info));
++
++	SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
++	SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
++	SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
++	SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
++	SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
++	SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
++	SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
++	SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0);
++	SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
++	     SSB_SPROM8_ANTAVAIL_A_SHIFT);
++	SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
++	     SSB_SPROM8_ANTAVAIL_BG_SHIFT);
++	SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
++	SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
++	     SSB_SPROM8_ITSSI_BG_SHIFT);
++	SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
++	SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
++	     SSB_SPROM8_ITSSI_A_SHIFT);
++	SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
++	SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
++	     SSB_SPROM8_MAXP_AL_SHIFT);
++	SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
++	SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
++	     SSB_SPROM8_GPIOA_P1_SHIFT);
++	SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
++	SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
++	     SSB_SPROM8_GPIOB_P3_SHIFT);
++	SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
++	SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
++	     SSB_SPROM8_TRI5G_SHIFT);
++	SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
++	SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
++	     SSB_SPROM8_TRI5GH_SHIFT);
++	SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0);
++	SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
++	     SSB_SPROM8_RXPO5G_SHIFT);
++	SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
++	SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
++	     SSB_SPROM8_RSSISMC2G_SHIFT);
++	SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
++	     SSB_SPROM8_RSSISAV2G_SHIFT);
++	SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
++	     SSB_SPROM8_BXA2G_SHIFT);
++	SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
++	SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
++	     SSB_SPROM8_RSSISMC5G_SHIFT);
++	SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
++	     SSB_SPROM8_RSSISAV5G_SHIFT);
++	SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
++	     SSB_SPROM8_BXA5G_SHIFT);
++	SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0);
++	SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0);
++	SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0);
++	SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0);
++	SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0);
++	SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0);
++	SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0);
++	SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0);
++	SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0);
++	SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0);
++	SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0);
++	SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0);
++	SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0);
++	SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0);
++	SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0);
++	SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0);
++	SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
++
++	/* Extract the antenna gain values. */
++	SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
++	     SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
++	SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
++	     SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
++	SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
++	     SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
++	SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
++	     SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
++
++	/* Extract cores power info info */
++	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
++		o = pwr_info_offset[i];
++		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
++		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++			SSB_SPROM8_2G_MAXP, 0);
++
++		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
++		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
++		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
++
++		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
++		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++			SSB_SPROM8_5G_MAXP, 0);
++		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
++			SSB_SPROM8_5GH_MAXP, 0);
++		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
++			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
++
++		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
++	}
++
++	/* Extract FEM info */
++	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
++		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
++	SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
++		SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
++	SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
++		SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
++	SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
++		SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
++	SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
++		SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
++
++	SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
++		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
++	SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
++		SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
++	SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
++		SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
++	SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
++		SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
++	SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
++		SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
++
++	SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
++	     SSB_SPROM8_LEDDC_ON_SHIFT);
++	SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
++	     SSB_SPROM8_LEDDC_OFF_SHIFT);
++
++	SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
++	     SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
++	SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
++	     SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
++	SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
++	     SSB_SPROM8_TXRXC_SWITCH_SHIFT);
++
++	SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
++
++	SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
++	SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
++	SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
++	SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
++
++	SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
++	     SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
++	SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
++	     SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
++	SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
++	     SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
++	     SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
++	SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
++	     SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
++	SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
++	     SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
++	     SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
++	SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
++	     SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
++	     SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
++	SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
++	     SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
++	     SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
++	SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
++	     SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
++
++	SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
++	SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
++	SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
++	SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
++
++	SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
++	     SSB_SPROM8_THERMAL_TRESH_SHIFT);
++	SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
++	     SSB_SPROM8_THERMAL_OFFSET_SHIFT);
++	SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
++	     SSB_SPROM8_TEMPDELTA_PHYCAL,
++	     SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
++	SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
++	     SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
++	SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
++	     SSB_SPROM8_TEMPDELTA_HYSTERESIS,
++	     SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
++	sprom_extract_r458(out, in);
++
++	/* TODO - get remaining rev 8 stuff needed */
++}
++
++static int sprom_extract(struct ssb_sprom *out, const u16 *in, u16 size)
++{
++	memset(out, 0, sizeof(*out));
++
++	out->revision = in[size - 1] & 0x00FF;
++	memset(out->et0mac, 0xFF, 6);		/* preset et0 and et1 mac */
++	memset(out->et1mac, 0xFF, 6);
++
++	switch (out->revision) {
++	case 1:
++	case 2:
++	case 3:
++		sprom_extract_r123(out, in);
++		break;
++	case 4:
++	case 5:
++		sprom_extract_r45(out, in);
++		break;
++	case 8:
++		sprom_extract_r8(out, in);
++		break;
++	default:
++		pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
++			 out->revision);
++		out->revision = 1;
++		sprom_extract_r123(out, in);
++	}
++
++	if (out->boardflags_lo == 0xFFFF)
++		out->boardflags_lo = 0;  /* per specs */
++	if (out->boardflags_hi == 0xFFFF)
++		out->boardflags_hi = 0;  /* per specs */
++
++	return 0;
++}
++
++static __initdata u16 template_sprom[220];
+ #endif
+ 
++
+ int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
+ {
+ 	int ret = 0;
+ 
+ #ifdef CONFIG_SSB_PCIHOST
++	u16 size = 0;
++
+ 	switch (data->type) {
+ 	case SPROM_DEFAULT:
+ 		memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+@@ -71,6 +550,9 @@ int __init bcm63xx_register_fallback_spr
+ 		return -EINVAL;
+ 	}
+ 
++	if (size > 0)
++		sprom_extract(&bcm63xx_sprom, template_sprom, size);
++
+ 	memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
diff --git a/target/linux/brcm63xx/patches-3.18/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch b/target/linux/brcm63xx/patches-3.18/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch
new file mode 100644
index 0000000..65c00b5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch
@@ -0,0 +1,181 @@
+From 7be5bb46003295c9e04fd4e795593b2deaacd783 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 22:33:38 +0200
+Subject: [PATCH 06/10] MIPS: BCM63XX: add raw fallback sproms for most common
+ ssb cards
+
+Add template sproms for BCM4306, BCM4318, BCM4321, BCM4322, and BCM43222.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c                          | 136 +++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h      |   6 +
+ 2 files changed, 142 insertions(+)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -43,6 +43,122 @@ static __initconst struct ssb_sprom bcm6
+ 	.boardflags_hi		= 0x0000,
+ };
+ 
++
++static __initconst u16 bcm4306_sprom[] = {
++	0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
++	0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3034, 0x14d4,
++	0xfa91, 0xfe60, 0xffff, 0xffff, 0x004c, 0xffff, 0xffff, 0xffff,
++	0x003e, 0x0a49, 0xff02, 0x0000, 0xff10, 0xffff, 0xffff, 0x0002,
++};
++
++static __initconst u16 bcm4318_sprom[] = {
++	0x2001, 0x0000, 0x0449, 0x14e4, 0x4318, 0x8000, 0x0002, 0x0000,
++	0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3046, 0x15a7,
++	0xfab0, 0xfe97, 0xffff, 0xffff, 0x0048, 0xffff, 0xffff, 0xffff,
++	0x003e, 0xea49, 0xff02, 0x0000, 0xff08, 0xffff, 0xffff, 0x0002,
++};
++
++static __initconst u16 bcm4321_sprom[] = {
++	0x3001, 0x0000, 0x046c, 0x14e4, 0x4328, 0x8000, 0x0002, 0x0000,
++	0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x5372, 0x0032, 0x4a01, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
++	0xffff, 0x2728, 0x5b5b, 0x222b, 0x5b5b, 0x1927, 0x5b5b, 0x1e36,
++	0x5b5b, 0x303c, 0x3030, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x3e4c, 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0x3e4c,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0x0008, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0004,
++};
++
++static __initconst u16 bcm4322_sprom[] = {
++	0x3001, 0x0000, 0x04bc, 0x14e4, 0x432c, 0x8000, 0x0002, 0x0000,
++	0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x5372, 0x1209, 0x0200, 0x0000, 0x0400, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
++	0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0301,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x2048, 0xfe9a, 0x1571, 0xfabd, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x2048, 0xfeb9, 0x159f, 0xfadd, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x3333, 0x5555, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43222_sprom[] = {
++	0x2001, 0x0000, 0x04d4, 0x14e4, 0x4351, 0x8000, 0x0002, 0x0000,
++	0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x5372, 0x2305, 0x0200, 0x0000, 0x2400, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
++	0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x204c, 0xfea6, 0x1717, 0xfa6d, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x204c, 0xfeb8, 0x167c, 0xfa9e, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x3333, 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333,
++	0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0004, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0008,
++};
++
+ static struct ssb_sprom bcm63xx_sprom;
+ 
+ int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+@@ -542,6 +658,26 @@ int __init bcm63xx_register_fallback_spr
+ 	u16 size = 0;
+ 
+ 	switch (data->type) {
++	case SPROM_BCM4306:
++		memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
++		size = ARRAY_SIZE(bcm4306_sprom);
++		break;
++	case SPROM_BCM4318:
++		memcpy(&template_sprom, &bcm4318_sprom, sizeof(bcm4318_sprom));
++		size = ARRAY_SIZE(bcm4318_sprom);
++		break;
++	case SPROM_BCM4321:
++		memcpy(&template_sprom, &bcm4321_sprom, sizeof(bcm4321_sprom));
++		size = ARRAY_SIZE(bcm4321_sprom);
++		break;
++	case SPROM_BCM4322:
++		memcpy(&template_sprom, &bcm4322_sprom, sizeof(bcm4322_sprom));
++		size = ARRAY_SIZE(bcm4322_sprom);
++		break;
++	case SPROM_BCM43222:
++		memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
++		size = ARRAY_SIZE(bcm43222_sprom);
++		break;
+ 	case SPROM_DEFAULT:
+ 		memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+ 		       sizeof(bcm63xx_sprom));
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -5,6 +5,12 @@
+ 
+ enum sprom_type {
+ 	SPROM_DEFAULT, /* default fallback sprom */
++	/* SSB based */
++	SPROM_BCM4306,
++	SPROM_BCM4318,
++	SPROM_BCM4321,
++	SPROM_BCM4322,
++	SPROM_BCM43222,
+ };
+ 
+ struct fallback_sprom_data {
diff --git a/target/linux/brcm63xx/patches-3.18/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch b/target/linux/brcm63xx/patches-3.18/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch
new file mode 100644
index 0000000..6475f9f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch
@@ -0,0 +1,128 @@
+From 03feb9db77fba3eef3d83e17a87a56979659b248 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 22:48:26 +0200
+Subject: [PATCH 07/10] MIPS: BCM63XX: also register a fallback sprom for bcma
+
+Similar to SSB, register a fallback sprom handler for BCMA.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Kconfig |  1 +
+ arch/mips/bcm63xx/sprom.c        | 40 +++++++++++++++++++++++++++++++++++-----
+ 2 files changed, 36 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -4,6 +4,7 @@ menu "Board support"
+ config BOARD_BCM963XX
+        bool "Generic Broadcom 963xx boards"
+ 	select SSB
++	select BCMA
+ 	default y
+        help
+ 
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -12,6 +12,7 @@
+ #include <linux/string.h>
+ #include <linux/platform_device.h>
+ #include <linux/ssb/ssb.h>
++#include <linux/bcma/bcma.h>
+ #include <bcm63xx_fallback_sprom.h>
+ #include <board_bcm963xx.h>
+ 
+@@ -21,7 +22,7 @@
+  * Register a sane SPROMv2 to make the on-board
+  * bcm4318 WLAN work
+  */
+-#ifdef CONFIG_SSB_PCIHOST
++#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
+ static __initconst struct ssb_sprom bcm63xx_default_sprom = {
+ 	.revision		= 0x02,
+ 	.board_rev		= 0x17,
+@@ -43,7 +44,7 @@ static __initconst struct ssb_sprom bcm6
+ 	.boardflags_hi		= 0x0000,
+ };
+ 
+-
++#if defined (CONFIG_SSB_PCIHOST)
+ static __initconst u16 bcm4306_sprom[] = {
+ 	0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
+ 	0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
+@@ -158,10 +159,12 @@ static __initconst u16 bcm43222_sprom[]
+ 	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
+ 	0xffff, 0xffff, 0xffff, 0x0008,
+ };
++#endif /* CONFIG_SSB_PCIHOST */
+ 
+ static struct ssb_sprom bcm63xx_sprom;
+ 
+-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
++#if defined(CONFIG_SSB_PCIHOST)
++int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+ {
+ 	if (bus->bustype == SSB_BUSTYPE_PCI) {
+ 		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
+@@ -171,6 +174,20 @@ int bcm63xx_get_fallback_sprom(struct ss
+ 		return -EINVAL;
+ 	}
+ }
++#endif
++
++#if defined(CONFIG_BCMA_HOST_PCI)
++int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
++{
++	if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
++		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++		return 0;
++	} else {
++		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
++		return -EINVAL;
++	}
++}
++#endif
+ 
+ /* FIXME: use lib_sprom after submission upstream */
+ 
+@@ -654,10 +671,11 @@ int __init bcm63xx_register_fallback_spr
+ {
+ 	int ret = 0;
+ 
+-#ifdef CONFIG_SSB_PCIHOST
++#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
+ 	u16 size = 0;
+ 
+ 	switch (data->type) {
++#if defined(CONFIG_SSB_PCIHOST)
+ 	case SPROM_BCM4306:
+ 		memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
+ 		size = ARRAY_SIZE(bcm4306_sprom);
+@@ -678,6 +696,7 @@ int __init bcm63xx_register_fallback_spr
+ 		memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
+ 		size = ARRAY_SIZE(bcm43222_sprom);
+ 		break;
++#endif
+ 	case SPROM_DEFAULT:
+ 		memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+ 		       sizeof(bcm63xx_sprom));
+@@ -692,8 +711,19 @@ int __init bcm63xx_register_fallback_spr
+ 	memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
++#endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
++
++#if defined(CONFIG_SSB_PCIHOST)
++	ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_ssb_sprom);
++	if (ret)
++		return ret;
++
++#endif
+ 
+-	ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
++#if defined(CONFIG_BCMA_HOST_PCI)
++	ret = bcma_arch_register_fallback_sprom(bcm63xx_get_fallback_bcma_sprom);
++	if (ret)
++		return ret;
+ #endif
+ 	return ret;
+ }
diff --git a/target/linux/brcm63xx/patches-3.18/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch b/target/linux/brcm63xx/patches-3.18/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch
new file mode 100644
index 0000000..5c0abb9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch
@@ -0,0 +1,303 @@
+From 27bf70e3fe797691b17df07ecbfaf9f5a4419f49 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Wed, 30 Jul 2014 23:14:27 +0200
+Subject: [PATCH 08/10] MIPS: BCM63XX: add BCMA based sprom templates
+
+Add fallback sproms for BCM4313, BCM43131, BCM43217, BCM43225, BCM43227,
+BCM43228, and BCM4331.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c                          | 256 +++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h      |   8 +
+ 2 files changed, 264 insertions(+)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -161,6 +161,226 @@ static __initconst u16 bcm43222_sprom[]
+ };
+ #endif /* CONFIG_SSB_PCIHOST */
+ 
++#if defined(CONFIG_BCMA_HOST_PCI)
++static __initconst u16 bcm4313_sprom[] = {
++	0x2801, 0x0000, 0x0510, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x4727, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x5372, 0x1215, 0x2a00, 0x0800, 0x0800, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
++	0xffff, 0x0011, 0x007a, 0x0000, 0x0000, 0x0000, 0x0000, 0x0201,
++	0x0000, 0x7800, 0x7c0a, 0x0398, 0x0008, 0x0000, 0x0000, 0x0000,
++	0x0044, 0x1684, 0xfd0d, 0xff35, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0048, 0xfed2, 0x15d9, 0xfac6, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0008,
++};
++
++static __initconst u16 bcm43131_sprom[] = {
++	0x2801, 0x0000, 0x05f7, 0x14e4, 0x0070, 0xedbe, 0x1c00, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x43aa, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x5372, 0x1280, 0x0200, 0x0000, 0x8800, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0002, 0x0202,
++	0xffff, 0x0022, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
++	0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
++	0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43217_sprom[] = {
++	0x2801, 0x0000, 0x05e9, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x43a9, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x5372, 0x1252, 0x0200, 0x0000, 0x9800, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
++	0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
++	0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
++	0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x7a08,
++};
++
++static __initconst u16 bcm43225_sprom[] = {
++	0x2801, 0x0000, 0x04da, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0x1008, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x4357, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x5372, 0x1200, 0x0200, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x88ff, 0xffff, 0xffff, 0x0303, 0x0202,
++	0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
++	0xffff, 0x7800, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x204e, 0xfead, 0x1611, 0xfa9a, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x204e, 0xfec1, 0x1674, 0xfab2, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555,
++	0x7555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0002, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43227_sprom[] = {
++	0x2801, 0x0000, 0x0543, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x4358, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x5372, 0x1402, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
++	0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
++	0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xff36, 0x16d2, 0xfaae, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xfeca, 0x159b, 0xfa80, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
++	0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43228_sprom[] = {
++	0x2801, 0x0000, 0x0011, 0x1028, 0x0070, 0xedbe, 0x0000, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x4359, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x5372, 0x1203, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0303, 0x0202,
++	0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0215,
++	0x0215, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xff73, 0x1762, 0xfaa4, 0x3e34, 0x3434, 0xfea1, 0x154c,
++	0xfad0, 0xfea1, 0x144c, 0xfafb, 0xfe7b, 0x13fe, 0xfafc, 0x0000,
++	0x204c, 0xff41, 0x16a3, 0xfa8f, 0x3e34, 0x3434, 0xfe97, 0x1446,
++	0xfb05, 0xfe97, 0x1346, 0xfb32, 0xfeb9, 0x1516, 0xfaee, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x8888, 0x8888, 0x8888,
++	0x8888, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
++	0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
++	0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
++	0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xf008,
++};
++
++static __initconst u16 bcm4331_sprom[] = {
++	0x2801, 0x0000, 0x0525, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0x1010, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x4331, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x5372, 0x1104, 0x0200, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0xffff, 0x88ff, 0xffff, 0x0707, 0x0202,
++	0xff02, 0x0077, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
++	0x0325, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x2048, 0xfe56, 0x16f2, 0xfa44, 0x3e3c, 0x3c3c, 0xfe77, 0x1657,
++	0xfa75, 0xffff, 0xffff, 0xffff, 0xfe76, 0x15da, 0xfa85, 0x0000,
++	0x2048, 0xfe5c, 0x16b5, 0xfa56, 0x3e3c, 0x3c3c, 0xfe7c, 0x169d,
++	0xfa6b, 0xffff, 0xffff, 0xffff, 0xfe7a, 0x1597, 0xfa97, 0x0000,
++	0x2048, 0xfe68, 0x1734, 0xfa46, 0x3e3c, 0x3c3c, 0xfe7f, 0x15e4,
++	0xfa94, 0xffff, 0xffff, 0xffff, 0xfe7d, 0x1582, 0xfa9f, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0009,
++};
++
++#endif  /* CONFIG_BCMA_HOST_PCI */
++
+ static struct ssb_sprom bcm63xx_sprom;
+ 
+ #if defined(CONFIG_SSB_PCIHOST)
+@@ -697,6 +917,42 @@ int __init bcm63xx_register_fallback_spr
+ 		size = ARRAY_SIZE(bcm43222_sprom);
+ 		break;
+ #endif
++#if defined(CONFIG_BCMA_HOST_PCI)
++	case SPROM_BCM4313:
++		memcpy(&template_sprom, &bcm4313_sprom,
++                       sizeof(bcm4313_sprom));
++		size = ARRAY_SIZE(bcm4313_sprom);
++		break;
++	case SPROM_BCM43131:
++		memcpy(&template_sprom, &bcm43131_sprom,
++		       sizeof(bcm43131_sprom));
++		size = ARRAY_SIZE(bcm43131_sprom);
++		break;
++	case SPROM_BCM43217:
++		memcpy(&template_sprom, &bcm43217_sprom,
++		       sizeof(bcm43217_sprom));
++		size = ARRAY_SIZE(bcm43217_sprom);
++		break;
++	case SPROM_BCM43225:
++		memcpy(&template_sprom, &bcm43225_sprom,
++		       sizeof(bcm43225_sprom));
++		size = ARRAY_SIZE(bcm43225_sprom);
++		break;
++	case SPROM_BCM43227:
++		memcpy(&template_sprom, &bcm43227_sprom,
++		       sizeof(bcm43227_sprom));
++		size = ARRAY_SIZE(bcm43227_sprom);
++		break;
++	case SPROM_BCM43228:
++		memcpy(&template_sprom, &bcm43228_sprom,
++		       sizeof(bcm43228_sprom));
++		size = ARRAY_SIZE(bcm43228_sprom);
++		break;
++	case SPROM_BCM4331:
++		memcpy(&template_sprom, &bcm4331_sprom, sizeof(&bcm4331_sprom));
++		size = ARRAY_SIZE(bcm4331_sprom);
++		break;
++#endif
+ 	case SPROM_DEFAULT:
+ 		memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+ 		       sizeof(bcm63xx_sprom));
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -11,6 +11,14 @@ enum sprom_type {
+ 	SPROM_BCM4321,
+ 	SPROM_BCM4322,
+ 	SPROM_BCM43222,
++	/* BCMA based */
++	SPROM_BCM4313,
++	SPROM_BCM43131,
++	SPROM_BCM43217,
++	SPROM_BCM43225,
++	SPROM_BCM43227,
++	SPROM_BCM43228,
++	SPROM_BCM4331,
+ };
+ 
+ struct fallback_sprom_data {
diff --git a/target/linux/brcm63xx/patches-3.18/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch b/target/linux/brcm63xx/patches-3.18/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch
new file mode 100644
index 0000000..74c2846
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch
@@ -0,0 +1,67 @@
+From 8575548b08e33c9ff4fd540abec09dd177e33682 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 31 Jul 2014 19:12:33 +0200
+Subject: [PATCH 09/10] MIPS: BCM63XX: allow board files to provide sprom
+ fixups
+
+Allow board_info files to supply fixups for the base sproms to adapt
+them to the actual used sprom contents in case they do not use the
+default ones.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c                                  | 14 +++++++++++++-
+ .../mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h |  8 ++++++++
+ 2 files changed, 21 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -883,6 +883,14 @@ static int sprom_extract(struct ssb_spro
+ 	return 0;
+ }
+ 
++void sprom_apply_fixups(u16 *sprom, struct sprom_fixup *fixups, int n)
++{
++	unsigned int i;
++
++	for (i = 0; i < n; i++)
++		sprom[fixups[i].offset] = fixups[i].value;
++}
++
+ static __initdata u16 template_sprom[220];
+ #endif
+ 
+@@ -961,8 +969,12 @@ int __init bcm63xx_register_fallback_spr
+ 		return -EINVAL;
+ 	}
+ 
+-	if (size > 0)
++	if (size > 0) {
++		sprom_apply_fixups(template_sprom, data->board_fixups,
++				   data->num_board_fixups);
++
+ 		sprom_extract(&bcm63xx_sprom, template_sprom, size);
++	}
+ 
+ 	memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -21,9 +21,17 @@ enum sprom_type {
+ 	SPROM_BCM4331,
+ };
+ 
++struct sprom_fixup {
++	u16 offset;
++	u16 value;
++};
++
+ struct fallback_sprom_data {
+ 	u8 mac_addr[ETH_ALEN];
+ 	enum sprom_type type;
++
++	struct sprom_fixup *board_fixups;
++	unsigned int num_board_fixups;
+ };
+ 
+ int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
diff --git a/target/linux/brcm63xx/patches-3.18/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch b/target/linux/brcm63xx/patches-3.18/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch
new file mode 100644
index 0000000..40591e5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch
@@ -0,0 +1,102 @@
+From f393eaacf178e7e8a61eb11a96edd7dfb35cb49d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 31 Jul 2014 20:39:44 +0200
+Subject: [PATCH 10/10] MIPS: BCM63XX: allow setting a pci bus/device for
+ fallback sprom
+
+Warn if the set pci bus/slot does not match the actual request.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c                          | 31 ++++++++++++++++++----
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h      |  3 +++
+ 2 files changed, 29 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -381,13 +381,25 @@ static __initconst u16 bcm4331_sprom[] =
+ 
+ #endif  /* CONFIG_BCMA_HOST_PCI */
+ 
+-static struct ssb_sprom bcm63xx_sprom;
++struct fallback_sprom_match {
++	u8 pci_bus;
++	u8 pci_dev;
++	struct ssb_sprom sprom;
++};
++
++static struct fallback_sprom_match fallback_sprom;
+ 
+ #if defined(CONFIG_SSB_PCIHOST)
+ int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+ {
+ 	if (bus->bustype == SSB_BUSTYPE_PCI) {
+-		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++		if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
++		    PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
++			pr_warn("ssb_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
++				fallback_sprom.pci_bus, fallback_sprom.pci_dev,
++				bus->host_pci->bus->number,
++				PCI_SLOT(bus->host_pci->devfn));
++		memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
+ 		return 0;
+ 	} else {
+ 		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+@@ -400,7 +412,13 @@ int bcm63xx_get_fallback_ssb_sprom(struc
+ int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
+ {
+ 	if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
+-		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++		if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
++		    PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
++			pr_warn("bcma_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
++				fallback_sprom.pci_bus, fallback_sprom.pci_dev,
++				bus->host_pci->bus->number,
++				PCI_SLOT(bus->host_pci->devfn));
++		memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
+ 		return 0;
+ 	} else {
+ 		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+@@ -962,8 +980,8 @@ int __init bcm63xx_register_fallback_spr
+ 		break;
+ #endif
+ 	case SPROM_DEFAULT:
+-		memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+-		       sizeof(bcm63xx_sprom));
++		memcpy(&fallback_sprom.sprom, &bcm63xx_default_sprom,
++		       sizeof(bcm63xx_default_sprom));
+ 		break;
+ 	default:
+ 		return -EINVAL;
+@@ -973,12 +991,15 @@ int __init bcm63xx_register_fallback_spr
+ 		sprom_apply_fixups(template_sprom, data->board_fixups,
+ 				   data->num_board_fixups);
+ 
+-		sprom_extract(&bcm63xx_sprom, template_sprom, size);
++		sprom_extract(&fallback_sprom.sprom, template_sprom, size);
+ 	}
+ 
+-	memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+-	memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+-	memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
++	memcpy(fallback_sprom.sprom.il0mac, data->mac_addr, ETH_ALEN);
++	memcpy(fallback_sprom.sprom.et0mac, data->mac_addr, ETH_ALEN);
++	memcpy(fallback_sprom.sprom.et1mac, data->mac_addr, ETH_ALEN);
++
++	fallback_sprom.pci_bus = data->pci_bus;
++	fallback_sprom.pci_dev = data->pci_dev;
+ #endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
+ 
+ #if defined(CONFIG_SSB_PCIHOST)
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -30,6 +30,9 @@ struct fallback_sprom_data {
+ 	u8 mac_addr[ETH_ALEN];
+ 	enum sprom_type type;
+ 
++	u8 pci_bus;
++	u8 pci_dev;
++
+ 	struct sprom_fixup *board_fixups;
+ 	unsigned int num_board_fixups;
+ };
diff --git a/target/linux/brcm63xx/patches-3.18/366-MIPS-add-support-for-vmlinux.bin-appended-DTB.patch b/target/linux/brcm63xx/patches-3.18/366-MIPS-add-support-for-vmlinux.bin-appended-DTB.patch
new file mode 100644
index 0000000..ff455dd
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/366-MIPS-add-support-for-vmlinux.bin-appended-DTB.patch
@@ -0,0 +1,124 @@
+From 318c1fce4aeef298cbb6153416c499c94ad7cda0 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 24 Jun 2014 10:53:15 +0200
+Subject: [PATCH RFC v3] MIPS: add support for vmlinux.bin appended DTB
+
+Add support for populating initial_boot_params through a dtb
+blob appended to raw vmlinux.bin.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+Changes RFC v2 -> v3
+
+* fixed !smp kernels (TODO: move it to its own patch
+
+Changes RFC v1 -> v2
+
+* changed all occurences of vmlinux to vmlinux.bin
+* clarified this applies to the raw vmlinux.bin without decompressor
+* s/initial_device_params/initial_boot_params/
+
+Initial comments by me still valid:
+
+Mostly adapted from how ARM is doing it.
+
+Sent as an RFC PATCH because I am not sure if this is the right way to
+it, and whether storing the pointer in initial_boot_params is a good
+idea, or a new variable should be introduced.
+
+The reasoning for initial_boot_params is that there is no common
+MIPS interface yet, so the next best thing was using that. This also
+has the advantage of keeping the original fw_args intact.
+
+This patch works for me on bcm63xx, where the bootloader expects
+an lzma compressed kernel, so I didn't want to double compress using
+the in-kernel compressed kernel support.
+
+Completely untested on anything except MIPS32 / big endian.
+
+ arch/mips/Kconfig              | 18 ++++++++++++++++++
+ arch/mips/kernel/head.S        | 19 +++++++++++++++++++
+ arch/mips/kernel/vmlinux.lds.S |  7 +++++++
+ 3 files changed, 43 insertions(+)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -2655,6 +2655,24 @@ config RAPIDIO
+ 
+ source "drivers/rapidio/Kconfig"
+ 
++config MIPS_APPENDED_DTB
++	bool "Use appended device tree blob to vmlinux.bin (EXPERIMENTAL)"
++	depends on OF
++	help
++	  With this option, the boot code will look for a device tree binary
++	  DTB) appended to raw vmlinux.bin (without decompressor).
++	  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
++
++	  This is meant as a backward compatibility convenience for those
++	  systems with a bootloader that can't be upgraded to accommodate
++	  the documented boot protocol using a device tree.
++
++	  Beware that there is very little in terms of protection against
++	  this option being confused by leftover garbage in memory that might
++	  look like a DTB header after a reboot if no actual DTB is appended
++	  to vmlinux.bin.  Do not leave this option active in a production kernel
++	  if you don't intend to always append a DTB.
++
+ endmenu
+ 
+ menu "Executable file formats"
+--- a/arch/mips/kernel/head.S
++++ b/arch/mips/kernel/head.S
+@@ -100,6 +100,22 @@ NESTED(kernel_entry, 16, sp)			# kernel
+ 	jr	t0
+ 0:
+ 
++#ifdef CONFIG_MIPS_APPENDED_DTB
++	PTR_LA		t0, __appended_dtb
++	PTR_LI		t3, 0
++
++#ifdef CONFIG_CPU_BIG_ENDIAN
++	PTR_LI		t1, 0xd00dfeed
++#else
++	PTR_LI		t1, 0xedfe0dd0
++#endif
++	LONG_L		t2, (t0)
++	bne		t1, t2, not_found
++
++	PTR_LA		t3, __appended_dtb
++
++not_found:
++#endif
+ 	PTR_LA		t0, __bss_start		# clear .bss
+ 	LONG_S		zero, (t0)
+ 	PTR_LA		t1, __bss_stop - LONGSIZE
+@@ -113,6 +129,10 @@ NESTED(kernel_entry, 16, sp)			# kernel
+ 	LONG_S		a2, fw_arg2
+ 	LONG_S		a3, fw_arg3
+ 
++#ifdef CONFIG_MIPS_APPENDED_DTB
++	LONG_S		t3, initial_boot_params
++#endif
++
+ 	MTC0		zero, CP0_CONTEXT	# clear context register
+ 	PTR_LA		$28, init_thread_union
+ 	/* Set the SP after an empty pt_regs.  */
+--- a/arch/mips/kernel/vmlinux.lds.S
++++ b/arch/mips/kernel/vmlinux.lds.S
+@@ -125,8 +125,14 @@ SECTIONS
+ 	.exit.data : {
+ 		EXIT_DATA
+ 	}
+-
++#ifdef CONFIG_SMP
+ 	PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
++#endif
++#ifdef CONFIG_MIPS_APPENDED_DTB
++	__appended_dtb = .;
++	/* leave space for appended DTB */
++	. = . + 0x100000;
++#endif
+ 	/*
+ 	 * Align to 64K in attempt to eliminate holes before the
+ 	 * .bss..swapper_pg_dir section at the start of .bss.  This
diff --git a/target/linux/brcm63xx/patches-3.18/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch b/target/linux/brcm63xx/patches-3.18/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch
new file mode 100644
index 0000000..577df55
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch
@@ -0,0 +1,96 @@
+From db896341299cbcb703821228574ba9b79b6a3565 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 24 Jun 2014 10:57:51 +0200
+Subject: [PATCH 45/48] MIPS: BCM63XX: add support for loading DTB
+
+---
+ arch/mips/bcm63xx/boards/Kconfig        |  4 ++++
+ arch/mips/bcm63xx/boards/board_common.c | 34 +++++++++++++++++++++++++++++++++
+ 2 files changed, 38 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -1,6 +1,10 @@
+ menu "Board support"
+ 	depends on BCM63XX
+ 
++config BOARD_BCM63XX_DT
++	bool "Device Tree boards (experimential)"
++	select USE_OF
++
+ config BOARD_BCM963XX
+        bool "Generic Broadcom 963xx boards"
+ 	select SSB
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -10,6 +10,8 @@
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
++#include <linux/of_fdt.h>
++#include <linux/of_platform.h>
+ #include <linux/platform_device.h>
+ #include <linux/ssb/ssb.h>
+ #include <linux/gpio_keys.h>
+@@ -17,6 +19,7 @@
+ #include <asm/addrspace.h>
+ #include <asm/bootinfo.h>
+ #include <asm/fw/cfe/cfe_api.h>
++#include <asm/prom.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_uart.h>
+@@ -129,8 +132,23 @@ void __init board_setup(void)
+ 	/* make sure we're running on expected cpu */
+ 	if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
+ 		panic("unexpected CPU for bcm963xx board");
++
++#if CONFIG_OF
++	if (initial_boot_params)
++		__dt_setup_arch(initial_boot_params);
++#endif
+ }
+ 
++#if CONFIG_OF
++void __init device_tree_init(void)
++{
++	if (!initial_boot_params)
++		return;
++
++	unflatten_and_copy_device_tree();
++}
++#endif
++
+ static struct gpio_led_platform_data bcm63xx_led_data;
+ 
+ static struct platform_device bcm63xx_gpio_leds = {
+@@ -149,6 +167,13 @@ static struct platform_device bcm63xx_gp
+ 	.dev.platform_data = &bcm63xx_gpio_keys_data,
+ };
+ 
++#if CONFIG_OF
++static struct of_device_id of_ids[] = {
++	{ /* filled at runtime */ },
++	{ .compatible = "simple-bus" },
++	{ },
++};
++#endif
+ /*
+  * third stage init callback, register all board devices.
+  */
+@@ -158,6 +183,15 @@ int __init board_register_devices(void)
+ 	int led_count = 0;
+ 	int usbh_ports = 0;
+ 
++#if CONFIG_OF
++	if (of_have_populated_dt()) {
++		snprintf(of_ids[0].compatible, sizeof(of_ids[0].compatible),
++			 "brcm,bcm%x", bcm63xx_get_cpu_id());
++
++		of_platform_populate(NULL, of_ids, NULL, NULL);
++	}
++#endif
++
+ 	if (board.has_uart0)
+ 		bcm63xx_uart_register(0);
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch b/target/linux/brcm63xx/patches-3.18/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch
new file mode 100644
index 0000000..58ffe5e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch
@@ -0,0 +1,95 @@
+From 25bf2b5836c892f091651d8a3384c9c57ce1b400 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 26 Jun 2014 12:51:00 +0200
+Subject: [PATCH 46/48] MIPS: BCM63XX: add support for matching the board_info
+ by dtb
+
+Allow using the passed dtb's compatible property to match board_info
+structs instead of nvram's boardname field, which is not unique anyway.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |   15 +++++++++++++++
+ arch/mips/bcm63xx/boards/board_common.c   |   18 ++++++++++++++++++
+ arch/mips/bcm63xx/boards/board_common.h   |    3 +++
+ 3 files changed, 36 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -715,6 +715,10 @@ static const struct board_info __initcon
+ #endif
+ };
+ 
++static struct of_device_id const bcm963xx_boards_dt[] = {
++	{ },
++};
++
+ /*
+  * early init callback, read nvram data from flash and checksum it
+  */
+@@ -726,6 +730,7 @@ void __init board_bcm963xx_init(void)
+ 	char *board_name = NULL;
+ 	u32 val;
+ 	struct bcm_hcs *hcs;
++	const struct of_device_id *board_match;
+ 
+ 	/* read base address of boot chip select (0)
+ 	 * 6328/6362 do not have MPI but boot from a fixed address
+@@ -765,6 +770,16 @@ void __init board_bcm963xx_init(void)
+ 	} else {
+ 		board_name = bcm63xx_nvram_get_name();
+ 	}
++
++	/* find board by compat */
++	board_match = bcm63xx_match_board(bcm963xx_boards_dt);
++	if (board_match) {
++		board_early_setup(board_match->data,
++				  bcm63xx_nvram_get_mac_address);
++
++		return;
++	}
++
+ 	/* find board by name */
+ 	for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
+ 		if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -281,3 +281,21 @@ int __init board_register_devices(void)
+ 
+ 	return 0;
+ }
++
++const struct of_device_id * __init bcm63xx_match_board(const struct of_device_id *m)
++{
++	const struct of_device_id *match;
++	unsigned long dt_root;
++
++	if (!IS_ENABLED(CONFIG_OF) || !initial_boot_params)
++		return NULL;
++
++	dt_root = of_get_flat_dt_root();
++
++	for (match = m; match->compatible[0]; match++) {
++		if (of_flat_dt_is_compatible(dt_root, match->compatible))
++			return match;
++	}
++
++	return NULL;
++}
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -1,11 +1,14 @@
+ #ifndef __BOARD_COMMON_H
+ #define __BOARD_COMMON_H
+ 
++#include <linux/of.h>
+ #include <board_bcm963xx.h>
+ 
+ void board_early_setup(const struct board_info *board,
+ 		       int (*get_mac_address)(u8 mac[ETH_ALEN]));
+ 
++const struct of_device_id *bcm63xx_match_board(const struct of_device_id *);
++
+ #if defined(CONFIG_BOARD_BCM963XX)
+ void board_bcm963xx_init(void);
+ #else
diff --git a/target/linux/brcm63xx/patches-3.18/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch b/target/linux/brcm63xx/patches-3.18/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch
new file mode 100644
index 0000000..9c5688c
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch
@@ -0,0 +1,65 @@
+From e71eea9953c774dfadb754258824fb1888c279f4 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 21 Nov 2014 16:54:06 +0100
+Subject: [PATCH 47/48] MIPS: BCM63XX: populate the compatible to board_info
+ list
+
+Populate the compatible to board_info list to allow dtbs to be used
+for known boards.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |   34 +++++++++++++++++++++++++++++
+ 1 file changed, 34 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -716,6 +716,48 @@ static const struct board_info __initcon
+ };
+ 
+ static struct of_device_id const bcm963xx_boards_dt[] = {
++#ifdef CONFIG_OF
++#ifdef CONFIG_BCM63XX_CPU_3368
++	{ .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6328
++	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6338
++	{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
++	{ .compatible = "brcm,bcm96338w", .data = &board_96338w, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6345
++	{ .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6348
++	{ .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
++	{ .compatible = "brcm,bcm96348r", .data = &board_96348r, },
++	{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
++	{ .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
++	{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
++	{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
++	{ .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
++	{ .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
++	{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
++	{ .compatible = "usr,9108", .data = &board_96348gw_a, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6358
++	{ .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
++	{ .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
++	{ .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
++	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
++	{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
++	{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
++	{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
++	{ .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6368
++#endif
++#ifdef CONFIG_BCM63XX_CPU_63268
++#endif
++#endif /* CONFIG_OF */
+ 	{ },
+ };
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/371_add_of_node_available_by_alias.patch b/target/linux/brcm63xx/patches-3.18/371_add_of_node_available_by_alias.patch
new file mode 100644
index 0000000..99d778d
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/371_add_of_node_available_by_alias.patch
@@ -0,0 +1,37 @@
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -147,6 +147,18 @@ void __init device_tree_init(void)
+ 
+ 	unflatten_and_copy_device_tree();
+ }
++
++int board_of_device_present(const char *alias)
++{
++	bool present;
++	struct device_node *np;
++
++	np = of_find_node_by_path(alias);
++	present = of_device_is_available(np);
++	of_node_put(np);
++
++	return present;
++}
+ #endif
+ 
+ static struct gpio_led_platform_data bcm63xx_led_data;
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -15,4 +15,13 @@ void board_bcm963xx_init(void);
+ static inline void board_bcm963xx_init(void) { }
+ #endif
+ 
++#if defined(CONFIG_OF)
++int board_of_device_present(const char *alias);
++#else
++static inline void board_of_device_present(const char *alias)
++{
++	return 0;
++}
++#endif
++
+ #endif /* __BOARD_COMMON_H */
diff --git a/target/linux/brcm63xx/patches-3.18/372_dont_register_pflash_when_available_in_dtb.patch b/target/linux/brcm63xx/patches-3.18/372_dont_register_pflash_when_available_in_dtb.patch
new file mode 100644
index 0000000..25384eb
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/372_dont_register_pflash_when_available_in_dtb.patch
@@ -0,0 +1,21 @@
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -23,6 +23,8 @@
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+ 
++#include "boards/board_common.h"
++
+ static int flash_type;
+ 
+ static struct mtd_partition mtd_partitions[] = {
+@@ -178,6 +180,9 @@ int __init bcm63xx_flash_register(void)
+ 
+ 	switch (flash_type) {
+ 	case BCM63XX_FLASH_TYPE_PARALLEL:
++		/* don't register when already registered through from dtb */
++		if (board_of_device_present("pflash"))
++			return 0;
+ 
+ 		if (!mtd_resources[0].start) {
+ 			/* read base address of boot chip select (0) */
diff --git a/target/linux/brcm63xx/patches-3.18/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch b/target/linux/brcm63xx/patches-3.18/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch
new file mode 100644
index 0000000..edc05d9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch
@@ -0,0 +1,38 @@
+From 8a0803979163c647736cb234ee1620c049c4915c Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 1 Dec 2014 00:20:07 +0100
+Subject: [PATCH 5/5] MIPS: BCM63XX: register interrupt controllers through DT
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c |   12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -15,6 +15,8 @@
+ #include <linux/irqchip.h>
+ #include <linux/irqchip/irq-bcm6345-ext.h>
+ #include <linux/irqchip/irq-bcm6345-periph.h>
++#include <linux/of.h>
++#include <linux/of_fdt.h>
+ #include <asm/irq_cpu.h>
+ #include <asm/mipsregs.h>
+ #include <bcm63xx_cpu.h>
+@@ -190,7 +192,15 @@ static void bcm63xx_init_irq(void)
+ 				      ext_shift);
+ }
+ 
++OF_DECLARE_2(irqchip, mips_cpu_intc, "mti,cpu-interrupt-controller",
++	     mips_cpu_irq_of_init);
++
+ void __init arch_init_irq(void)
+ {
+-	bcm63xx_init_irq();
++#ifdef CONFIG_OF
++	if (initial_boot_params)
++		irqchip_init();
++	else
++#endif
++		bcm63xx_init_irq();
+ }
diff --git a/target/linux/brcm63xx/patches-3.18/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch b/target/linux/brcm63xx/patches-3.18/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch
new file mode 100644
index 0000000..3e53c80
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch
@@ -0,0 +1,166 @@
+From dbe94a8daaa63ef81b7414f2a17bca8e36dd6daa Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 20 Feb 2015 19:55:32 +0100
+Subject: [PATCH 1/6] gpio: add a simple GPIO driver for bcm63xx
+
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/gpio/Kconfig        |    8 +++
+ drivers/gpio/Makefile       |    1 +
+ drivers/gpio/gpio-bcm63xx.c |  122 +++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 131 insertions(+)
+ create mode 100644 drivers/gpio/gpio-bcm63xx.c
+
+--- a/drivers/gpio/Kconfig
++++ b/drivers/gpio/Kconfig
+@@ -892,6 +892,14 @@ config GPIO_BCM_KONA
+ 	help
+ 	  Turn on GPIO support for Broadcom "Kona" chips.
+ 
++config GPIO_BCM63XX
++	bool "Broadcom BCM63XX GPIO"
++	depends on MIPS || COMPILE_TEST
++	select GPIO_GENERIC
++	help
++	  Turn on GPIO support for Broadcom BCM63XX xDSL chips.
++
++
+ comment "USB GPIO expanders:"
+ 
+ config GPIO_VIPERBOARD
+--- a/drivers/gpio/Makefile
++++ b/drivers/gpio/Makefile
+@@ -19,6 +19,7 @@ obj-$(CONFIG_GPIO_ADP5588)	+= gpio-adp55
+ obj-$(CONFIG_GPIO_AMD8111)	+= gpio-amd8111.o
+ obj-$(CONFIG_GPIO_ARIZONA)	+= gpio-arizona.o
+ obj-$(CONFIG_GPIO_BCM_KONA)	+= gpio-bcm-kona.o
++obj-$(CONFIG_GPIO_BCM63XX)	+= gpio-bcm63xx.o
+ obj-$(CONFIG_GPIO_BT8XX)	+= gpio-bt8xx.o
+ obj-$(CONFIG_GPIO_CLPS711X)	+= gpio-clps711x.o
+ obj-$(CONFIG_GPIO_CS5535)	+= gpio-cs5535.o
+--- /dev/null
++++ b/drivers/gpio/gpio-bcm63xx.c
+@@ -0,0 +1,122 @@
++/*
++ * Driver for BCM63XX memory-mapped GPIO controllers, based on
++ * Generic driver for memory-mapped GPIO controllers.
++ *
++ * Copyright 2008 MontaVista Software, Inc.
++ * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
++ * Copyright 2015 Jonas Gorski <jogo@openwrt.org>
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of  the GNU General  Public License as published by the
++ * Free Software Foundation;  either version 2 of the  License, or (at your
++ * option) any later version.
++ */
++
++#include <linux/init.h>
++#include <linux/err.h>
++#include <linux/bug.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/spinlock.h>
++#include <linux/compiler.h>
++#include <linux/types.h>
++#include <linux/errno.h>
++#include <linux/log2.h>
++#include <linux/ioport.h>
++#include <linux/io.h>
++#include <linux/gpio.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++#include <linux/mod_devicetable.h>
++#include <linux/basic_mmio_gpio.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++
++static int bcm63xx_gpio_probe(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	struct resource *dat_r, *dirout_r;
++	void __iomem *dat;
++	void __iomem *dirout;
++	unsigned long sz;
++	int err;
++	struct bgpio_chip *bgc;
++	struct bgpio_pdata *pdata = dev_get_platdata(dev);
++
++	dirout_r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	dat_r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
++	if (!dat_r || !dirout_r)
++		return -EINVAL;
++
++	if (resource_size(dat_r) != resource_size(dirout_r))
++		return -EINVAL;
++
++	sz = resource_size(dat_r);
++
++	dat = devm_ioremap_resource(dev, dat_r);
++	if (IS_ERR(dat))
++		return PTR_ERR(dat);
++
++	dirout = devm_ioremap_resource(dev, dirout_r);
++	if (IS_ERR(dirout))
++		return PTR_ERR(dirout);
++
++	bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL);
++	if (!bgc)
++		return -ENOMEM;
++
++	err = bgpio_init(bgc, dev, sz, dat, NULL, NULL, dirout, NULL,
++			 BGPIOF_BIG_ENDIAN_BYTE_ORDER);
++	if (err)
++		return err;
++
++	platform_set_drvdata(pdev, bgc);
++
++	if (dev->of_node) {
++		int id = of_alias_get_id(dev->of_node, "gpio");
++		u32 ngpios;
++
++		if (id >= 0)
++			bgc->gc.label = devm_kasprintf(dev, GFP_KERNEL,
++						       "bcm63xx-gpio.%d", id);
++
++		if (!of_property_read_u32(dev->of_node, "ngpios", &ngpios))
++			bgc->gc.ngpio = ngpios;
++
++	} else if (pdata) {
++		bgc->gc.base = pdata->base;
++		if (pdata->ngpio > 0)
++			bgc->gc.ngpio = pdata->ngpio;
++	}
++
++	return gpiochip_add(&bgc->gc);
++}
++
++static int bcm63xx_gpio_remove(struct platform_device *pdev)
++{
++	struct bgpio_chip *bgc = platform_get_drvdata(pdev);
++
++	return bgpio_remove(bgc);
++}
++
++#ifdef CONFIG_OF
++static struct of_device_id bcm63xx_gpio_of_match[] = {
++	{ .compatible = "brcm,bcm6345-gpio" },
++	{ },
++};
++#endif
++
++static struct platform_driver bcm63xx_gpio_driver = {
++	.probe = bcm63xx_gpio_probe,
++	.remove = bcm63xx_gpio_remove,
++	.driver = {
++		.name = "bcm63xx-gpio",
++		.of_match_table = of_match_ptr(bcm63xx_gpio_of_match),
++	},
++};
++
++module_platform_driver(bcm63xx_gpio_driver);
++
++MODULE_DESCRIPTION("Driver for BCM63XX memory-mapped GPIO controllers");
++MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
++MODULE_LICENSE("GPL");
diff --git a/target/linux/brcm63xx/patches-3.18/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch b/target/linux/brcm63xx/patches-3.18/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch
new file mode 100644
index 0000000..baf97b2
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch
@@ -0,0 +1,216 @@
+From cc99dca188bb63ba390008e2f7fa62d0300233e0 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 20 Feb 2015 23:58:54 +0100
+Subject: [PATCH 2/6] MIPS: BCM63XX: switch to new gpio driver
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_common.c |    2 +
+ arch/mips/bcm63xx/gpio.c                |  147 +++++++------------------------
+ arch/mips/bcm63xx/setup.c                |    3 -
+ 3 files changed, 33 insertions(+), 119 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -204,6 +204,8 @@ int __init board_register_devices(void)
+ 	}
+ #endif
+ 
++	bcm63xx_gpio_init();
++
+ 	if (board.has_uart0)
+ 		bcm63xx_uart_register(0);
+ 
+--- a/arch/mips/bcm63xx/gpio.c
++++ b/arch/mips/bcm63xx/gpio.c
+@@ -5,147 +5,62 @@
+  *
+  * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+  * Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org>
++ * Copyright (C) Jonas Gorski <jogo@openwrt.org>
+  */
+ 
+ #include <linux/kernel.h>
+-#include <linux/module.h>
+-#include <linux/spinlock.h>
+ #include <linux/platform_device.h>
++#include <linux/basic_mmio_gpio.h>
+ #include <linux/gpio.h>
+ 
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_gpio.h>
+-#include <bcm63xx_io.h>
+ #include <bcm63xx_regs.h>
+ 
+-static u32 gpio_out_low_reg;
+-
+-static void bcm63xx_gpio_out_low_reg_init(void)
++static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
+ {
+-	switch (bcm63xx_get_cpu_id()) {
+-	case BCM6345_CPU_ID:
+-		gpio_out_low_reg = GPIO_DATA_LO_REG_6345;
+-		break;
+-	default:
+-		gpio_out_low_reg = GPIO_DATA_LO_REG;
+-		break;
+-	}
+-}
+-
+-static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
+-static u32 gpio_out_low, gpio_out_high;
++	struct resource res[2];
++	struct bgpio_pdata pdata;
+ 
+-static void bcm63xx_gpio_set(struct gpio_chip *chip,
+-			     unsigned gpio, int val)
+-{
+-	u32 reg;
+-	u32 mask;
+-	u32 *v;
+-	unsigned long flags;
+-
+-	if (gpio >= chip->ngpio)
+-		BUG();
+-
+-	if (gpio < 32) {
+-		reg = gpio_out_low_reg;
+-		mask = 1 << gpio;
+-		v = &gpio_out_low;
+-	} else {
+-		reg = GPIO_DATA_HI_REG;
+-		mask = 1 << (gpio - 32);
+-		v = &gpio_out_high;
+-	}
+-
+-	spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
+-	if (val)
+-		*v |= mask;
+-	else
+-		*v &= ~mask;
+-	bcm_gpio_writel(*v, reg);
+-	spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
+-}
++	memset(res, 0, sizeof(res));
++	memset(&pdata, 0, sizeof(pdata));
+ 
+-static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
+-{
+-	u32 reg;
+-	u32 mask;
++	res[0].flags = IORESOURCE_MEM;
++	res[0].start = bcm63xx_regset_address(RSET_GPIO);
++	res[0].start += dir;
+ 
+-	if (gpio >= chip->ngpio)
+-		BUG();
++	res[0].end = res[0].start + 3;
+ 
+-	if (gpio < 32) {
+-		reg = gpio_out_low_reg;
+-		mask = 1 << gpio;
+-	} else {
+-		reg = GPIO_DATA_HI_REG;
+-		mask = 1 << (gpio - 32);
+-	}
++	res[1].flags = IORESOURCE_MEM;
++	res[1].start = bcm63xx_regset_address(RSET_GPIO);
++	res[1].start += data;
+ 
+-	return !!(bcm_gpio_readl(reg) & mask);
+-}
++	res[1].end = res[1].start + 3;
+ 
+-static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
+-				      unsigned gpio, int dir)
+-{
+-	u32 reg;
+-	u32 mask;
+-	u32 tmp;
+-	unsigned long flags;
+-
+-	if (gpio >= chip->ngpio)
+-		BUG();
+-
+-	if (gpio < 32) {
+-		reg = GPIO_CTL_LO_REG;
+-		mask = 1 << gpio;
+-	} else {
+-		reg = GPIO_CTL_HI_REG;
+-		mask = 1 << (gpio - 32);
+-	}
+-
+-	spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
+-	tmp = bcm_gpio_readl(reg);
+-	if (dir == BCM63XX_GPIO_DIR_IN)
+-		tmp &= ~mask;
+-	else
+-		tmp |= mask;
+-	bcm_gpio_writel(tmp, reg);
+-	spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
++	pdata.base = id * 32;
++	pdata.ngpio = ngpio;
+ 
+-	return 0;
++	platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
++					  &pdata, sizeof(pdata));
+ }
+ 
+-static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
++int __init bcm63xx_gpio_init(void)
+ {
+-	return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN);
+-}
++	int ngpio = bcm63xx_gpio_count();
++	int data_low_reg;
+ 
+-static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
+-					 unsigned gpio, int value)
+-{
+-	bcm63xx_gpio_set(chip, gpio, value);
+-	return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT);
+-}
++	if (BCMCPU_IS_6345())
++		data_low_reg = GPIO_DATA_LO_REG_6345;
++	else
++		data_low_reg = GPIO_DATA_LO_REG;
+ 
++	bcm63xx_gpio_init_one(0, GPIO_CTL_LO_REG, data_low_reg, min(ngpio, 32));
+ 
+-static struct gpio_chip bcm63xx_gpio_chip = {
+-	.label			= "bcm63xx-gpio",
+-	.direction_input	= bcm63xx_gpio_direction_input,
+-	.direction_output	= bcm63xx_gpio_direction_output,
+-	.get			= bcm63xx_gpio_get,
+-	.set			= bcm63xx_gpio_set,
+-	.base			= 0,
+-};
++	if (ngpio <= 32)
++		return 0;
+ 
+-int __init bcm63xx_gpio_init(void)
+-{
+-	bcm63xx_gpio_out_low_reg_init();
++	bcm63xx_gpio_init_one(1, GPIO_CTL_HI_REG, GPIO_DATA_HI_REG, ngpio - 32);
+ 
+-	gpio_out_low = bcm_gpio_readl(gpio_out_low_reg);
+-	if (!BCMCPU_IS_6345())
+-		gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG);
+-	bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
+-	pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
++	return 0;
+ 
+-	return gpiochip_add(&bcm63xx_gpio_chip);
+ }
+--- a/arch/mips/bcm63xx/setup.c
++++ b/arch/mips/bcm63xx/setup.c
+@@ -164,9 +164,6 @@ void __init plat_mem_setup(void)
+ 
+ int __init bcm63xx_register_devices(void)
+ {
+-	/* register gpiochip */
+-	bcm63xx_gpio_init();
+-
+ 	return board_register_devices();
+ }
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/376-net-bcm63xx_enet-use-named-gpio-for-ephy-reset-gpio.patch b/target/linux/brcm63xx/patches-3.18/376-net-bcm63xx_enet-use-named-gpio-for-ephy-reset-gpio.patch
new file mode 100644
index 0000000..6d19cc0
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/376-net-bcm63xx_enet-use-named-gpio-for-ephy-reset-gpio.patch
@@ -0,0 +1,46 @@
+From ec905f2ea78ec40602a685ede31c5e4f9893d196 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Feb 2015 16:35:07 +0100
+Subject: [PATCH 3/6] net: bcm63xx_enet: use named gpio for ephy reset gpio
+
+Allow using a named optional gpio for ephy reset gpio registration.
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c |    9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -30,6 +30,7 @@
+ #include <linux/dma-mapping.h>
+ #include <linux/platform_device.h>
+ #include <linux/if_vlan.h>
++#include <linux/gpio/consumer.h>
+ 
+ #include <bcm63xx_dev_enet.h>
+ #include "bcm63xx_enet.h"
+@@ -2848,10 +2849,15 @@ static int bcm_enet_shared_probe(struct
+ {
+ 	struct resource *res;
+ 	void __iomem *p[3];
++	struct gpio_desc *ephy_reset;
+ 	unsigned int i;
+ 
+ 	memset(bcm_enet_shared_base, 0, sizeof(bcm_enet_shared_base));
+ 
++	ephy_reset = devm_gpiod_get_optional(&pdev->dev, "ephy-reset");
++	if (IS_ERR(ephy_reset))
++		return PTR_ERR(ephy_reset);
++
+ 	for (i = 0; i < 3; i++) {
+ 		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
+ 		p[i] = devm_ioremap_resource(&pdev->dev, res);
+@@ -2861,6 +2867,9 @@ static int bcm_enet_shared_probe(struct
+ 
+ 	memcpy(bcm_enet_shared_base, p, sizeof(bcm_enet_shared_base));
+ 
++	if (ephy_reset)
++		gpiod_direction_output(ephy_reset, 0);
++
+ 	return 0;
+ }
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch b/target/linux/brcm63xx/patches-3.18/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch
new file mode 100644
index 0000000..30f6ba5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch
@@ -0,0 +1,138 @@
+From d13bdf92ec885105cf107183f8464c40e5f3b93b Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Feb 2015 17:21:59 +0100
+Subject: [PATCH 4/6] MIPS: BCM63XX: register lookup for ephy-reset gpio
+
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c          |    2 +-
+ arch/mips/bcm63xx/boards/board_common.c            |    7 +++--
+ arch/mips/bcm63xx/gpio.c                           |   32 ++++++++++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h  |    2 ++
+ .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h |    5 +--
+ 5 files changed, 42 insertions(+), 6 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -59,7 +59,7 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.ephy_reset_gpio		= 36,
+-	.ephy_reset_gpio_flags		= GPIOF_INIT_HIGH,
++	.ephy_reset_gpio_flags		= GPIO_ACTIVE_LOW,
+ };
+ #endif
+ 
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -278,9 +278,10 @@ int __init board_register_devices(void)
+ 		platform_device_register(&bcm63xx_gpio_leds);
+ 	}
+ 
+-	if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
+-		gpio_request_one(board.ephy_reset_gpio,
+-				board.ephy_reset_gpio_flags, "ephy-reset");
++	if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) {
++		bcm63xx_gpio_ephy_reset(board.ephy_reset_gpio,
++					board.ephy_reset_gpio_flags);
++	}
+ 
+ 	/* count number of BUTTONs defined by this device */
+ 	while (button_count < ARRAY_SIZE(board.buttons) && board.buttons[button_count].desc)
+--- a/arch/mips/bcm63xx/gpio.c
++++ b/arch/mips/bcm63xx/gpio.c
+@@ -8,15 +8,24 @@
+  * Copyright (C) Jonas Gorski <jogo@openwrt.org>
+  */
+ 
++#include <asm/addrspace.h>
++
+ #include <linux/kernel.h>
+ #include <linux/platform_device.h>
+ #include <linux/basic_mmio_gpio.h>
+ #include <linux/gpio.h>
++#include <linux/gpio/machine.h>
+ 
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_gpio.h>
+ #include <bcm63xx_regs.h>
+ 
++/* for registering lookups; make them large enough to hold OF names */
++static char *gpio_chip_labels[] = {
++	"xxxxxxxx.gpio-controller",
++	"xxxxxxxx.gpio-controller",
++};
++
+ static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
+ {
+ 	struct resource res[2];
+@@ -40,6 +49,7 @@ static void __init bcm63xx_gpio_init_one
+ 	pdata.base = id * 32;
+ 	pdata.ngpio = ngpio;
+ 
++	sprintf(gpio_chip_labels[id], "bcm63xx-gpio.%d", id);
+ 	platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
+ 					  &pdata, sizeof(pdata));
+ }
+@@ -64,3 +74,25 @@ int __init bcm63xx_gpio_init(void)
+ 	return 0;
+ 
+ }
++
++static struct gpiod_lookup_table ephy_reset = {
++	.dev_id = "bcm63xx_enet_shared.0",
++	.table = {
++		{ /* filled at runtime */ },
++		{ },
++	},
++};
++
++
++void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags)
++{
++	if (ephy_reset.table[0].chip_label)
++		return;
++
++	ephy_reset.table[0].chip_label = gpio_chip_labels[hw_gpio / 32];
++	ephy_reset.table[0].chip_hwnum = hw_gpio % 32;
++	ephy_reset.table[0].con_id = "ephy-reset";
++	ephy_reset.table[0].flags = flags;
++
++	gpiod_add_lookup_table(&ephy_reset);
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+@@ -2,9 +2,11 @@
+ #define BCM63XX_GPIO_H
+ 
+ #include <linux/init.h>
++#include <linux/gpio/machine.h>
+ #include <bcm63xx_cpu.h>
+ 
+ int __init bcm63xx_gpio_init(void);
++void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags);
+ 
+ static inline unsigned long bcm63xx_gpio_count(void)
+ {
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -4,6 +4,7 @@
+ #include <linux/types.h>
+ #include <linux/gpio.h>
+ #include <linux/gpio_keys.h>
++#include <linux/gpio/machine.h>
+ #include <linux/leds.h>
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+@@ -58,8 +59,8 @@ struct board_info {
+ 	/* External PHY reset GPIO */
+ 	unsigned int ephy_reset_gpio;
+ 
+-	/* External PHY reset GPIO flags from gpio.h */
+-	unsigned long ephy_reset_gpio_flags;
++	/* External PHY reset GPIO flags from gpio/machine.h */
++	enum gpio_lookup_flags ephy_reset_gpio_flags;
+ 
+ 	/* fallback sprom config */
+ 	struct fallback_sprom_data fallback_sprom;
diff --git a/target/linux/brcm63xx/patches-3.18/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch b/target/linux/brcm63xx/patches-3.18/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch
new file mode 100644
index 0000000..2faf0de
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch
@@ -0,0 +1,34 @@
+From e55892aac9d5508a000647ca66f0e678e02be3bb Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Feb 2015 17:26:50 +0100
+Subject: [PATCH 5/6] MIPS: BCM63XX: do not register gpio-controller if
+present in dtb
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/gpio.c |   7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/gpio.c
++++ b/arch/mips/bcm63xx/gpio.c
+@@ -20,6 +20,8 @@
+ #include <bcm63xx_gpio.h>
+ #include <bcm63xx_regs.h>
+ 
++#include "boards/board_common.h"
++
+ /* for registering lookups; make them large enough to hold OF names */
+ static char *gpio_chip_labels[] = {
+ 	"xxxxxxxx.gpio-controller",
+@@ -50,8 +52,9 @@ static void __init bcm63xx_gpio_init_one
+ 	pdata.ngpio = ngpio;
+ 
+ 	sprintf(gpio_chip_labels[id], "bcm63xx-gpio.%d", id);
+-	platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
+-					  &pdata, sizeof(pdata));
++	if (!board_of_device_present("gpio0"))
++		platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res,
++						  2, &pdata, sizeof(pdata));
+ }
+ 
+ int __init bcm63xx_gpio_init(void)
diff --git a/target/linux/brcm63xx/patches-3.18/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch b/target/linux/brcm63xx/patches-3.18/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch
new file mode 100644
index 0000000..b571999
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch
@@ -0,0 +1,59 @@
+From 1647cccc871bf43876c3df9852869680880d054c Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Wed, 25 Mar 2015 13:52:02 +0100
+Subject: [PATCH 1/2] MIPS: BCM63XX: provide a gpio lookup for the pcmcia
+ ready gpio
+
+To prepare for a time when gpiobases don't need to be fixed anymore.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-pcmcia.c |   13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-pcmcia.c
++++ b/arch/mips/bcm63xx/dev-pcmcia.c
+@@ -10,6 +10,7 @@
+ #include <linux/kernel.h>
+ #include <asm/bootinfo.h>
+ #include <linux/platform_device.h>
++#include <linux/gpio/machine.h>
+ #include <bcm63xx_cs.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_pcmcia.h>
+@@ -101,6 +102,14 @@ static const struct {
+ 	},
+ };
+ 
++static struct gpiod_lookup_table pcmcia_gpios_table = {
++	.dev_id = "bcm63xx_pcmcia.0",
++	.table = {
++		GPIO_LOOKUP("bcm63xx-gpio.0", 0, "ready", GPIO_ACTIVE_HIGH),
++		{ },
++	},
++};
++
+ int __init bcm63xx_pcmcia_register(void)
+ {
+ 	int ret, i;
+@@ -112,16 +121,20 @@ int __init bcm63xx_pcmcia_register(void)
+ 	switch (bcm63xx_get_cpu_id()) {
+ 	case BCM6348_CPU_ID:
+ 		pd.ready_gpio = 22;
++		pcmcia_gpios_table.table[0].chip_hwnum = 22;
+ 		break;
+ 
+ 	case BCM6358_CPU_ID:
+ 		pd.ready_gpio = 18;
++		pcmcia_gpios_table.table[0].chip_hwnum = 18;
+ 		break;
+ 
+ 	default:
+ 		return -ENODEV;
+ 	}
+ 
++	gpiod_add_lookup_table(&pcmcia_gpios_table);
++
+ 	pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA);
+ 	pcmcia_resources[0].end = pcmcia_resources[0].start +
+ 		RSET_PCMCIA_SIZE - 1;
diff --git a/target/linux/brcm63xx/patches-3.18/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch b/target/linux/brcm63xx/patches-3.18/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch
new file mode 100644
index 0000000..524ca1a
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch
@@ -0,0 +1,59 @@
+From c4e04f1c54928a49b227a5420d38b18226838775 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Wed, 25 Mar 2015 13:54:56 +0100
+Subject: [PATCH 2/2] pcmcia: bcm63xx_pmcia: use the new named gpio
+
+Use the new named gpio instead of relying on the hardware gpio numbers
+matching the virtual gpio numbers.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/pcmcia/bcm63xx_pcmcia.c |    9 ++++++++-
+ drivers/pcmcia/bcm63xx_pcmcia.h |    4 ++++
+ 2 files changed, 12 insertions(+), 1 deletion(-)
+
+--- a/drivers/pcmcia/bcm63xx_pcmcia.c
++++ b/drivers/pcmcia/bcm63xx_pcmcia.c
+@@ -237,7 +237,7 @@ static unsigned int __get_socket_status(
+ 		stat |= SS_XVCARD;
+ 	stat |= SS_POWERON;
+ 
+-	if (gpio_get_value(skt->pd->ready_gpio))
++	if (gpiod_get_value(skt->ready_gpio))
+ 		stat |= SS_READY;
+ 
+ 	return stat;
+@@ -373,6 +373,13 @@ static int bcm63xx_drv_pcmcia_probe(stru
+ 		goto err;
+ 	}
+ 
++	/* get ready gpio */
++	skt->ready_gpio = devm_gpiod_get(&pdev->dev, "ready", GPIOD_IN);
++	if (IS_ERR(skt->ready_gpio)) {
++		ret = PTR_ERR(skt->ready_gpio);
++		goto err;
++	}
++
+ 	/* resources are static */
+ 	sock->resource_ops = &pccard_static_ops;
+ 	sock->ops = &bcm63xx_pcmcia_operations;
+--- a/drivers/pcmcia/bcm63xx_pcmcia.h
++++ b/drivers/pcmcia/bcm63xx_pcmcia.h
+@@ -3,6 +3,7 @@
+ 
+ #include <linux/types.h>
+ #include <linux/timer.h>
++#include <linux/gpio/consumer.h>
+ #include <pcmcia/ss.h>
+ #include <bcm63xx_dev_pcmcia.h>
+ 
+@@ -55,6 +56,9 @@ struct bcm63xx_pcmcia_socket {
+ 
+ 	/* base address of io memory */
+ 	void __iomem *io_base;
++
++	/* ready gpio */
++	struct gpio_desc *ready_gpio;
+ };
+ 
+ #endif /* BCM63XX_PCMCIA_H_ */
diff --git a/target/linux/brcm63xx/patches-3.18/400-bcm963xx_flashmap.patch b/target/linux/brcm63xx/patches-3.18/400-bcm963xx_flashmap.patch
new file mode 100644
index 0000000..c693ace
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/400-bcm963xx_flashmap.patch
@@ -0,0 +1,65 @@
+From a4d005c91d403d9f3d0272db6cc46202c06ec774 Mon Sep 17 00:00:00 2001
+From: Axel Gembe <ago@bastart.eu.org>
+Date: Mon, 12 May 2008 18:54:09 +0200
+Subject: [PATCH] bcm963xx: flashmap support
+
+Signed-off-by: Axel Gembe <ago@bastart.eu.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |   19 +----------------
+ drivers/mtd/maps/bcm963xx-flash.c         |   32 ++++++++++++++++++++++++----
+ drivers/mtd/redboot.c                     |   13 +++++++++--
+ 3 files changed, 38 insertions(+), 26 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -35,7 +35,7 @@ static struct mtd_partition mtd_partitio
+ 	}
+ };
+ 
+-static const char *bcm63xx_part_types[] = { "bcm63xxpart", NULL };
++static const char *bcm63xx_part_types[] = { "bcm63xxpart", "RedBoot", NULL };
+ 
+ static struct physmap_flash_data flash_data = {
+ 	.width			= 2,
+--- a/drivers/mtd/redboot.c
++++ b/drivers/mtd/redboot.c
+@@ -72,6 +72,7 @@ static int parse_redboot_partitions(stru
+ 	int nulllen = 0;
+ 	int numslots;
+ 	unsigned long offset;
++	unsigned long fis_origin = 0;
+ #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
+ 	static char nullstring[] = "unallocated";
+ #endif
+@@ -176,6 +177,16 @@ static int parse_redboot_partitions(stru
+ 		goto out;
+ 	}
+ 
++	if (data && data->origin) {
++		fis_origin = data->origin;
++	} else {
++		for (i = 0; i < numslots; i++) {
++			if (!strncmp(buf[i].name, "RedBoot", 8)) {
++				fis_origin = (buf[i].flash_base & (master->size << 1) - 1);
++			}
++		}
++	}
++
+ 	for (i = 0; i < numslots; i++) {
+ 		struct fis_list *new_fl, **prev;
+ 
+@@ -196,10 +207,10 @@ static int parse_redboot_partitions(stru
+ 			goto out;
+ 		}
+ 		new_fl->img = &buf[i];
+-		if (data && data->origin)
+-			buf[i].flash_base -= data->origin;
+-		else
+-			buf[i].flash_base &= master->size-1;
++		if (fis_origin)
++			buf[i].flash_base -= fis_origin;
++
++		buf[i].flash_base &= (master->size << 1) - 1;
+ 
+ 		/* I'm sure the JFFS2 code has done me permanent damage.
+ 		 * I now think the following is _normal_
diff --git a/target/linux/brcm63xx/patches-3.18/401-bcm963xx_real_rootfs_length.patch b/target/linux/brcm63xx/patches-3.18/401-bcm963xx_real_rootfs_length.patch
new file mode 100644
index 0000000..92c264b
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/401-bcm963xx_real_rootfs_length.patch
@@ -0,0 +1,27 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h
+@@ -85,8 +85,10 @@ struct bcm_tag {
+ 	__u32 rootfs_crc;
+ 	/* 224-227: CRC32 of kernel partition */
+ 	__u32 kernel_crc;
+-	/* 228-235: Unused at present */
+-	char reserved1[8];
++	/* 228-231: Image sequence number */
++	char image_sequence[4];
++	/* 222-235: Openwrt: real rootfs length */
++	__u32 real_rootfs_length;
+ 	/* 236-239: CRC32 of header excluding last 20 bytes */
+ 	__u32 header_crc;
+ 	/* 240-255: Unused at present */
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -110,7 +110,8 @@ static int bcm63xx_parse_cfe_partitions(
+ 		} else {
+ 			/* OpenWrt layout */
+ 			rootfsaddr = kerneladdr + kernellen;
+-			rootfslen = spareaddr - rootfsaddr;
++			rootfslen = buf->real_rootfs_length;
++			spareaddr = rootfsaddr + rootfslen;
+ 		}
+ 	} else {
+ 		pr_warn("CFE boot tag CRC invalid (expected %08x, actual %08x)\n",
diff --git a/target/linux/brcm63xx/patches-3.18/402_bcm63xx_enet_vlan_incoming_fixed.patch b/target/linux/brcm63xx/patches-3.18/402_bcm63xx_enet_vlan_incoming_fixed.patch
new file mode 100644
index 0000000..fc2e8ab
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/402_bcm63xx_enet_vlan_incoming_fixed.patch
@@ -0,0 +1,11 @@
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -1633,7 +1633,7 @@ static int compute_hw_mtu(struct bcm_ene
+ 	actual_mtu = mtu;
+ 
+ 	/* add ethernet header + vlan tag size */
+-	actual_mtu += VLAN_ETH_HLEN;
++	actual_mtu += VLAN_ETH_HLEN + VLAN_HLEN;
+ 
+ 	if (actual_mtu < 64 || actual_mtu > BCMENET_MAX_MTU)
+ 		return -EINVAL;
diff --git a/target/linux/brcm63xx/patches-3.18/403-6358-enet1-external-mii-clk.patch b/target/linux/brcm63xx/patches-3.18/403-6358-enet1-external-mii-clk.patch
new file mode 100644
index 0000000..0745c3c
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/403-6358-enet1-external-mii-clk.patch
@@ -0,0 +1,22 @@
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -104,6 +104,8 @@ void __init board_early_setup(const stru
+ 		if (BCMCPU_IS_6348())
+ 			val |= GPIO_MODE_6348_G3_EXT_MII |
+ 				GPIO_MODE_6348_G0_EXT_MII;
++		else if (BCMCPU_IS_6358())
++			val |= GPIO_MODE_6358_ENET1_MII_CLK_INV;
+ 	}
+ 
+ 	bcm_gpio_writel(val, GPIO_MODE_REG);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -651,6 +651,8 @@
+ #define GPIO_MODE_6358_EXTRA_SPI_SS	(1 << 7)
+ #define GPIO_MODE_6358_SERIAL_LED	(1 << 10)
+ #define GPIO_MODE_6358_UTOPIA		(1 << 12)
++#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 30)
++#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 31)
+ 
+ #define GPIO_MODE_6368_ANALOG_AFE_0	(1 << 0)
+ #define GPIO_MODE_6368_ANALOG_AFE_1	(1 << 1)
diff --git a/target/linux/brcm63xx/patches-3.18/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch b/target/linux/brcm63xx/patches-3.18/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch
new file mode 100644
index 0000000..6036d2f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch
@@ -0,0 +1,169 @@
+From b11218c750ab92cfab4408a0328f1b36ceec3f33 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 6 Jan 2012 12:24:18 +0100
+Subject: [PATCH 19/63] NET: bcm63xx_enet: move phy_(dis)connect into probe/remove
+
+Only connect/disconnect the phy during probe and remove, not during any
+open/close. The phy seldom changes during the runtime, and disconnecting
+the phy during close will prevent it from keeping any configuration over
+a down/up cycle.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c |   84 +++++++++++++-------------
+ 1 files changed, 41 insertions(+), 43 deletions(-)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -871,10 +871,8 @@ static int bcm_enet_open(struct net_devi
+ 	struct bcm_enet_priv *priv;
+ 	struct sockaddr addr;
+ 	struct device *kdev;
+-	struct phy_device *phydev;
+ 	int i, ret;
+ 	unsigned int size;
+-	char phy_id[MII_BUS_ID_SIZE + 3];
+ 	void *p;
+ 	u32 val;
+ 
+@@ -882,40 +880,10 @@ static int bcm_enet_open(struct net_devi
+ 	kdev = &priv->pdev->dev;
+ 
+ 	if (priv->has_phy) {
+-		/* connect to PHY */
+-		snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
+-			 priv->mii_bus->id, priv->phy_id);
+-
+-		phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
+-				     PHY_INTERFACE_MODE_MII);
+-
+-		if (IS_ERR(phydev)) {
+-			dev_err(kdev, "could not attach to PHY\n");
+-			return PTR_ERR(phydev);
+-		}
+-
+-		/* mask with MAC supported features */
+-		phydev->supported &= (SUPPORTED_10baseT_Half |
+-				      SUPPORTED_10baseT_Full |
+-				      SUPPORTED_100baseT_Half |
+-				      SUPPORTED_100baseT_Full |
+-				      SUPPORTED_Autoneg |
+-				      SUPPORTED_Pause |
+-				      SUPPORTED_MII);
+-		phydev->advertising = phydev->supported;
+-
+-		if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
+-			phydev->advertising |= SUPPORTED_Pause;
+-		else
+-			phydev->advertising &= ~SUPPORTED_Pause;
+-
+-		dev_info(kdev, "attached PHY at address %d [%s]\n",
+-			 phydev->addr, phydev->drv->name);
+-
++		/* Reset state */
+ 		priv->old_link = 0;
+ 		priv->old_duplex = -1;
+ 		priv->old_pause = -1;
+-		priv->phydev = phydev;
+ 	}
+ 
+ 	/* mask all interrupts and request them */
+@@ -925,7 +893,7 @@ static int bcm_enet_open(struct net_devi
+ 
+ 	ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
+ 	if (ret)
+-		goto out_phy_disconnect;
++		return ret;
+ 
+ 	ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, 0,
+ 			  dev->name, dev);
+@@ -1128,9 +1096,6 @@ out_freeirq_rx:
+ out_freeirq:
+ 	free_irq(dev->irq, dev);
+ 
+-out_phy_disconnect:
+-	phy_disconnect(priv->phydev);
+-
+ 	return ret;
+ }
+ 
+@@ -1235,12 +1200,6 @@ static int bcm_enet_stop(struct net_devi
+ 	free_irq(priv->irq_rx, dev);
+ 	free_irq(dev->irq, dev);
+ 
+-	/* release phy */
+-	if (priv->has_phy) {
+-		phy_disconnect(priv->phydev);
+-		priv->phydev = NULL;
+-	}
+-
+ 	return 0;
+ }
+ 
+@@ -1831,6 +1790,8 @@ static int bcm_enet_probe(struct platfor
+ 
+ 	/* MII bus registration */
+ 	if (priv->has_phy) {
++		struct phy_device *phydev;
++		char phy_id[MII_BUS_ID_SIZE + 3];
+ 
+ 		priv->mii_bus = mdiobus_alloc();
+ 		if (!priv->mii_bus) {
+@@ -1868,6 +1829,38 @@ static int bcm_enet_probe(struct platfor
+ 			dev_err(&pdev->dev, "unable to register mdio bus\n");
+ 			goto out_free_mdio;
+ 		}
++
++		/* connect to PHY */
++		snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
++			 priv->mii_bus->id, priv->phy_id);
++
++		phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
++				     PHY_INTERFACE_MODE_MII);
++
++		if (IS_ERR(phydev)) {
++			dev_err(&pdev->dev, "could not attach to PHY\n");
++			goto out_unregister_mdio;
++		}
++
++		/* mask with MAC supported features */
++		phydev->supported &= (SUPPORTED_10baseT_Half |
++				      SUPPORTED_10baseT_Full |
++				      SUPPORTED_100baseT_Half |
++				      SUPPORTED_100baseT_Full |
++				      SUPPORTED_Autoneg |
++				      SUPPORTED_Pause |
++				      SUPPORTED_MII);
++		phydev->advertising = phydev->supported;
++
++		if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
++			phydev->advertising |= SUPPORTED_Pause;
++		else
++			phydev->advertising &= ~SUPPORTED_Pause;
++
++		dev_info(&pdev->dev, "attached PHY at address %d [%s]\n",
++			 phydev->addr, phydev->drv->name);
++
++		priv->phydev = phydev;
+ 	} else {
+ 
+ 		/* run platform code to initialize PHY device */
+@@ -1913,6 +1906,9 @@ static int bcm_enet_probe(struct platfor
+ 	return 0;
+ 
+ out_unregister_mdio:
++	if (priv->phydev)
++		phy_disconnect(priv->phydev);
++
+ 	if (priv->mii_bus)
+ 		mdiobus_unregister(priv->mii_bus);
+ 
+@@ -1954,6 +1950,8 @@ static int bcm_enet_remove(struct platfo
+ 	enet_writel(priv, 0, ENET_MIISC_REG);
+ 
+ 	if (priv->has_phy) {
++		phy_disconnect(priv->phydev);
++		priv->phydev = NULL;
+ 		mdiobus_unregister(priv->mii_bus);
+ 		mdiobus_free(priv->mii_bus);
+ 	} else {
diff --git a/target/linux/brcm63xx/patches-3.18/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch b/target/linux/brcm63xx/patches-3.18/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch
new file mode 100644
index 0000000..2f2eecf
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch
@@ -0,0 +1,53 @@
+From d8237d704fc25eb2fc25ef4403608b78c6a6d4be Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 15 Jul 2012 20:08:57 +0200
+Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports
+
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |   13 +++++++++++++
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c      |   12 ++++++++++++
+ 2 files changed, 25 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -967,6 +967,19 @@
+ #define ENETSW_PORTOV_FDX_MASK		(1 << 1)
+ #define ENETSW_PORTOV_LINKUP_MASK	(1 << 0)
+ 
++/* Port RGMII control register */
++#define ENETSW_RGMII_CTRL_REG(x)	(0x60 + (x))
++#define ENETSW_RGMII_CTRL_GMII_CLK_EN	(1 << 7)
++#define ENETSW_RGMII_CTRL_MII_OVERRIDE_EN (1 << 6)
++#define ENETSW_RGMII_CTRL_MII_MODE_MASK	(3 << 4)
++#define ENETSW_RGMII_CTRL_RGMII_MODE	(0 << 4)
++#define ENETSW_RGMII_CTRL_MII_MODE	(1 << 4)
++#define ENETSW_RGMII_CTRL_RVMII_MODE	(2 << 4)
++#define ENETSW_RGMII_CTRL_TIMING_SEL_EN	(1 << 0)
++
++/* Port RGMII timing register */
++#define ENETSW_RGMII_TIMING_REG(x)	(0x68 + (x))
++
+ /* MDIO control register */
+ #define ENETSW_MDIOC_REG		(0xb0)
+ #define ENETSW_MDIOC_EXT_MASK		(1 << 16)
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -2225,6 +2225,18 @@ static int bcm_enetsw_open(struct net_de
+ 		priv->sw_port_link[i] = 0;
+ 	}
+ 
++	/* enable external ports */
++	for (i = ENETSW_RGMII_PORT0; i < priv->num_ports; i++) {
++		u8 rgmii_ctrl;
++
++		if (!priv->used_ports[i].used)
++			continue;
++
++		rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
++		rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
++		enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
++	}
++
+ 	/* reset mib */
+ 	val = enetsw_readb(priv, ENETSW_GMCR_REG);
+ 	val |= ENETSW_GMCR_RST_MIB_MASK;
diff --git a/target/linux/brcm63xx/patches-3.18/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-3.18/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
new file mode 100644
index 0000000..23b3b83
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
@@ -0,0 +1,133 @@
+From d135d94b3d1fe599d13e7198d5f502912d694c13 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 3 Jul 2011 15:00:38 +0200
+Subject: [PATCH 29/60] MIPS: BCM63XX: Register SPI flash if present
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/dev-flash.c                     |   33 +++++++++++++++++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |    2 +
+ 2 files changed, 33 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -17,9 +17,12 @@
+ #include <linux/mtd/partitions.h>
+ #include <linux/mtd/physmap.h>
+ #include <linux/mtd/spi-nor.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/flash.h>
+ 
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
++#include <bcm63xx_dev_hsspi.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+ 
+@@ -66,6 +69,21 @@ void __init bcm63xx_flash_force_phys_bas
+ 	mtd_resources[0].end = end;
+ }
+ 
++static struct flash_platform_data bcm63xx_flash_data = {
++	.part_probe_types	= bcm63xx_part_types,
++};
++
++static struct spi_board_info bcm63xx_spi_flash_info[] = {
++	{
++		.bus_num	= 0,
++		.chip_select	= 0,
++		.mode		= 0,
++		.max_speed_hz	= 781000,
++		.modalias	= "m25p80",
++		.platform_data	= &bcm63xx_flash_data,
++	},
++};
++
+ static int __init bcm63xx_detect_flash_type(void)
+ {
+ 	u32 val;
+@@ -73,9 +91,15 @@ static int __init bcm63xx_detect_flash_t
+ 	switch (bcm63xx_get_cpu_id()) {
+ 	case BCM6318_CPU_ID:
+ 		/* only support serial flash */
++		bcm63xx_spi_flash_info[0].max_speed_hz = 62500000;
+ 		return BCM63XX_FLASH_TYPE_SERIAL;
+ 	case BCM6328_CPU_ID:
+ 		val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
++		if (val & STRAPBUS_6328_HSSPI_CLK_FAST)
++			bcm63xx_spi_flash_info[0].max_speed_hz = 33333334;
++		else
++			bcm63xx_spi_flash_info[0].max_speed_hz = 16666667;
++
+ 		if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
+ 			return BCM63XX_FLASH_TYPE_SERIAL;
+ 		else
+@@ -94,12 +118,20 @@ static int __init bcm63xx_detect_flash_t
+ 			return BCM63XX_FLASH_TYPE_SERIAL;
+ 	case BCM6362_CPU_ID:
+ 		val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
++		if (val & STRAPBUS_6362_HSSPI_CLK_FAST)
++			bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
++		else
++			bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ 		if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
+ 			return BCM63XX_FLASH_TYPE_SERIAL;
+ 		else
+ 			return BCM63XX_FLASH_TYPE_NAND;
+ 	case BCM6368_CPU_ID:
+ 		val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
++		if (val & STRAPBUS_6368_SPI_CLK_FAST)
++			bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ 		switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
+ 		case STRAPBUS_6368_BOOT_SEL_NAND:
+ 			return BCM63XX_FLASH_TYPE_NAND;
+@@ -110,6 +142,11 @@ static int __init bcm63xx_detect_flash_t
+ 		}
+ 	case BCM63268_CPU_ID:
+ 		val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
++		if (val & STRAPBUS_63268_HSSPI_CLK_FAST)
++			bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
++		else
++			bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ 		if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
+ 			return BCM63XX_FLASH_TYPE_SERIAL;
+ 		else
+@@ -195,8 +232,15 @@ int __init bcm63xx_flash_register(void)
+ 
+ 		return platform_device_register(&mtd_dev);
+ 	case BCM63XX_FLASH_TYPE_SERIAL:
+-		pr_warn("unsupported serial flash detected\n");
+-		return -ENODEV;
++		if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
++		    BCMCPU_IS_63268())
++			bcm63xx_spi_flash_info[0].bus_num = 1;
++
++		if (BCMCPU_IS_6358() || BCMCPU_IS_6368())
++			bcm63xx_flash_data.max_transfer_len = SPI_6358_MSG_DATA_SIZE;
++
++		return spi_register_board_info(bcm63xx_spi_flash_info,
++					ARRAY_SIZE(bcm63xx_spi_flash_info));
+ 	case BCM63XX_FLASH_TYPE_NAND:
+ 		pr_warn("unsupported NAND flash detected\n");
+ 		return -ENODEV;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -708,6 +708,7 @@
+ #define GPIO_STRAPBUS_REG		0x40
+ #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
+ #define STRAPBUS_6358_BOOT_SEL_SERIAL	(0 << 1)
++#define STRAPBUS_6368_SPI_CLK_FAST	(1 << 6)
+ #define STRAPBUS_6368_BOOT_SEL_MASK	0x3
+ #define STRAPBUS_6368_BOOT_SEL_NAND	0
+ #define STRAPBUS_6368_BOOT_SEL_SERIAL	1
+@@ -1578,6 +1579,7 @@
+ #define IDDQ_CTRL_63268_USBH		(1 << 4)
+ 
+ #define MISC_STRAPBUS_6328_REG		0x240
++#define STRAPBUS_6328_HSSPI_CLK_FAST	(1 << 4)
+ #define STRAPBUS_6328_FCVO_SHIFT	7
+ #define STRAPBUS_6328_FCVO_MASK		(0x1f << STRAPBUS_6328_FCVO_SHIFT)
+ #define STRAPBUS_6328_BOOT_SEL_SERIAL	(1 << 28)
diff --git a/target/linux/brcm63xx/patches-3.18/412-MTD-physmap-allow-passing-pp_data.patch b/target/linux/brcm63xx/patches-3.18/412-MTD-physmap-allow-passing-pp_data.patch
new file mode 100644
index 0000000..3511120
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/412-MTD-physmap-allow-passing-pp_data.patch
@@ -0,0 +1,41 @@
+From 266c506f4b262bd6aba0776a03d82c98e65d9906 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 1 May 2012 17:32:36 +0200
+Subject: [PATCH 63/79] MTD: physmap: allow passing pp_data
+
+---
+ drivers/mtd/maps/physmap.c  |    4 +++-
+ include/linux/mtd/physmap.h |    1 +
+ 2 files changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/mtd/maps/physmap.c
++++ b/drivers/mtd/maps/physmap.c
+@@ -96,6 +96,7 @@ static int physmap_flash_probe(struct pl
+ {
+ 	struct physmap_flash_data *physmap_data;
+ 	struct physmap_flash_info *info;
++	struct mtd_part_parser_data *pp_data;
+ 	const char * const *probe_type;
+ 	const char * const *part_types;
+ 	int err = 0;
+@@ -187,8 +188,9 @@ static int physmap_flash_probe(struct pl
+ 	spin_lock_init(&info->vpp_lock);
+ 
+ 	part_types = physmap_data->part_probe_types ? : part_probe_types;
++	pp_data = physmap_data->pp_data ? physmap_data->pp_data : NULL;
+ 
+-	mtd_device_parse_register(info->cmtd, part_types, NULL,
++	mtd_device_parse_register(info->cmtd, part_types, pp_data,
+ 				  physmap_data->parts, physmap_data->nr_parts);
+ 	return 0;
+ 
+--- a/include/linux/mtd/physmap.h
++++ b/include/linux/mtd/physmap.h
+@@ -31,6 +31,7 @@ struct physmap_flash_data {
+ 	char                    *probe_type;
+ 	struct mtd_partition	*parts;
+ 	const char * const	*part_probe_types;
++	struct mtd_part_parser_data *pp_data;
+ };
+ 
+ #endif /* __LINUX_MTD_PHYSMAP__ */
diff --git a/target/linux/brcm63xx/patches-3.18/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch b/target/linux/brcm63xx/patches-3.18/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch
new file mode 100644
index 0000000..0960005
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch
@@ -0,0 +1,72 @@
+From 8879e209111192c5e9752d7bd203cf7582693328 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 3 May 2012 14:40:03 +0200
+Subject: [PATCH 58/72] BCM63XX: allow providing fixup data in board data
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c           |    9 ++++++++-
+ arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h |   10 ++++++++++
+ 2 files changed, 18 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -36,6 +36,7 @@
+ #include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
++#include <pci_ath9k_fixup.h>
+ 
+ #include "board_common.h"
+ 
+@@ -196,6 +197,7 @@ int __init board_register_devices(void)
+ 	int button_count = 0;
+ 	int led_count = 0;
+ 	int usbh_ports = 0;
++	int i;
+ 
+ #if CONFIG_OF
+ 	if (of_have_populated_dt()) {
+@@ -296,6 +298,10 @@ int __init board_register_devices(void)
+ 		platform_device_register(&bcm63xx_gpio_keys_device);
+ 	}
+ 
++	/* register any fixups */
++	for (i = 0; i < board.has_caldata; i++)
++		pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
++
+ 	return 0;
+ }
+ 
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -10,6 +10,7 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <bcm63xx_dev_dsp.h>
+ #include <bcm63xx_fallback_sprom.h>
++#include <pci_ath9k_fixup.h>
+ 
+ /*
+  * flash mapping
+@@ -17,6 +18,11 @@
+ #define BCM963XX_CFE_VERSION_OFFSET	0x570
+ #define BCM963XX_NVRAM_OFFSET		0x580
+ 
++struct ath9k_caldata {
++	unsigned int	slot;
++	u32		caldata_offset;
++};
++
+ /*
+  * board definition
+  */
+@@ -37,6 +43,10 @@ struct board_info {
+ 	unsigned int	has_uart0:1;
+ 	unsigned int	has_uart1:1;
+ 	unsigned int	use_fallback_sprom:1;
++	unsigned int	has_caldata:2;
++
++	/* wifi calibration data config */
++	struct ath9k_caldata caldata[2];
+ 
+ 	/* ethernet config */
+ 	struct bcm63xx_enet_platform_data enet0;
diff --git a/target/linux/brcm63xx/patches-3.18/414-MTD-m25p80-allow-passing-pp_data.patch b/target/linux/brcm63xx/patches-3.18/414-MTD-m25p80-allow-passing-pp_data.patch
new file mode 100644
index 0000000..b7bf57f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/414-MTD-m25p80-allow-passing-pp_data.patch
@@ -0,0 +1,40 @@
+From 7f17dfe9009beb07a3de0e380932a725293829df Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 1 May 2012 17:33:03 +0200
+Subject: [PATCH 64/79] MTD: m25p80: allow passing pp_data
+
+---
+ drivers/mtd/devices/m25p80.c |    3 +++
+ include/linux/spi/flash.h    |    2 ++
+ 2 files changed, 5 insertions(+)
+
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -267,6 +267,9 @@ static int m25p_probe(struct spi_device
+ 	if (data)
+ 		flash->max_transfer_len = data->max_transfer_len;
+ 
++	if (data && data->pp_data)
++		memcpy(&ppdata, data->pp_data, sizeof(ppdata));
++
+ 	ret = spi_nor_scan(nor, flash_name, mode);
+ 	if (ret)
+ 		return ret;
+--- a/include/linux/spi/flash.h
++++ b/include/linux/spi/flash.h
+@@ -12,6 +12,7 @@ struct mtd_part_parser_data;
+  *	with chips that can't be queried for JEDEC or other IDs
+  * @part_probe_types: optional list of MTD parser names to use for
+  *	partitioning
++ * @pp_data: optional partition parser data.
+  *
+  * @max_transfer_len: option maximum read/write length limitation for
+  *	SPI controllers not able to transfer any length commands.
+@@ -30,6 +31,7 @@ struct flash_platform_data {
+ 	char		*type;
+ 
+ 	const char	**part_probe_types;
++	struct mtd_part_parser_data *pp_data;
+ 
+ 	unsigned int	max_transfer_len;
+ 	/* we'll likely add more ... use JEDEC IDs, etc */
diff --git a/target/linux/brcm63xx/patches-3.18/415-MIPS-BCM63XX-export-the-attached-flash-type.patch b/target/linux/brcm63xx/patches-3.18/415-MIPS-BCM63XX-export-the-attached-flash-type.patch
new file mode 100644
index 0000000..44763bb
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/415-MIPS-BCM63XX-export-the-attached-flash-type.patch
@@ -0,0 +1,31 @@
+From 066f1e37742ee434496d32a41a9284458de96742 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 13 Jan 2014 12:12:30 +0100
+Subject: [PATCH] MIPS: BCM63XX: export the attached flash type
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c                          | 5 +++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -250,3 +250,8 @@ int __init bcm63xx_flash_register(void)
+ 		return -ENODEV;
+ 	}
+ }
++
++int bcm63xx_flash_get_type(void)
++{
++	return flash_type;
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -13,4 +13,6 @@ void bcm63xx_flash_force_phys_base_addre
+ 
+ int __init bcm63xx_flash_register(void);
+ 
++int bcm63xx_flash_get_type(void);
++
+ #endif /* __BCM63XX_FLASH_H */
diff --git a/target/linux/brcm63xx/patches-3.18/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch b/target/linux/brcm63xx/patches-3.18/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch
new file mode 100644
index 0000000..7a7c825
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch
@@ -0,0 +1,236 @@
+From bbebbf735a02b6d044ed928978ab4bd5f1833364 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 3 May 2012 14:36:11 +0200
+Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices
+
+---
+ arch/mips/bcm63xx/Makefile                         |    3 +-
+ arch/mips/bcm63xx/pci-ath9k-fixup.c                |  190 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/pci_ath9k_fixup.h     |    7 +
+ 3 files changed, 199 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/pci-ath9k-fixup.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,7 @@ obj-y		+= clk.o cpu.o cs.o gpio.o irq.o
+ 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
+ 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
+ 		   dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
+-		   usb-common.o sprom.o
++		   pci-ath9k-fixup.o usb-common.o sprom.o
+ obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+ 
+ obj-y		+= boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -0,0 +1,199 @@
++/*
++ *  Broadcom BCM63XX Ath9k EEPROM fixup helper.
++ *
++ *  Copytight (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
++ *
++ *  Based on
++ *
++ *  Atheros AP94 reference board PCI initialization
++ *
++ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/pci.h>
++#include <linux/delay.h>
++#include <linux/ath9k_platform.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_nvram.h>
++#include <bcm63xx_dev_pci.h>
++#include <bcm63xx_dev_flash.h>
++#include <bcm63xx_dev_hsspi.h>
++#include <pci_ath9k_fixup.h>
++
++#define bcm_hsspi_writel(v, o)	bcm_rset_writel(RSET_HSSPI, (v), (o))
++
++struct ath9k_fixup {
++	unsigned slot;
++	u8 mac[ETH_ALEN];
++	struct ath9k_platform_data pdata;
++};
++
++static int ath9k_num_fixups;
++static struct ath9k_fixup ath9k_fixups[2] = {
++	{
++		.slot = 255,
++		.pdata = {
++			.led_pin	= -1,
++		},
++	},
++	{
++		.slot = 255,
++		.pdata = {
++			.led_pin	= -1,
++		},
++	},
++};
++
++static u16 *bcm63xx_read_eeprom(u16 *eeprom, u32 offset)
++{
++	u32 addr;
++
++	if (BCMCPU_IS_6328()) {
++		addr = 0x18000000;
++	} else {
++		addr = bcm_mpi_readl(MPI_CSBASE_REG(0));
++		addr &= MPI_CSBASE_BASE_MASK;
++	}
++
++	switch (bcm63xx_flash_get_type()) {
++	case BCM63XX_FLASH_TYPE_PARALLEL:
++		memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
++		return eeprom;
++	case BCM63XX_FLASH_TYPE_SERIAL:
++		/* the first megabyte is memory mapped */
++		if (offset < 0x100000) {
++			memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
++			return eeprom;
++		}
++
++		if (BCMCPU_IS_6328()) {
++			/* we can change the memory mapped megabyte */
++			bcm_hsspi_writel(offset & 0xf00000, 0x18);
++			memcpy(eeprom, (void *)KSEG1ADDR(addr + (offset & 0xfffff)), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
++			bcm_hsspi_writel(0, 0x18);
++			return eeprom;
++		}
++		/* can't do anything here without talking to the SPI controller. */
++	case BCM63XX_FLASH_TYPE_NAND:
++	default:
++		return NULL;
++	}
++}
++
++static void ath9k_pci_fixup(struct pci_dev *dev)
++{
++	void __iomem *mem;
++	struct ath9k_platform_data *pdata = NULL;
++	struct pci_dev *bridge = pci_upstream_bridge(dev);
++	u16 *cal_data = NULL;
++	u16 cmd;
++	u32 bar0;
++	u32 val;
++	unsigned i;
++
++	for (i = 0; i < ath9k_num_fixups; i++) {
++		if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn))
++			continue;
++
++		cal_data = ath9k_fixups[i].pdata.eeprom_data;
++		pdata = &ath9k_fixups[i].pdata;
++		break;
++	}
++
++	if (cal_data == NULL)
++		return;
++
++	if (*cal_data != 0xa55a) {
++		pr_err("pci %s: invalid calibration data\n", pci_name(dev));
++		return;
++	}
++
++	pr_info("pci %s: fixup device configuration\n", pci_name(dev));
++
++	switch (bcm63xx_get_cpu_id()) {
++	case BCM6328_CPU_ID:
++		val = BCM_PCIE_MEM_BASE_PA_6328;
++		break;
++	case BCM6348_CPU_ID:
++	case BCM6358_CPU_ID:
++	case BCM6368_CPU_ID:
++		val = BCM_PCI_MEM_BASE_PA;
++		break;
++	default:
++		BUG();
++	}
++
++	mem = ioremap(val, 0x10000);
++	if (!mem) {
++		pr_err("pci %s: ioremap error\n", pci_name(dev));
++		return;
++	}
++
++	if (bridge)
++		pci_enable_device(bridge);
++
++	pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
++	pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
++	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, val);
++
++	pci_read_config_word(dev, PCI_COMMAND, &cmd);
++	cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
++	pci_write_config_word(dev, PCI_COMMAND, cmd);
++
++	/* set offset to first reg address */
++	cal_data += 3;
++	while(*cal_data != 0xffff) {
++		u32 reg;
++		reg = *cal_data++;
++		val = *cal_data++;
++		val |= (*cal_data++) << 16;
++
++		writel(val, mem + reg);
++		udelay(100);
++	}
++
++	pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
++	dev->vendor = val & 0xffff;
++	dev->device = (val >> 16) & 0xffff;
++
++	pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
++	dev->revision = val & 0xff;
++	dev->class = val >> 8; /* upper 3 bytes */
++
++	pci_read_config_word(dev, PCI_COMMAND, &cmd);
++	cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
++	pci_write_config_word(dev, PCI_COMMAND, cmd);
++
++	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
++
++	if (bridge)
++		pci_disable_device(bridge);
++
++	iounmap(mem);
++
++	dev->dev.platform_data = pdata;
++}
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
++
++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
++{
++	if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
++		return;
++
++	ath9k_fixups[ath9k_num_fixups].slot = slot;
++
++	if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
++		return;
++
++	if (bcm63xx_nvram_get_mac_address(ath9k_fixups[ath9k_num_fixups].mac))
++		return;
++
++	ath9k_fixups[ath9k_num_fixups].pdata.macaddr = ath9k_fixups[ath9k_num_fixups].mac;
++	ath9k_num_fixups++;
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -0,0 +1,7 @@
++#ifndef _PCI_ATH9K_FIXUP
++#define _PCI_ATH9K_FIXUP
++
++
++void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
++
++#endif /* _PCI_ATH9K_FIXUP */
diff --git a/target/linux/brcm63xx/patches-3.18/417-MTD-bcm63xxpart-allow-passing-a-caldata-offset.patch b/target/linux/brcm63xx/patches-3.18/417-MTD-bcm63xxpart-allow-passing-a-caldata-offset.patch
new file mode 100644
index 0000000..3b02c07
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/417-MTD-bcm63xxpart-allow-passing-a-caldata-offset.patch
@@ -0,0 +1,120 @@
+Allow bcm63xxpart to receive a caldata offset if calibration data is
+contained in flash.
+---
+ drivers/mtd/bcm63xxpart.c      |   51 ++++++++++++++++++++++++++++++++++++---
+ include/linux/mtd/partitions.h |    2 +
+ 2 files changed, 49 insertions(+), 4 deletions(-)
+
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -53,10 +53,12 @@ static int bcm63xx_parse_cfe_partitions(
+ 	struct mtd_partition *parts;
+ 	int ret;
+ 	size_t retlen;
+-	unsigned int rootfsaddr, kerneladdr, spareaddr;
++	unsigned int rootfsaddr, kerneladdr, spareaddr, nvramaddr;
+ 	unsigned int rootfslen, kernellen, sparelen, totallen;
+ 	unsigned int cfelen, nvramlen;
+ 	unsigned int cfe_erasesize;
++	unsigned int caldatalen1 = 0, caldataaddr1 = 0;
++	unsigned int caldatalen2 = 0, caldataaddr2 = 0;
+ 	int i;
+ 	u32 computed_crc;
+ 	bool rootfs_first = false;
+@@ -70,6 +72,24 @@ static int bcm63xx_parse_cfe_partitions(
+ 	cfelen = cfe_erasesize;
+ 	nvramlen = bcm63xx_nvram_get_psi_size() * SZ_1K;
+ 	nvramlen = roundup(nvramlen, cfe_erasesize);
++	nvramaddr = master->size - nvramlen;
++
++	if (data) {
++		if (data->caldata[0]) {
++			caldatalen1 = cfe_erasesize;
++			caldataaddr1 = rounddown(data->caldata[0],
++						 cfe_erasesize);
++		}
++		if (data->caldata[1]) {
++			caldatalen2 = cfe_erasesize;
++			caldataaddr2 = rounddown(data->caldata[1],
++						 cfe_erasesize);
++		}
++		if (caldataaddr1 == caldataaddr2) {
++			caldataaddr2 = 0;
++			caldatalen2 = 0;
++		}
++	}
+ 
+ 	/* Allocate memory for buffer */
+ 	buf = vmalloc(sizeof(struct bcm_tag));
+@@ -121,7 +141,7 @@ static int bcm63xx_parse_cfe_partitions(
+ 		rootfsaddr = 0;
+ 		spareaddr = cfelen;
+ 	}
+-	sparelen = master->size - spareaddr - nvramlen;
++	sparelen = min_not_zero(nvramaddr, caldataaddr1) - spareaddr;
+ 
+ 	/* Determine number of partitions */
+ 	if (rootfslen > 0)
+@@ -130,6 +150,12 @@ static int bcm63xx_parse_cfe_partitions(
+ 	if (kernellen > 0)
+ 		nrparts++;
+ 
++	if (caldatalen1 > 0)
++		nrparts++;
++
++	if (caldatalen2 > 0)
++		nrparts++;
++
+ 	/* Ask kernel for more memory */
+ 	parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL);
+ 	if (!parts) {
+@@ -167,15 +193,32 @@ static int bcm63xx_parse_cfe_partitions(
+ 		curpart++;
+ 	}
+ 
++	if (caldatalen1 > 0) {
++		if (caldatalen2 > 0)
++			parts[curpart].name = "cal_data1";
++		else
++			parts[curpart].name = "cal_data";
++		parts[curpart].offset = caldataaddr1;
++		parts[curpart].size = caldatalen1;
++		curpart++;
++	}
++
++	if (caldatalen2 > 0) {
++		parts[curpart].name = "cal_data2";
++		parts[curpart].offset = caldataaddr2;
++		parts[curpart].size = caldatalen2;
++		curpart++;
++	}
++
+ 	parts[curpart].name = "nvram";
+-	parts[curpart].offset = master->size - nvramlen;
++	parts[curpart].offset = nvramaddr;
+ 	parts[curpart].size = nvramlen;
+ 	curpart++;
+ 
+ 	/* Global partition "linux" to make easy firmware upgrade */
+ 	parts[curpart].name = "linux";
+ 	parts[curpart].offset = cfelen;
+-	parts[curpart].size = master->size - cfelen - nvramlen;
++	parts[curpart].size = min_not_zero(nvramaddr, caldataaddr1) - cfelen;
+ 
+ 	for (i = 0; i < nrparts; i++)
+ 		pr_info("Partition %d is %s offset %llx and length %llx\n", i,
+--- a/include/linux/mtd/partitions.h
++++ b/include/linux/mtd/partitions.h
+@@ -56,10 +56,12 @@ struct device_node;
+ /**
+  * struct mtd_part_parser_data - used to pass data to MTD partition parsers.
+  * @origin: for RedBoot, start address of MTD device
++ * @caldata: for CFE, start address of wifi calibration data
+  * @of_node: for OF parsers, device node containing partitioning information
+  */
+ struct mtd_part_parser_data {
+ 	unsigned long origin;
++	unsigned long caldata[2];
+ 	struct device_node *of_node;
+ };
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/418-MIPS-BCM63XX-pass-caldata-info-to-flash.patch b/target/linux/brcm63xx/patches-3.18/418-MIPS-BCM63XX-pass-caldata-info-to-flash.patch
new file mode 100644
index 0000000..484e1fd
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/418-MIPS-BCM63XX-pass-caldata-info-to-flash.patch
@@ -0,0 +1,83 @@
+From 977f8a30103b9c4992cab8f49357fe0d4274004f Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 3 May 2012 14:55:26 +0200
+Subject: [PATCH 69/80] MIPS: BCM63XX: pass caldata info to flash
+
+---
+ arch/mips/bcm63xx/boards/board_common.c              |    2 +-
+ arch/mips/bcm63xx/dev-flash.c                          |    9 ++++++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h |    4 +++-
+ 3 files changed, 12 insertions(+), 3 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -269,7 +269,7 @@ int __init board_register_devices(void)
+ 	if (board.num_spis)
+ 		spi_register_board_info(board.spis, board.num_spis);
+ 
+-	bcm63xx_flash_register();
++	bcm63xx_flash_register(board.has_caldata, board.caldata);
+ 
+ 	/* count number of LEDs defined by this device */
+ 	while (led_count < ARRAY_SIZE(board.leds) && board.leds[led_count].name)
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -38,12 +38,15 @@ static struct mtd_partition mtd_partitio
+ 	}
+ };
+ 
++static struct mtd_part_parser_data bcm63xx_parser_data;
++
+ static const char *bcm63xx_part_types[] = { "bcm63xxpart", "RedBoot", NULL };
+ 
+ static struct physmap_flash_data flash_data = {
+ 	.width			= 2,
+ 	.parts			= mtd_partitions,
+ 	.part_probe_types	= bcm63xx_part_types,
++	.pp_data		= &bcm63xx_parser_data,
+ };
+ 
+ static struct resource mtd_resources[] = {
+@@ -71,6 +74,7 @@ void __init bcm63xx_flash_force_phys_bas
+ 
+ static struct flash_platform_data bcm63xx_flash_data = {
+ 	.part_probe_types	= bcm63xx_part_types,
++	.pp_data		= &bcm63xx_parser_data,
+ };
+ 
+ static struct spi_board_info bcm63xx_spi_flash_info[] = {
+@@ -211,9 +215,13 @@ void __init bcm63xx_flash_detect(void)
+ 	}
+ }
+ 
+-int __init bcm63xx_flash_register(void)
++int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata)
+ {
+ 	u32 val;
++	unsigned int i;
++
++	for (i = 0; i < num_caldata; i++)
++		bcm63xx_parser_data.caldata[i] = caldata[i].caldata_offset;
+ 
+ 	switch (flash_type) {
+ 	case BCM63XX_FLASH_TYPE_PARALLEL:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -1,6 +1,8 @@
+ #ifndef __BCM63XX_FLASH_H
+ #define __BCM63XX_FLASH_H
+ 
++#include <board_bcm963xx.h>
++
+ enum {
+ 	BCM63XX_FLASH_TYPE_PARALLEL,
+ 	BCM63XX_FLASH_TYPE_SERIAL,
+@@ -11,7 +13,7 @@ void bcm63xx_flash_detect(void);
+ 
+ void bcm63xx_flash_force_phys_base_address(u32 start, u32 end);
+ 
+-int __init bcm63xx_flash_register(void);
++int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata);
+ 
+ int bcm63xx_flash_get_type(void);
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/420-BCM63XX-add-endian-check-for-ath9k.patch b/target/linux/brcm63xx/patches-3.18/420-BCM63XX-add-endian-check-for-ath9k.patch
new file mode 100644
index 0000000..5398c3d
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/420-BCM63XX-add-endian-check-for-ath9k.patch
@@ -0,0 +1,51 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -2,6 +2,7 @@
+ #define _PCI_ATH9K_FIXUP
+ 
+ 
+-void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
++void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
++	unsigned endian_check) __init;
+ 
+ #endif /* _PCI_ATH9K_FIXUP */
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -21,6 +21,7 @@
+ struct ath9k_caldata {
+ 	unsigned int	slot;
+ 	u32		caldata_offset;
++	unsigned int	endian_check:1;
+ };
+ 
+ /*
+--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -181,12 +181,14 @@ static void ath9k_pci_fixup(struct pci_d
+ }
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
+ 
+-void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
++	unsigned endian_check)
+ {
+ 	if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
+ 		return;
+ 
+ 	ath9k_fixups[ath9k_num_fixups].slot = slot;
++	ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
+ 
+ 	if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
+ 		return;
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -300,7 +300,8 @@ int __init board_register_devices(void)
+ 
+ 	/* register any fixups */
+ 	for (i = 0; i < board.has_caldata; i++)
+-		pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
++		pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
++			board.caldata[i].endian_check);
+ 
+ 	return 0;
+ }
diff --git a/target/linux/brcm63xx/patches-3.18/421-BCM63XX-add-led-pin-for-ath9k.patch b/target/linux/brcm63xx/patches-3.18/421-BCM63XX-add-led-pin-for-ath9k.patch
new file mode 100644
index 0000000..1310136
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/421-BCM63XX-add-led-pin-for-ath9k.patch
@@ -0,0 +1,49 @@
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -301,7 +301,7 @@ int __init board_register_devices(void)
+ 	/* register any fixups */
+ 	for (i = 0; i < board.has_caldata; i++)
+ 		pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
+-			board.caldata[i].endian_check);
++			board.caldata[i].endian_check, board.caldata[i].led_pin);
+ 
+ 	return 0;
+ }
+--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -182,13 +182,14 @@ static void ath9k_pci_fixup(struct pci_d
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
+ 
+ void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
+-	unsigned endian_check)
++	unsigned endian_check, int led_pin)
+ {
+ 	if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
+ 		return;
+ 
+ 	ath9k_fixups[ath9k_num_fixups].slot = slot;
+ 	ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
++	ath9k_fixups[ath9k_num_fixups].pdata.led_pin = led_pin;
+ 
+ 	if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
+ 		return;
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -22,6 +22,7 @@ struct ath9k_caldata {
+ 	unsigned int	slot;
+ 	u32		caldata_offset;
+ 	unsigned int	endian_check:1;
++	int		led_pin;
+ };
+ 
+ /*
+--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -3,6 +3,6 @@
+ 
+ 
+ void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
+-	unsigned endian_check) __init;
++	unsigned endian_check, int led_pin) __init;
+ 
+ #endif /* _PCI_ATH9K_FIXUP */
diff --git a/target/linux/brcm63xx/patches-3.18/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch b/target/linux/brcm63xx/patches-3.18/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch
new file mode 100644
index 0000000..4a0a7b0
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch
@@ -0,0 +1,206 @@
+From 5ed5b5e9614fa5b02da699ab565af76c7e63d64d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 7 Jan 2013 17:45:39 +0100
+Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices
+
+---
+ arch/mips/bcm63xx/Makefile                         |    2 +-
+ arch/mips/bcm63xx/boards/board_bcm963xx.c          |   17 ++++-
+ arch/mips/bcm63xx/dev-flash.c                      |    2 +-
+ arch/mips/bcm63xx/pci-rt2x00-fixup.c               |   71 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/bcm63xx_dev_flash.h   |    2 +-
+ .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h |    9 ++-
+ .../include/asm/mach-bcm63xx/pci_rt2x00_fixup.h    |    9 +++
+ 7 files changed, 104 insertions(+), 8 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/pci-rt2x00-fixup.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,7 @@ obj-y		+= clk.o cpu.o cs.o gpio.o irq.o
+ 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
+ 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
+ 		   dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
+-		   pci-ath9k-fixup.o usb-common.o sprom.o
++		   pci-ath9k-fixup.o pci-rt2x00-fixup.o usb-common.o sprom.o
+ obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+ 
+ obj-y		+= boards/
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -37,6 +37,7 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+ #include <pci_ath9k_fixup.h>
++#include <pci_rt2x00_fixup.h>
+ 
+ #include "board_common.h"
+ 
+@@ -299,9 +300,19 @@ int __init board_register_devices(void)
+ 	}
+ 
+ 	/* register any fixups */
+-	for (i = 0; i < board.has_caldata; i++)
+-		pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
+-			board.caldata[i].endian_check, board.caldata[i].led_pin);
++	for (i = 0; i < board.has_caldata; i++) {
++		switch (board.caldata[i].vendor) {
++		case PCI_VENDOR_ID_ATHEROS:
++			pci_enable_ath9k_fixup(board.caldata[i].slot,
++				board.caldata[i].caldata_offset, board.caldata[i].endian_check,
++				board.caldata[i].led_pin);
++			break;
++		case PCI_VENDOR_ID_RALINK:
++			pci_enable_rt2x00_fixup(board.caldata[i].slot,
++				board.caldata[i].eeprom);
++			break;
++		}
++	}
+ 
+ 	return 0;
+ }
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -215,7 +215,7 @@ void __init bcm63xx_flash_detect(void)
+ 	}
+ }
+ 
+-int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata)
++int __init bcm63xx_flash_register(int num_caldata, struct bcm63xx_caldata *caldata)
+ {
+ 	u32 val;
+ 	unsigned int i;
+--- /dev/null
++++ b/arch/mips/bcm63xx/pci-rt2x00-fixup.c
+@@ -0,0 +1,72 @@
++/*
++ *  Broadcom BCM63XX RT2x00 EEPROM fixup helper.
++ *
++ *  Copyright (C) 2012 Álvaro Fernández Rojas <noltari@gmail.com>
++ *
++ *  Based on
++ *
++ *  Broadcom BCM63XX Ath9k EEPROM fixup helper.
++ *
++ *  Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/if_ether.h>
++#include <linux/pci.h>
++#include <linux/platform_device.h>
++#include <linux/rt2x00_platform.h>
++
++#include <bcm63xx_nvram.h>
++#include <pci_rt2x00_fixup.h>
++
++struct rt2x00_fixup {
++	unsigned slot;
++	u8 mac[ETH_ALEN];
++	struct rt2x00_platform_data pdata;
++};
++
++static int rt2x00_num_fixups;
++static struct rt2x00_fixup rt2x00_fixups[2] = {
++	{
++		.slot = 255,
++	},
++	{
++		.slot = 255,
++	},
++};
++
++static void rt2x00_pci_fixup(struct pci_dev *dev)
++{
++	unsigned i;
++	struct rt2x00_platform_data *pdata = NULL;
++
++	for (i = 0; i < rt2x00_num_fixups; i++) {
++		if (rt2x00_fixups[i].slot != PCI_SLOT(dev->devfn))
++			continue;
++
++		pdata = &rt2x00_fixups[i].pdata;
++		break;
++	}
++
++	dev->dev.platform_data = pdata;
++}
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RALINK, PCI_ANY_ID, rt2x00_pci_fixup);
++
++void __init pci_enable_rt2x00_fixup(unsigned slot, char* eeprom)
++{
++	if (rt2x00_num_fixups >= ARRAY_SIZE(rt2x00_fixups))
++		return;
++
++	rt2x00_fixups[rt2x00_num_fixups].slot = slot;
++	rt2x00_fixups[rt2x00_num_fixups].pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
++
++	if (bcm63xx_nvram_get_mac_address(rt2x00_fixups[rt2x00_num_fixups].mac))
++		return;
++
++	rt2x00_fixups[rt2x00_num_fixups].pdata.mac_address = rt2x00_fixups[rt2x00_num_fixups].mac;
++	rt2x00_num_fixups++;
++}
++
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -13,7 +13,7 @@ void bcm63xx_flash_detect(void);
+ 
+ void bcm63xx_flash_force_phys_base_address(u32 start, u32 end);
+ 
+-int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata);
++int __init bcm63xx_flash_register(int num_caldata, struct bcm63xx_caldata *caldata);
+ 
+ int bcm63xx_flash_get_type(void);
+ 
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -11,6 +11,7 @@
+ #include <bcm63xx_dev_dsp.h>
+ #include <bcm63xx_fallback_sprom.h>
+ #include <pci_ath9k_fixup.h>
++#include <pci_rt2x00_fixup.h>
+ 
+ /*
+  * flash mapping
+@@ -18,11 +19,15 @@
+ #define BCM963XX_CFE_VERSION_OFFSET	0x570
+ #define BCM963XX_NVRAM_OFFSET		0x580
+ 
+-struct ath9k_caldata {
++struct bcm63xx_caldata {
++	unsigned int	vendor;
+ 	unsigned int	slot;
+ 	u32		caldata_offset;
++	/* Atheros */
+ 	unsigned int	endian_check:1;
+ 	int		led_pin;
++	/* Ralink */
++	char*		eeprom;
+ };
+ 
+ /*
+@@ -48,7 +53,7 @@ struct board_info {
+ 	unsigned int	has_caldata:2;
+ 
+ 	/* wifi calibration data config */
+-	struct ath9k_caldata caldata[2];
++	struct bcm63xx_caldata caldata[2];
+ 
+ 	/* ethernet config */
+ 	struct bcm63xx_enet_platform_data enet0;
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
+@@ -0,0 +1,9 @@
++#ifndef _PCI_RT2X00_FIXUP
++#define _PCI_RT2X00_FIXUP
++
++#define PCI_VENDOR_ID_RALINK 0x1814
++
++void pci_enable_rt2x00_fixup(unsigned slot, char* eeprom) __init;
++
++#endif /* _PCI_RT2X00_FIXUP */
++
diff --git a/target/linux/brcm63xx/patches-3.18/423-bcm63xx_enet_add_b53_support.patch b/target/linux/brcm63xx/patches-3.18/423-bcm63xx_enet_add_b53_support.patch
new file mode 100644
index 0000000..f7697e1
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/423-bcm63xx_enet_add_b53_support.patch
@@ -0,0 +1,169 @@
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
+@@ -336,6 +336,9 @@ struct bcm_enet_priv {
+ 	struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
+ 	int sw_port_link[ENETSW_MAX_PORT];
+ 
++	/* platform device for associated switch */
++	struct platform_device *b53_device;
++
+ 	/* used to poll switch port state */
+ 	struct timer_list swphy_poll;
+ 	spinlock_t enetsw_mdio_lock;
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -31,6 +31,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/if_vlan.h>
+ #include <linux/gpio/consumer.h>
++#include <linux/platform_data/b53.h>
+ 
+ #include <bcm63xx_dev_enet.h>
+ #include "bcm63xx_enet.h"
+@@ -1975,7 +1976,8 @@ static int bcm_enet_remove(struct platfo
+ 	return 0;
+ }
+ 
+-struct platform_driver bcm63xx_enet_driver = {
++
++static struct platform_driver bcm63xx_enet_driver = {
+ 	.probe	= bcm_enet_probe,
+ 	.remove	= bcm_enet_remove,
+ 	.driver	= {
+@@ -1984,6 +1986,42 @@ struct platform_driver bcm63xx_enet_driv
+ 	},
+ };
+ 
++struct b53_platform_data bcm63xx_b53_pdata = {
++	.chip_id = 0x6300,
++	.big_endian = 1,
++};
++
++struct platform_device bcm63xx_b53_dev = {
++	.name		= "b53-switch",
++	.id		= -1,
++	.dev		= {
++		.platform_data = &bcm63xx_b53_pdata,
++	},
++};
++
++static int bcmenet_switch_register(struct bcm_enet_priv *priv, u16 port_mask)
++{
++	int ret;
++
++	bcm63xx_b53_pdata.regs = priv->base;
++	bcm63xx_b53_pdata.enabled_ports = port_mask;
++	bcm63xx_b53_pdata.alias = priv->net_dev->name;
++
++	ret = platform_device_register(&bcm63xx_b53_dev);
++	if (!ret)
++		priv->b53_device = &bcm63xx_b53_dev;
++
++	return ret;
++}
++
++static void bcmenet_switch_unregister(struct bcm_enet_priv *priv)
++{
++	if (priv->b53_device)
++		platform_device_unregister(&bcm63xx_b53_dev);
++
++	priv->b53_device = NULL;
++}
++
+ /*
+  * switch mii access callbacks
+  */
+@@ -2237,29 +2275,6 @@ static int bcm_enetsw_open(struct net_de
+ 		enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
+ 	}
+ 
+-	/* reset mib */
+-	val = enetsw_readb(priv, ENETSW_GMCR_REG);
+-	val |= ENETSW_GMCR_RST_MIB_MASK;
+-	enetsw_writeb(priv, val, ENETSW_GMCR_REG);
+-	mdelay(1);
+-	val &= ~ENETSW_GMCR_RST_MIB_MASK;
+-	enetsw_writeb(priv, val, ENETSW_GMCR_REG);
+-	mdelay(1);
+-
+-	/* force CPU port state */
+-	val = enetsw_readb(priv, ENETSW_IMPOV_REG);
+-	val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
+-	enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
+-
+-	/* enable switch forward engine */
+-	val = enetsw_readb(priv, ENETSW_SWMODE_REG);
+-	val |= ENETSW_SWMODE_FWD_EN_MASK;
+-	enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
+-
+-	/* enable jumbo on all ports */
+-	enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
+-	enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
+-
+ 	/* initialize flow control buffer allocation */
+ 	enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
+ 			ENETDMA_BUFALLOC_REG(priv->rx_chan));
+@@ -2719,6 +2734,9 @@ static int bcm_enetsw_probe(struct platf
+ 	struct bcm63xx_enetsw_platform_data *pd;
+ 	struct resource *res_mem;
+ 	int ret, irq_rx, irq_tx;
++	unsigned i, num_ports = 0;
++	u16 port_mask = BIT(8);
++	u8 val;
+ 
+ 	/* stop if shared driver failed, assume driver->probe will be
+ 	 * called in the same order we register devices (correct ?)
+@@ -2808,6 +2826,43 @@ static int bcm_enetsw_probe(struct platf
+ 	priv->pdev = pdev;
+ 	priv->net_dev = dev;
+ 
++	/* reset mib */
++	val = enetsw_readb(priv, ENETSW_GMCR_REG);
++	val |= ENETSW_GMCR_RST_MIB_MASK;
++	enetsw_writeb(priv, val, ENETSW_GMCR_REG);
++	mdelay(1);
++	val &= ~ENETSW_GMCR_RST_MIB_MASK;
++	enetsw_writeb(priv, val, ENETSW_GMCR_REG);
++	mdelay(1);
++
++	/* force CPU port state */
++	val = enetsw_readb(priv, ENETSW_IMPOV_REG);
++	val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
++	enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
++
++	/* enable switch forward engine */
++	val = enetsw_readb(priv, ENETSW_SWMODE_REG);
++	val |= ENETSW_SWMODE_FWD_EN_MASK;
++	enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
++
++	/* enable jumbo on all ports */
++	enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
++	enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
++
++	for (i = 0; i < priv->num_ports; i++) {
++		struct bcm63xx_enetsw_port *port = &priv->used_ports[i];
++
++		if (!port->used)
++			continue;
++
++		num_ports++;
++		port_mask |= BIT(i);
++	}
++
++	/* only register if there is more than one external port */
++	if (num_ports > 1)
++		bcmenet_switch_register(priv, port_mask);
++
+ 	return 0;
+ 
+ out_put_clk:
+@@ -2836,6 +2891,9 @@ static int bcm_enetsw_remove(struct plat
+ 	priv = netdev_priv(dev);
+ 	unregister_netdev(dev);
+ 
++	/* remove switch */
++	bcmenet_switch_unregister(priv);
++
+ 	/* release device resources */
+ 	iounmap(priv->base);
+ 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
diff --git a/target/linux/brcm63xx/patches-3.18/424-bcm63xx_enet_no_request_mem_region.patch b/target/linux/brcm63xx/patches-3.18/424-bcm63xx_enet_no_request_mem_region.patch
new file mode 100644
index 0000000..a087308
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/424-bcm63xx_enet_no_request_mem_region.patch
@@ -0,0 +1,15 @@
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -2781,12 +2781,6 @@ static int bcm_enetsw_probe(struct platf
+ 	if (ret)
+ 		goto out;
+ 
+-	if (!request_mem_region(res_mem->start, resource_size(res_mem),
+-				"bcm63xx_enetsw")) {
+-		ret = -EBUSY;
+-		goto out;
+-	}
+-
+ 	priv->base = ioremap(res_mem->start, resource_size(res_mem));
+ 	if (priv->base == NULL) {
+ 		ret = -ENOMEM;
diff --git a/target/linux/brcm63xx/patches-3.18/425-bcm63xxpart_parse_paritions_from_dt.patch b/target/linux/brcm63xx/patches-3.18/425-bcm63xxpart_parse_paritions_from_dt.patch
new file mode 100644
index 0000000..53fc4c5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/425-bcm63xxpart_parse_paritions_from_dt.patch
@@ -0,0 +1,357 @@
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -32,6 +32,7 @@
+ #include <linux/vmalloc.h>
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
++#include <linux/of.h>
+ 
+ #include <asm/mach-bcm63xx/bcm63xx_nvram.h>
+ #include <asm/mach-bcm63xx/bcm963xx_tag.h>
+@@ -43,66 +44,35 @@
+ 
+ #define BCM63XX_CFE_MAGIC_OFFSET 0x4e0
+ 
+-static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,
+-					struct mtd_partition **pparts,
+-					struct mtd_part_parser_data *data)
++static bool node_has_compatible(struct device_node *pp)
++{
++	return of_get_property(pp, "compatible", NULL);
++}
++
++static int parse_bcmtag(struct mtd_info *master, struct mtd_partition *pparts,
++			int next_part, size_t offset, size_t size)
+ {
+-	/* CFE, NVRAM and global Linux are always present */
+-	int nrparts = 3, curpart = 0;
+ 	struct bcm_tag *buf;
+-	struct mtd_partition *parts;
++	u32 computed_crc;
+ 	int ret;
+ 	size_t retlen;
+-	unsigned int rootfsaddr, kerneladdr, spareaddr, nvramaddr;
+-	unsigned int rootfslen, kernellen, sparelen, totallen;
+-	unsigned int cfelen, nvramlen;
+-	unsigned int cfe_erasesize;
+-	unsigned int caldatalen1 = 0, caldataaddr1 = 0;
+-	unsigned int caldatalen2 = 0, caldataaddr2 = 0;
+-	int i;
+-	u32 computed_crc;
++	unsigned int rootfsaddr, kerneladdr;
++	unsigned int rootfslen, kernellen, totallen;
+ 	bool rootfs_first = false;
+-
+-	if (!bcm63xx_is_cfe_present())
+-		return -EINVAL;
+-
+-	cfe_erasesize = max_t(uint32_t, master->erasesize,
+-			      BCM63XX_CFE_BLOCK_SIZE);
+-
+-	cfelen = cfe_erasesize;
+-	nvramlen = bcm63xx_nvram_get_psi_size() * SZ_1K;
+-	nvramlen = roundup(nvramlen, cfe_erasesize);
+-	nvramaddr = master->size - nvramlen;
+-
+-	if (data) {
+-		if (data->caldata[0]) {
+-			caldatalen1 = cfe_erasesize;
+-			caldataaddr1 = rounddown(data->caldata[0],
+-						 cfe_erasesize);
+-		}
+-		if (data->caldata[1]) {
+-			caldatalen2 = cfe_erasesize;
+-			caldataaddr2 = rounddown(data->caldata[1],
+-						 cfe_erasesize);
+-		}
+-		if (caldataaddr1 == caldataaddr2) {
+-			caldataaddr2 = 0;
+-			caldatalen2 = 0;
+-		}
+-	}
++	int curr_part = next_part;
+ 
+ 	/* Allocate memory for buffer */
+-	buf = vmalloc(sizeof(struct bcm_tag));
++	buf = vmalloc(sizeof(*buf));
+ 	if (!buf)
+ 		return -ENOMEM;
+ 
+ 	/* Get the tag */
+-	ret = mtd_read(master, cfelen, sizeof(struct bcm_tag), &retlen,
++	ret = mtd_read(master, offset, sizeof(*buf), &retlen,
+ 		       (void *)buf);
+ 
+-	if (retlen != sizeof(struct bcm_tag)) {
++	if (retlen != sizeof(*buf)) {
+ 		vfree(buf);
+-		return -EIO;
++		return 0;
+ 	}
+ 
+ 	computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf,
+@@ -121,7 +91,6 @@ static int bcm63xx_parse_cfe_partitions(
+ 
+ 		kerneladdr = kerneladdr - BCM63XX_EXTENDED_SIZE;
+ 		rootfsaddr = rootfsaddr - BCM63XX_EXTENDED_SIZE;
+-		spareaddr = roundup(totallen, master->erasesize) + cfelen;
+ 
+ 		if (rootfsaddr < kerneladdr) {
+ 			/* default Broadcom layout */
+@@ -130,8 +99,8 @@ static int bcm63xx_parse_cfe_partitions(
+ 		} else {
+ 			/* OpenWrt layout */
+ 			rootfsaddr = kerneladdr + kernellen;
+-			rootfslen = buf->real_rootfs_length;
+-			spareaddr = rootfsaddr + rootfslen;
++			rootfslen = size - kernellen -
++				    sizeof(*buf);
+ 		}
+ 	} else {
+ 		pr_warn("CFE boot tag CRC invalid (expected %08x, actual %08x)\n",
+@@ -139,16 +108,153 @@ static int bcm63xx_parse_cfe_partitions(
+ 		kernellen = 0;
+ 		rootfslen = 0;
+ 		rootfsaddr = 0;
+-		spareaddr = cfelen;
+ 	}
+-	sparelen = min_not_zero(nvramaddr, caldataaddr1) - spareaddr;
+ 
+-	/* Determine number of partitions */
+-	if (rootfslen > 0)
+-		nrparts++;
++	if (kernellen > 0) {
++		int kernelpart = curr_part;
+ 
+-	if (kernellen > 0)
+-		nrparts++;
++		if (rootfslen > 0 && rootfs_first)
++			kernelpart++;
++		pparts[kernelpart].name = "kernel";
++		pparts[kernelpart].offset = kerneladdr;
++		pparts[kernelpart].size = kernellen;
++		curr_part++;
++	}
++
++	if (rootfslen > 0) {
++		int rootfspart = curr_part;
++
++		if (kernellen > 0 && rootfs_first)
++			rootfspart--;
++		pparts[rootfspart].name = "rootfs";
++		pparts[rootfspart].offset = rootfsaddr;
++		pparts[rootfspart].size = rootfslen;
++
++		curr_part++;
++	}
++
++	vfree(buf);
++
++	return curr_part - next_part;
++}
++
++
++static int bcm63xx_parse_cfe_partitions_of(struct mtd_info *master,
++					   struct mtd_partition **pparts,
++					   struct mtd_part_parser_data *data)
++{
++	struct device_node *dp = data->of_node;
++	struct device_node *pp;
++	int i, nr_parts = 0;
++	const char *partname;
++	int len;
++
++	for_each_child_of_node(dp, pp) {
++		if (node_has_compatible(pp))
++			continue;
++
++		if (!of_get_property(pp, "reg", &len))
++			continue;
++
++		partname = of_get_property(pp, "label", &len);
++		if (!partname)
++			partname = of_get_property(pp, "name", &len);
++
++		if (!strcmp(partname, "linux"))
++			nr_parts += 2;
++
++		nr_parts++;
++	}
++
++	*pparts = kzalloc(nr_parts * sizeof(**pparts), GFP_KERNEL);
++	if (!*pparts)
++		return -ENOMEM;
++
++	i = 0;
++	for_each_child_of_node(dp, pp) {
++		const __be32 *reg;
++		int a_cells, s_cells;
++		size_t size, offset;
++
++		if (node_has_compatible(pp))
++			continue;
++
++		reg = of_get_property(pp, "reg", &len);
++		if (!reg)
++			continue;
++
++		a_cells = of_n_addr_cells(pp);
++		s_cells = of_n_size_cells(pp);
++		offset = of_read_number(reg, a_cells);
++		size = of_read_number(reg + a_cells, s_cells);
++		partname = of_get_property(pp, "label", &len);
++		if (!partname)
++			partname = of_get_property(pp, "name", &len);
++
++		if (!strcmp(partname, "linux"))
++			i += parse_bcmtag(master, *pparts, i, offset, size);
++
++		if (of_get_property(pp, "read-only", &len))
++			(*pparts)[i].mask_flags |= MTD_WRITEABLE;
++
++		if (of_get_property(pp, "lock", &len))
++			(*pparts)[i].mask_flags |= MTD_POWERUP_LOCK;
++
++		(*pparts)[i].offset = offset;
++		(*pparts)[i].size = size;
++		(*pparts)[i].name = partname;
++
++		i++;
++	}
++
++	return i;
++}
++
++static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,
++					struct mtd_partition **pparts,
++					struct mtd_part_parser_data *data)
++{
++	/* CFE, NVRAM and global Linux are always present */
++	int nrparts = 5, curpart = 0;
++	struct mtd_partition *parts;
++	unsigned int nvramaddr;
++	unsigned int cfelen, nvramlen;
++	unsigned int cfe_erasesize;
++	unsigned int caldatalen1 = 0, caldataaddr1 = 0;
++	unsigned int caldatalen2 = 0, caldataaddr2 = 0;
++	unsigned int imageaddr, imagelen;
++	int i;
++
++	if (!bcm63xx_is_cfe_present())
++		return -EINVAL;
++
++	cfe_erasesize = max_t(uint32_t, master->erasesize,
++			      BCM63XX_CFE_BLOCK_SIZE);
++
++	cfelen = cfe_erasesize;
++	nvramlen = bcm63xx_nvram_get_psi_size() * SZ_1K;
++	nvramlen = roundup(nvramlen, cfe_erasesize);
++	nvramaddr = master->size - nvramlen;
++
++	if (data) {
++		if (data->caldata[0]) {
++			caldatalen1 = cfe_erasesize;
++			caldataaddr1 = rounddown(data->caldata[0],
++						 cfe_erasesize);
++		}
++		if (data->caldata[1]) {
++			caldatalen2 = cfe_erasesize;
++			caldataaddr2 = rounddown(data->caldata[1],
++						 cfe_erasesize);
++		}
++		if (caldataaddr1 == caldataaddr2) {
++			caldataaddr2 = 0;
++			caldatalen2 = 0;
++		}
++	}
++
++	imageaddr = cfelen;
++	imagelen = min_not_zero(nvramaddr, caldataaddr1) - imageaddr;
+ 
+ 	if (caldatalen1 > 0)
+ 		nrparts++;
+@@ -158,10 +264,8 @@ static int bcm63xx_parse_cfe_partitions(
+ 
+ 	/* Ask kernel for more memory */
+ 	parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL);
+-	if (!parts) {
+-		vfree(buf);
++	if (!parts)
+ 		return -ENOMEM;
+-	}
+ 
+ 	/* Start building partition list */
+ 	parts[curpart].name = "CFE";
+@@ -169,29 +273,7 @@ static int bcm63xx_parse_cfe_partitions(
+ 	parts[curpart].size = cfelen;
+ 	curpart++;
+ 
+-	if (kernellen > 0) {
+-		int kernelpart = curpart;
+-
+-		if (rootfslen > 0 && rootfs_first)
+-			kernelpart++;
+-		parts[kernelpart].name = "kernel";
+-		parts[kernelpart].offset = kerneladdr;
+-		parts[kernelpart].size = kernellen;
+-		curpart++;
+-	}
+-
+-	if (rootfslen > 0) {
+-		int rootfspart = curpart;
+-
+-		if (kernellen > 0 && rootfs_first)
+-			rootfspart--;
+-		parts[rootfspart].name = "rootfs";
+-		parts[rootfspart].offset = rootfsaddr;
+-		parts[rootfspart].size = rootfslen;
+-		if (sparelen > 0  && !rootfs_first)
+-			parts[rootfspart].size += sparelen;
+-		curpart++;
+-	}
++	curpart += parse_bcmtag(master, parts, curpart, imageaddr, imagelen);
+ 
+ 	if (caldatalen1 > 0) {
+ 		if (caldatalen2 > 0)
+@@ -217,25 +299,33 @@ static int bcm63xx_parse_cfe_partitions(
+ 
+ 	/* Global partition "linux" to make easy firmware upgrade */
+ 	parts[curpart].name = "linux";
+-	parts[curpart].offset = cfelen;
+-	parts[curpart].size = min_not_zero(nvramaddr, caldataaddr1) - cfelen;
++	parts[curpart].offset = imageaddr;
++	parts[curpart].size = imagelen;
++	curpart++;
+ 
+-	for (i = 0; i < nrparts; i++)
++	for (i = 0; i < curpart; i++)
+ 		pr_info("Partition %d is %s offset %llx and length %llx\n", i,
+ 			parts[i].name, parts[i].offset,	parts[i].size);
+ 
+-	pr_info("Spare partition is offset %x and length %x\n",	spareaddr,
+-		sparelen);
+-
+ 	*pparts = parts;
+-	vfree(buf);
+ 
+ 	return nrparts;
+ };
+ 
++
++static int bcm63xx_parse_partitions(struct mtd_info *master,
++				    struct mtd_partition **pparts,
++				    struct mtd_part_parser_data *data)
++{
++	if (data && data->of_node)
++		return bcm63xx_parse_cfe_partitions_of(master, pparts, data);
++	else
++		return bcm63xx_parse_cfe_partitions(master, pparts, data);
++}
++
+ static struct mtd_part_parser bcm63xx_cfe_parser = {
+ 	.owner = THIS_MODULE,
+-	.parse_fn = bcm63xx_parse_cfe_partitions,
++	.parse_fn = bcm63xx_parse_partitions,
+ 	.name = "bcm63xxpart",
+ };
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/426-bcm63xx_enet-fix-napi-poll-return-value.patch b/target/linux/brcm63xx/patches-3.18/426-bcm63xx_enet-fix-napi-poll-return-value.patch
new file mode 100644
index 0000000..af34c23
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/426-bcm63xx_enet-fix-napi-poll-return-value.patch
@@ -0,0 +1,27 @@
+From d150ac8f353cb1ab59288829db006300120c9daf Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 28 Feb 2015 20:23:13 +0100
+Subject: [PATCH] bcm63xx_enet: fix napi poll return value
+
+Commit d75b1ade567ffab ("net: less interrupt masking in NAPI") changed
+the way how napi treated a returnvalue < budget, which causes hangs when
+there there was tx_work_done, but rx_work_done is less than budget.
+
+To fix this, return budget instead of rx_done to ensure repolling.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -508,7 +508,7 @@ static int bcm_enet_poll(struct napi_str
+ 
+ 	if (rx_work_done >= budget || tx_work_done > 0) {
+ 		/* rx/tx queue is not yet empty/clean */
+-		return rx_work_done;
++		return budget;
+ 	}
+ 
+ 	/* no more packet in rx/tx queue, remove device from poll
diff --git a/target/linux/brcm63xx/patches-3.18/427-boards_probe_switch.patch b/target/linux/brcm63xx/patches-3.18/427-boards_probe_switch.patch
new file mode 100644
index 0000000..b813d09
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/427-boards_probe_switch.patch
@@ -0,0 +1,119 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -123,6 +123,8 @@ static struct board_info __initdata boar
+ 	.has_uart0			= 1,
+ 	.has_enet0			= 1,
+ 	.enet0 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -166,6 +168,8 @@ static struct board_info __initdata boar
+ 	.has_uart0			= 1,
+ 	.has_enet0			= 1,
+ 	.enet0 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -277,6 +281,8 @@ static struct board_info __initdata boar
+ 		.use_internal_phy	= 1,
+ 	},
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -339,6 +345,8 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -393,6 +401,8 @@ static struct board_info __initdata boar
+ 		.use_internal_phy	= 1,
+ 	},
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -453,6 +463,8 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -476,6 +488,8 @@ static struct board_info __initdata boar
+ 		.use_internal_phy	= 1,
+ 	},
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -495,6 +509,8 @@ static struct board_info __initdata boar
+ 	.has_enet1			= 1,
+ 	.enet0 = {
+ 		.has_phy		= 1,
++		.phy_id			= 0,
++		.has_phy		= 1,
+ 		.use_internal_phy	= 1,
+ 	},
+ 	.enet1 = {
+@@ -518,6 +534,8 @@ static struct board_info __initdata boar
+ 		.use_internal_phy	= 1,
+ 	},
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -546,6 +564,8 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -599,6 +619,8 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -648,6 +670,8 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -671,6 +695,8 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
diff --git a/target/linux/brcm63xx/patches-3.18/499-allow_better_context_for_board_patches.patch b/target/linux/brcm63xx/patches-3.18/499-allow_better_context_for_board_patches.patch
new file mode 100644
index 0000000..bf51de0
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/499-allow_better_context_for_board_patches.patch
@@ -0,0 +1,56 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -61,7 +61,7 @@ static struct board_info __initdata boar
+ 	.ephy_reset_gpio		= 36,
+ 	.ephy_reset_gpio_flags		= GPIO_ACTIVE_LOW,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_3368 */
+ 
+ /*
+  * known 6328 boards
+@@ -110,7 +110,7 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6328 */
+ 
+ /*
+  * known 6338 boards
+@@ -203,7 +203,7 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6338 */
+ 
+ /*
+  * known 6345 boards
+@@ -215,7 +215,7 @@ static struct board_info __initdata boar
+ 
+ 	.has_uart0			= 1,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6345 */
+ 
+ /*
+  * known 6348 boards
+@@ -542,7 +542,7 @@ static struct board_info __initdata boar
+ 
+ 	.has_ohci0 = 1,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6348 */
+ 
+ /*
+  * known 6358 boards
+@@ -703,7 +703,7 @@ static struct board_info __initdata boar
+ 
+ 	.has_ohci0			= 1,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
+ /*
+  * all boards
diff --git a/target/linux/brcm63xx/patches-3.18/500-board-D4PW.patch b/target/linux/brcm63xx/patches-3.18/500-board-D4PW.patch
new file mode 100644
index 0000000..5a1a785
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/500-board-D4PW.patch
@@ -0,0 +1,41 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -542,6 +542,22 @@ static struct board_info __initdata boar
+ 
+ 	.has_ohci0 = 1,
+ };
++
++static struct board_info __initdata board_96348_D4PW = {
++	.name				= "D-4P-W",
++	.expected_cpu_id		= 0x6348,
++
++	.has_enet1			= 1,
++	.has_pci			= 1,
++	.has_uart0 			= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+ 
+ /*
+@@ -731,6 +747,7 @@ static const struct board_info __initcon
+ 	&board_DV201AMR,
+ 	&board_96348gw_a,
+ 	&board_rta1025w_16,
++	&board_96348_D4PW,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -762,6 +779,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+ 	{ .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
+ 	{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++	{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ 	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ 	{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+ 	{ .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
diff --git a/target/linux/brcm63xx/patches-3.18/501-board-NB4.patch b/target/linux/brcm63xx/patches-3.18/501-board-NB4.patch
new file mode 100644
index 0000000..79d638e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/501-board-NB4.patch
@@ -0,0 +1,83 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -719,6 +719,62 @@ static struct board_info __initdata boar
+ 
+ 	.has_ohci0			= 1,
+ };
++
++static struct board_info __initdata board_nb4_ser_r0 = {
++	.name				= "NB4-SER-r0",
++	.expected_cpu_id		= 0x6358,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++
++	.has_ohci0 = 1,
++	.has_pccard = 1,
++	.has_ehci0 = 1,
++	.num_usbh_ports			= 2,
++};
++
++static struct board_info __initdata board_nb4_fxc_r1 = {
++	.name				= "NB4-FXC-r1",
++	.expected_cpu_id		= 0x6358,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++
++	.has_ohci0 = 1,
++	.has_pccard = 1,
++	.has_ehci0 = 1,
++	.num_usbh_ports			= 2,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
+ /*
+@@ -755,6 +811,8 @@ static const struct board_info __initcon
+ 	&board_96358vw2,
+ 	&board_AGPFS0,
+ 	&board_DWVS0,
++	&board_nb4_ser_r0,
++	&board_nb4_fxc_r1,
+ #endif
+ };
+ 
+@@ -796,6 +854,8 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
++	{ .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, },
++	{ .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ #endif
diff --git a/target/linux/brcm63xx/patches-3.18/502-board-96338W2_E7T.patch b/target/linux/brcm63xx/patches-3.18/502-board-96338W2_E7T.patch
new file mode 100644
index 0000000..f35b76a
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/502-board-96338W2_E7T.patch
@@ -0,0 +1,39 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -203,6 +203,20 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct board_info __initdata board_96338w2_e7t = {
++	.name				= "96338W2_E7T",
++	.expected_cpu_id		= 0x6338,
++
++	.has_enet0			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6338 */
+ 
+ /*
+@@ -790,6 +804,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	&board_96338gw,
+ 	&board_96338w,
++	&board_96338w2_e7t,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	&board_96345gw2,
+@@ -827,6 +842,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+ 	{ .compatible = "brcm,bcm96338w", .data = &board_96338w, },
++	{ .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	{ .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
diff --git a/target/linux/brcm63xx/patches-3.18/503-board-CPVA642.patch b/target/linux/brcm63xx/patches-3.18/503-board-CPVA642.patch
new file mode 100644
index 0000000..a102380
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/503-board-CPVA642.patch
@@ -0,0 +1,45 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -685,6 +685,26 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_CPVA642 = {
++	.name                           = "CPVA642",
++	.expected_cpu_id                = 0x6358,
++
++	.has_uart0			= 1,
++	.has_enet1                      = 1,
++	.has_pci                        = 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100        = 1,
++		.force_duplex_full      = 1,
++ 	},
++
++	.has_ohci0 = 1,
++	.has_ehci0 = 1,
++};
++
++
+ static struct board_info __initdata board_AGPFS0 = {
+ 	.name				= "AGPF-S0",
+ 	.expected_cpu_id		= 0x6358,
+@@ -825,6 +845,7 @@ static const struct board_info __initcon
+ 	&board_96358vw,
+ 	&board_96358vw2,
+ 	&board_AGPFS0,
++	&board_CPVA642,
+ 	&board_DWVS0,
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
+@@ -872,6 +893,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
+ 	{ .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, },
+ 	{ .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, },
++	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ #endif
diff --git a/target/linux/brcm63xx/patches-3.18/504-board_dsl_274xb_rev_c.patch b/target/linux/brcm63xx/patches-3.18/504-board_dsl_274xb_rev_c.patch
new file mode 100644
index 0000000..2cc7266
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/504-board_dsl_274xb_rev_c.patch
@@ -0,0 +1,42 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -754,6 +754,23 @@ static struct board_info __initdata boar
+ 	.has_ohci0			= 1,
+ };
+ 
++/* D-Link DSL-274xB revison C2/C3 */
++static struct board_info __initdata board_dsl_274xb_rev_c = {
++	.name				= "AW4139",
++	.expected_cpu_id		= 0x6358,
++
++	.has_uart0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
++
+ static struct board_info __initdata board_nb4_ser_r0 = {
+ 	.name				= "NB4-SER-r0",
+ 	.expected_cpu_id		= 0x6358,
+@@ -847,6 +864,7 @@ static const struct board_info __initcon
+ 	&board_AGPFS0,
+ 	&board_CPVA642,
+ 	&board_DWVS0,
++	&board_dsl_274xb_rev_c,
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
+ #endif
+@@ -886,6 +904,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
+ 	{ .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
+ 	{ .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
++	{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ 	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ 	{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
diff --git a/target/linux/brcm63xx/patches-3.18/505-board_spw500v.patch b/target/linux/brcm63xx/patches-3.18/505-board_spw500v.patch
new file mode 100644
index 0000000..bbc7f64
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/505-board_spw500v.patch
@@ -0,0 +1,64 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -572,6 +572,45 @@ static struct board_info __initdata boar
+ 		.force_duplex_full	= 1,
+ 	},
+ };
++
++static struct sprom_fixup __initdata spw500v_fixups[] = {
++	{ .offset = 46, .value = 0x3046 },
++	{ .offset = 47, .value = 0x15a7 },
++	{ .offset = 48, .value = 0xfa89 },
++	{ .offset = 49, .value = 0xfe79 },
++	{ .offset = 57, .value = 0x6a49 },
++};
++
++static struct board_info __initdata board_spw500v = {
++	.name				= "SPW500V",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++
++	.has_dsp			= 1,
++	.dsp = {
++		.gpio_rst		= 6,
++		.gpio_int		= 34,
++		.ext_irq		= 2,
++		.cs			= 2,
++	},
++
++	.fallback_sprom = {
++		.type			= SPROM_BCM4318,
++		.pci_bus		= 0,
++		.pci_dev		= 1,
++		.board_fixups		= spw500v_fixups,
++		.num_board_fixups	= ARRAY_SIZE(spw500v_fixups),
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+ 
+ /*
+@@ -856,6 +895,7 @@ static const struct board_info __initcon
+ 	&board_96348gw_a,
+ 	&board_rta1025w_16,
+ 	&board_96348_D4PW,
++	&board_spw500v,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -897,6 +937,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+ 	{ .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
+ 	{ .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
++	{ .compatible = "t-com,spw500v", .data = &board_spw500v, },
+ 	{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ 	{ .compatible = "usr,9108", .data = &board_96348gw_a, },
+ #endif
diff --git a/target/linux/brcm63xx/patches-3.18/506-board_gw6200_gw6000.patch b/target/linux/brcm63xx/patches-3.18/506-board_gw6200_gw6000.patch
new file mode 100644
index 0000000..6fc29df
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/506-board_gw6200_gw6000.patch
@@ -0,0 +1,87 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -461,6 +461,66 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_gw6200 = {
++	.name				= "GW6200",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++	.enet1 = {
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.has_ohci0 = 1,
++
++	.has_dsp			= 1,
++		.dsp = {
++		.gpio_rst		= 8, /* FIXME: What is real GPIO here? */
++		.gpio_int		= 34,
++		.ext_irq		= 2,
++		.cs			= 2,
++	},
++};
++
++static struct board_info __initdata board_gw6000 = {
++	.name				= "GW6000",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++	.enet1 = {
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.has_ohci0 = 1,
++
++	.has_dsp			= 1,
++	.dsp = {
++		.gpio_rst		= 6,
++		.gpio_int		= 34,
++		.ext_irq		= 2,
++		.cs			= 2,
++	},
++};
++
++
++
+ static struct board_info __initdata board_FAST2404 = {
+ 	.name				= "F@ST2404",
+ 	.expected_cpu_id		= 0x6348,
+@@ -888,6 +948,8 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ 	&board_96348r,
+ 	&board_96348gw,
++	&board_gw6000,
++	&board_gw6200,
+ 	&board_96348gw_10,
+ 	&board_96348gw_11,
+ 	&board_FAST2404,
+@@ -938,6 +1000,8 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
+ 	{ .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
+ 	{ .compatible = "t-com,spw500v", .data = &board_spw500v, },
++	{ .compatible = "tecom,gw6000", .data = &board_gw6000, },
++	{ .compatible = "tecom,gw6200", .data = &board_gw6200, },
+ 	{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ 	{ .compatible = "usr,9108", .data = &board_96348gw_a, },
+ #endif
diff --git a/target/linux/brcm63xx/patches-3.18/507-board-MAGIC.patch b/target/linux/brcm63xx/patches-3.18/507-board-MAGIC.patch
new file mode 100644
index 0000000..cc4f6c2
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/507-board-MAGIC.patch
@@ -0,0 +1,59 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -671,6 +671,40 @@ static struct board_info __initdata boar
+ 		.num_board_fixups	= ARRAY_SIZE(spw500v_fixups),
+ 	},
+ };
++
++static struct board_info __initdata board_96348sv = {
++	.name				= "MAGIC",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++	.enet1 = {
++		/* it has BP_ENET_EXTERNAL_PHY */
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.has_ohci0			= 1,
++	.has_pccard			= 1,
++	.has_ehci0			= 1,
++
++	.has_dsp			= 1,
++	.dsp = {
++		.gpio_rst		= 25,
++		.gpio_int		= 34,
++		.cs			= 2,
++		.ext_irq		= 2,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+ 
+ /*
+@@ -958,6 +992,7 @@ static const struct board_info __initcon
+ 	&board_rta1025w_16,
+ 	&board_96348_D4PW,
+ 	&board_spw500v,
++	&board_96348sv,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1002,6 +1037,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "t-com,spw500v", .data = &board_spw500v, },
+ 	{ .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ 	{ .compatible = "tecom,gw6200", .data = &board_gw6200, },
++	{ .compatible = "telsey,magic", .data = &board_96348sv, },
+ 	{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ 	{ .compatible = "usr,9108", .data = &board_96348gw_a, },
+ #endif
diff --git a/target/linux/brcm63xx/patches-3.18/508-board_hw553.patch b/target/linux/brcm63xx/patches-3.18/508-board_hw553.patch
new file mode 100644
index 0000000..2d71bab
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/508-board_hw553.patch
@@ -0,0 +1,53 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -959,6 +959,34 @@ static struct board_info __initdata boar
+ 	.has_ehci0 = 1,
+ 	.num_usbh_ports			= 2,
+ };
++
++static struct board_info __initdata board_HW553 = {
++	.name                           = "HW553",
++	.expected_cpu_id                = 0x6358,
++
++	.has_uart0			= 1,
++
++	.has_enet1                      = 1,
++	.has_pci                        = 1,
++	.use_fallback_sprom		= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100        = 1,
++		.force_duplex_full      = 1,
++	},
++
++	.has_ohci0 = 1,
++	.has_ehci0 = 1,
++	.num_usbh_ports			= 2,
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM4318,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
+ /*
+@@ -1004,6 +1032,7 @@ static const struct board_info __initcon
+ 	&board_dsl_274xb_rev_c,
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
++	&board_HW553,
+ #endif
+ };
+ 
+@@ -1047,6 +1076,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
+ 	{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ 	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
++	{ .compatible = "huawei,hg553", .data = &board_HW553, },
+ 	{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
diff --git a/target/linux/brcm63xx/patches-3.18/509-board_rta1320_16m.patch b/target/linux/brcm63xx/patches-3.18/509-board_rta1320_16m.patch
new file mode 100644
index 0000000..ced00bd
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/509-board_rta1320_16m.patch
@@ -0,0 +1,40 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -217,6 +217,21 @@ static struct board_info __initdata boar
+ 		.force_duplex_full	= 1,
+ 	},
+ };
++
++static struct board_info __initdata board_rta1320_16m = {
++	.name				= "RTA1320_16M",
++	.expected_cpu_id		= 0x6338,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6338 */
+ 
+ /*
+@@ -1003,6 +1018,7 @@ static const struct board_info __initcon
+ 	&board_96338gw,
+ 	&board_96338w,
+ 	&board_96338w2_e7t,
++	&board_rta1320_16m,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	&board_96345gw2,
+@@ -1047,6 +1063,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+ 	{ .compatible = "brcm,bcm96338w", .data = &board_96338w, },
++	{ .compatible = "dynalink,rta1320", .data = &board_rta1320_16m, },
+ 	{ .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
diff --git a/target/linux/brcm63xx/patches-3.18/510-board_spw303v.patch b/target/linux/brcm63xx/patches-3.18/510-board_spw303v.patch
new file mode 100644
index 0000000..f903bfc
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/510-board_spw303v.patch
@@ -0,0 +1,40 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1002,6 +1002,21 @@ static struct board_info __initdata boar
+ 		.pci_dev			= 1,
+ 	},
+ };
++
++ /* T-Home Speedport W 303V Typ B */
++static struct board_info __initdata board_spw303v = {
++	.name			= "96358-502V",
++	.expected_cpu_id	= 0x6358,
++
++	.has_uart0		= 1,
++	.has_enet0		= 1,
++	.has_pci		= 1,
++
++	.enet0 = {
++		.has_phy 		= 1,
++		.use_internal_phy 	= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
+ /*
+@@ -1049,6 +1064,7 @@ static const struct board_info __initcon
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
+ 	&board_HW553,
++	&board_spw303v,
+ #endif
+ };
+ 
+@@ -1100,6 +1116,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
+ 	{ .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, },
+ 	{ .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, },
++	{ .compatible = "t-com,spw303v", .data = &board_spw303v, },
+ 	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
diff --git a/target/linux/brcm63xx/patches-3.18/511-board_V2500V.patch b/target/linux/brcm63xx/patches-3.18/511-board_V2500V.patch
new file mode 100644
index 0000000..5b7c789
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/511-board_V2500V.patch
@@ -0,0 +1,93 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -720,6 +720,27 @@ static struct board_info __initdata boar
+ 		.ext_irq		= 2,
+ 	},
+ };
++
++static struct board_info __initdata board_V2500V_BB = {
++	.name				= "V2500V_BB",
++        .expected_cpu_id                = 0x6348,
++
++        .has_uart0                      = 1,
++        .has_enet0                      = 1,
++        .has_enet1                      = 1,
++        .has_pci                        = 1,
++
++        .enet0 = {
++                .has_phy                = 1,
++                .use_internal_phy       = 1,
++        },
++        .enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++                .force_speed_100        = 1,
++                .force_duplex_full      = 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+ 
+ /*
+@@ -1052,6 +1073,7 @@ static const struct board_info __initcon
+ 	&board_96348_D4PW,
+ 	&board_spw500v,
+ 	&board_96348sv,
++	&board_V2500V_BB,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1091,6 +1113,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+ 	{ .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
+ 	{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++	{ .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
+ 	{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ 	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ 	{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+@@ -1150,6 +1173,22 @@ void __init board_bcm963xx_init(void)
+ 		val &= MPI_CSBASE_BASE_MASK;
+ 	}
+ 	boot_addr = (u8 *)KSEG1ADDR(val);
++	printk(KERN_INFO PFX "Boot address 0x%08x\n",(unsigned int)boot_addr);
++
++	/* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */
++	/* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/
++	/* Loading firmware from the CFE Prompt always loads to Bank 0 */
++	/* Do an early check of CFE and then select bank 0 */
++
++	if (boot_addr == (u8 *)0xbf800000) {
++		u8 *tmp_boot_addr = (u8*)0xbfc00000;
++
++		bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET);
++		if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) {
++			printk(KERN_INFO PFX "V2500V: nvram bank 0\n");
++			boot_addr = tmp_boot_addr;
++		}
++	}
+ 
+ 	/* dump cfe version */
+ 	cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -20,6 +20,7 @@
+ #include <linux/spi/spi.h>
+ #include <linux/spi/flash.h>
+ 
++#include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
+ #include <bcm63xx_dev_hsspi.h>
+@@ -234,6 +235,13 @@ int __init bcm63xx_flash_register(int nu
+ 			val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+ 			val &= MPI_CSBASE_BASE_MASK;
+ 
++			/* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
++			/* Loading from CFE always uses Bank 0 */
++			if (!strcmp(board_get_name(), "V2500V_BB")) {
++				pr_info("V2500V: Start in Bank 0\n");
++				val = val + 0x400000; // Select Bank 0 start address
++			}
++
+ 			mtd_resources[0].start = val;
+ 			mtd_resources[0].end = 0x1FFFFFFF;
+ 		}
diff --git a/target/linux/brcm63xx/patches-3.18/512-board_BTV2110.patch b/target/linux/brcm63xx/patches-3.18/512-board_BTV2110.patch
new file mode 100644
index 0000000..1e1e856
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/512-board_BTV2110.patch
@@ -0,0 +1,44 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -415,6 +415,25 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++
++/* BT Voyager 2110 */
++static struct board_info __initdata board_V2110 = {
++	.name				= "V2110",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
++
++
+ static struct board_info __initdata board_96348gw = {
+ 	.name				= "96348GW",
+ 	.expected_cpu_id		= 0x6348,
+@@ -1074,6 +1093,7 @@ static const struct board_info __initcon
+ 	&board_spw500v,
+ 	&board_96348sv,
+ 	&board_V2500V_BB,
++	&board_V2110,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1113,6 +1133,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+ 	{ .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
+ 	{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++	{ .compatible = "bt,v2110", .data = &board_V2110, },
+ 	{ .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
+ 	{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ 	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
diff --git a/target/linux/brcm63xx/patches-3.18/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch b/target/linux/brcm63xx/patches-3.18/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch
new file mode 100644
index 0000000..3842f7b
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch
@@ -0,0 +1,224 @@
+From e796582b499f0ba6acaa1ac3a10c09cceaab7702 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 04:55:52 +0100
+Subject: [PATCH] MIPS: BCM63XX: add inventel Livebox support
+
+---
+ arch/mips/bcm63xx/boards/Kconfig         |    6 +
+ arch/mips/bcm63xx/boards/Makefile        |    1 +
+ arch/mips/bcm63xx/boards/board_common.c  |    2 +-
+ arch/mips/bcm63xx/boards/board_common.h  |    6 +
+ arch/mips/bcm63xx/boards/board_livebox.c |  215 ++++++++++++++++++++++++++++++
+ 5 files changed, 229 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/boards/board_livebox.c
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -12,4 +12,10 @@ config BOARD_BCM963XX
+ 	default y
+        help
+ 
++config BOARD_LIVEBOX
++	bool "Inventel Livebox(es) boards"
++	select SSB
++	help
++	  Inventel Livebox boards using the RedBoot bootloader.
++
+ endmenu
+--- a/arch/mips/bcm63xx/boards/Makefile
++++ b/arch/mips/bcm63xx/boards/Makefile
+@@ -1,2 +1,3 @@
+ obj-y					+= board_common.o
+ obj-$(CONFIG_BOARD_BCM963XX)		+= board_bcm963xx.o
++obj-$(CONFIG_BOARD_LIVEBOX)		+= board_livebox.o
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -61,7 +61,7 @@ void __init board_prom_init(void)
+ 	if (fw_arg3 == CFE_EPTSEAL)
+ 		board_bcm963xx_init();
+ 	else
+-		panic("unsupported bootloader detected");
++		board_livebox_init();
+ }
+ 
+ static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -24,4 +24,10 @@ static inline void board_of_device_prese
+ }
+ #endif
+ 
++#if defined(CONFIG_BOARD_LIVEBOX)
++void board_livebox_init(void);
++#else
++static inline void board_livebox_init(void) { }
++#endif
++
+ #endif /* __BOARD_COMMON_H */
+--- /dev/null
++++ b/arch/mips/bcm63xx/boards/board_livebox.c
+@@ -0,0 +1,164 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/input.h>
++#include <asm/addrspace.h>
++#include <bcm63xx_board.h>
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_dev_flash.h>
++#include <board_bcm963xx.h>
++
++#include "board_common.h"
++
++#define PFX	"board_livebox: "
++
++static unsigned int mac_addr_used = 0;
++
++/*
++ * known 6348 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6348
++static struct board_info __initdata board_livebox_blue5g = {
++	.name				= "Livebox-blue-5g",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++
++	.enet1 = {
++		  .has_phy		= 1,
++		  .phy_id 		= 31,
++	},
++
++	.ephy_reset_gpio		= 6,
++	.ephy_reset_gpio_flags		= GPIO_ACTIVE_LOW,
++
++	.has_ohci0			= 1,
++	.has_pccard			= 1,
++
++	.has_dsp			= 0, /*TODO some Liveboxes have dsp*/
++	.dsp = {
++		.gpio_rst		= 6,
++		.gpio_int		= 35,
++		.cs			= 2,
++		.ext_irq		= 2,
++	},
++};
++#endif
++
++/*
++ * all boards
++ */
++static const struct board_info __initdata *bcm963xx_boards[] = {
++#ifdef CONFIG_BCM63XX_CPU_6348
++	&board_livebox_blue5g
++#endif
++};
++
++static struct of_device_id const livebox_boards_dt[] = {
++	{ .compatible = "inventel,livebox-blue-5g", .data = &board_livebox_blue5g, },
++	{ }
++};
++
++/*
++ * register & return a new board mac address
++ */
++static int livebox_get_mac_address(u8 *mac)
++{
++	u8 *p;
++	int count;
++
++	memcpy(mac, (u8 *)0xBEBFF377, ETH_ALEN);
++
++	p = mac + ETH_ALEN - 1;
++	count = mac_addr_used;
++
++	while (count--) {
++		do {
++			(*p)++;
++			if (*p != 0)
++				break;
++			p--;
++		} while (p != mac);
++	}
++
++	if (p == mac) {
++		printk(KERN_ERR PFX "unable to fetch mac address\n");
++		return -ENODEV;
++	}
++        mac_addr_used++;
++
++	return 0;
++}
++
++/*
++ * early init callback
++ */
++#define LIVEBOX_GPIO_DETECT_MASK	0x000000ff
++#define LIVEBOX_BOOT_ADDR		0x1e400000
++
++#define LIVEBOX_HW_BLUE5G_9		0x90
++
++void __init board_livebox_init(void)
++{
++	u32 val;
++	u8 hw_version;
++	const struct board_info *board;
++	const struct of_device_id *board_match;
++
++	/* find board by compat */
++	board_match = bcm63xx_match_board(livebox_boards_dt);
++	if (board_match) {
++		board = board_match->data;
++	} else {
++		/* Get hardware version */
++		val = bcm_gpio_readl(GPIO_CTL_LO_REG);
++		val &= ~LIVEBOX_GPIO_DETECT_MASK;
++		bcm_gpio_writel(val, GPIO_CTL_LO_REG);
++
++		hw_version = bcm_gpio_readl(GPIO_DATA_LO_REG);
++		hw_version &= LIVEBOX_GPIO_DETECT_MASK;
++
++		switch (hw_version) {
++		case LIVEBOX_HW_BLUE5G_9:
++			printk(KERN_INFO PFX "Livebox BLUE5G.9\n");
++			board = bcm963xx_boards[0];
++			break;
++		default:
++			printk(KERN_INFO PFX "Unknown livebox version: %02x\n",
++			       hw_version);
++			/* use default livebox configuration */
++			board = bcm963xx_boards[0];
++			break;
++		}
++	}
++
++	/* use default livebox configuration */
++	board_early_setup(board, livebox_get_mac_address);
++
++	/* read base address of boot chip select (0) */
++	val = bcm_mpi_readl(MPI_CSBASE_REG(0));
++	val &= MPI_CSBASE_BASE_MASK;
++	if (val != LIVEBOX_BOOT_ADDR) {
++		printk(KERN_NOTICE PFX "flash address is: 0x%08x, forcing to: 0x%08x\n",
++			val, LIVEBOX_BOOT_ADDR);
++		bcm63xx_flash_force_phys_base_address(LIVEBOX_BOOT_ADDR, 0x1ebfffff);
++	}
++}
diff --git a/target/linux/brcm63xx/patches-3.18/514-board_ct536_ct5621.patch b/target/linux/brcm63xx/patches-3.18/514-board_ct536_ct5621.patch
new file mode 100644
index 0000000..45c71ae
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/514-board_ct536_ct5621.patch
@@ -0,0 +1,54 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -434,6 +434,34 @@ static struct board_info __initdata boar
+ };
+ 
+ 
++static struct board_info __initdata board_ct536_ct5621 = {
++	.name				= "CT536_CT5621",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 0,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.has_ohci0 = 1,
++	.has_pccard = 1,
++	.has_ehci0 = 1,
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM4318,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++	},
++};
++
+ static struct board_info __initdata board_96348gw = {
+ 	.name				= "96348GW",
+ 	.expected_cpu_id		= 0x6348,
+@@ -1094,6 +1122,7 @@ static const struct board_info __initcon
+ 	&board_96348sv,
+ 	&board_V2500V_BB,
+ 	&board_V2110,
++	&board_ct536_ct5621,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1135,6 +1164,8 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
+ 	{ .compatible = "bt,v2110", .data = &board_V2110, },
+ 	{ .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
++	{ .compatible = "comtrend,ct-536+", .data = &board_ct536_ct5621, },
++	{ .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
+ 	{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ 	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ 	{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
diff --git a/target/linux/brcm63xx/patches-3.18/515-board_DWV-S0_fixes.patch b/target/linux/brcm63xx/patches-3.18/515-board_DWV-S0_fixes.patch
new file mode 100644
index 0000000..9ed5eab
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/515-board_DWV-S0_fixes.patch
@@ -0,0 +1,19 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -950,6 +950,8 @@ static struct board_info __initdata boar
+ 	.name				= "DWV-S0",
+ 	.expected_cpu_id		= 0x6358,
+ 
++	.has_uart0			= 1,
++
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
+@@ -968,6 +970,7 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.has_ohci0			= 1,
++	.has_ehci0			= 1,
+ };
+ 
+ /* D-Link DSL-274xB revison C2/C3 */
diff --git a/target/linux/brcm63xx/patches-3.18/516-board_96348A-122.patch b/target/linux/brcm63xx/patches-3.18/516-board_96348A-122.patch
new file mode 100644
index 0000000..0df9bbb
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/516-board_96348A-122.patch
@@ -0,0 +1,50 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -462,6 +462,31 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_96348A_122 = {
++	.name				= "96348A-122",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.has_ohci0 = 1,
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM4318,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++	},
++};
++
+ static struct board_info __initdata board_96348gw = {
+ 	.name				= "96348GW",
+ 	.expected_cpu_id		= 0x6348,
+@@ -1126,6 +1151,7 @@ static const struct board_info __initcon
+ 	&board_V2500V_BB,
+ 	&board_V2110,
+ 	&board_ct536_ct5621,
++	&board_96348A_122,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1168,6 +1194,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "bt,v2110", .data = &board_V2110, },
+ 	{ .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
+ 	{ .compatible = "comtrend,ct-536+", .data = &board_ct536_ct5621, },
++	{ .compatible = "comtrend,ct-5365", .data = &board_96348A_122, },
+ 	{ .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
+ 	{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ 	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
diff --git a/target/linux/brcm63xx/patches-3.18/517-RTA1205W_16_uart_fixes.patch b/target/linux/brcm63xx/patches-3.18/517-RTA1205W_16_uart_fixes.patch
new file mode 100644
index 0000000..5233fae
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/517-RTA1205W_16_uart_fixes.patch
@@ -0,0 +1,10 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -639,6 +639,7 @@ static struct board_info __initdata boar
+ 	.name				= "RTA1025W_16",
+ 	.expected_cpu_id		= 0x6348,
+ 
++	.has_uart0			= 1,
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
diff --git a/target/linux/brcm63xx/patches-3.18/519_board_CPVA502plus.patch b/target/linux/brcm63xx/patches-3.18/519_board_CPVA502plus.patch
new file mode 100644
index 0000000..f2e4324
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/519_board_CPVA502plus.patch
@@ -0,0 +1,46 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -433,6 +433,27 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_CPVA502plus = {
++	.name				= "CPVA502+",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++	},
++
++	.ephy_reset_gpio		= 4,
++	.ephy_reset_gpio_flags		= GPIO_ACTIVE_LOW,
++};
+ 
+ static struct board_info __initdata board_ct536_ct5621 = {
+ 	.name				= "CT536_CT5621",
+@@ -1153,6 +1174,7 @@ static const struct board_info __initcon
+ 	&board_V2110,
+ 	&board_ct536_ct5621,
+ 	&board_96348A_122,
++	&board_CPVA502plus,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1205,6 +1227,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "t-com,spw500v", .data = &board_spw500v, },
+ 	{ .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ 	{ .compatible = "tecom,gw6200", .data = &board_gw6200, },
++	{ .compatible = "telsey,cpva502+", .data = &board_CPVA502plus, },
+ 	{ .compatible = "telsey,magic", .data = &board_96348sv, },
+ 	{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ 	{ .compatible = "usr,9108", .data = &board_96348gw_a, },
diff --git a/target/linux/brcm63xx/patches-3.18/520-bcm63xx-add-support-for-96368MVWG-board.patch b/target/linux/brcm63xx/patches-3.18/520-bcm63xx-add-support-for-96368MVWG-board.patch
new file mode 100644
index 0000000..d7543fc
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/520-bcm63xx-add-support-for-96368MVWG-board.patch
@@ -0,0 +1,119 @@
+From eeacc2529942051504bc957726aa178671344421 Mon Sep 17 00:00:00 2001
+From: Maxime Bizon <mbizon@freebox.fr>
+Date: Wed, 20 Jan 2010 16:21:30 +0100
+Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board.
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c          |   95 ++++++++++++++++++++
+ .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h |    2 +
+ 2 files changed, 97 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1138,6 +1138,59 @@ static struct board_info __initdata boar
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
+ /*
++ * known 6368 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6368
++static struct board_info __initdata board_96368mvwg = {
++	.name				= "96368MVWG",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++
++	.has_usbd			= 1,
++
++	.usbd = {
++		.use_fullspeed		= 0,
++		.port_no		= 0,
++	},
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "port1",
++			},
++
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "port2",
++			},
++
++			[4] = {
++				.used	= 1,
++				.phy_id	= 0x12,
++				.name	= "port0",
++			},
++
++			[5] = {
++				.used	= 1,
++				.phy_id	= 0x11,
++				.name	= "port3",
++			},
++		},
++	},
++
++	.has_ohci0 = 1,
++	.has_ehci0 = 1,
++};
++#endif /* CONFIG_BCM63XX_CPU_6368 */
++
++/*
+  * all boards
+  */
+ static const struct board_info __initconst *bcm963xx_boards[] = {
+@@ -1189,6 +1242,10 @@ static const struct board_info __initcon
+ 	&board_HW553,
+ 	&board_spw303v,
+ #endif
++
++#ifdef CONFIG_BCM63XX_CPU_6368
++	&board_96368mvwg,
++#endif
+ };
+ 
+ static struct of_device_id const bcm963xx_boards_dt[] = {
+@@ -1249,6 +1306,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
++	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ #endif
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -88,12 +88,25 @@ void __init board_early_setup(const stru
+ 		bcm63xx_pci_enabled = 1;
+ 		if (BCMCPU_IS_6348())
+ 			val |= GPIO_MODE_6348_G2_PCI;
++
++		if (BCMCPU_IS_6368())
++			val |= GPIO_MODE_6368_PCI_REQ1 |
++				GPIO_MODE_6368_PCI_GNT1 |
++				GPIO_MODE_6368_PCI_INTB |
++				GPIO_MODE_6368_PCI_REQ0 |
++				GPIO_MODE_6368_PCI_GNT0;
+ 	}
+ #endif
+ 
+ 	if (board.has_pccard) {
+ 		if (BCMCPU_IS_6348())
+ 			val |= GPIO_MODE_6348_G1_MII_PCCARD;
++
++		if (BCMCPU_IS_6368())
++			val |= GPIO_MODE_6368_PCMCIA_CD1 |
++				GPIO_MODE_6368_PCMCIA_CD2 |
++				GPIO_MODE_6368_PCMCIA_VS1 |
++				GPIO_MODE_6368_PCMCIA_VS2;
+ 	}
+ 
+ 	if (board.has_enet0 && !board.enet0.use_internal_phy) {
diff --git a/target/linux/brcm63xx/patches-3.18/521-bcm63xx-add-support-for-96368MVNgr-board.patch b/target/linux/brcm63xx/patches-3.18/521-bcm63xx-add-support-for-96368MVNgr-board.patch
new file mode 100644
index 0000000..6ec6cf3
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/521-bcm63xx-add-support-for-96368MVNgr-board.patch
@@ -0,0 +1,74 @@
+From f457fc2eb9bb915b5a4d251c7c68d4694cf07b01 Mon Sep 17 00:00:00 2001
+From: Maxime Bizon <mbizon@freebox.fr>
+Date: Fri, 4 Nov 2011 12:33:48 +0100
+Subject: [PATCH 33/63] bcm63xx: add support for 96368MVNgr board.
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |   67 +++++++++++++++++++++++++++++
+ 1 files changed, 67 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1188,6 +1188,46 @@ static struct board_info __initdata boar
+ 	.has_ohci0 = 1,
+ 	.has_ehci0 = 1,
+ };
++
++static struct board_info __initdata board_96368mvngr = {
++	.name				= "96368MVNgr",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "port1",
++			},
++
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "port2",
++			},
++
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "port3",
++			},
++
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "port4",
++			},
++		},
++	},
++
++	.has_ohci0 = 1,
++	.has_ehci0 = 1,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6368 */
+ 
+ /*
+@@ -1245,6 +1285,7 @@ static const struct board_info __initcon
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	&board_96368mvwg,
++	&board_96368mvngr,
+ #endif
+ };
+ 
+@@ -1306,6 +1347,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
++	{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
diff --git a/target/linux/brcm63xx/patches-3.18/522-MIPS-BCM63XX-add-96328avng-reference-board.patch b/target/linux/brcm63xx/patches-3.18/522-MIPS-BCM63XX-add-96328avng-reference-board.patch
new file mode 100644
index 0000000..5ca3954
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/522-MIPS-BCM63XX-add-96328avng-reference-board.patch
@@ -0,0 +1,45 @@
+From c93c2bbf0cc96da5a47d77f01daf6c983cfe4216 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 29 May 2012 10:52:25 +0200
+Subject: [PATCH] MIPS: BCM63XX: add 96328avng reference board
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |   77 +++++++++++++++++++++++++++++
+ 1 files changed, 77 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -109,6 +109,33 @@ static struct board_info __initdata boar
+ 			.active_low	= 1,
+ 		},
+ 	},
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
+ };
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch b/target/linux/brcm63xx/patches-3.18/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch
new file mode 100644
index 0000000..b01a0d4
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch
@@ -0,0 +1,69 @@
+From f0649f7b7c672cf452a1796a1422bf615e1973f8 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 29 May 2012 11:01:12 +0200
+Subject: [PATCH] MIPS: BCM63XX: add 963281TAN reference board
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |   71 +++++++++++++++++++++++++++++
+ 1 files changed, 71 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -137,6 +137,41 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct board_info __initdata board_963281TAN = {
++	.name				= "963281TAN",
++	.expected_cpu_id		= 0x6328,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+ 
+ /*
+@@ -1266,6 +1301,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
++	&board_963281TAN,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	&board_96338gw,
+@@ -1322,6 +1358,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
++	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
+ 	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
diff --git a/target/linux/brcm63xx/patches-3.18/524-board_dsl_274xb_rev_f.patch b/target/linux/brcm63xx/patches-3.18/524-board_dsl_274xb_rev_f.patch
new file mode 100644
index 0000000..0d61f97
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/524-board_dsl_274xb_rev_f.patch
@@ -0,0 +1,80 @@
+From 66808f706b3dcd83a9f5157997ff478a880a2906 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Mon, 30 Apr 2012 09:10:51 +0200
+Subject: [PATCH 70/79] MIPS: BCM63XX: Add board definition for D-Link
+ DSL-274xB rev F1
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |  104 +++++++++++++++++++++++++++++
+ 1 files changed, 104 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -172,6 +172,51 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct board_info __initdata board_dsl_274xb_f1 = {
++	.name				= "AW4339U",
++	.expected_cpu_id		= 0x6328,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++
++	.has_caldata			= 1,
++	.caldata = {
++		{
++			.vendor		= PCI_VENDOR_ID_ATHEROS,
++			.caldata_offset	= 0x7d1000,
++			.slot		= 0,
++			.led_pin	= -1,
++		},
++	},
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 4",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 3",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 2",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 1",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+ 
+ /*
+@@ -1302,6 +1347,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
+ 	&board_963281TAN,
++	&board_dsl_274xb_f1,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	&board_96338gw,
+@@ -1360,6 +1406,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
+ 	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++	{ .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
diff --git a/target/linux/brcm63xx/patches-3.18/525-board_96348w3.patch b/target/linux/brcm63xx/patches-3.18/525-board_96348w3.patch
new file mode 100644
index 0000000..8c83433
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/525-board_96348w3.patch
@@ -0,0 +1,44 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -833,6 +833,25 @@ static struct board_info __initdata boar
+ 	.has_ohci0 = 1,
+ };
+ 
++/* NetGear DG834G v4 */
++static struct board_info __initdata board_96348W3 = {
++ 	.name	 			= "96348W3",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0	 		= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.has_ohci0	 		= 1,
++};
++
+ static struct board_info __initdata board_96348_D4PW = {
+ 	.name				= "D-4P-W",
+ 	.expected_cpu_id		= 0x6348,
+@@ -1377,6 +1396,7 @@ static const struct board_info __initcon
+ 	&board_ct536_ct5621,
+ 	&board_96348A_122,
+ 	&board_CPVA502plus,
++	&board_96348W3,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1432,6 +1452,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ 	{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+ 	{ .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
++ 	{ .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
+ 	{ .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
+ 	{ .compatible = "t-com,spw500v", .data = &board_spw500v, },
+ 	{ .compatible = "tecom,gw6000", .data = &board_gw6000, },
diff --git a/target/linux/brcm63xx/patches-3.18/526-board_CT6373-1.patch b/target/linux/brcm63xx/patches-3.18/526-board_CT6373-1.patch
new file mode 100644
index 0000000..3bd7eca
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/526-board_CT6373-1.patch
@@ -0,0 +1,50 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1219,6 +1219,31 @@ static struct board_info __initdata boar
+ 	.num_usbh_ports			= 2,
+ };
+ 
++static struct board_info __initdata board_ct6373_1 = {
++	.name				= "CT6373-1",
++	.expected_cpu_id	= 0x6358,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++
++	.has_enet1			= 1,
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM4318,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++	},
++};
++
+ static struct board_info __initdata board_HW553 = {
+ 	.name                           = "HW553",
+ 	.expected_cpu_id                = 0x6358,
+@@ -1408,6 +1433,7 @@ static const struct board_info __initcon
+ 	&board_dsl_274xb_rev_c,
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
++	&board_ct6373_1,
+ 	&board_HW553,
+ 	&board_spw303v,
+ #endif
+@@ -1466,6 +1492,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
+ 	{ .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
+ 	{ .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
++	{ .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
+ 	{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ 	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ 	{ .compatible = "huawei,hg553", .data = &board_HW553, },
diff --git a/target/linux/brcm63xx/patches-3.18/527-board_dva-g3810bn-tl-1.patch b/target/linux/brcm63xx/patches-3.18/527-board_dva-g3810bn-tl-1.patch
new file mode 100644
index 0000000..792f504
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/527-board_dva-g3810bn-tl-1.patch
@@ -0,0 +1,55 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1286,6 +1286,36 @@ static struct board_info __initdata boar
+ 		.use_internal_phy 	= 1,
+ 	},
+ };
++
++/* D-Link DVA-G3810BN/TL */
++static struct board_info __initdata board_DVAG3810BN = {
++	.name			= "DVAG3810BN",
++	.expected_cpu_id	= 0x6358,
++
++	.has_uart0		= 1,
++	.has_enet0		= 1,
++	.has_enet1		= 1,
++	.has_pci		= 1,
++
++	.enet0 = {
++		.has_phy		= 0,
++		.use_internal_phy	= 1,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++
++	.has_ohci0		= 1,
++	.has_pccard		= 1,
++	.has_ehci0		= 1,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
+ /*
+@@ -1436,6 +1466,7 @@ static const struct board_info __initcon
+ 	&board_ct6373_1,
+ 	&board_HW553,
+ 	&board_spw303v,
++	&board_DVAG3810BN,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6368
+@@ -1495,6 +1526,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
+ 	{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ 	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
++	{ .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, },
+ 	{ .compatible = "huawei,hg553", .data = &board_HW553, },
+ 	{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
diff --git a/target/linux/brcm63xx/patches-3.18/528-board_nb6.patch b/target/linux/brcm63xx/patches-3.18/528-board_nb6.patch
new file mode 100644
index 0000000..173c2d2
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/528-board_nb6.patch
@@ -0,0 +1,112 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -12,6 +12,8 @@
+ #include <linux/string.h>
+ #include <linux/gpio_keys.h>
+ #include <linux/input.h>
++#include <linux/platform_device.h>
++#include <linux/rtl8367.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -31,6 +33,9 @@
+ #define BCM963XX_KEYS_POLL_INTERVAL	20
+ #define BCM963XX_KEYS_DEBOUNCE_INTERVAL	(BCM963XX_KEYS_POLL_INTERVAL * 3)
+ 
++#define NB6_GPIO_RTL8367_SDA	18
++#define NB6_GPIO_RTL8367_SCK	20
++
+ /*
+  * known 3368 boards
+  */
+@@ -1318,6 +1323,69 @@ static struct board_info __initdata boar
+ };
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
++#ifdef CONFIG_BCM63XX_CPU_6362
++static struct rtl8367_extif_config nb6_rtl8367_extif0_cfg = {
++	.mode = RTL8367_EXTIF_MODE_RGMII,
++	.txdelay = 1,
++	.rxdelay = 5,
++	.ability = {
++		.force_mode = 1,
++		.txpause = 1,
++		.rxpause = 1,
++		.link = 1,
++		.duplex = 1,
++		.speed = RTL8367_PORT_SPEED_1000,
++	},
++};
++
++static struct rtl8367_platform_data nb6_rtl8367_data = {
++	.gpio_sda	= NB6_GPIO_RTL8367_SDA,
++	.gpio_sck	= NB6_GPIO_RTL8367_SCK,
++	.extif0_cfg	= &nb6_rtl8367_extif0_cfg,
++};
++
++static struct platform_device nb6_rtl8367_device = {
++	.name		= RTL8367_DRIVER_NAME,
++	.id		= -1,
++	.dev = {
++		.platform_data	= &nb6_rtl8367_data,
++	}
++};
++
++static struct platform_device * __initdata nb6_devices[] = {
++	&nb6_rtl8367_device,
++};
++
++static struct board_info __initdata board_nb6 = {
++	.name				= "NB6",
++	.expected_cpu_id		= 0x6362,
++
++	.has_uart0			= 1,
++
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 2,
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[4] = {
++				.used	= 1,
++				.phy_id	= 0xff,
++				.bypass_link = 1,
++				.force_speed = 1000,
++				.force_duplex_full = 1,
++				.name	= "RGMII",
++			},
++		},
++	},
++
++	.devs = nb6_devices,
++	.num_devs = ARRAY_SIZE(nb6_devices),
++};
++#endif /* CONFIG_BCM63XX_CPU_6362 */
++
+ /*
+  * known 6368 boards
+  */
+@@ -1469,6 +1537,10 @@ static const struct board_info __initcon
+ 	&board_DVAG3810BN,
+ #endif
+ 
++#ifdef CONFIG_BCM63XX_CPU_6362
++	&board_nb6,
++#endif
++
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
+@@ -1537,6 +1609,9 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "t-com,spw303v", .data = &board_spw303v, },
+ 	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_6362
++	{ .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, },
++#endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
diff --git a/target/linux/brcm63xx/patches-3.18/529-board_fast2604.patch b/target/linux/brcm63xx/patches-3.18/529-board_fast2604.patch
new file mode 100644
index 0000000..dc31325
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/529-board_fast2604.patch
@@ -0,0 +1,42 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -768,6 +768,23 @@ static struct board_info __initdata boar
+ 	.has_ehci0			= 1,
+ };
+ 
++static struct board_info __initdata board_FAST2604 = {
++	.name						= "F@ST2604",
++	.expected_cpu_id			= 0x6348,
++
++	.has_uart0					= 1,
++	.has_pci					= 1,
++	.has_ohci0					= 1,
++
++	.has_enet1					= 1,
++	.enet1 = {
++		.has_phy			= 1,
++		.phy_id				= 0,
++		.force_speed_100		= 1,
++		.force_duplex_full		= 1,
++	},
++};
++
+ static struct board_info __initdata board_rta1025w_16 = {
+ 	.name				= "RTA1025W_16",
+ 	.expected_cpu_id		= 0x6348,
+@@ -1508,6 +1525,7 @@ static const struct board_info __initcon
+ 	&board_96348gw_10,
+ 	&board_96348gw_11,
+ 	&board_FAST2404,
++	&board_FAST2604,
+ 	&board_DV201AMR,
+ 	&board_96348gw_a,
+ 	&board_rta1025w_16,
+@@ -1583,6 +1601,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
+  	{ .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
+ 	{ .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
++ 	{ .compatible = "sagem,f@st2604", .data = &board_FAST2604, },
+ 	{ .compatible = "t-com,spw500v", .data = &board_spw500v, },
+ 	{ .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ 	{ .compatible = "tecom,gw6200", .data = &board_gw6200, },
diff --git a/target/linux/brcm63xx/patches-3.18/530-board_A4001N1.patch b/target/linux/brcm63xx/patches-3.18/530-board_A4001N1.patch
new file mode 100644
index 0000000..6ce8573
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/530-board_A4001N1.patch
@@ -0,0 +1,69 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -178,6 +178,50 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_A4001N1 = {
++	.name					= "963281T_TEF",
++	.expected_cpu_id			= 0x6328,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++	.num_usbh_ports				= 1,
++	.has_enetsw				= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "Port 1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "Port 2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "Port 3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "Port 4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43225,
++		.pci_bus			= 1,
++		.pci_dev			= 0,
++	},
++};
++
+ static struct board_info __initdata board_dsl_274xb_f1 = {
+ 	.name				= "AW4339U",
+ 	.expected_cpu_id		= 0x6328,
+@@ -1506,6 +1550,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
+ 	&board_963281TAN,
++	&board_A4001N1,
+ 	&board_dsl_274xb_f1,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+@@ -1571,6 +1616,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
++	{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ 	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
+ 	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+ 	{ .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
diff --git a/target/linux/brcm63xx/patches-3.18/531-board_AR-5387un.patch b/target/linux/brcm63xx/patches-3.18/531-board_AR-5387un.patch
new file mode 100644
index 0000000..000794a
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/531-board_AR-5387un.patch
@@ -0,0 +1,98 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -143,6 +143,79 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct sprom_fixup __initdata ar5387un_fixups[] = {
++	{ .offset = 2, .value = 0x05bb },
++	{ .offset = 65, .value = 0x1204 },
++	{ .offset = 78, .value = 0x0303 },
++	{ .offset = 79, .value = 0x0202 },
++	{ .offset = 80, .value = 0xff02 },
++	{ .offset = 87, .value = 0x0315 },
++	{ .offset = 88, .value = 0x0315 },
++	{ .offset = 96, .value = 0x2048 },
++	{ .offset = 97, .value = 0xff11 },
++	{ .offset = 98, .value = 0x1567 },
++	{ .offset = 99, .value = 0xfb24 },
++	{ .offset = 100, .value = 0x3e3c },
++	{ .offset = 101, .value = 0x4038 },
++	{ .offset = 102, .value = 0xfe7f },
++	{ .offset = 103, .value = 0x1279 },
++	{ .offset = 112, .value = 0x2048 },
++	{ .offset = 113, .value = 0xff03 },
++	{ .offset = 114, .value = 0x154c },
++	{ .offset = 115, .value = 0xfb27 },
++	{ .offset = 116, .value = 0x3e3c },
++	{ .offset = 117, .value = 0x4038 },
++	{ .offset = 118, .value = 0xfe87 },
++	{ .offset = 119, .value = 0x1233 },
++	{ .offset = 203, .value = 0x2226 },
++};
++
++static struct board_info __initdata board_AR5387un = {
++	.name					= "96328A-1441N1",
++	.expected_cpu_id			= 0x6328,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++	.num_usbh_ports				= 1,
++	.has_enetsw				= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "Port 1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "Port 2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "Port 3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "Port 4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43225,
++		.pci_bus			= 1,
++		.pci_dev			= 0,
++		.board_fixups			= ar5387un_fixups,
++		.num_board_fixups		= ARRAY_SIZE(ar5387un_fixups),
++	},
++};
++
+ static struct board_info __initdata board_963281TAN = {
+ 	.name				= "963281TAN",
+ 	.expected_cpu_id		= 0x6328,
+@@ -1549,6 +1622,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
++	&board_AR5387un,
+ 	&board_963281TAN,
+ 	&board_A4001N1,
+ 	&board_dsl_274xb_f1,
+@@ -1619,6 +1693,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ 	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
+ 	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++	{ .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ 	{ .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
diff --git a/target/linux/brcm63xx/patches-3.18/532-board_AR-5381u.patch b/target/linux/brcm63xx/patches-3.18/532-board_AR-5381u.patch
new file mode 100644
index 0000000..3b79f0f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/532-board_AR-5381u.patch
@@ -0,0 +1,80 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -143,6 +143,61 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct sprom_fixup __initdata ar5381u_fixups[] = {
++	{ .offset = 97, .value = 0xfee5 },
++	{ .offset = 98, .value = 0x157c },
++	{ .offset = 99, .value = 0xfae7 },
++	{ .offset = 113, .value = 0xfefa },
++	{ .offset = 114, .value = 0x15d6 },
++	{ .offset = 115, .value = 0xfaf8 },
++};
++
++static struct board_info __initdata board_AR5381u = {
++	.name					= "96328A-1241N",
++	.expected_cpu_id			= 0x6328,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.use_fallback_sprom			= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++	.num_usbh_ports				= 1,
++	.has_enetsw				= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "Port 1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "Port 2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "Port 3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "Port 4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43225,
++		.pci_bus			= 1,
++		.pci_dev			= 0,
++		.board_fixups			= ar5381u_fixups,
++		.num_board_fixups		= ARRAY_SIZE(ar5381u_fixups),
++	},
++};
++
+ static struct sprom_fixup __initdata ar5387un_fixups[] = {
+ 	{ .offset = 2, .value = 0x05bb },
+ 	{ .offset = 65, .value = 0x1204 },
+@@ -1622,6 +1677,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
++	&board_AR5381u,
+ 	&board_AR5387un,
+ 	&board_963281TAN,
+ 	&board_A4001N1,
+@@ -1693,6 +1749,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ 	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
+ 	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++	{ .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
+ 	{ .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ 	{ .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
+ #endif
diff --git a/target/linux/brcm63xx/patches-3.18/533-board_rta770bw.patch b/target/linux/brcm63xx/patches-3.18/533-board_rta770bw.patch
new file mode 100644
index 0000000..cbff51e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/533-board_rta770bw.patch
@@ -0,0 +1,41 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -528,6 +528,22 @@ static struct board_info __initdata boar
+ 
+ 	.has_uart0			= 1,
+ };
++
++static struct board_info __initdata board_rta770bw = {
++	.name				= "RTA770BW",
++	.expected_cpu_id		= 0x6345,
++
++	.has_uart0			= 1,
++
++	.has_enet0			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6345 */
+ 
+ /*
+@@ -1691,6 +1707,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	&board_96345gw2,
++	&board_rta770bw,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ 	&board_96348r,
+@@ -1761,6 +1778,7 @@ static struct of_device_id const bcm963x
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	{ .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
++	{ .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ 	{ .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
diff --git a/target/linux/brcm63xx/patches-3.18/534-board_hw556.patch b/target/linux/brcm63xx/patches-3.18/534-board_hw556.patch
new file mode 100644
index 0000000..85f2c3e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/534-board_hw556.patch
@@ -0,0 +1,124 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -12,6 +12,7 @@
+ #include <linux/string.h>
+ #include <linux/gpio_keys.h>
+ #include <linux/input.h>
++#include <linux/pci_ids.h>
+ #include <linux/platform_device.h>
+ #include <linux/rtl8367.h>
+ #include <asm/addrspace.h>
+@@ -1482,6 +1483,93 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_HW556_C = {
++	.name					= "HW556_C",
++	.expected_cpu_id			= 0x6358,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++	.num_usbh_ports				= 2,
++
++	.has_caldata				= 1,
++	.caldata = {
++		{
++			.vendor			= PCI_VENDOR_ID_RALINK,
++			.caldata_offset		= 0xeffe00,
++			.slot			= 1,
++			.eeprom			= "rt2x00.eeprom",
++		},
++	},
++
++	.has_enet1				= 1,
++	.enet1 = {
++		.has_phy			= 1,
++		.phy_id				= 0,
++		.force_speed_100		= 1,
++		.force_duplex_full		= 1,
++	},
++};
++static struct board_info __initdata board_HW556_A = {
++	.name					= "HW556_A",
++	.expected_cpu_id			= 0x6358,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++	.num_usbh_ports				= 2,
++
++	.has_caldata				= 1,
++	.caldata = {
++		{
++			.vendor			= PCI_VENDOR_ID_ATHEROS,
++			.caldata_offset		= 0xf7e000,
++			.slot			= 1,
++			.endian_check		= 1,
++			.led_pin		= 2,
++		},
++	},
++
++	.has_enet1				= 1,
++	.enet1 = {
++		.has_phy			= 1,
++		.phy_id				= 0,
++		.force_speed_100		= 1,
++		.force_duplex_full		= 1,
++	},
++};
++static struct board_info __initdata board_HW556_B = {
++	.name					= "HW556_B",
++	.expected_cpu_id			= 0x6358,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++	.num_usbh_ports				= 2,
++
++	.has_caldata				= 1,
++	.caldata = {
++		{
++			.vendor			= PCI_VENDOR_ID_ATHEROS,
++			.caldata_offset		= 0xefe000,
++			.slot			= 1,
++			.endian_check		= 1,
++			.led_pin		= 2,
++		},
++	},
++
++	.has_enet1				= 1,
++	.enet1 = {
++		.has_phy			= 1,
++		.phy_id				= 0,
++		.force_speed_100		= 1,
++		.force_duplex_full		= 1,
++	},
++};
++
+  /* T-Home Speedport W 303V Typ B */
+ static struct board_info __initdata board_spw303v = {
+ 	.name			= "96358-502V",
+@@ -1743,6 +1831,9 @@ static const struct board_info __initcon
+ 	&board_nb4_fxc_r1,
+ 	&board_ct6373_1,
+ 	&board_HW553,
++	&board_HW556_A,
++	&board_HW556_B,
++	&board_HW556_C,
+ 	&board_spw303v,
+ 	&board_DVAG3810BN,
+ #endif
+@@ -1815,6 +1906,9 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ 	{ .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, },
+ 	{ .compatible = "huawei,hg553", .data = &board_HW553, },
++	{ .compatible = "huawei,hg556a-a", .data = &board_HW556_A, },
++	{ .compatible = "huawei,hg556a-b", .data = &board_HW556_B, },
++	{ .compatible = "huawei,hg556a-c", .data = &board_HW556_C, },
+ 	{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
diff --git a/target/linux/brcm63xx/patches-3.18/535-board_rta770w.patch b/target/linux/brcm63xx/patches-3.18/535-board_rta770w.patch
new file mode 100644
index 0000000..0697299
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/535-board_rta770w.patch
@@ -0,0 +1,46 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -545,6 +545,27 @@ static struct board_info __initdata boar
+ 		.force_duplex_full	= 1,
+ 	},
+ };
++
++// Actually this board is the very same as the rta770bw,
++// where the additional 'b' within the name just
++// just indicates 'Annex B'. The ADSL Modem itself is able
++// to handle both Annex A as well as Annex B -
++// the loaded firmware makes the only difference
++static struct board_info __initdata board_rta770w = {
++	.name				= "RTA770W",
++	.expected_cpu_id		= 0x6345,
++
++	.has_uart0			= 1,
++
++	.has_enet0			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6345 */
+ 
+ /*
+@@ -1796,6 +1817,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	&board_96345gw2,
+ 	&board_rta770bw,
++	&board_rta770w,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ 	&board_96348r,
+@@ -1870,6 +1892,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	{ .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
+ 	{ .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
++	{ .compatible = "dynalink,rta770w", .data = &board_rta770w, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ 	{ .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
diff --git a/target/linux/brcm63xx/patches-3.18/536-board_fast2704.patch b/target/linux/brcm63xx/patches-3.18/536-board_fast2704.patch
new file mode 100644
index 0000000..6546e5d
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/536-board_fast2704.patch
@@ -0,0 +1,75 @@
+From: Marcin Jurkowski <marcin1j@gmail.com>
+Date: Thu, 31 Oct 2013 22:33:10 +0000
+Subject: [PATCH] bcm63xx: Add kernel support for Sagemcom F@ST2704V2 ADSL
+ router
+
+This adds kernel support support for Sagemcom F@st 2704 wireless ADSL
+router.
+It's a BCM6328-based 802.11n wireless router with USB port and ADSL2+
+modem equipped with 64 MiB RAM and 8 MiB flash.
+
+Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
+---
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -395,6 +395,44 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct board_info __initdata board_FAST2704V2 = {
++	.name				= "F@ST2704V2",
++	.expected_cpu_id		= 0x6328,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.has_usbd			= 1,
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+ 
+ /*
+@@ -1807,6 +1845,7 @@ static const struct board_info __initcon
+ 	&board_963281TAN,
+ 	&board_A4001N1,
+ 	&board_dsl_274xb_f1,
++	&board_FAST2704V2,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	&board_96338gw,
+@@ -1882,6 +1921,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
+ 	{ .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ 	{ .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
++	{ .compatible = "sagem,f@st2704v2", .data = &board_FAST2704V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
diff --git a/target/linux/brcm63xx/patches-3.18/537-board_fast2504n.patch b/target/linux/brcm63xx/patches-3.18/537-board_fast2504n.patch
new file mode 100644
index 0000000..b423df3
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/537-board_fast2504n.patch
@@ -0,0 +1,68 @@
+From: Max Staudt <openwrt.max@enpas.org>
+Date: Wed, 15 Jan 2014 18:51:13 +0000
+Subject: [PATCH] brcm63xx: F@ST2504n board support (Linux-3.10.26)
+
+Signed-off-by: Max Staudt <openwrt.max@enpas.org>
+---
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1736,6 +1736,43 @@ static struct board_info __initdata boar
+ 	.devs = nb6_devices,
+ 	.num_devs = ARRAY_SIZE(nb6_devices),
+ };
++
++static struct board_info __initdata board_fast2504n = {
++	.name				= "F@ST2504n",
++	.expected_cpu_id		= 0x6362,
++
++	.has_uart0			= 1,
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "Port 1",
++			},
++
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6362 */
+ 
+ /*
+@@ -1901,6 +1938,7 @@ static const struct board_info __initcon
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6362
+ 	&board_nb6,
++	&board_fast2504n,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6368
+@@ -1982,6 +2020,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6362
++	{ .compatible = "sagem,f@st2504n", .data = &board_fast2504n, },
+ 	{ .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
diff --git a/target/linux/brcm63xx/patches-3.18/550-MIPS-BCM63XX-remove-leds-and-buttons.patch b/target/linux/brcm63xx/patches-3.18/550-MIPS-BCM63XX-remove-leds-and-buttons.patch
new file mode 100644
index 0000000..4bd3695
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/550-MIPS-BCM63XX-remove-leds-and-buttons.patch
@@ -0,0 +1,343 @@
+From 997f53b174c63153335508c22dc4493e8e5808d6 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Feb 2015 17:52:32 +0100
+Subject: [PATCH] MIPS: BCM63XX: remove leds and buttons
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |  262 -----------------------------
+ 1 file changed, 262 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -56,14 +56,6 @@ static struct board_info __initdata boar
+ 		.use_internal_phy	= 1,
+ 	},
+ 
+-	.leds = {
+-		{
+-			.name		= "CVG834G:green:power",
+-			.gpio		= 37,
+-			.default_trigger= "default-on",
+-		},
+-	},
+-
+ 	.ephy_reset_gpio		= 36,
+ 	.ephy_reset_gpio_flags		= GPIO_ACTIVE_LOW,
+ };
+@@ -87,35 +79,6 @@ static struct board_info __initdata boar
+ 		.port_no		= 0,
+ 	},
+ 
+-	.leds = {
+-		{
+-			.name		= "96328avng::ppp-fail",
+-			.gpio		= 2,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "96328avng::power",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "96328avng::power-fail",
+-			.gpio		= 8,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "96328avng::wps",
+-			.gpio		= 9,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "96328avng::ppp",
+-			.gpio		= 11,
+-			.active_low	= 1,
+-		},
+-	},
+-
+ 	.has_enetsw			= 1,
+ 
+ 	.enetsw = {
+@@ -453,35 +416,6 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.has_ohci0			= 1,
+-
+-	.leds = {
+-		{
+-			.name		= "adsl",
+-			.gpio		= 3,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ses",
+-			.gpio		= 5,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 0,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 1,
+-			.active_low	= 1,
+-		}
+-	},
+ };
+ 
+ static struct board_info __initdata board_96338w = {
+@@ -496,35 +430,6 @@ static struct board_info __initdata boar
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+-
+-	.leds = {
+-		{
+-			.name		= "adsl",
+-			.gpio		= 3,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ses",
+-			.gpio		= 5,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 0,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 1,
+-			.active_low	= 1,
+-		},
+-	},
+ };
+ 
+ static struct board_info __initdata board_96338w2_e7t = {
+@@ -623,36 +528,6 @@ static struct board_info __initdata boar
+ 		.has_phy		= 1,
+ 		.use_internal_phy	= 1,
+ 	},
+-
+-	.leds = {
+-		{
+-			.name		= "adsl-fail",
+-			.gpio		= 2,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp",
+-			.gpio		= 3,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 0,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 1,
+-			.active_low	= 1,
+-		},
+-	},
+ };
+ 
+ static struct board_info __initdata board_96348gw_10 = {
+@@ -687,35 +562,6 @@ static struct board_info __initdata boar
+ 		.cs			= 2,
+ 		.ext_irq		= 2,
+ 	},
+-
+-	.leds = {
+-		{
+-			.name		= "adsl-fail",
+-			.gpio		= 2,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp",
+-			.gpio		= 3,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 0,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 1,
+-			.active_low	= 1,
+-		},
+-	},
+ };
+ 
+ static struct board_info __initdata board_96348gw_11 = {
+@@ -744,35 +590,6 @@ static struct board_info __initdata boar
+ 	.has_ohci0 = 1,
+ 	.has_pccard = 1,
+ 	.has_ehci0 = 1,
+-
+-	.leds = {
+-		{
+-			.name		= "adsl-fail",
+-			.gpio		= 2,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp",
+-			.gpio		= 3,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 0,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 1,
+-			.active_low	= 1,
+-		},
+-	},
+ };
+ 
+ 
+@@ -898,35 +715,6 @@ static struct board_info __initdata boar
+ 		.ext_irq		= 2,
+ 		.cs			= 2,
+ 	},
+-
+-	.leds = {
+-		{
+-			.name		= "adsl-fail",
+-			.gpio		= 2,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp",
+-			.gpio		= 3,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 0,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 1,
+-			.active_low	= 1,
+-		},
+-	},
+ };
+ 
+ static struct board_info __initdata board_gw6200 = {
+@@ -1263,33 +1051,6 @@ static struct board_info __initdata boar
+ 	.has_ohci0 = 1,
+ 	.has_pccard = 1,
+ 	.has_ehci0 = 1,
+-
+-	.leds = {
+-		{
+-			.name		= "adsl-fail",
+-			.gpio		= 15,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp",
+-			.gpio		= 22,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 23,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 4,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 5,
+-		},
+-	},
+ };
+ 
+ static struct board_info __initdata board_96358vw2 = {
+@@ -1319,29 +1080,6 @@ static struct board_info __initdata boar
+ 	.has_pccard = 1,
+ 	.has_ehci0 = 1,
+ 	.num_usbh_ports			= 2,
+-
+-	.leds = {
+-		{
+-			.name		= "adsl",
+-			.gpio		= 22,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 23,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 5,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-	},
+ };
+ 
+ static struct board_info __initdata board_CPVA642 = {
diff --git a/target/linux/brcm63xx/patches-3.18/555-board_96318ref.patch b/target/linux/brcm63xx/patches-3.18/555-board_96318ref.patch
new file mode 100644
index 0000000..595ac07
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/555-board_96318ref.patch
@@ -0,0 +1,79 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -62,6 +62,56 @@ static struct board_info __initdata boar
+ #endif /* CONFIG_BCM63XX_CPU_3368 */
+ 
+ /*
++ * known 6318 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6318
++static struct board_info __initdata board_96318ref = {
++	.name				= "96318REF",
++	.expected_cpu_id		= 0x6318,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++
++	.has_usbd			= 1,
++
++	.usbd = {
++		.use_fullspeed		= 0,
++		.port_no		= 0,
++	},
++
++	.has_enetsw			= 1,
++
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++};
++#endif /* CONFIG_BCM63XX_CPU_6318 */
++
++/*
+  * known 6328 boards
+  */
+ #ifdef CONFIG_BCM63XX_CPU_6328
+@@ -1613,6 +1663,9 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_3368
+ 	&board_cvg834g,
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_6318
++	&board_96318ref,
++#endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
+ 	&board_AR5381u,
+@@ -1690,6 +1743,9 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_3368
+ 	{ .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_6318
++	{ .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
++#endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ 	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
diff --git a/target/linux/brcm63xx/patches-3.18/556-board_96318ref_p300.patch b/target/linux/brcm63xx/patches-3.18/556-board_96318ref_p300.patch
new file mode 100644
index 0000000..81493fd
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/556-board_96318ref_p300.patch
@@ -0,0 +1,70 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -109,6 +109,51 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct board_info __initdata board_96318ref_p300 = {
++	.name				= "96318REF_P300",
++	.expected_cpu_id		= 0x6318,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++
++	.has_usbd			= 1,
++
++	.usbd = {
++		.use_fullspeed		= 0,
++		.port_no		= 0,
++	},
++
++	.has_enetsw			= 1,
++
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6318 */
+ 
+ /*
+@@ -1665,6 +1710,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ 	&board_96318ref,
++	&board_96318ref_p300,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
+@@ -1745,6 +1791,7 @@ static struct of_device_id const bcm963x
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ 	{ .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
++	{ .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
diff --git a/target/linux/brcm63xx/patches-3.18/557-board_bcm963269bhr.patch b/target/linux/brcm63xx/patches-3.18/557-board_bcm963269bhr.patch
new file mode 100644
index 0000000..1dcfea8
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/557-board_bcm963269bhr.patch
@@ -0,0 +1,73 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1702,6 +1702,52 @@ static struct board_info __initdata boar
+ #endif /* CONFIG_BCM63XX_CPU_6368 */
+ 
+ /*
++ * known 63268/63269 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_63268
++static struct board_info __initdata board_963269bhr = {
++	.name				= "963269BHR",
++	.expected_cpu_id		= 0x63268,
++
++	.has_uart0			= 1,
++
++	.has_pci			= 1,
++
++	.has_ehci0			= 1,
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "port1",
++			},
++
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "port2",
++			},
++
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "port3",
++			},
++
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "port4",
++			},
++		},
++	},
++};
++#endif /* CONFIG_BCM63XX_CPU_63268 */
++
++/*
+  * all boards
+  */
+ static const struct board_info __initconst *bcm963xx_boards[] = {
+@@ -1782,6 +1828,9 @@ static const struct board_info __initcon
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_63268
++	&board_963269bhr,
++#endif
+ };
+ 
+ static struct of_device_id const bcm963xx_boards_dt[] = {
+@@ -1869,6 +1918,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
++	{ .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ #endif
+ #endif /* CONFIG_OF */
+ 	{ },
diff --git a/target/linux/brcm63xx/patches-3.18/558-board_AR1004G.patch b/target/linux/brcm63xx/patches-3.18/558-board_AR1004G.patch
new file mode 100644
index 0000000..29d5783
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/558-board_AR1004G.patch
@@ -0,0 +1,49 @@
+From: "mexit@o2.pl" <mexit@o2.pl>
+Date: Sun, 24 Nov 2013 21:33:38 +0000
+Subject: [PATCH 4/5] brcm63xx: add support for Asmax AR 1004g router
+
+Support for Asmax AR 1004g router
+
+Signed-off-by: Adrian Feliks <mexit@o2.pl>
+---
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -687,6 +687,22 @@ static struct board_info __initdata boar
+ 	.has_ehci0 = 1,
+ };
+ 
++static struct board_info __initdata board_96348gw_10_AR1004G = {
++	.name				= "AR1004G",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++	
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
++
+ 
+ /* BT Voyager 2110 */
+ static struct board_info __initdata board_V2110 = {
+@@ -1799,6 +1815,7 @@ static const struct board_info __initcon
+ 	&board_96348A_122,
+ 	&board_CPVA502plus,
+ 	&board_96348W3,
++	&board_96348gw_10_AR1004G,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1863,6 +1880,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "dynalink,rta770w", .data = &board_rta770w, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
++	{ .compatible = "asmax,ar1004g", .data = &board_96348gw_10_AR1004G, },
+ 	{ .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
+ 	{ .compatible = "brcm,bcm96348r", .data = &board_96348r, },
+ 	{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
diff --git a/target/linux/brcm63xx/patches-3.18/559-board_vw6339gu.patch b/target/linux/brcm63xx/patches-3.18/559-board_vw6339gu.patch
new file mode 100644
index 0000000..3a38540
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/559-board_vw6339gu.patch
@@ -0,0 +1,72 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1761,6 +1761,53 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct board_info __initdata board_vw6339gu = {
++	.name				= "VW6339GU",
++	.expected_cpu_id		= 0x63268,
++
++	.has_uart0			= 1,
++
++	.has_ehci0			= 1,
++	.has_ohci0			= 1,
++	.num_usbh_ports			= 1,
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "LAN2",
++			},
++
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "LAN3",
++			},
++
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "LAN4",
++			},
++
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "LAN1",
++			},
++
++			[4] = {
++				.used	= 1,
++				.phy_id	= 7,
++				.name	= "WAN",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_63268 */
+ 
+ /*
+@@ -1847,6 +1894,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ 	&board_963269bhr,
++	&board_vw6339gu,
+ #endif
+ };
+ 
+@@ -1937,6 +1985,7 @@ static struct of_device_id const bcm963x
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ 	{ .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
++	{ .compatible = "inteno,vg50", .data = &board_vw6339gu, },
+ #endif
+ #endif /* CONFIG_OF */
+ 	{ },
diff --git a/target/linux/brcm63xx/patches-3.18/560-board_963268gu_p300.patch b/target/linux/brcm63xx/patches-3.18/560-board_963268gu_p300.patch
new file mode 100644
index 0000000..494328b
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/560-board_963268gu_p300.patch
@@ -0,0 +1,85 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1721,6 +1721,66 @@ static struct board_info __initdata boar
+  * known 63268/63269 boards
+  */
+ #ifdef CONFIG_BCM63XX_CPU_63268
++static struct board_info __initdata board_963268bu_p300 = {
++	.name				= "963268BU_P300",
++	.expected_cpu_id		= 0x63268,
++
++	.has_uart0			= 1,
++
++	.has_ehci0			= 1,
++	.has_ohci0			= 1,
++	.num_usbh_ports			= 1,
++
++	.has_usbd			= 1,
++
++	.usbd = {
++		.use_fullspeed		= 0,
++		.port_no		= 0,
++	},
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 17,
++				.name	= "FE1",
++			},
++
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "GbE2",
++			},
++
++			[4] = {
++				.used	= 1,
++				.phy_id	= 0,
++				.name	= "GbE3",
++			},
++
++			[5] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "GbE1",
++			},
++
++			[6] = {
++				.used	= 1,
++				.phy_id	= 24,
++				.name	= "GbE4",
++			},
++
++			[7] = {
++				.used	= 1,
++				.phy_id	= 25,
++				.name	= "GbE5",
++			},
++		},
++	},
++};
++
+ static struct board_info __initdata board_963269bhr = {
+ 	.name				= "963269BHR",
+ 	.expected_cpu_id		= 0x63268,
+@@ -1893,6 +1953,7 @@ static const struct board_info __initcon
+ 	&board_96368mvngr,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
++	&board_963268bu_p300,
+ 	&board_963269bhr,
+ 	&board_vw6339gu,
+ #endif
+@@ -1984,6 +2045,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
++	{ .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, },
+ 	{ .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ 	{ .compatible = "inteno,vg50", .data = &board_vw6339gu, },
+ #endif
diff --git a/target/linux/brcm63xx/patches-3.18/561-board_WAP-5813n.patch b/target/linux/brcm63xx/patches-3.18/561-board_WAP-5813n.patch
new file mode 100644
index 0000000..b695b2b
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/561-board_WAP-5813n.patch
@@ -0,0 +1,94 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -14,7 +14,9 @@
+ #include <linux/input.h>
+ #include <linux/pci_ids.h>
+ #include <linux/platform_device.h>
++#include <linux/platform_data/b53.h>
+ #include <linux/rtl8367.h>
++#include <linux/spi/spi.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -1715,6 +1717,65 @@ static struct board_info __initdata boar
+ 	.has_ohci0 = 1,
+ 	.has_ehci0 = 1,
+ };
++
++static struct b53_platform_data WAP5813n_b53_pdata = {
++	.alias = "eth0",
++};
++
++static struct spi_board_info WAP5813n_spi_devices[] = {
++	{
++		.modalias = "b53-switch",
++		.max_speed_hz = 781000,
++		.bus_num = 0,
++		.chip_select = 0,
++		.platform_data = &WAP5813n_b53_pdata,
++	}
++};
++
++static struct sprom_fixup __initdata wap5813n_fixups[] = {
++	{ .offset = 97, .value = 0xfeed },
++	{ .offset = 98, .value = 0x15d1 },
++	{ .offset = 99, .value = 0xfb0d },
++	{ .offset = 113, .value = 0xfef7 },
++	{ .offset = 114, .value = 0x15f7 },
++	{ .offset = 115, .value = 0xfb1a },
++};
++
++static struct board_info __initdata board_WAP5813n = {
++	.name				= "96369R-1231N",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++
++	.has_enetsw			= 1,
++	.enetsw = {
++		.used_ports = {
++			[4] = {
++				.used = 1,
++				.phy_id = 0xff,
++				.bypass_link = 1,
++				.force_speed = 1000,
++				.force_duplex_full = 1,
++				.name = "RGMII",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43222,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++		.board_fixups			= wap5813n_fixups,
++		.num_board_fixups		= ARRAY_SIZE(wap5813n_fixups),
++	},
++
++	.spis = WAP5813n_spi_devices,
++	.num_spis = ARRAY_SIZE(WAP5813n_spi_devices),
++};
+ #endif /* CONFIG_BCM63XX_CPU_6368 */
+ 
+ /*
+@@ -1951,6 +2012,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
++	&board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ 	&board_963268bu_p300,
+@@ -2043,6 +2105,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
++	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ 	{ .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, },
diff --git a/target/linux/brcm63xx/patches-3.18/562-board_VR-3025u.patch b/target/linux/brcm63xx/patches-3.18/562-board_VR-3025u.patch
new file mode 100644
index 0000000..13a2dc9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/562-board_VR-3025u.patch
@@ -0,0 +1,79 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1718,6 +1718,60 @@ static struct board_info __initdata boar
+ 	.has_ehci0 = 1,
+ };
+ 
++static struct sprom_fixup __initdata vr3025u_fixups[] = {
++	{ .offset = 97, .value = 0xfeb3 },
++	{ .offset = 98, .value = 0x1618 },
++	{ .offset = 99, .value = 0xfab0 },
++	{ .offset = 113, .value = 0xfed1 },
++	{ .offset = 114, .value = 0x1609 },
++	{ .offset = 115, .value = 0xfad9 },
++};
++
++static struct board_info __initdata board_VR3025u = {
++	.name					= "96368M-1541N",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.use_fallback_sprom			= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++
++	.has_enetsw				= 1,
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "port1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "port2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "port3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "port4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43222,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++		.board_fixups			= vr3025u_fixups,
++		.num_board_fixups		= ARRAY_SIZE(vr3025u_fixups),
++	},
++};
++
+ static struct b53_platform_data WAP5813n_b53_pdata = {
+ 	.alias = "eth0",
+ };
+@@ -2012,6 +2066,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
++	&board_VR3025u,
+ 	&board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+@@ -2105,6 +2160,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
++	{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ 	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
diff --git a/target/linux/brcm63xx/patches-3.18/563-board_VR-3025un.patch b/target/linux/brcm63xx/patches-3.18/563-board_VR-3025un.patch
new file mode 100644
index 0000000..f194a88
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/563-board_VR-3025un.patch
@@ -0,0 +1,79 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1772,6 +1772,60 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct sprom_fixup __initdata vr3025un_fixups[] = {
++	{ .offset = 97, .value = 0xfeb3 },
++	{ .offset = 98, .value = 0x1618 },
++	{ .offset = 99, .value = 0xfab0 },
++	{ .offset = 113, .value = 0xfed1 },
++	{ .offset = 114, .value = 0x1609 },
++	{ .offset = 115, .value = 0xfad9 },
++};
++
++static struct board_info __initdata board_VR3025un = {
++	.name					= "96368M-1341N",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.use_fallback_sprom			= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++
++	.has_enetsw				= 1,
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "port1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "port2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "port3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "port4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43222,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++		.board_fixups			= vr3025un_fixups,
++		.num_board_fixups		= ARRAY_SIZE(vr3025un_fixups),
++	},
++};
++
+ static struct b53_platform_data WAP5813n_b53_pdata = {
+ 	.alias = "eth0",
+ };
+@@ -2067,6 +2121,7 @@ static const struct board_info __initcon
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
+ 	&board_VR3025u,
++	&board_VR3025un,
+ 	&board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+@@ -2161,6 +2216,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ 	{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
++	{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ 	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
diff --git a/target/linux/brcm63xx/patches-3.18/564-board_P870HW-51a_v2.patch b/target/linux/brcm63xx/patches-3.18/564-board_P870HW-51a_v2.patch
new file mode 100644
index 0000000..8ccba3a
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/564-board_P870HW-51a_v2.patch
@@ -0,0 +1,68 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1727,6 +1727,49 @@ static struct sprom_fixup __initdata vr3
+ 	{ .offset = 115, .value = 0xfad9 },
+ };
+ 
++static struct board_info __initdata board_P870HW51A_V2 = {
++	.name				= "P870HW-51a_v2",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++
++	.has_enetsw			= 1,
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "port1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "port2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "port3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "port4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM4318,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++	},
++};
++
+ static struct board_info __initdata board_VR3025u = {
+ 	.name					= "96368M-1541N",
+ 	.expected_cpu_id		= 0x6368,
+@@ -2120,6 +2163,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
++	&board_P870HW51A_V2,
+ 	&board_VR3025u,
+ 	&board_VR3025un,
+ 	&board_WAP5813n,
+@@ -2218,6 +2262,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ 	{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ 	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++	{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ 	{ .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, },
diff --git a/target/linux/brcm63xx/patches-3.18/565-board_hw520.patch b/target/linux/brcm63xx/patches-3.18/565-board_hw520.patch
new file mode 100644
index 0000000..8f40612
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/565-board_hw520.patch
@@ -0,0 +1,56 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1365,6 +1365,37 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_HW520 = {
++	.name				= "HW6358GW_B",
++	.expected_cpu_id		= 0x6358,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++
++	.has_enet0			= 1,
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++
++	.has_enet1			= 1,
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM4318,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++	},
++};
++
+ static struct board_info __initdata board_HW553 = {
+ 	.name                           = "HW553",
+ 	.expected_cpu_id                = 0x6358,
+@@ -2147,6 +2178,7 @@ static const struct board_info __initcon
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
+ 	&board_ct6373_1,
++	&board_HW520,
+ 	&board_HW553,
+ 	&board_HW556_A,
+ 	&board_HW556_B,
+@@ -2239,6 +2271,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ 	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ 	{ .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, },
++	{ .compatible = "huawei,hg520v", .data = &board_HW520, },
+ 	{ .compatible = "huawei,hg553", .data = &board_HW553, },
+ 	{ .compatible = "huawei,hg556a-a", .data = &board_HW556_A, },
+ 	{ .compatible = "huawei,hg556a-b", .data = &board_HW556_B, },
diff --git a/target/linux/brcm63xx/patches-3.18/566-board_A4001N.patch b/target/linux/brcm63xx/patches-3.18/566-board_A4001N.patch
new file mode 100644
index 0000000..f8a95e5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/566-board_A4001N.patch
@@ -0,0 +1,69 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -367,6 +367,50 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_A4001N = {
++	.name				= "96328dg2x2",
++	.expected_cpu_id		= 0x6328,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 1,
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43225,
++		.pci_bus			= 1,
++		.pci_dev			= 0,
++	},
++};
++
+ static struct board_info __initdata board_A4001N1 = {
+ 	.name					= "963281T_TEF",
+ 	.expected_cpu_id			= 0x6328,
+@@ -2129,6 +2173,7 @@ static const struct board_info __initcon
+ 	&board_AR5381u,
+ 	&board_AR5387un,
+ 	&board_963281TAN,
++	&board_A4001N,
+ 	&board_A4001N1,
+ 	&board_dsl_274xb_f1,
+ 	&board_FAST2704V2,
+@@ -2217,6 +2262,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
++	{ .compatible = "adb,a4001n", .data = &board_A4001N, },
+ 	{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ 	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
+ 	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
diff --git a/target/linux/brcm63xx/patches-3.18/567-board_dsl-2751b_e1.patch b/target/linux/brcm63xx/patches-3.18/567-board_dsl-2751b_e1.patch
new file mode 100644
index 0000000..af22c2b
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/567-board_dsl-2751b_e1.patch
@@ -0,0 +1,94 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -156,6 +156,75 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
++	{ .offset = 96, .value = 0x2046 },
++	{ .offset = 97, .value = 0xfe9d },
++	{ .offset = 98, .value = 0x1854 },
++	{ .offset = 99, .value = 0xfa59 },
++	{ .offset = 112, .value = 0x2046 },
++	{ .offset = 113, .value = 0xfe79 },
++	{ .offset = 114, .value = 0x17f5 },
++	{ .offset = 115, .value = 0xfa47 },
++	{ .offset = 161, .value = 0x2222 },
++	{ .offset = 162, .value = 0x2222 },
++	{ .offset = 169, .value = 0x2222 },
++	{ .offset = 170, .value = 0x2222 },
++	{ .offset = 171, .value = 0x5555 },
++	{ .offset = 172, .value = 0x5555 },
++	{ .offset = 173, .value = 0x4444 },
++	{ .offset = 174, .value = 0x4444 },
++	{ .offset = 175, .value = 0x5555 },
++	{ .offset = 176, .value = 0x5555 },
++};
++
++static struct board_info __initdata board_dsl_2751b_d1 = {
++	.name				= "AW5200B",
++	.expected_cpu_id		= 0x6318,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++
++	.has_enetsw			= 1,
++
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43217,
++		.pci_bus			= 1,
++		.pci_dev			= 0,
++		.board_fixups			= dsl2751b_e1_fixups,
++		.num_board_fixups		= ARRAY_SIZE(dsl2751b_e1_fixups),
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6318 */
+ 
+ /*
+@@ -2167,6 +2236,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ 	&board_96318ref,
+ 	&board_96318ref_p300,
++	&board_dsl_2751b_d1,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
+@@ -2260,6 +2330,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ 	{ .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
+ 	{ .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, },
++	{ .compatible = "d-link,dsl-275xb-d", .data = &board_dsl_2751b_d1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	{ .compatible = "adb,a4001n", .data = &board_A4001N, },
diff --git a/target/linux/brcm63xx/patches-3.18/568-board_DGND3700v1_3800B.patch b/target/linux/brcm63xx/patches-3.18/568-board_DGND3700v1_3800B.patch
new file mode 100644
index 0000000..97e65d3
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/568-board_DGND3700v1_3800B.patch
@@ -0,0 +1,67 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1862,6 +1862,48 @@ static struct board_info __initdata boar
+ 	.has_ehci0 = 1,
+ };
+ 
++static struct b53_platform_data DGND3700v1_3800B_b53_pdata = {
++	.alias    = "eth0",
++};
++
++static struct spi_board_info DGND3700v1_3800B_spi_devices[] = {
++	{
++		.modalias = "b53-switch",
++		.max_speed_hz = 781000,
++		.bus_num = 0,
++		.chip_select = 1,
++		.platform_data = &DGND3700v1_3800B_b53_pdata,
++	}
++};
++
++static struct board_info __initdata board_DGND3700v1_3800B = {
++	.name				= "DGND3700v1_3800B",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 2,
++
++	.has_enetsw			= 1,
++	.enetsw = {
++		.used_ports = {
++			[5] = {
++				.used  = 1,
++				.phy_id  = 0xff,
++				.bypass_link = 1,
++				.force_speed = 1000,
++				.force_duplex_full = 1,
++				.name  = "RGMII",
++			},
++		},
++	},
++
++	.spis = DGND3700v1_3800B_spi_devices,
++	.num_spis = ARRAY_SIZE(DGND3700v1_3800B_spi_devices),
++};
++
+ static struct sprom_fixup __initdata vr3025u_fixups[] = {
+ 	{ .offset = 97, .value = 0xfeb3 },
+ 	{ .offset = 98, .value = 0x1618 },
+@@ -2310,6 +2352,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
++	&board_DGND3700v1_3800B,
+ 	&board_P870HW51A_V2,
+ 	&board_VR3025u,
+ 	&board_VR3025un,
+@@ -2412,6 +2455,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ 	{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ 	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++	{ .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, },
+ 	{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
diff --git a/target/linux/brcm63xx/patches-3.18/569-board_homehub2a.patch b/target/linux/brcm63xx/patches-3.18/569-board_homehub2a.patch
new file mode 100644
index 0000000..e7678a9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/569-board_homehub2a.patch
@@ -0,0 +1,51 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1478,6 +1478,32 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_homehub2a = {
++	.name				= "HOMEHUB2A",
++	.expected_cpu_id		= 0x6358,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 2,
++
++	.has_enet1			= 1,
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100        = 1,
++		.force_duplex_full      = 1,
++	},
++
++	.fallback_sprom = {
++		.type 			= SPROM_BCM4322,
++		.pci_bus		= 0,
++		.pci_dev		= 1,
++	},
++};
++
+ static struct board_info __initdata board_HW520 = {
+ 	.name				= "HW6358GW_B",
+ 	.expected_cpu_id		= 0x6358,
+@@ -2335,6 +2361,7 @@ static const struct board_info __initcon
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
+ 	&board_ct6373_1,
++	&board_homehub2a,
+ 	&board_HW520,
+ 	&board_HW553,
+ 	&board_HW556_A,
+@@ -2444,6 +2471,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, },
+ 	{ .compatible = "t-com,spw303v", .data = &board_spw303v, },
+ 	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
++	{ .compatible = "thomson,homehub2a", .data = &board_homehub2a, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6362
+ 	{ .compatible = "sagem,f@st2504n", .data = &board_fast2504n, },
diff --git a/target/linux/brcm63xx/patches-3.18/570-board_HG655b.patch b/target/linux/brcm63xx/patches-3.18/570-board_HG655b.patch
new file mode 100644
index 0000000..7c667bf
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/570-board_HG655b.patch
@@ -0,0 +1,72 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1930,6 +1930,53 @@ static struct board_info __initdata boar
+ 	.num_spis = ARRAY_SIZE(DGND3700v1_3800B_spi_devices),
+ };
+ 
++static struct board_info __initdata board_HG655b = {
++	.name				= "HW65x",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 2,
++
++	.has_caldata			= 1,
++	.caldata = {
++		{
++			.vendor			= PCI_VENDOR_ID_RALINK,
++			.caldata_offset		= 0x7c0000,
++			.slot			= 1,
++			.eeprom			= "rt2x00.eeprom",
++		},
++	},
++
++	.has_enetsw			= 1,
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "port1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "port2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "port3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "port4",
++			},
++		},
++	},
++};
++
+ static struct sprom_fixup __initdata vr3025u_fixups[] = {
+ 	{ .offset = 97, .value = 0xfeb3 },
+ 	{ .offset = 98, .value = 0x1618 },
+@@ -2380,6 +2427,7 @@ static const struct board_info __initcon
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
+ 	&board_DGND3700v1_3800B,
++	&board_HG655b,
+ 	&board_P870HW51A_V2,
+ 	&board_VR3025u,
+ 	&board_VR3025un,
+@@ -2483,6 +2531,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ 	{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ 	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++	{ .compatible = "huawei,hg655b", .data = &board_HG655b, },
+ 	{ .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, },
+ 	{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
diff --git a/target/linux/brcm63xx/patches-3.18/571-board_fast2704n.patch b/target/linux/brcm63xx/patches-3.18/571-board_fast2704n.patch
new file mode 100644
index 0000000..f4e0fbf
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/571-board_fast2704n.patch
@@ -0,0 +1,65 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -225,6 +225,46 @@ static struct board_info __initdata boar
+ 		.num_board_fixups		= ARRAY_SIZE(dsl2751b_e1_fixups),
+ 	},
+ };
++
++static struct board_info __initdata board_FAST2704N = {
++	.name				= "F@ST2704N",
++	.expected_cpu_id		= 0x6318,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++
++	.has_enetsw			= 1,
++
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6318 */
+ 
+ /*
+@@ -2352,6 +2392,7 @@ static const struct board_info __initcon
+ 	&board_96318ref,
+ 	&board_96318ref_p300,
+ 	&board_dsl_2751b_d1,
++	&board_FAST2704N,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
+@@ -2449,6 +2490,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
+ 	{ .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, },
+ 	{ .compatible = "d-link,dsl-275xb-d", .data = &board_dsl_2751b_d1, },
++	{ .compatible = "sagem,f@st2704n", .data = &board_FAST2704N, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	{ .compatible = "adb,a4001n", .data = &board_A4001N, },
diff --git a/target/linux/brcm63xx/patches-3.18/572-board_VR-3026e.patch b/target/linux/brcm63xx/patches-3.18/572-board_VR-3026e.patch
new file mode 100644
index 0000000..4358afd
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/572-board_VR-3026e.patch
@@ -0,0 +1,79 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -2168,6 +2168,60 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct sprom_fixup __initdata vr3026e_fixups[] = {
++	{ .offset = 97, .value = 0xfeb3 },
++	{ .offset = 98, .value = 0x1618 },
++	{ .offset = 99, .value = 0xfab0 },
++	{ .offset = 113, .value = 0xfed1 },
++	{ .offset = 114, .value = 0x1609 },
++	{ .offset = 115, .value = 0xfad9 },
++};
++
++static struct board_info __initdata board_VR3026e = {
++	.name					= "96368MT-1341N1",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.use_fallback_sprom			= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++
++	.has_enetsw				= 1,
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "port1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "port2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "port3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "port4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type				= SPROM_BCM43222,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++		.board_fixups			= vr3026e_fixups,
++		.num_board_fixups		= ARRAY_SIZE(vr3026e_fixups),
++	},
++};
++
+ static struct b53_platform_data WAP5813n_b53_pdata = {
+ 	.alias = "eth0",
+ };
+@@ -2472,6 +2526,7 @@ static const struct board_info __initcon
+ 	&board_P870HW51A_V2,
+ 	&board_VR3025u,
+ 	&board_VR3025un,
++	&board_VR3026e,
+ 	&board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+@@ -2572,6 +2627,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ 	{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ 	{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
++	{ .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
+ 	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ 	{ .compatible = "huawei,hg655b", .data = &board_HG655b, },
+ 	{ .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, },
diff --git a/target/linux/brcm63xx/patches-3.18/800-wl_exports.patch b/target/linux/brcm63xx/patches-3.18/800-wl_exports.patch
new file mode 100644
index 0000000..68d37c7
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/800-wl_exports.patch
@@ -0,0 +1,25 @@
+--- a/arch/mips/bcm63xx/nvram.c
++++ b/arch/mips/bcm63xx/nvram.c
+@@ -40,6 +40,12 @@ struct bcm963xx_nvram {
+ static struct bcm963xx_nvram nvram;
+ static int mac_addr_used;
+ 
++/*
++ * Required export for WL
++ */
++u32 nvram_buf[5] = { 0, cpu_to_le32(20), 0, 0, 0 };
++EXPORT_SYMBOL(nvram_buf);
++
+ void __init bcm63xx_nvram_init(void *addr)
+ {
+ 	unsigned int check_len;
+--- a/arch/mips/mm/cache.c
++++ b/arch/mips/mm/cache.c
+@@ -59,6 +59,7 @@ void (*_dma_cache_wback)(unsigned long s
+ void (*_dma_cache_inv)(unsigned long start, unsigned long size);
+ 
+ EXPORT_SYMBOL(_dma_cache_wback_inv);
++EXPORT_SYMBOL(_dma_cache_inv);
+ 
+ #endif /* CONFIG_DMA_NONCOHERENT || CONFIG_DMA_MAYBE_COHERENT */
+ 
diff --git a/target/linux/brcm63xx/patches-3.18/801-ssb_export_fallback_sprom.patch b/target/linux/brcm63xx/patches-3.18/801-ssb_export_fallback_sprom.patch
new file mode 100644
index 0000000..11a8353
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/801-ssb_export_fallback_sprom.patch
@@ -0,0 +1,31 @@
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -8,6 +8,7 @@
+  */
+ 
+ #include <linux/init.h>
++#include <linux/export.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
+ #include <linux/platform_device.h>
+@@ -387,7 +388,19 @@ struct fallback_sprom_match {
+ 	struct ssb_sprom sprom;
+ };
+ 
+-static struct fallback_sprom_match fallback_sprom;
++struct fallback_sprom_match fallback_sprom;
++
++int bcm63xx_get_fallback_sprom(uint pci_bus, uint pci_slot, struct ssb_sprom *out)
++{
++	if (pci_bus != fallback_sprom.pci_bus ||
++	    pci_slot != fallback_sprom.pci_dev)
++		pr_warn("fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
++			fallback_sprom.pci_bus, fallback_sprom.pci_dev,
++			pci_bus, pci_slot);
++	memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
++	return 0;
++}
++EXPORT_SYMBOL(bcm63xx_get_fallback_sprom);
+ 
+ #if defined(CONFIG_SSB_PCIHOST)
+ int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
diff --git a/target/linux/brcm63xx/patches-3.18/802-rtl8367r_fix_RGMII_support.patch b/target/linux/brcm63xx/patches-3.18/802-rtl8367r_fix_RGMII_support.patch
new file mode 100644
index 0000000..9037d89
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/802-rtl8367r_fix_RGMII_support.patch
@@ -0,0 +1,30 @@
+From e3208e6087642b95a5bab3101fc9c6e34892c861 Mon Sep 17 00:00:00 2001
+From: Miguel GAIO <miguel.gaio@efixo.com>
+Date: Fri, 6 Jul 2012 14:12:33 +0200
+Subject: [PATCH 6/8] * [rtl8367r] Fix RGMII support
+
+---
+ drivers/net/phy/rtl8367.c  |    5 +++++
+ 1 files changed, 5 insertions(+), 0 deletions(-)
+
+--- a/drivers/net/phy/rtl8367.c
++++ b/drivers/net/phy/rtl8367.c
+@@ -146,6 +146,10 @@
+ #define   RTL8367_EXT_RGMXF_TXDELAY_MASK	1
+ #define   RTL8367_EXT_RGMXF_RXDELAY_MASK	0x7
+ 
++#define RTL8367_PHY_AD_REG			0x130f
++#define    RTL8370_PHY_AD_DUMMY_1_OFFSET	5
++#define    RTL8370_PHY_AD_DUMMY_1_MASK		0xe0
++
+ #define RTL8367_DI_FORCE_REG(_x)		(0x1310 + (_x))
+ #define   RTL8367_DI_FORCE_MODE			BIT(12)
+ #define   RTL8367_DI_FORCE_NWAY			BIT(7)
+@@ -894,6 +898,7 @@ static int rtl8367_extif_set_mode(struct
+ 	case RTL8367_EXTIF_MODE_RGMII_33V:
+ 		REG_WR(smi, RTL8367_CHIP_DEBUG0_REG, 0x0367);
+ 		REG_WR(smi, RTL8367_CHIP_DEBUG1_REG, 0x7777);
++		REG_RMW(smi, RTL8367_PHY_AD_REG, BIT(5), 0);
+ 		break;
+ 
+ 	case RTL8367_EXTIF_MODE_TMII_MAC:
diff --git a/target/linux/brcm63xx/patches-3.18/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch b/target/linux/brcm63xx/patches-3.18/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch
new file mode 100644
index 0000000..8b603e8
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch
@@ -0,0 +1,26 @@
+From ff3409ab17d56450943364ba49a16960e3cdda9b Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 6 Apr 2014 22:33:16 +0200
+Subject: [RFC] jffs2: work around unaligned accesses failing on bcm63xx/smp
+
+Unligned memcpy_fromio randomly fails with an unaligned dst. Work around
+it by ensuring we are always doing aligned copies.
+
+Should fix filename corruption in jffs2 with SMP.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ fs/jffs2/nodelist.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/fs/jffs2/nodelist.h
++++ b/fs/jffs2/nodelist.h
+@@ -255,7 +255,7 @@ struct jffs2_full_dirent
+ 	uint32_t ino; /* == zero for unlink */
+ 	unsigned int nhash;
+ 	unsigned char type;
+-	unsigned char name[0];
++	unsigned char name[0] __attribute__((aligned((sizeof(long)))));
+ };
+ 
+ /*
diff --git a/target/linux/brcm63xx/patches-3.18/804-bcm63xx_enet_63268_rgmii_ports.patch b/target/linux/brcm63xx/patches-3.18/804-bcm63xx_enet_63268_rgmii_ports.patch
new file mode 100644
index 0000000..770f39e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.18/804-bcm63xx_enet_63268_rgmii_ports.patch
@@ -0,0 +1,13 @@
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -2272,6 +2272,10 @@ static int bcm_enetsw_open(struct net_de
+ 
+ 		rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
+ 		rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
++		if (BCMCPU_IS_63268()) {
++			rgmii_ctrl |= ENETSW_RGMII_CTRL_TIMING_SEL_EN;
++			rgmii_ctrl |= ENETSW_RGMII_CTRL_MII_OVERRIDE_EN;
++		}
+ 		enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
+ 	}
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/001-4.2-MIPS-Add-support-for-vmlinux.bin-appended-dtb.patch b/target/linux/brcm63xx/patches-4.1/001-4.2-MIPS-Add-support-for-vmlinux.bin-appended-dtb.patch
new file mode 100644
index 0000000..fa7732b
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/001-4.2-MIPS-Add-support-for-vmlinux.bin-appended-dtb.patch
@@ -0,0 +1,112 @@
+From 1da8f1798e307fb8422753984339beb00025f97d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 12 Apr 2015 12:24:58 +0200
+Subject: [PATCH] MIPS: Add support for vmlinux.bin appended dtb
+
+Add support for detecting a vmlinux.bin appended dtb and overriding
+the boot arguments to match the UHI interface.
+
+Due to the PERCPU section being empty for !SMP, but still modifying
+the current address by aligning it to the page size, do not define
+it for !SMP builds to allow __appended_dtb to still point to
+the actual end of the data.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+Cc: linux-mips@linux-mips.org
+Cc: devicetree@vger.kernel.org
+Cc: John Crispin <blogic@openwrt.org>
+Cc: Kevin Cernekee <cernekee@gmail.com>
+Cc: Florian Fainelli <f.fainelli@gmail.com>
+Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
+Cc: Markos Chandras <markos.chandras@imgtec.com>
+Cc: Andrew Bresticker <abrestic@chromium.org>
+Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
+Cc: Paul Burton <paul.burton@imgtec.com>
+Cc: James Hartley <James.Hartley@imgtec.com>
+Patchwork: https://patchwork.linux-mips.org/patch/9739/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+---
+ arch/mips/Kconfig              | 27 +++++++++++++++++++++++++++
+ arch/mips/kernel/head.S        | 16 ++++++++++++++++
+ arch/mips/kernel/vmlinux.lds.S |  8 +++++++-
+ 3 files changed, 50 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -2703,6 +2703,33 @@ config BOOT_RAW
+ 
+ 
+ 
++choice
++	prompt "Kernel appended dtb support" if OF
++	default MIPS_NO_APPENDED_DTB
++
++	config MIPS_NO_APPENDED_DTB
++		bool "None"
++		help
++		  Do not enable appended dtb support.
++
++	config MIPS_RAW_APPENDED_DTB
++		bool "vmlinux.bin"
++		help
++		  With this option, the boot code will look for a device tree binary
++		  DTB) appended to raw vmlinux.bin (without decompressor).
++		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
++
++		  This is meant as a backward compatibility convenience for those
++		  systems with a bootloader that can't be upgraded to accommodate
++		  the documented boot protocol using a device tree.
++
++		  Beware that there is very little in terms of protection against
++		  this option being confused by leftover garbage in memory that might
++		  look like a DTB header after a reboot if no actual DTB is appended
++		  to vmlinux.bin.  Do not leave this option active in a production kernel
++		  if you don't intend to always append a DTB.
++endchoice
++
+ endmenu
+ 
+ config LOCKDEP_SUPPORT
+--- a/arch/mips/kernel/head.S
++++ b/arch/mips/kernel/head.S
+@@ -100,6 +100,22 @@ NESTED(kernel_entry, 16, sp)			# kernel
+ 	jr	t0
+ 0:
+ 
++#ifdef CONFIG_MIPS_RAW_APPENDED_DTB
++	PTR_LA		t0, __appended_dtb
++
++#ifdef CONFIG_CPU_BIG_ENDIAN
++	li		t1, 0xd00dfeed
++#else
++	li		t1, 0xedfe0dd0
++#endif
++	lw		t2, (t0)
++	bne		t1, t2, not_found
++	 nop
++
++	move		a1, t0
++	PTR_LI		a0, -2
++not_found:
++#endif
+ 	PTR_LA		t0, __bss_start		# clear .bss
+ 	LONG_S		zero, (t0)
+ 	PTR_LA		t1, __bss_stop - LONGSIZE
+--- a/arch/mips/kernel/vmlinux.lds.S
++++ b/arch/mips/kernel/vmlinux.lds.S
+@@ -125,8 +125,14 @@ SECTIONS
+ 	.exit.data : {
+ 		EXIT_DATA
+ 	}
+-
++#ifdef CONFIG_SMP
+ 	PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
++#endif
++#ifdef CONFIG_MIPS_RAW_APPENDED_DTB
++	__appended_dtb = .;
++	/* leave space for appended DTB */
++	. += 0x100000;
++#endif
+ 	/*
+ 	 * Align to 64K in attempt to eliminate holes before the
+ 	 * .bss..swapper_pg_dir section at the start of .bss.  This
diff --git a/target/linux/brcm63xx/patches-4.1/002-4.2-irqchip-Move-IRQCHIP_DECLARE-macro-to-include-linux-.patch b/target/linux/brcm63xx/patches-4.1/002-4.2-irqchip-Move-IRQCHIP_DECLARE-macro-to-include-linux-.patch
new file mode 100644
index 0000000..83c07e6
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/002-4.2-irqchip-Move-IRQCHIP_DECLARE-macro-to-include-linux-.patch
@@ -0,0 +1,79 @@
+From 91e20b5040c67c51aad88cf87db4305c5bd7f79d Mon Sep 17 00:00:00 2001
+From: Joel Porquet <joel@porquet.org>
+Date: Thu, 2 Jul 2015 15:32:00 -0400
+Subject: [PATCH] irqchip: Move IRQCHIP_DECLARE macro to
+ include/linux/irqchip.h
+
+At the moment the IRQCHIP_DECLARE macro is only declared locally in
+drivers/irqchip/irqchip.h. It prevents from using it directly in arch/*
+directories whenever irqchip drivers only exist there, which happens in a few
+cases (e.g. arc, arm, microblaze and mips).
+
+This patch makes the macro to be globally defined, i.e. in
+include/linux/irqchip.h, and thus usable for arch-specific declarations of
+irqchip drivers. In this way, it is very similar to what clocksource does (ie
+CLOCKSOURCE_OF_DECLARE is defined in include/linux/clocksource.h).
+
+For now, this patch only moves the declaration of the macro
+IRQCHIP_DECLARE to the global header 'include/linux/irqchip.h' and make
+'drivers/irqchip/irqchip.h' include 'include/linux/irqchip.h'. Later, other
+patches will get rid of 'drivers/irqchip/irqchip.h' and modify all the impacted
+irqchip drivers.
+
+Signed-off-by: Joel Porquet <joel@porquet.org>
+Cc: Jason Cooper <jason@lakedaemon.net>
+Link: http://lkml.kernel.org/r/1435865565-14114-1-git-send-email-joel@porquet.org
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+---
+ drivers/irqchip/irqchip.h | 19 +------------------
+ include/linux/irqchip.h   | 14 ++++++++++++++
+ 2 files changed, 15 insertions(+), 18 deletions(-)
+
+--- a/drivers/irqchip/irqchip.h
++++ b/drivers/irqchip/irqchip.h
+@@ -8,21 +8,4 @@
+  * warranty of any kind, whether express or implied.
+  */
+ 
+-#ifndef _IRQCHIP_H
+-#define _IRQCHIP_H
+-
+-#include <linux/of.h>
+-
+-/*
+- * This macro must be used by the different irqchip drivers to declare
+- * the association between their DT compatible string and their
+- * initialization function.
+- *
+- * @name: name that must be unique accross all IRQCHIP_DECLARE of the
+- * same file.
+- * @compstr: compatible string of the irqchip driver
+- * @fn: initialization function
+- */
+-#define IRQCHIP_DECLARE(name, compat, fn) OF_DECLARE_2(irqchip, name, compat, fn)
+-
+-#endif
++#include <linux/irqchip.h>
+--- a/include/linux/irqchip.h
++++ b/include/linux/irqchip.h
+@@ -11,6 +11,20 @@
+ #ifndef _LINUX_IRQCHIP_H
+ #define _LINUX_IRQCHIP_H
+ 
++#include <linux/of.h>
++
++/*
++ * This macro must be used by the different irqchip drivers to declare
++ * the association between their DT compatible string and their
++ * initialization function.
++ *
++ * @name: name that must be unique accross all IRQCHIP_DECLARE of the
++ * same file.
++ * @compstr: compatible string of the irqchip driver
++ * @fn: initialization function
++ */
++#define IRQCHIP_DECLARE(name, compat, fn) OF_DECLARE_2(irqchip, name, compat, fn)
++
+ #ifdef CONFIG_IRQCHIP
+ void irqchip_init(void);
+ #else
diff --git a/target/linux/brcm63xx/patches-4.1/010-4.3-01-spi-bcm63xx-hsspi-add-support-for-dual-spi-read-writ.patch b/target/linux/brcm63xx/patches-4.1/010-4.3-01-spi-bcm63xx-hsspi-add-support-for-dual-spi-read-writ.patch
new file mode 100644
index 0000000..1be40eb
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/010-4.3-01-spi-bcm63xx-hsspi-add-support-for-dual-spi-read-writ.patch
@@ -0,0 +1,68 @@
+From 61dc388f577b6f984797949f32c30021d9ea73dc Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 23 Aug 2015 12:16:02 +0200
+Subject: [PATCH V2] spi/bcm63xx-hsspi: add support for dual spi read/write
+
+Add support for dual read/writes on spi-bcm63xx-hsspi. This has been
+tested with a s25fl129p1 dual read capable spi flash, with a nice speed
+improvement:
+
+serial read:
+
+root@OpenWrt:/# time dd if=/dev/mtd4 of=/dev/null bs=8192
+2032+0 records in
+2032+0 records out
+real    0m 4.39s
+user    0m 0.00s
+sys     0m 1.55s
+
+dual read:
+
+root@OpenWrt:/# time dd if=/dev/mtd4 of=/dev/null bs=8192
+2032+0 records in
+2032+0 records out
+real    0m 3.09s
+user    0m 0.00s
+sys     0m 1.56s
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/spi/spi-bcm63xx-hsspi.c | 13 +++++++++----
+ 1 file changed, 9 insertions(+), 4 deletions(-)
+
+--- a/drivers/spi/spi-bcm63xx-hsspi.c
++++ b/drivers/spi/spi-bcm63xx-hsspi.c
+@@ -76,6 +76,7 @@
+ #define HSSPI_FIFO_REG(x)			(0x200 + (x) * 0x200)
+ 
+ 
++#define HSSPI_OP_MULTIBIT			BIT(11)
+ #define HSSPI_OP_CODE_SHIFT			13
+ #define HSSPI_OP_SLEEP				(0 << HSSPI_OP_CODE_SHIFT)
+ #define HSSPI_OP_READ_WRITE			(1 << HSSPI_OP_CODE_SHIFT)
+@@ -171,9 +172,12 @@ static int bcm63xx_hsspi_do_txrx(struct
+ 	if (opcode != HSSPI_OP_READ)
+ 		step_size -= HSSPI_OPCODE_LEN;
+ 
+-	__raw_writel(0 << MODE_CTRL_PREPENDBYTE_CNT_SHIFT |
+-		     2 << MODE_CTRL_MULTIDATA_WR_STRT_SHIFT |
+-		     2 << MODE_CTRL_MULTIDATA_RD_STRT_SHIFT | 0xff,
++	if ((opcode == HSSPI_OP_READ && t->rx_nbits == SPI_NBITS_DUAL) ||
++	    (opcode == HSSPI_OP_WRITE && t->tx_nbits == SPI_NBITS_DUAL))
++		opcode |= HSSPI_OP_MULTIBIT;
++
++	__raw_writel(1 << MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT |
++		     1 << MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT | 0xff,
+ 		     bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select));
+ 
+ 	while (pending > 0) {
+@@ -374,7 +378,8 @@ static int bcm63xx_hsspi_probe(struct pl
+ 	master->num_chipselect = 8;
+ 	master->setup = bcm63xx_hsspi_setup;
+ 	master->transfer_one_message = bcm63xx_hsspi_transfer_one;
+-	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
++	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |
++			    SPI_RX_DUAL | SPI_TX_DUAL;
+ 	master->bits_per_word_mask = SPI_BPW_MASK(8);
+ 	master->auto_runtime_pm = true;
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch b/target/linux/brcm63xx/patches-4.1/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch
new file mode 100644
index 0000000..63d385b
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch
@@ -0,0 +1,28 @@
+From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:19 +0100
+Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay
+
+Knowledge of the clock setup delay should remain at the clock level (so
+it can be clock specific and CPU specific). Add the 100 milliseconds
+required clock delay for the USB host clock when it gets enabled.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/clk.c |    5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -177,6 +177,11 @@ static void usbh_set(struct clk *clk, in
+ 		bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
+ 	else if (BCMCPU_IS_6368())
+ 		bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
++	else
++		return;
++
++	if (enable)
++		msleep(100);
+ }
+ 
+ static struct clk clk_usbh = {
diff --git a/target/linux/brcm63xx/patches-4.1/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch b/target/linux/brcm63xx/patches-4.1/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch
new file mode 100644
index 0000000..5b2c03f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch
@@ -0,0 +1,41 @@
+From 8e9bf528a122741f0171b89c297b63041116d704 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:20 +0100
+Subject: [PATCH 02/11] MIPS: BCM63XX: add USB device clock enable delay to
+ clock code
+
+This patch adds the required 10 micro seconds delay to the USB device
+clock enable operation. Put this where the correct clock knowledege is,
+which is in the clock code, and remove this delay from the bcm63xx_udc
+gadget driver where it was before.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/clk.c          |    5 +++++
+ drivers/usb/gadget/bcm63xx_udc.c |    1 -
+ 2 files changed, 5 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -199,6 +199,11 @@ static void usbd_set(struct clk *clk, in
+ 		bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
+ 	else if (BCMCPU_IS_6368())
+ 		bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
++	else
++		return;
++
++	if (enable)
++		udelay(10);
+ }
+ 
+ static struct clk clk_usbd = {
+--- a/drivers/usb/gadget/udc/bcm63xx_udc.c
++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
+@@ -391,7 +391,6 @@ static inline void set_clocks(struct bcm
+ 	if (is_enabled) {
+ 		clk_enable(udc->usbh_clk);
+ 		clk_enable(udc->usbd_clk);
+-		udelay(10);
+ 	} else {
+ 		clk_disable(udc->usbd_clk);
+ 		clk_disable(udc->usbh_clk);
diff --git a/target/linux/brcm63xx/patches-4.1/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch b/target/linux/brcm63xx/patches-4.1/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch
new file mode 100644
index 0000000..5d106f8
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch
@@ -0,0 +1,151 @@
+From ac9b0b574d54be28b300bf99ffe092a2c589484f Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:21 +0100
+Subject: [PATCH 03/11] MIPS: BCM63XX: move code touching the USB private
+ register
+
+This patch moves the code touching the USB private register in the
+bcm63xx USB gadget driver to arch/mips/bcm63xx/usb-common.c in
+preparation for adding support for OHCI and EHCI host controllers which
+will also touch the USB private register.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile                         |    2 +-
+ arch/mips/bcm63xx/usb-common.c                     |   53 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h    |    9 ++++
+ drivers/usb/gadget/bcm63xx_udc.c                   |   27 ++--------
+ 4 files changed, 67 insertions(+), 24 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/usb-common.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,7 +1,7 @@
+ obj-y		+= clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
+ 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
+-		   dev-wdt.o dev-usb-usbd.o
++		   dev-wdt.o dev-usb-usbd.o usb-common.o
+ obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+ 
+ obj-y		+= boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -0,0 +1,53 @@
++/*
++ * Broadcom BCM63xx common USB device configuration code
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
++ * Copyright (C) 2012 Broadcom Corporation
++ *
++ */
++#include <linux/export.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_usb_priv.h>
++
++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
++{
++	u32 val;
++
++	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
++	if (is_device) {
++		val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
++		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++	} else {
++		val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
++		val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++	}
++	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++
++	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++	if (is_device)
++		val |= USBH_PRIV_SWAP_USBD_MASK;
++	else
++		val &= ~USBH_PRIV_SWAP_USBD_MASK;
++	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
++}
++EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
++
++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
++{
++	u32 val;
++
++	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
++	if (is_on)
++		val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++	else
++		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++}
++EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
+@@ -0,0 +1,9 @@
++#ifndef BCM63XX_USB_PRIV_H_
++#define BCM63XX_USB_PRIV_H_
++
++#include <linux/types.h>
++
++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
++
++#endif /* BCM63XX_USB_PRIV_H_ */
+--- a/drivers/usb/gadget/udc/bcm63xx_udc.c
++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
+@@ -40,6 +40,7 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_regs.h>
++#include <bcm63xx_usb_priv.h>
+ 
+ #define DRV_MODULE_NAME		"bcm63xx_udc"
+ 
+@@ -868,22 +869,7 @@ static void bcm63xx_select_phy_mode(stru
+ 		bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG);
+ 	}
+ 
+-	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+-	if (is_device) {
+-		val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
+-		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+-	} else {
+-		val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
+-		val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+-	}
+-	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
+-
+-	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
+-	if (is_device)
+-		val |= USBH_PRIV_SWAP_USBD_MASK;
+-	else
+-		val &= ~USBH_PRIV_SWAP_USBD_MASK;
+-	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
++	bcm63xx_usb_priv_select_phy_mode(portmask, is_device);
+ }
+ 
+ /**
+@@ -897,14 +883,9 @@ static void bcm63xx_select_phy_mode(stru
+  */
+ static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on)
+ {
+-	u32 val, portmask = BIT(udc->pd->port_no);
++	u32 portmask = BIT(udc->pd->port_no);
+ 
+-	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+-	if (is_on)
+-		val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+-	else
+-		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+-	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++	bcm63xx_usb_priv_select_pullup(portmask, is_on);
+ }
+ 
+ /**
diff --git a/target/linux/brcm63xx/patches-4.1/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch b/target/linux/brcm63xx/patches-4.1/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch
new file mode 100644
index 0000000..40bbe08
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch
@@ -0,0 +1,169 @@
+From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:22 +0100
+Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to
+ common USB code
+
+This patch updates the common USB code touching the USB private
+registers with the specific bits to properly enable OHCI and EHCI
+controllers on BCM63xx SoCs. As a result we now need to protect access
+to Read Modify Write sequences using a spinlock because we cannot
+guarantee that any of the exposed helper will not be called
+concurrently.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/usb-common.c                     |   97 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h    |    2 +
+ 2 files changed, 99 insertions(+)
+
+--- a/arch/mips/bcm63xx/usb-common.c
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -5,10 +5,12 @@
+  * License.  See the file "COPYING" in the main directory of this archive
+  * for more details.
+  *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+  * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
+  * Copyright (C) 2012 Broadcom Corporation
+  *
+  */
++#include <linux/spinlock.h>
+ #include <linux/export.h>
+ 
+ #include <bcm63xx_cpu.h>
+@@ -16,9 +18,14 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_usb_priv.h>
+ 
++static DEFINE_SPINLOCK(usb_priv_reg_lock);
++
+ void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
+ {
+ 	u32 val;
++	unsigned long flags;
++
++	spin_lock_irqsave(&usb_priv_reg_lock, flags);
+ 
+ 	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+ 	if (is_device) {
+@@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3
+ 	else
+ 		val &= ~USBH_PRIV_SWAP_USBD_MASK;
+ 	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
++
++	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+ }
+ EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
+ 
+ void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
+ {
+ 	u32 val;
++	unsigned long flags;
++
++	spin_lock_irqsave(&usb_priv_reg_lock, flags);
+ 
+ 	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+ 	if (is_on)
+@@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32
+ 	else
+ 		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+ 	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++
++	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+ }
+ EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
++
++/* The following array represents the meaning of the DESC/DATA
++ * endian swapping with respect to the CPU configured endianness
++ *
++ * DATA	ENDN	mmio	descriptor
++ * 0	0	BE	invalid
++ * 0	1	BE	LE
++ * 1	0	BE	BE
++ * 1	1	BE	invalid
++ *
++ * Since BCM63XX SoCs are configured to be in big-endian mode
++ * we want configuration at line 3.
++ */
++void bcm63xx_usb_priv_ohci_cfg_set(void)
++{
++	u32 reg;
++	unsigned long flags;
++
++	spin_lock_irqsave(&usb_priv_reg_lock, flags);
++
++	if (BCMCPU_IS_6348())
++		bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG);
++	else if (BCMCPU_IS_6358()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
++		reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
++		/*
++		 * The magic value comes for the original vendor BSP
++		 * and is needed for USB to work. Datasheet does not
++		 * help, so the magic value is used as-is.
++		 */
++		bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
++				USBH_PRIV_TEST_6358_REG);
++
++	} else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++		reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++		reg |= USBH_PRIV_SETUP_IOC_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++	}
++
++	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
++}
++
++void bcm63xx_usb_priv_ehci_cfg_set(void)
++{
++	u32 reg;
++	unsigned long flags;
++
++	spin_lock_irqsave(&usb_priv_reg_lock, flags);
++
++	if (BCMCPU_IS_6358()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
++		reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
++
++		/*
++		 * The magic value comes for the original vendor BSP
++		 * and is needed for USB to work. Datasheet does not
++		 * help, so the magic value is used as-is.
++		 */
++		bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
++				USBH_PRIV_TEST_6358_REG);
++
++	} else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++		reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++		reg |= USBH_PRIV_SETUP_IOC_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++	}
++
++	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
+@@ -5,5 +5,7 @@
+ 
+ void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
+ void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
++void bcm63xx_usb_priv_ohci_cfg_set(void);
++void bcm63xx_usb_priv_ehci_cfg_set(void);
+ 
+ #endif /* BCM63XX_USB_PRIV_H_ */
diff --git a/target/linux/brcm63xx/patches-4.1/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch b/target/linux/brcm63xx/patches-4.1/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch
new file mode 100644
index 0000000..768dcca
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch
@@ -0,0 +1,62 @@
+From 94ec618bd1a6b07fafbbfc9bcc54e7f9360ff9a0 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:23 +0100
+Subject: [PATCH 05/11] MIPS: BCM63XX: introduce BCM63XX_OHCI configuration
+ symbol
+
+This configuration symbol can be used by CPUs supporting the on-chip
+OHCI controller, and ensures that all relevant OHCI-related
+configuration options are correctly selected. So far, OHCI support is
+available for the 6328, 6348, 6358 and 6358 SoCs.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Kconfig |   15 ++++++++++-----
+ 1 file changed, 10 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -6,10 +6,17 @@ config BCM63XX_CPU_3368
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
+ 
++config BCM63XX_OHCI
++	bool
++	select USB_ARCH_HAS_OHCI
++	select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
++	select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
++
+ config BCM63XX_CPU_6328
+ 	bool "support 6328 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
+ 
+ config BCM63XX_CPU_6338
+ 	bool "support 6338 CPU"
+@@ -24,21 +31,25 @@ config BCM63XX_CPU_6348
+ 	bool "support 6348 CPU"
+ 	select SYS_HAS_CPU_BMIPS32_3300
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
+ 
+ config BCM63XX_CPU_6358
+ 	bool "support 6358 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
+ 
+ config BCM63XX_CPU_6362
+ 	bool "support 6362 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
+ 
+ config BCM63XX_CPU_6368
+ 	bool "support 6368 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
+ endmenu
+ 
+ source "arch/mips/bcm63xx/boards/Kconfig"
diff --git a/target/linux/brcm63xx/patches-4.1/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch b/target/linux/brcm63xx/patches-4.1/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch
new file mode 100644
index 0000000..111d481
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch
@@ -0,0 +1,138 @@
+From 30d22baef255c99a12c4858ce4ab0d45f0d8c9ae Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:24 +0100
+Subject: [PATCH 06/11] MIPS: BCM63XX: add support for the on-chip OHCI
+ controller
+
+Broadcom BCM63XX SoCs include an on-chip OHCI controller which can be
+driven by the ohci-platform generic driver by using specific power
+on/off/suspend callback to manage clocks and hardware specific
+configuration.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile                         |    2 +-
+ arch/mips/bcm63xx/dev-usb-ohci.c                   |   94 ++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h        |    6 ++
+ 3 files changed, 101 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,7 +1,7 @@
+ obj-y		+= clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
+ 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
+-		   dev-wdt.o dev-usb-usbd.o usb-common.o
++		   dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
+ obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+ 
+ obj-y		+= boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/dev-usb-ohci.c
+@@ -0,0 +1,94 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/usb/ohci_pdriver.h>
++#include <linux/dma-mapping.h>
++#include <linux/clk.h>
++#include <linux/delay.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_usb_priv.h>
++#include <bcm63xx_dev_usb_ohci.h>
++
++static struct resource ohci_resources[] = {
++	{
++		.start		= -1, /* filled at runtime */
++		.end		= -1, /* filled at runtime */
++		.flags		= IORESOURCE_MEM,
++	},
++	{
++		.start		= -1, /* filled at runtime */
++		.flags		= IORESOURCE_IRQ,
++	},
++};
++
++static u64 ohci_dmamask = DMA_BIT_MASK(32);
++
++static struct clk *usb_host_clock;
++
++static int bcm63xx_ohci_power_on(struct platform_device *pdev)
++{
++	usb_host_clock = clk_get(&pdev->dev, "usbh");
++	if (IS_ERR_OR_NULL(usb_host_clock))
++		return -ENODEV;
++
++	clk_prepare_enable(usb_host_clock);
++
++	bcm63xx_usb_priv_ohci_cfg_set();
++
++	return 0;
++}
++
++static void bcm63xx_ohci_power_off(struct platform_device *pdev)
++{
++	if (!IS_ERR_OR_NULL(usb_host_clock)) {
++		clk_disable_unprepare(usb_host_clock);
++		clk_put(usb_host_clock);
++	}
++}
++
++static struct usb_ohci_pdata bcm63xx_ohci_pdata = {
++	.big_endian_desc	= 1,
++	.big_endian_mmio	= 1,
++	.no_big_frame_no	= 1,
++	.num_ports		= 1,
++	.power_on		= bcm63xx_ohci_power_on,
++	.power_off		= bcm63xx_ohci_power_off,
++	.power_suspend		= bcm63xx_ohci_power_off,
++};
++
++static struct platform_device bcm63xx_ohci_device = {
++	.name		= "ohci-platform",
++	.id		= -1,
++	.num_resources	= ARRAY_SIZE(ohci_resources),
++	.resource	= ohci_resources,
++	.dev		= {
++		.platform_data		= &bcm63xx_ohci_pdata,
++		.dma_mask		= &ohci_dmamask,
++		.coherent_dma_mask	= DMA_BIT_MASK(32),
++	},
++};
++
++int __init bcm63xx_ohci_register(void)
++{
++	if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
++		return -ENODEV;
++
++	ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
++	ohci_resources[0].end = ohci_resources[0].start;
++	ohci_resources[0].end += RSET_OHCI_SIZE - 1;
++	ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0);
++
++	return platform_device_register(&bcm63xx_ohci_device);
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+@@ -0,0 +1,6 @@
++#ifndef BCM63XX_DEV_USB_OHCI_H_
++#define BCM63XX_DEV_USB_OHCI_H_
++
++int bcm63xx_ohci_register(void);
++
++#endif /* BCM63XX_DEV_USB_OHCI_H_ */
diff --git a/target/linux/brcm63xx/patches-4.1/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-4.1/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch
new file mode 100644
index 0000000..2c26482
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch
@@ -0,0 +1,36 @@
+From 33ef960aed15f9a98a2c51d8d794cd72418e0be4 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:25 +0100
+Subject: [PATCH 07/11] MIPS: BCM63XX: register OHCI controller if board
+ enables it
+
+BCM63XX-based boards can control the registration of the OHCI controller
+by setting their has_ohci0 flag to 1. Handle this in the generic
+code dealing with board registration and call the actual helper to
+register the OHCI controller.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |    4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -26,6 +26,7 @@
+ #include <bcm63xx_dev_hsspi.h>
+ #include <bcm63xx_dev_pcmcia.h>
+ #include <bcm63xx_dev_spi.h>
++#include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+ 
+@@ -898,6 +899,9 @@ int __init board_register_devices(void)
+ 	if (board.has_usbd)
+ 		bcm63xx_usbd_register(&board.usbd);
+ 
++	if (board.has_ohci0)
++		bcm63xx_ohci_register();
++
+ 	if (board.has_dsp)
+ 		bcm63xx_dsp_register(&board.dsp);
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch b/target/linux/brcm63xx/patches-4.1/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch
new file mode 100644
index 0000000..bce91e3
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch
@@ -0,0 +1,62 @@
+From 00da1683364e58c6430a4577123d01037f8faddc Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:26 +0100
+Subject: [PATCH 08/11] MIPS: BCM63XX: introduce BCM63XX_EHCI configuration
+ symbol
+
+This configuration symbol can be used by CPUs supporting the on-chip
+EHCI controller, and ensures that all relevant EHCI-related
+configuration options are selected. So far BCM6328, BCM6358 and BCM6368
+have an EHCI controller and do select this symbol. Update
+drivers/usb/host/Kconfig with BCM63XX to update direct unmet
+dependencies.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Kconfig |    9 +++++++++
+ drivers/usb/host/Kconfig  |    5 +++--
+ 2 files changed, 12 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -12,11 +12,18 @@ config BCM63XX_OHCI
+ 	select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
+ 	select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
+ 
++config BCM63XX_EHCI
++	bool
++	select USB_ARCH_HAS_EHCI
++	select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
++	select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
++
+ config BCM63XX_CPU_6328
+ 	bool "support 6328 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
+ 	select BCM63XX_OHCI
++	select BCM63XX_EHCI
+ 
+ config BCM63XX_CPU_6338
+ 	bool "support 6338 CPU"
+@@ -38,18 +45,21 @@ config BCM63XX_CPU_6358
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
+ 	select BCM63XX_OHCI
++	select BCM63XX_EHCI
+ 
+ config BCM63XX_CPU_6362
+ 	bool "support 6362 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
+ 	select BCM63XX_OHCI
++	select BCM63XX_EHCI
+ 
+ config BCM63XX_CPU_6368
+ 	bool "support 6368 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
+ 	select BCM63XX_OHCI
++	select BCM63XX_EHCI
+ endmenu
+ 
+ source "arch/mips/bcm63xx/boards/Kconfig"
diff --git a/target/linux/brcm63xx/patches-4.1/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch b/target/linux/brcm63xx/patches-4.1/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch
new file mode 100644
index 0000000..8b1f8d2
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch
@@ -0,0 +1,137 @@
+From e38f13bd6408769c0b565bb1079024f496eee121 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:27 +0100
+Subject: [PATCH 09/11] MIPS: BCM63XX: add support for the on-chip EHCI
+ controller
+
+Broadcom BCM63XX SoCs include an on-chip EHCI controller which can be
+driven by the generic ehci-platform driver by using specific power
+on/off/suspend callbacks to manage clocks and hardware specific
+configuration.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile                         |    2 +-
+ arch/mips/bcm63xx/dev-usb-ehci.c                   |   92 ++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h        |    6 ++
+ 3 files changed, 99 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,7 +1,8 @@
+ obj-y		+= clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
+ 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
+-		   dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
++		   dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
++		   usb-common.o
+ obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+ 
+ obj-y		+= boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -0,0 +1,92 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/usb/ehci_pdriver.h>
++#include <linux/dma-mapping.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_usb_priv.h>
++#include <bcm63xx_dev_usb_ehci.h>
++
++static struct resource ehci_resources[] = {
++	{
++		.start		= -1, /* filled at runtime */
++		.end		= -1, /* filled at runtime */
++		.flags		= IORESOURCE_MEM,
++	},
++	{
++		.start		= -1, /* filled at runtime */
++		.flags		= IORESOURCE_IRQ,
++	},
++};
++
++static u64 ehci_dmamask = DMA_BIT_MASK(32);
++
++static struct clk *usb_host_clock;
++
++static int bcm63xx_ehci_power_on(struct platform_device *pdev)
++{
++	usb_host_clock = clk_get(&pdev->dev, "usbh");
++	if (IS_ERR_OR_NULL(usb_host_clock))
++		return -ENODEV;
++
++	clk_prepare_enable(usb_host_clock);
++
++	bcm63xx_usb_priv_ehci_cfg_set();
++
++	return 0;
++}
++
++static void bcm63xx_ehci_power_off(struct platform_device *pdev)
++{
++	if (!IS_ERR_OR_NULL(usb_host_clock)) {
++		clk_disable_unprepare(usb_host_clock);
++		clk_put(usb_host_clock);
++	}
++}
++
++static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
++	.big_endian_desc	= 1,
++	.big_endian_mmio	= 1,
++	.power_on		= bcm63xx_ehci_power_on,
++	.power_off		= bcm63xx_ehci_power_off,
++	.power_suspend		= bcm63xx_ehci_power_off,
++};
++
++static struct platform_device bcm63xx_ehci_device = {
++	.name		= "ehci-platform",
++	.id		= -1,
++	.num_resources	= ARRAY_SIZE(ehci_resources),
++	.resource	= ehci_resources,
++	.dev		= {
++		.platform_data		= &bcm63xx_ehci_pdata,
++		.dma_mask		= &ehci_dmamask,
++		.coherent_dma_mask	= DMA_BIT_MASK(32),
++	},
++};
++
++int __init bcm63xx_ehci_register(void)
++{
++	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++		return 0;
++
++	ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
++	ehci_resources[0].end = ehci_resources[0].start;
++	ehci_resources[0].end += RSET_EHCI_SIZE - 1;
++	ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0);
++
++	return platform_device_register(&bcm63xx_ehci_device);
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+@@ -0,0 +1,6 @@
++#ifndef BCM63XX_DEV_USB_EHCI_H_
++#define BCM63XX_DEV_USB_EHCI_H_
++
++int bcm63xx_ehci_register(void);
++
++#endif /* BCM63XX_DEV_USB_EHCI_H_ */
diff --git a/target/linux/brcm63xx/patches-4.1/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-4.1/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch
new file mode 100644
index 0000000..641a57c
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch
@@ -0,0 +1,36 @@
+From 709ef2034f5ba06da35f89856ad7baf2b7a41287 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:28 +0100
+Subject: [PATCH 10/11] MIPS: BCM63XX: register EHCI controller if board
+ enables it
+
+BCM63XX-based board can control the registration of the EHCI controller
+by setting their has_ehci0 flag to 1. Handle this in the generic
+code dealing with board registration and call the actual helper to register
+the EHCI controller.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |    4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -26,6 +26,7 @@
+ #include <bcm63xx_dev_hsspi.h>
+ #include <bcm63xx_dev_pcmcia.h>
+ #include <bcm63xx_dev_spi.h>
++#include <bcm63xx_dev_usb_ehci.h>
+ #include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+@@ -899,6 +900,9 @@ int __init board_register_devices(void)
+ 	if (board.has_usbd)
+ 		bcm63xx_usbd_register(&board.usbd);
+ 
++	if (board.has_ehci0)
++		bcm63xx_ehci_register();
++
+ 	if (board.has_ohci0)
+ 		bcm63xx_ohci_register();
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch b/target/linux/brcm63xx/patches-4.1/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch
new file mode 100644
index 0000000..6d91129
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch
@@ -0,0 +1,24 @@
+From 111bbd770441ab34f9da5bb1d85767a9b75227b4 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:30 +0100
+Subject: [PATCH 12/12] MIPS: BCM63XX: EHCI controller does not support
+ overcurrent
+
+This patch sets the ignore_oc flag for the BCM63XX EHCI controller as it
+does not support proper overcurrent reporting.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-usb-ehci.c |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -61,6 +61,7 @@ static void bcm63xx_ehci_power_off(struc
+ static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
+ 	.big_endian_desc	= 1,
+ 	.big_endian_mmio	= 1,
++	.ignore_oc		= 1,
+ 	.power_on		= bcm63xx_ehci_power_on,
+ 	.power_off		= bcm63xx_ehci_power_off,
+ 	.power_suspend		= bcm63xx_ehci_power_off,
diff --git a/target/linux/brcm63xx/patches-4.1/201-SPI-Allow-specifying-the-parsers-for-SPI-flash.patch b/target/linux/brcm63xx/patches-4.1/201-SPI-Allow-specifying-the-parsers-for-SPI-flash.patch
new file mode 100644
index 0000000..00dc9c9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/201-SPI-Allow-specifying-the-parsers-for-SPI-flash.patch
@@ -0,0 +1,38 @@
+From 3f650fc30aa0badf9d02842ce396cea3eef2eeaa Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 1 Jul 2011 23:16:47 +0200
+Subject: [PATCH 49/79] SPI: Allow specifying the parsers for SPI flash
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ include/linux/spi/flash.h |    5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/include/linux/spi/flash.h
++++ b/include/linux/spi/flash.h
+@@ -2,7 +2,7 @@
+ #define LINUX_SPI_FLASH_H
+ 
+ struct mtd_partition;
+-
++struct mtd_part_parser_data;
+ /**
+  * struct flash_platform_data: board-specific flash data
+  * @name: optional flash device name (eg, as used with mtdparts=)
+@@ -10,6 +10,8 @@ struct mtd_partition;
+  * @nr_parts: number of mtd_partitions for static partitoning
+  * @type: optional flash device type (e.g. m25p80 vs m25p64), for use
+  *	with chips that can't be queried for JEDEC or other IDs
++ * @part_probe_types: optional list of MTD parser names to use for
++ *	partitioning
+  *
+  * Board init code (in arch/.../mach-xxx/board-yyy.c files) can
+  * provide information about SPI flash parts (such as DataFlash) to
+@@ -25,6 +27,7 @@ struct flash_platform_data {
+ 
+ 	char		*type;
+ 
++	const char	**part_probe_types;
+ 	/* we'll likely add more ... use JEDEC IDs, etc */
+ };
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/202-MTD-DEVICES-m25p80-use-parsers-if-provided-in-flash-.patch b/target/linux/brcm63xx/patches-4.1/202-MTD-DEVICES-m25p80-use-parsers-if-provided-in-flash-.patch
new file mode 100644
index 0000000..e58cd59
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/202-MTD-DEVICES-m25p80-use-parsers-if-provided-in-flash-.patch
@@ -0,0 +1,23 @@
+From c7c3c338cb25d7f55ddb3f6bfbf3572758ca3896 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 10 Nov 2011 16:53:08 +0100
+Subject: [PATCH 50/79] MTD: DEVICES: m25p80: use parsers if provided in flash
+ platform data
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/mtd/devices/m25p80.c |    3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -234,7 +234,8 @@ static int m25p_probe(struct spi_device
+ 
+ 	ppdata.of_node = spi->dev.of_node;
+ 
+-	return mtd_device_parse_register(&flash->mtd, NULL, &ppdata,
++	return mtd_device_parse_register(&flash->mtd,
++			data ? data->part_probe_types : NULL, &ppdata,
+ 			data ? data->parts : NULL,
+ 			data ? data->nr_parts : 0);
+ }
diff --git a/target/linux/brcm63xx/patches-4.1/203-MTD-DEVICES-m25p80-add-support-for-limiting-reads.patch b/target/linux/brcm63xx/patches-4.1/203-MTD-DEVICES-m25p80-add-support-for-limiting-reads.patch
new file mode 100644
index 0000000..fb064b8
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/203-MTD-DEVICES-m25p80-add-support-for-limiting-reads.patch
@@ -0,0 +1,90 @@
+From 5fb4e8d7287ac8fcb33aae8b1e9e22c5a3c392bd Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 10 Nov 2011 17:33:40 +0100
+Subject: [PATCH 51/79] MTD: DEVICES: m25p80: add support for limiting reads
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/mtd/devices/m25p80.c |   29 +++++++++++++++++++++++++++--
+ include/linux/spi/flash.h    |    4 ++++
+ 2 files changed, 31 insertions(+), 2 deletions(-)
+
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -32,6 +32,7 @@ struct m25p {
+ 	struct spi_device	*spi;
+ 	struct spi_nor		spi_nor;
+ 	struct mtd_info		mtd;
++	int			max_transfer_len;
+ 	u8			command[MAX_CMD_SIZE];
+ };
+ 
+@@ -121,7 +122,7 @@ static inline unsigned int m25p80_rx_nbi
+  * Read an address range from the nor chip.  The address range
+  * may be any size provided it is within the physical boundaries.
+  */
+-static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
++static int __m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
+ 			size_t *retlen, u_char *buf)
+ {
+ 	struct m25p *flash = nor->priv;
+@@ -154,6 +155,29 @@ static int m25p80_read(struct spi_nor *n
+ 	return 0;
+ }
+ 
++static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
++	size_t *retlen, u_char *buf)
++{
++	struct m25p *flash = nor->priv;
++	size_t off;
++	size_t read_len = flash->max_transfer_len;
++	size_t part_len;
++	int ret = 0;
++
++	if (!read_len)
++		return __m25p80_read(nor, from, len, retlen, buf);
++
++	*retlen = 0;
++
++	for (off = 0; off < len && !ret; off += read_len) {
++		ret = __m25p80_read(nor, from + off, min(len - off, read_len),
++				    &part_len, buf + off);
++			*retlen += part_len;
++	}
++
++	return ret;
++}
++
+ static int m25p80_erase(struct spi_nor *nor, loff_t offset)
+ {
+ 	struct m25p *flash = nor->priv;
+@@ -228,6 +252,9 @@ static int m25p_probe(struct spi_device
+ 	else
+ 		flash_name = spi->modalias;
+ 
++	if (data)
++		flash->max_transfer_len = data->max_transfer_len;
++
+ 	ret = spi_nor_scan(nor, flash_name, mode);
+ 	if (ret)
+ 		return ret;
+--- a/include/linux/spi/flash.h
++++ b/include/linux/spi/flash.h
+@@ -13,6 +13,8 @@ struct mtd_part_parser_data;
+  * @part_probe_types: optional list of MTD parser names to use for
+  *	partitioning
+  *
++ * @max_transfer_len: option maximum read/write length limitation for
++ *	SPI controllers not able to transfer any length commands.
+  * Board init code (in arch/.../mach-xxx/board-yyy.c files) can
+  * provide information about SPI flash parts (such as DataFlash) to
+  * help set up the device and its appropriate default partitioning.
+@@ -28,6 +30,8 @@ struct flash_platform_data {
+ 	char		*type;
+ 
+ 	const char	**part_probe_types;
++
++	unsigned int	max_transfer_len;
+ 	/* we'll likely add more ... use JEDEC IDs, etc */
+ };
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch b/target/linux/brcm63xx/patches-4.1/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch
new file mode 100644
index 0000000..f615deb
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch
@@ -0,0 +1,66 @@
+From 6ac09efa8f0e189ffe7dd7b0889289de56ee44cc Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 19 Jan 2014 12:18:03 +0100
+Subject: [PATCH] USB: EHCI: allow limiting ports for ehci-platform
+
+In the same way as the ohci platform driver allows limiting ports,
+enable the same for ehci. This prevents a mismatch in the available
+ports between ehci/ohci on USB 2.0 controllers.
+
+This is needed if the USB host controller always reports the maximum
+number of ports regardless of the number of available ports (because
+one might be set to be usb device).
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/usb/host/ehci-hcd.c      | 4 ++++
+ drivers/usb/host/ehci-platform.c | 2 ++
+ drivers/usb/host/ehci.h          | 1 +
+ include/linux/usb/ehci_pdriver.h | 1 +
+ 4 files changed, 8 insertions(+)
+
+--- a/drivers/usb/host/ehci-hcd.c
++++ b/drivers/usb/host/ehci-hcd.c
+@@ -665,6 +665,10 @@ int ehci_setup(struct usb_hcd *hcd)
+ 
+ 	/* cache this readonly data; minimize chip reads */
+ 	ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
++	if (ehci->num_ports) {
++		ehci->hcs_params &= ~0xf; /* bits 3:0, ports on HC */
++		ehci->hcs_params |= ehci->num_ports;
++	}
+ 
+ 	ehci->sbrn = HCD_USB2;
+ 
+--- a/drivers/usb/host/ehci-platform.c
++++ b/drivers/usb/host/ehci-platform.c
+@@ -59,6 +59,9 @@ static int ehci_platform_reset(struct us
+ 	hcd->has_tt = pdata->has_tt;
+ 	ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug;
+ 
++	if (pdata->num_ports && pdata->num_ports <= 15)
++		ehci->num_ports = pdata->num_ports;
++
+ 	if (pdata->pre_setup) {
+ 		retval = pdata->pre_setup(hcd);
+ 		if (retval < 0)
+--- a/drivers/usb/host/ehci.h
++++ b/drivers/usb/host/ehci.h
+@@ -213,6 +213,7 @@ struct ehci_hcd {			/* one per controlle
+ 	u32			command;
+ 
+ 	/* SILICON QUIRKS */
++	unsigned int		num_ports;
+ 	unsigned		no_selective_suspend:1;
+ 	unsigned		has_fsl_port_bug:1; /* FreeScale */
+ 	unsigned		big_endian_mmio:1;
+--- a/include/linux/usb/ehci_pdriver.h
++++ b/include/linux/usb/ehci_pdriver.h
+@@ -42,6 +42,7 @@ struct usb_hcd;
+  */
+ struct usb_ehci_pdata {
+ 	int		caps_offset;
++	unsigned int	num_ports;
+ 	unsigned	has_tt:1;
+ 	unsigned	has_synopsys_hc_bug:1;
+ 	unsigned	big_endian_desc:1;
diff --git a/target/linux/brcm63xx/patches-4.1/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch b/target/linux/brcm63xx/patches-4.1/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch
new file mode 100644
index 0000000..4e5e611
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch
@@ -0,0 +1,493 @@
+From 5a50cb0d53344a2429831b00925d6183d4d332e1 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 03:54:05 +0100
+Subject: [PATCH 40/44] MIPS: BCM63XX: move device registration code into its
+ own file
+
+Move device registration code into its own file to allow sharing it
+between board implementations.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Makefile         |   1 +
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 188 +-------------------------
+ arch/mips/bcm63xx/boards/board_common.c   | 215 ++++++++++++++++++++++++++++++
+ arch/mips/bcm63xx/boards/board_common.h   |   8 ++
+ 4 files changed, 223 insertions(+), 183 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/boards/board_common.c
+ create mode 100644 arch/mips/bcm63xx/boards/board_common.h
+
+--- a/arch/mips/bcm63xx/boards/Makefile
++++ b/arch/mips/bcm63xx/boards/Makefile
+@@ -1 +1,2 @@
++obj-y					+= board_common.o
+ obj-$(CONFIG_BOARD_BCM963XX)		+= board_bcm963xx.o
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -10,35 +10,22 @@
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
+-#include <linux/platform_device.h>
+-#include <linux/ssb/ssb.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+-#include <bcm63xx_dev_uart.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_nvram.h>
+-#include <bcm63xx_dev_pci.h>
+-#include <bcm63xx_dev_enet.h>
+-#include <bcm63xx_dev_dsp.h>
+-#include <bcm63xx_dev_flash.h>
+-#include <bcm63xx_dev_hsspi.h>
+-#include <bcm63xx_dev_pcmcia.h>
+-#include <bcm63xx_dev_spi.h>
+-#include <bcm63xx_dev_usb_ehci.h>
+-#include <bcm63xx_dev_usb_ohci.h>
+-#include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+ 
++#include "board_common.h"
++
+ #include <uapi/linux/bcm933xx_hcs.h>
+ 
+ #define PFX	"board_bcm963xx: "
+ 
+ #define HCS_OFFSET_128K			0x20000
+ 
+-static struct board_info board;
+-
+ /*
+  * known 3368 boards
+  */
+@@ -711,52 +698,6 @@ static const struct board_info __initcon
+ };
+ 
+ /*
+- * Register a sane SPROMv2 to make the on-board
+- * bcm4318 WLAN work
+- */
+-#ifdef CONFIG_SSB_PCIHOST
+-static struct ssb_sprom bcm63xx_sprom = {
+-	.revision		= 0x02,
+-	.board_rev		= 0x17,
+-	.country_code		= 0x0,
+-	.ant_available_bg	= 0x3,
+-	.pa0b0			= 0x15ae,
+-	.pa0b1			= 0xfa85,
+-	.pa0b2			= 0xfe8d,
+-	.pa1b0			= 0xffff,
+-	.pa1b1			= 0xffff,
+-	.pa1b2			= 0xffff,
+-	.gpio0			= 0xff,
+-	.gpio1			= 0xff,
+-	.gpio2			= 0xff,
+-	.gpio3			= 0xff,
+-	.maxpwr_bg		= 0x004c,
+-	.itssi_bg		= 0x00,
+-	.boardflags_lo		= 0x2848,
+-	.boardflags_hi		= 0x0000,
+-};
+-
+-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+-{
+-	if (bus->bustype == SSB_BUSTYPE_PCI) {
+-		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
+-		return 0;
+-	} else {
+-		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+-		return -EINVAL;
+-	}
+-}
+-#endif
+-
+-/*
+- * return board name for /proc/cpuinfo
+- */
+-const char *board_get_name(void)
+-{
+-	return board.name;
+-}
+-
+-/*
+  * early init callback, read nvram data from flash and checksum it
+  */
+ void __init board_prom_init(void)
+@@ -801,141 +742,16 @@ void __init board_prom_init(void)
+ 		if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
+ 			continue;
+ 		/* copy, board desc array is marked initdata */
+-		memcpy(&board, bcm963xx_boards[i], sizeof(board));
++		board_early_setup(bcm963xx_boards[i]);
+ 		break;
+ 	}
+ 
+-	/* bail out if board is not found, will complain later */
+-	if (!board.name[0]) {
++	/* warn if board is not found, will complain later */
++	if (i == ARRAY_SIZE(bcm963xx_boards)) {
+ 		char name[17];
+ 		memcpy(name, board_name, 16);
+ 		name[16] = 0;
+ 		printk(KERN_ERR PFX "unknown bcm963xx board: %s\n",
+ 		       name);
+-		return;
+-	}
+-
+-	/* setup pin multiplexing depending on board enabled device,
+-	 * this has to be done this early since PCI init is done
+-	 * inside arch_initcall */
+-	val = 0;
+-
+-#ifdef CONFIG_PCI
+-	if (board.has_pci) {
+-		bcm63xx_pci_enabled = 1;
+-		if (BCMCPU_IS_6348())
+-			val |= GPIO_MODE_6348_G2_PCI;
+-	}
+-#endif
+-
+-	if (board.has_pccard) {
+-		if (BCMCPU_IS_6348())
+-			val |= GPIO_MODE_6348_G1_MII_PCCARD;
+-	}
+-
+-	if (board.has_enet0 && !board.enet0.use_internal_phy) {
+-		if (BCMCPU_IS_6348())
+-			val |= GPIO_MODE_6348_G3_EXT_MII |
+-				GPIO_MODE_6348_G0_EXT_MII;
+-	}
+-
+-	if (board.has_enet1 && !board.enet1.use_internal_phy) {
+-		if (BCMCPU_IS_6348())
+-			val |= GPIO_MODE_6348_G3_EXT_MII |
+-				GPIO_MODE_6348_G0_EXT_MII;
+-	}
+-
+-	bcm_gpio_writel(val, GPIO_MODE_REG);
+-}
+-
+-/*
+- * second stage init callback, good time to panic if we couldn't
+- * identify on which board we're running since early printk is working
+- */
+-void __init board_setup(void)
+-{
+-	if (!board.name[0])
+-		panic("unable to detect bcm963xx board");
+-	printk(KERN_INFO PFX "board name: %s\n", board.name);
+-
+-	/* make sure we're running on expected cpu */
+-	if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
+-		panic("unexpected CPU for bcm963xx board");
+-}
+-
+-static struct gpio_led_platform_data bcm63xx_led_data;
+-
+-static struct platform_device bcm63xx_gpio_leds = {
+-	.name			= "leds-gpio",
+-	.id			= 0,
+-	.dev.platform_data	= &bcm63xx_led_data,
+-};
+-
+-/*
+- * third stage init callback, register all board devices.
+- */
+-int __init board_register_devices(void)
+-{
+-	if (board.has_uart0)
+-		bcm63xx_uart_register(0);
+-
+-	if (board.has_uart1)
+-		bcm63xx_uart_register(1);
+-
+-	if (board.has_pccard)
+-		bcm63xx_pcmcia_register();
+-
+-	if (board.has_enet0 &&
+-	    !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
+-		bcm63xx_enet_register(0, &board.enet0);
+-
+-	if (board.has_enet1 &&
+-	    !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
+-		bcm63xx_enet_register(1, &board.enet1);
+-
+-	if (board.has_enetsw &&
+-	    !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
+-		bcm63xx_enetsw_register(&board.enetsw);
+-
+-	if (board.has_usbd)
+-		bcm63xx_usbd_register(&board.usbd);
+-
+-	if (board.has_ehci0)
+-		bcm63xx_ehci_register();
+-
+-	if (board.has_ohci0)
+-		bcm63xx_ohci_register();
+-
+-	if (board.has_dsp)
+-		bcm63xx_dsp_register(&board.dsp);
+-
+-	/* Generate MAC address for WLAN and register our SPROM,
+-	 * do this after registering enet devices
+-	 */
+-#ifdef CONFIG_SSB_PCIHOST
+-	if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
+-		memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+-		memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+-		if (ssb_arch_register_fallback_sprom(
+-				&bcm63xx_get_fallback_sprom) < 0)
+-			pr_err(PFX "failed to register fallback SPROM\n");
+ 	}
+-#endif
+-
+-	bcm63xx_spi_register();
+-
+-	bcm63xx_hsspi_register();
+-
+-	bcm63xx_flash_register();
+-
+-	bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
+-	bcm63xx_led_data.leds = board.leds;
+-
+-	platform_device_register(&bcm63xx_gpio_leds);
+-
+-	if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
+-		gpio_request_one(board.ephy_reset_gpio,
+-				board.ephy_reset_gpio_flags, "ephy-reset");
+-
+-	return 0;
+ }
+--- /dev/null
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -0,0 +1,217 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/platform_device.h>
++#include <linux/ssb/ssb.h>
++#include <asm/addrspace.h>
++#include <bcm63xx_board.h>
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_dev_uart.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_nvram.h>
++#include <bcm63xx_dev_pci.h>
++#include <bcm63xx_dev_enet.h>
++#include <bcm63xx_dev_dsp.h>
++#include <bcm63xx_dev_flash.h>
++#include <bcm63xx_dev_hsspi.h>
++#include <bcm63xx_dev_pcmcia.h>
++#include <bcm63xx_dev_spi.h>
++#include <bcm63xx_dev_usb_ehci.h>
++#include <bcm63xx_dev_usb_ohci.h>
++#include <bcm63xx_dev_usb_usbd.h>
++#include <board_bcm963xx.h>
++
++#define PFX	"board: "
++
++static struct board_info board;
++
++/*
++ * Register a sane SPROMv2 to make the on-board
++ * bcm4318 WLAN work
++ */
++#ifdef CONFIG_SSB_PCIHOST
++static struct ssb_sprom bcm63xx_sprom = {
++	.revision		= 0x02,
++	.board_rev		= 0x17,
++	.country_code		= 0x0,
++	.ant_available_bg	= 0x3,
++	.pa0b0			= 0x15ae,
++	.pa0b1			= 0xfa85,
++	.pa0b2			= 0xfe8d,
++	.pa1b0			= 0xffff,
++	.pa1b1			= 0xffff,
++	.pa1b2			= 0xffff,
++	.gpio0			= 0xff,
++	.gpio1			= 0xff,
++	.gpio2			= 0xff,
++	.gpio3			= 0xff,
++	.maxpwr_bg		= 0x004c,
++	.itssi_bg		= 0x00,
++	.boardflags_lo		= 0x2848,
++	.boardflags_hi		= 0x0000,
++};
++
++int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
++{
++	if (bus->bustype == SSB_BUSTYPE_PCI) {
++		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++		return 0;
++	} else {
++		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
++		return -EINVAL;
++	}
++}
++#endif
++
++/*
++ * return board name for /proc/cpuinfo
++ */
++const char *board_get_name(void)
++{
++	return board.name;
++}
++
++/*
++ * setup board for device registration
++ */
++void __init board_early_setup(const struct board_info *target)
++{
++	u32 val;
++
++	memcpy(&board, target, sizeof(board));
++
++	/* setup pin multiplexing depending on board enabled device,
++	 * this has to be done this early since PCI init is done
++	 * inside arch_initcall */
++	val = 0;
++
++#ifdef CONFIG_PCI
++	if (board.has_pci) {
++		bcm63xx_pci_enabled = 1;
++		if (BCMCPU_IS_6348())
++			val |= GPIO_MODE_6348_G2_PCI;
++	}
++#endif
++
++	if (board.has_pccard) {
++		if (BCMCPU_IS_6348())
++			val |= GPIO_MODE_6348_G1_MII_PCCARD;
++	}
++
++	if (board.has_enet0 && !board.enet0.use_internal_phy) {
++		if (BCMCPU_IS_6348())
++			val |= GPIO_MODE_6348_G3_EXT_MII |
++				GPIO_MODE_6348_G0_EXT_MII;
++	}
++
++	if (board.has_enet1 && !board.enet1.use_internal_phy) {
++		if (BCMCPU_IS_6348())
++			val |= GPIO_MODE_6348_G3_EXT_MII |
++				GPIO_MODE_6348_G0_EXT_MII;
++	}
++
++	bcm_gpio_writel(val, GPIO_MODE_REG);
++}
++
++
++/*
++ * second stage init callback, good time to panic if we couldn't
++ * identify on which board we're running since early printk is working
++ */
++void __init board_setup(void)
++{
++	if (!board.name[0])
++		panic("unable to detect bcm963xx board");
++	printk(KERN_INFO PFX "board name: %s\n", board.name);
++
++	/* make sure we're running on expected cpu */
++	if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
++		panic("unexpected CPU for bcm963xx board");
++}
++
++static struct gpio_led_platform_data bcm63xx_led_data;
++
++static struct platform_device bcm63xx_gpio_leds = {
++	.name			= "leds-gpio",
++	.id			= 0,
++	.dev.platform_data	= &bcm63xx_led_data,
++};
++
++/*
++ * third stage init callback, register all board devices.
++ */
++int __init board_register_devices(void)
++{
++	if (board.has_uart0)
++		bcm63xx_uart_register(0);
++
++	if (board.has_uart1)
++		bcm63xx_uart_register(1);
++
++	if (board.has_pccard)
++		bcm63xx_pcmcia_register();
++
++	if (board.has_enet0 &&
++	    !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
++		bcm63xx_enet_register(0, &board.enet0);
++
++	if (board.has_enet1 &&
++	    !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
++		bcm63xx_enet_register(1, &board.enet1);
++
++	if (board.has_enetsw &&
++	    !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
++		bcm63xx_enetsw_register(&board.enetsw);
++
++	if (board.has_usbd)
++		bcm63xx_usbd_register(&board.usbd);
++
++	if (board.has_ehci0)
++		bcm63xx_ehci_register();
++
++	if (board.has_ohci0)
++		bcm63xx_ohci_register();
++
++	if (board.has_dsp)
++		bcm63xx_dsp_register(&board.dsp);
++
++	/* Generate MAC address for WLAN and register our SPROM,
++	 * do this after registering enet devices
++	 */
++#ifdef CONFIG_SSB_PCIHOST
++	if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
++		memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
++		memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
++		if (ssb_arch_register_fallback_sprom(
++				&bcm63xx_get_fallback_sprom) < 0)
++			pr_err(PFX "failed to register fallback SPROM\n");
++	}
++#endif
++
++	bcm63xx_spi_register();
++
++	bcm63xx_hsspi_register();
++
++	bcm63xx_flash_register();
++
++	bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
++	bcm63xx_led_data.leds = board.leds;
++
++	platform_device_register(&bcm63xx_gpio_leds);
++
++	if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
++		gpio_request_one(board.ephy_reset_gpio,
++				board.ephy_reset_gpio_flags, "ephy-reset");
++
++	return 0;
++}
+--- /dev/null
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -0,0 +1,8 @@
++#ifndef __BOARD_COMMON_H
++#define __BOARD_COMMON_H
++
++#include <board_bcm963xx.h>
++
++void board_early_setup(const struct board_info *board);
++
++#endif /* __BOARD_COMMON_H */
diff --git a/target/linux/brcm63xx/patches-4.1/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch b/target/linux/brcm63xx/patches-4.1/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch
new file mode 100644
index 0000000..877030f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch
@@ -0,0 +1,100 @@
+From 4e9c34a37bd3442b286ba55441bfe22c1ac5b65f Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 04:08:06 +0100
+Subject: [PATCH 41/44] MIPS: BCM63XX: pass a mac addresss allocator to board
+ setup
+
+Pass a mac address allocator to board setup code to allow board
+implementations to work with third party bootloaders not using nvram
+for configuration storage.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |  3 ++-
+ arch/mips/bcm63xx/boards/board_common.c   | 16 ++++++++++------
+ arch/mips/bcm63xx/boards/board_common.h   |  3 ++-
+ 3 files changed, 14 insertions(+), 8 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -742,7 +742,8 @@ void __init board_prom_init(void)
+ 		if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
+ 			continue;
+ 		/* copy, board desc array is marked initdata */
+-		board_early_setup(bcm963xx_boards[i]);
++		board_early_setup(bcm963xx_boards[i],
++				  bcm63xx_nvram_get_mac_address);
+ 		break;
+ 	}
+ 
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -18,7 +18,6 @@
+ #include <bcm63xx_dev_uart.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+-#include <bcm63xx_nvram.h>
+ #include <bcm63xx_dev_pci.h>
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_dsp.h>
+@@ -81,15 +80,20 @@ const char *board_get_name(void)
+ 	return board.name;
+ }
+ 
++static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
++
+ /*
+  * setup board for device registration
+  */
+-void __init board_early_setup(const struct board_info *target)
++void __init board_early_setup(const struct board_info *target,
++			      int (*get_mac_address)(u8 mac[ETH_ALEN]))
+ {
+ 	u32 val;
+ 
+ 	memcpy(&board, target, sizeof(board));
+ 
++	board_get_mac_address = get_mac_address;
++
+ 	/* setup pin multiplexing depending on board enabled device,
+ 	 * this has to be done this early since PCI init is done
+ 	 * inside arch_initcall */
+@@ -162,15 +166,15 @@ int __init board_register_devices(void)
+ 		bcm63xx_pcmcia_register();
+ 
+ 	if (board.has_enet0 &&
+-	    !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
++	    !board_get_mac_address(board.enet0.mac_addr))
+ 		bcm63xx_enet_register(0, &board.enet0);
+ 
+ 	if (board.has_enet1 &&
+-	    !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
++	    !board_get_mac_address(board.enet1.mac_addr))
+ 		bcm63xx_enet_register(1, &board.enet1);
+ 
+ 	if (board.has_enetsw &&
+-	    !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
++	    !board_get_mac_address(board.enetsw.mac_addr))
+ 		bcm63xx_enetsw_register(&board.enetsw);
+ 
+ 	if (board.has_usbd)
+@@ -189,7 +193,7 @@ int __init board_register_devices(void)
+ 	 * do this after registering enet devices
+ 	 */
+ #ifdef CONFIG_SSB_PCIHOST
+-	if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
++	if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+ 		memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+ 		memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+ 		if (ssb_arch_register_fallback_sprom(
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -3,6 +3,7 @@
+ 
+ #include <board_bcm963xx.h>
+ 
+-void board_early_setup(const struct board_info *board);
++void board_early_setup(const struct board_info *board,
++		       int (*get_mac_address)(u8 mac[ETH_ALEN]));
+ 
+ #endif /* __BOARD_COMMON_H */
diff --git a/target/linux/brcm63xx/patches-4.1/302-extended-platform-devices.patch b/target/linux/brcm63xx/patches-4.1/302-extended-platform-devices.patch
new file mode 100644
index 0000000..3f5cfc6
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/302-extended-platform-devices.patch
@@ -0,0 +1,25 @@
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -206,6 +206,9 @@ int __init board_register_devices(void)
+ 
+ 	bcm63xx_hsspi_register();
+ 
++	if (board.num_devs)
++		platform_add_devices(board.devs, board.num_devs);
++
+ 	bcm63xx_flash_register();
+ 
+ 	bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -53,6 +53,10 @@ struct board_info {
+ 
+ 	/* External PHY reset GPIO flags from gpio.h */
+ 	unsigned long ephy_reset_gpio_flags;
++
++	/* Additional platform devices */
++	struct platform_device **devs;
++	unsigned int	num_devs;
+ };
+ 
+ #endif /* ! BOARD_BCM963XX_H_ */
diff --git a/target/linux/brcm63xx/patches-4.1/303-spi-board-info.patch b/target/linux/brcm63xx/patches-4.1/303-spi-board-info.patch
new file mode 100644
index 0000000..ece8691
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/303-spi-board-info.patch
@@ -0,0 +1,33 @@
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -12,6 +12,7 @@
+ #include <linux/string.h>
+ #include <linux/platform_device.h>
+ #include <linux/ssb/ssb.h>
++#include <linux/spi/spi.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -209,6 +210,9 @@ int __init board_register_devices(void)
+ 	if (board.num_devs)
+ 		platform_add_devices(board.devs, board.num_devs);
+ 
++	if (board.num_spis)
++		spi_register_board_info(board.spis, board.num_spis);
++
+ 	bcm63xx_flash_register();
+ 
+ 	bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -57,6 +57,10 @@ struct board_info {
+ 	/* Additional platform devices */
+ 	struct platform_device **devs;
+ 	unsigned int	num_devs;
++
++	/* Additional platform devices */
++	struct spi_board_info *spis;
++	unsigned int	num_spis;
+ };
+ 
+ #endif /* ! BOARD_BCM963XX_H_ */
diff --git a/target/linux/brcm63xx/patches-4.1/309-cfe_version_mod.patch b/target/linux/brcm63xx/patches-4.1/309-cfe_version_mod.patch
new file mode 100644
index 0000000..9a8c106
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/309-cfe_version_mod.patch
@@ -0,0 +1,27 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -722,10 +722,20 @@ void __init board_prom_init(void)
+ 
+ 	/* dump cfe version */
+ 	cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
+-	if (!memcmp(cfe, "cfe-v", 5))
+-		snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
+-			 cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
+-	else
++	if (strstarts(cfe, "cfe-")) {
++		if(cfe[4] == 'v') {
++			if(cfe[5] == 'd')
++				snprintf(cfe_version, 11, "%s", (char *) &cfe[5]);
++			else if (cfe[10] > 0)
++				snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u-%u",
++					 cfe[5], cfe[6], cfe[7], cfe[8], cfe[9], cfe[10]);
++			else
++				snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
++					 cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
++		} else {
++			snprintf(cfe_version, 12, "%s", (char *) &cfe[4]);
++		}
++	} else
+ 		strcpy(cfe_version, "unknown");
+ 	printk(KERN_INFO PFX "CFE version: %s\n", cfe_version);
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/310-cfe_simplify_detection.patch b/target/linux/brcm63xx/patches-4.1/310-cfe_simplify_detection.patch
new file mode 100644
index 0000000..e05c91d
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/310-cfe_simplify_detection.patch
@@ -0,0 +1,20 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
+@@ -1,6 +1,8 @@
+ #ifndef BCM63XX_BOARD_H_
+ #define BCM63XX_BOARD_H_
+ 
++#include <asm/bootinfo.h>
++
+ const char *board_get_name(void);
+ 
+ void board_prom_init(void);
+@@ -9,4 +11,8 @@ void board_setup(void);
+ 
+ int board_register_devices(void);
+ 
++static inline bool bcm63xx_is_cfe_present(void) {
++	return fw_arg3 == 0x43464531;
++}
++
+ #endif /* ! BCM63XX_BOARD_H_ */
diff --git a/target/linux/brcm63xx/patches-4.1/311-bcm63xxpart_use_cfedetection.patch b/target/linux/brcm63xx/patches-4.1/311-bcm63xxpart_use_cfedetection.patch
new file mode 100644
index 0000000..46d9b47
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/311-bcm63xxpart_use_cfedetection.patch
@@ -0,0 +1,51 @@
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -35,7 +35,7 @@
+ 
+ #include <asm/mach-bcm63xx/bcm63xx_nvram.h>
+ #include <asm/mach-bcm63xx/bcm963xx_tag.h>
+-#include <asm/mach-bcm63xx/board_bcm963xx.h>
++#include <asm/mach-bcm63xx/bcm63xx_board.h>
+ 
+ #define BCM63XX_EXTENDED_SIZE	0xBFC00000	/* Extended flash address */
+ 
+@@ -43,30 +43,6 @@
+ 
+ #define BCM63XX_CFE_MAGIC_OFFSET 0x4e0
+ 
+-static int bcm63xx_detect_cfe(struct mtd_info *master)
+-{
+-	char buf[9];
+-	int ret;
+-	size_t retlen;
+-
+-	ret = mtd_read(master, BCM963XX_CFE_VERSION_OFFSET, 5, &retlen,
+-		       (void *)buf);
+-	buf[retlen] = 0;
+-
+-	if (ret)
+-		return ret;
+-
+-	if (strncmp("cfe-v", buf, 5) == 0)
+-		return 0;
+-
+-	/* very old CFE's do not have the cfe-v string, so check for magic */
+-	ret = mtd_read(master, BCM63XX_CFE_MAGIC_OFFSET, 8, &retlen,
+-		       (void *)buf);
+-	buf[retlen] = 0;
+-
+-	return strncmp("CFE1CFE1", buf, 8);
+-}
+-
+ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,
+ 					struct mtd_partition **pparts,
+ 					struct mtd_part_parser_data *data)
+@@ -85,7 +61,7 @@ static int bcm63xx_parse_cfe_partitions(
+ 	u32 computed_crc;
+ 	bool rootfs_first = false;
+ 
+-	if (bcm63xx_detect_cfe(master))
++	if (!bcm63xx_is_cfe_present())
+ 		return -EINVAL;
+ 
+ 	cfe_erasesize = max_t(uint32_t, master->erasesize,
diff --git a/target/linux/brcm63xx/patches-4.1/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch b/target/linux/brcm63xx/patches-4.1/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch
new file mode 100644
index 0000000..4a5b629
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch
@@ -0,0 +1,455 @@
+From 301744ecbeece89ab3a9d6beef7802fa22598f00 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 14:53:12 +0100
+Subject: [PATCH 1/5] irqchip: add support for bcm6345-style periphery irq
+ controller
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ .../brcm,bcm6345-periph-intc.txt                   |   50 +++
+ drivers/irqchip/Kconfig                            |    4 +
+ drivers/irqchip/Makefile                           |    1 +
+ drivers/irqchip/irq-bcm6345-periph.c               |  339 ++++++++++++++++++++
+ include/linux/irqchip/irq-bcm6345-periph.h         |   16 +
+ 5 files changed, 410 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
+ create mode 100644 drivers/irqchip/irq-bcm6345-periph.c
+ create mode 100644 include/linux/irqchip/irq-bcm6345-periph.h
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
+@@ -0,0 +1,50 @@
++Broadcom BCM6345 Level 1 periphery interrupt controller
++
++This block is a  interrupt controller that is typically connected directly
++to one of the HW INT lines on each CPU.  Every BCM63XX xDSL chip since
++BCM6345 has contained this hardware.
++
++Key elements of the hardware design include:
++
++- 32, 64, or 128 incoming level IRQ lines
++
++- All onchip peripherals are wired directly to an L2 input
++
++- A separate instance of the register set for each CPU, allowing individual
++  peripheral IRQs to be routed to any CPU
++
++- No atomic mask/unmask operations
++
++- No polarity/level/edge settings
++
++- No FIFO or priority encoder logic; software is expected to read all
++  1-4 status words to determine which IRQs are pending
++
++Required properties:
++
++- compatible: Should be "brcm,bcm6345-periph-intc".
++- reg: Specifies the base physical address and size of the registers.
++  Multiple register addresses may be specified, and must match the amount of
++  parent interrupts.
++- interrupt-controller: Identifies the node as an interrupt controller.
++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
++  source, should be 1.
++- interrupt-parent: Specifies the phandle to the parent interrupt controller
++  this one is cascaded from.
++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
++  node, valid values depend on the type of parent interrupt controller.
++  Multiple lines are used to route interrupts to different cpus, with the first
++  assumed to be for the boot CPU.
++
++Example:
++
++periph_intc: interrupt-controller@f0406800 {
++	compatible = "brcm,bcm6345-periph-intc";
++	reg = <0x10000020 0x10>, <0x10000030 0x10>;
++
++	interrupt-controller;
++	#interrupt-cells = <1>;
++
++	interrupt-parent = <&cpu_intc>;
++	interrupts = <2>, <3>;
++};
+--- a/drivers/irqchip/Kconfig
++++ b/drivers/irqchip/Kconfig
+@@ -75,6 +75,10 @@ config BRCMSTB_L2_IRQ
+ 	select GENERIC_IRQ_CHIP
+ 	select IRQ_DOMAIN
+ 
++config BCM6345_PERIPH_IRQ
++	bool
++	select IRQ_DOMAIN
++
+ config DW_APB_ICTL
+ 	bool
+ 	select GENERIC_IRQ_CHIP
+--- a/drivers/irqchip/Makefile
++++ b/drivers/irqchip/Makefile
+@@ -8,6 +8,7 @@ obj-$(CONFIG_ARCH_MVEBU)		+= irq-armada-
+ obj-$(CONFIG_ARCH_MXS)			+= irq-mxs.o
+ obj-$(CONFIG_ARCH_TEGRA)		+= irq-tegra.o
+ obj-$(CONFIG_ARCH_S3C24XX)		+= irq-s3c24xx.o
++obj-$(CONFIG_BCM6345_PERIPH_IRQ)	+= irq-bcm6345-periph.o
+ obj-$(CONFIG_DW_APB_ICTL)		+= irq-dw-apb-ictl.o
+ obj-$(CONFIG_METAG)			+= irq-metag-ext.o
+ obj-$(CONFIG_METAG_PERFCOUNTER_IRQS)	+= irq-metag.o
+--- /dev/null
++++ b/drivers/irqchip/irq-bcm6345-periph.c
+@@ -0,0 +1,339 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
++ */
++
++#include <linux/ioport.h>
++#include <linux/irq.h>
++#include <linux/irqchip/chained_irq.h>
++#include <linux/irqchip/irq-bcm6345-periph.h>
++#include <linux/kernel.h>
++#include <linux/of.h>
++#include <linux/of_irq.h>
++#include <linux/of_address.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++
++#ifdef CONFIG_BCM63XX
++#include <asm/mach-bcm63xx/bcm63xx_irq.h>
++
++#define VIRQ_BASE	IRQ_INTERNAL_BASE
++#else
++#define VIRQ_BASE	0
++#endif
++
++#include "irqchip.h"
++
++#define MAX_WORDS	4
++#define MAX_PARENT_IRQS	2
++#define IRQS_PER_WORD	32
++
++struct intc_block {
++	int parent_irq;
++	void __iomem *base;
++	void __iomem *en_reg[MAX_WORDS];
++	void __iomem *status_reg[MAX_WORDS];
++	u32 mask_cache[MAX_WORDS];
++};
++
++struct intc_data {
++	struct irq_chip chip;
++	struct intc_block block[MAX_PARENT_IRQS];
++
++	int num_words;
++
++	struct irq_domain *domain;
++	raw_spinlock_t lock;
++};
++
++static void bcm6345_periph_irq_handle(unsigned int irq, struct irq_desc *desc)
++{
++	struct intc_data *data = irq_desc_get_handler_data(desc);
++	struct irq_chip *chip = irq_desc_get_chip(desc);
++	struct intc_block *block;
++	unsigned int idx;
++
++	chained_irq_enter(chip, desc);
++
++	for (idx = 0; idx < MAX_PARENT_IRQS; idx++)
++		if (irq == data->block[idx].parent_irq)
++			block = &data->block[idx];
++
++	for (idx = 0; idx < data->num_words; idx++) {
++		int base = idx * IRQS_PER_WORD;
++		unsigned long pending;
++		int hw_irq;
++
++		raw_spin_lock(&data->lock);
++		pending = __raw_readl(block->en_reg[idx]) &
++			  __raw_readl(block->status_reg[idx]);
++		raw_spin_unlock(&data->lock);
++
++		for_each_set_bit(hw_irq, &pending, IRQS_PER_WORD) {
++			int virq;
++
++			virq  = irq_find_mapping(data->domain, base + hw_irq);
++			generic_handle_irq(virq);
++		}
++	}
++
++	chained_irq_exit(chip, desc);
++}
++
++static void __bcm6345_periph_enable(struct intc_block *block, int reg, int bit,
++				    bool enable)
++{
++	u32 val;
++
++	val = __raw_readl(block->en_reg[reg]);
++	if (enable)
++		val |= BIT(bit);
++	else
++		val &= ~BIT(bit);
++	__raw_writel(val, block->en_reg[reg]);
++}
++
++static void bcm6345_periph_irq_mask(struct irq_data *data)
++{
++	unsigned int i, reg, bit;
++	struct intc_data *priv = data->domain->host_data;
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++
++	reg = hwirq / IRQS_PER_WORD;
++	bit = hwirq % IRQS_PER_WORD;
++
++	raw_spin_lock(&priv->lock);
++	for (i = 0; i < MAX_PARENT_IRQS; i++) {
++		struct intc_block *block = &priv->block[i];
++
++		if (!block->parent_irq)
++			break;
++
++		__bcm6345_periph_enable(block, reg, bit, false);
++	}
++	raw_spin_unlock(&priv->lock);
++}
++
++static void bcm6345_periph_irq_unmask(struct irq_data *data)
++{
++	struct intc_data *priv = data->domain->host_data;
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++	unsigned int i, reg, bit;
++
++	reg = hwirq / IRQS_PER_WORD;
++	bit = hwirq % IRQS_PER_WORD;
++
++	raw_spin_lock(&priv->lock);
++	for (i = 0; i < MAX_PARENT_IRQS; i++) {
++		struct intc_block *block = &priv->block[i];
++
++		if (!block->parent_irq)
++			break;
++
++		if (block->mask_cache[reg] & BIT(bit))
++			__bcm6345_periph_enable(block, reg, bit, true);
++		else
++			__bcm6345_periph_enable(block, reg, bit, false);
++	}
++	raw_spin_unlock(&priv->lock);
++}
++
++#ifdef CONFIG_SMP
++static int bcm6345_periph_set_affinity(struct irq_data *data,
++				       const struct cpumask *mask, bool force)
++{
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++	struct intc_data *priv = data->domain->host_data;
++	unsigned int i, reg, bit;
++	unsigned long flags;
++	bool enabled;
++	int cpu;
++
++	reg = hwirq / IRQS_PER_WORD;
++	bit = hwirq % IRQS_PER_WORD;
++
++	/* we could route to more than one cpu, but performance
++	   suffers, so fix it to one.
++	 */
++	cpu = cpumask_any_and(mask, cpu_online_mask);
++	if (cpu >= nr_cpu_ids)
++		return -EINVAL;
++
++	if (cpu >= MAX_PARENT_IRQS)
++		return -EINVAL;
++
++	if (!priv->block[cpu].parent_irq)
++		return -EINVAL;
++
++	raw_spin_lock_irqsave(&priv->lock, flags);
++	enabled = !irqd_irq_masked(data);
++	for (i = 0; i < MAX_PARENT_IRQS; i++) {
++		struct intc_block *block = &priv->block[i];
++
++		if (!block->parent_irq)
++			break;
++
++		if (i == cpu) {
++			block->mask_cache[reg] |= BIT(bit);
++			__bcm6345_periph_enable(block, reg, bit, enabled);
++		} else {
++			block->mask_cache[reg] &= ~BIT(bit);
++			__bcm6345_periph_enable(block, reg, bit, false);
++		}
++	}
++	raw_spin_unlock_irqrestore(&priv->lock, flags);
++
++	return 0;
++}
++#endif
++
++static int bcm6345_periph_map(struct irq_domain *d, unsigned int irq,
++			      irq_hw_number_t hw)
++{
++	struct intc_data *priv = d->host_data;
++
++	irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
++
++	return 0;
++}
++
++static const struct irq_domain_ops bcm6345_periph_domain_ops = {
++	.xlate = irq_domain_xlate_onecell,
++	.map = bcm6345_periph_map,
++};
++
++static int __init __bcm6345_periph_intc_init(struct device_node *node,
++					     int num_blocks, int *irq,
++					     void __iomem **base, int num_words)
++{
++	struct intc_data *data;
++	unsigned int i, w, status_offset;
++
++	data = kzalloc(sizeof(*data), GFP_KERNEL);
++	if (!data)
++		return -ENOMEM;
++
++	raw_spin_lock_init(&data->lock);
++
++	status_offset = num_words * sizeof(u32);
++
++	for (i = 0; i < num_blocks; i++) {
++		struct intc_block *block = &data->block[i];
++
++		block->parent_irq = irq[i];
++		block->base = base[i];
++
++		for (w = 0; w < num_words; w++) {
++			int word_offset = sizeof(u32) * ((num_words - w) - 1);
++
++			block->en_reg[w] = base[i] + word_offset;
++			block->status_reg[w] = base[i] + status_offset;
++			block->status_reg[w] += word_offset;
++
++			/* route all interrupts to line 0 by default */
++			if (i == 0)
++				block->mask_cache[w] = 0xffffffff;
++		}
++
++		irq_set_handler_data(block->parent_irq, data);
++		irq_set_chained_handler(block->parent_irq,
++					bcm6345_periph_irq_handle);
++	}
++
++	data->num_words = num_words;
++
++	data->chip.name = "bcm6345-periph-intc";
++	data->chip.irq_mask = bcm6345_periph_irq_mask;
++	data->chip.irq_unmask = bcm6345_periph_irq_unmask;
++
++#ifdef CONFIG_SMP
++	if (num_blocks > 1)
++		data->chip.irq_set_affinity = bcm6345_periph_set_affinity;
++#endif
++
++	data->domain = irq_domain_add_simple(node, IRQS_PER_WORD * num_words,
++					     VIRQ_BASE,
++					     &bcm6345_periph_domain_ops, data);
++	if (!data->domain) {
++		kfree(data);
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++void __init bcm6345_periph_intc_init(int num_blocks, int *irq,
++				     void __iomem **base, int num_words)
++{
++	__bcm6345_periph_intc_init(NULL, num_blocks, irq, base, num_words);
++}
++
++#ifdef CONFIG_OF
++static int __init bcm6345_periph_of_init(struct device_node *node,
++					 struct device_node *parent)
++{
++	struct resource res;
++	int num_irqs, ret = -EINVAL;
++	int irqs[MAX_PARENT_IRQS] = { 0 };
++	void __iomem *bases[MAX_PARENT_IRQS] = { NULL };
++	int words = 0;
++	int i;
++
++	num_irqs = of_irq_count(node);
++
++	if (num_irqs < 1 || num_irqs > MAX_PARENT_IRQS)
++		return -EINVAL;
++
++	for (i = 0; i < num_irqs; i++) {
++		resource_size_t size;
++
++		irqs[i] = irq_of_parse_and_map(node, i);
++		if (!irqs[i])
++			goto out_unmap;
++
++		if (of_address_to_resource(node, i, &res))
++			goto out_unmap;
++
++		size = resource_size(&res);
++		switch (size) {
++		case 8:
++		case 16:
++		case 32:
++			size = size / 8;
++			break;
++		default:
++			goto out_unmap;
++		}
++
++		if (words && words != size) {
++			ret = -EINVAL;
++			goto out_unmap;
++		}
++		words = size;
++
++		bases[i] = of_iomap(node, i);
++		if (!bases[i]) {
++			ret = -ENOMEM;
++			goto out_unmap;
++		}
++	}
++
++	ret = __bcm6345_periph_intc_init(node, num_irqs, irqs, bases, words);
++	if (!ret)
++		return 0;
++
++out_unmap:
++	for (i = 0; i < num_irqs; i++) {
++		iounmap(bases[i]);
++		irq_dispose_mapping(irqs[i]);
++	}
++
++	return ret;
++}
++
++IRQCHIP_DECLARE(bcm6345_periph_intc, "brcm,bcm6345-periph-intc",
++		bcm6345_periph_of_init);
++#endif
+--- /dev/null
++++ b/include/linux/irqchip/irq-bcm6345-periph.h
+@@ -0,0 +1,16 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr>
++ */
++
++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
++
++void bcm6345_periph_intc_init(int num_blocks, int *irq, void __iomem **base,
++			      int num_words);
++
++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H */
diff --git a/target/linux/brcm63xx/patches-4.1/321-irqchip-add-support-for-bcm6345-style-external-inter.patch b/target/linux/brcm63xx/patches-4.1/321-irqchip-add-support-for-bcm6345-style-external-inter.patch
new file mode 100644
index 0000000..7eca81b
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/321-irqchip-add-support-for-bcm6345-style-external-inter.patch
@@ -0,0 +1,380 @@
+From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 14:54:27 +0100
+Subject: [PATCH 2/5] irqchip: add support for bcm6345-style external
+ interrupt controller
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ .../interrupt-controller/brcm,bcm6345-ext-intc.txt |   29 ++
+ drivers/irqchip/Kconfig                            |    4 +
+ drivers/irqchip/Makefile                           |    1 +
+ drivers/irqchip/irq-bcm6345-ext.c                  |  287 ++++++++++++++++++++
+ include/linux/irqchip/irq-bcm6345-ext.h            |   14 +
+ 5 files changed, 335 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
+ create mode 100644 drivers/irqchip/irq-bcm6345-ext.c
+ create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
+@@ -0,0 +1,29 @@
++Broadcom BCM6345-style external interrupt controller
++
++Required properties:
++
++- compatible: Should be "brcm,bcm6345-l2-intc".
++- reg: Specifies the base physical addresses and size of the registers.
++- interrupt-controller: identifies the node as an interrupt controller.
++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
++  source, Should be 2.
++- interrupt-parent: Specifies the phandle to the parent interrupt controller
++  this one is cascaded from.
++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
++  node, valid values depend on the type of parent interrupt controller.
++
++Optional properties:
++
++- brcm,field-width: Size of each field (mask, clear, sense, ...) in bits in the
++  register. Defaults to 4.
++
++Example:
++
++ext_intc: interrupt-controller@10000018 {
++	compatible = "brcm,bcm6345-l2-intc";
++	interrupt-parent = <&periph_intc>;
++	#interrupt-cells = <2>;
++	reg = <0x10000018 0x4>;
++	interrupt-controller;
++	interrupts = <24>, <25>, <26>, <27>;
++};
+--- a/drivers/irqchip/Kconfig
++++ b/drivers/irqchip/Kconfig
+@@ -75,6 +75,10 @@ config BRCMSTB_L2_IRQ
+ 	select GENERIC_IRQ_CHIP
+ 	select IRQ_DOMAIN
+ 
++config BCM6345_EXT_IRQ
++	bool
++	select IRQ_DOMAIN
++
+ config BCM6345_PERIPH_IRQ
+ 	bool
+ 	select IRQ_DOMAIN
+--- a/drivers/irqchip/Makefile
++++ b/drivers/irqchip/Makefile
+@@ -8,6 +8,7 @@ obj-$(CONFIG_ARCH_MVEBU)		+= irq-armada-
+ obj-$(CONFIG_ARCH_MXS)			+= irq-mxs.o
+ obj-$(CONFIG_ARCH_TEGRA)		+= irq-tegra.o
+ obj-$(CONFIG_ARCH_S3C24XX)		+= irq-s3c24xx.o
++obj-$(CONFIG_BCM6345_EXT_IRQ)		+= irq-bcm6345-ext.o
+ obj-$(CONFIG_BCM6345_PERIPH_IRQ)	+= irq-bcm6345-periph.o
+ obj-$(CONFIG_DW_APB_ICTL)		+= irq-dw-apb-ictl.o
+ obj-$(CONFIG_METAG)			+= irq-metag-ext.o
+--- /dev/null
++++ b/drivers/irqchip/irq-bcm6345-ext.c
+@@ -0,0 +1,287 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
++ */
++
++#include <linux/ioport.h>
++#include <linux/irq.h>
++#include <linux/irqchip/chained_irq.h>
++#include <linux/irqchip/irq-bcm6345-ext.h>
++#include <linux/kernel.h>
++#include <linux/of.h>
++#include <linux/of_irq.h>
++#include <linux/of_address.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++
++#include "irqchip.h"
++
++#ifdef CONFIG_BCM63XX
++#include <asm/mach-bcm63xx/bcm63xx_irq.h>
++
++#define VIRQ_BASE		IRQ_EXTERNAL_BASE
++#else
++#define VIRQ_BASE		0
++#endif
++
++#define MAX_IRQS		4
++
++#define EXTIRQ_CFG_SENSE	0
++#define EXTIRQ_CFG_STAT		1
++#define EXTIRQ_CFG_CLEAR	2
++#define EXTIRQ_CFG_MASK		3
++#define EXTIRQ_CFG_BOTHEDGE	4
++#define EXTIRQ_CFG_LEVELSENSE	5
++
++struct intc_data {
++	struct irq_chip chip;
++	struct irq_domain *domain;
++	raw_spinlock_t lock;
++
++	int parent_irq[MAX_IRQS];
++	void __iomem *reg;
++	int shift;
++};
++
++static void bcm6345_ext_intc_irq_handle(unsigned int irq, struct irq_desc *desc)
++{
++	struct intc_data *data = irq_desc_get_handler_data(desc);
++	struct irq_chip *chip = irq_desc_get_chip(desc);
++	unsigned int idx;
++
++	chained_irq_enter(chip, desc);
++
++	for (idx = 0; idx < MAX_IRQS; idx++) {
++		if (data->parent_irq[idx] != irq)
++			continue;
++
++		generic_handle_irq(irq_find_mapping(data->domain, idx));
++	}
++
++	chained_irq_exit(chip, desc);
++}
++
++static void bcm6345_ext_intc_irq_ack(struct irq_data *data)
++{
++	struct intc_data *priv = data->domain->host_data;
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++	u32 reg;
++
++	raw_spin_lock(&priv->lock);
++	reg = __raw_readl(priv->reg);
++	reg |= hwirq << (EXTIRQ_CFG_CLEAR * priv->shift);
++	__raw_writel(reg, priv->reg);
++	raw_spin_unlock(&priv->lock);
++}
++
++static void bcm6345_ext_intc_irq_mask(struct irq_data *data)
++{
++	struct intc_data *priv = data->domain->host_data;
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++	u32 reg;
++
++	raw_spin_lock(&priv->lock);
++	reg = __raw_readl(priv->reg);
++	reg &= ~(hwirq << (EXTIRQ_CFG_MASK * priv->shift));
++	__raw_writel(reg, priv->reg);
++	raw_spin_unlock(&priv->lock);
++}
++
++static void bcm6345_ext_intc_irq_unmask(struct irq_data *data)
++{
++	struct intc_data *priv = data->domain->host_data;
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++	u32 reg;
++
++	raw_spin_lock(&priv->lock);
++	reg = __raw_readl(priv->reg);
++	reg |= hwirq << (EXTIRQ_CFG_MASK * priv->shift);
++	__raw_writel(reg, priv->reg);
++	raw_spin_unlock(&priv->lock);
++}
++
++static int bcm6345_ext_intc_set_type(struct irq_data *data,
++				     unsigned int flow_type)
++{
++	struct intc_data *priv = data->domain->host_data;
++	irq_hw_number_t hwirq = irqd_to_hwirq(data);
++	bool levelsense = 0, sense = 0, bothedge = 0;
++	u32 reg;
++
++	flow_type &= IRQ_TYPE_SENSE_MASK;
++
++	if (flow_type == IRQ_TYPE_NONE)
++		flow_type = IRQ_TYPE_LEVEL_LOW;
++
++	switch (flow_type) {
++	case IRQ_TYPE_EDGE_BOTH:
++		bothedge = 1;
++		break;
++
++	case IRQ_TYPE_EDGE_RISING:
++		break;
++
++	case IRQ_TYPE_EDGE_FALLING:
++		sense = 1;
++		break;
++
++	case IRQ_TYPE_LEVEL_HIGH:
++		levelsense = 1;
++		sense = 1;
++		break;
++
++	case IRQ_TYPE_LEVEL_LOW:
++		levelsense = 1;
++		break;
++
++	default:
++		pr_err("bogus flow type combination given!\n");
++		return -EINVAL;
++	}
++
++	raw_spin_lock(&priv->lock);
++	reg = __raw_readl(priv->reg);
++
++	if (levelsense)
++		reg |= hwirq << (EXTIRQ_CFG_LEVELSENSE * priv->shift);
++	else
++		reg &= ~(hwirq << (EXTIRQ_CFG_LEVELSENSE * priv->shift));
++	if (sense)
++		reg |= hwirq << (EXTIRQ_CFG_SENSE * priv->shift);
++	else
++		reg &= ~(hwirq << (EXTIRQ_CFG_SENSE * priv->shift));
++	if (bothedge)
++		reg |= hwirq << (EXTIRQ_CFG_BOTHEDGE * priv->shift);
++	else
++		reg &= ~(hwirq << (EXTIRQ_CFG_BOTHEDGE * priv->shift));
++
++	__raw_writel(reg, priv->reg);
++	raw_spin_unlock(&priv->lock);
++
++	irqd_set_trigger_type(data, flow_type);
++	if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
++		__irq_set_handler_locked(data->irq, handle_level_irq);
++	else
++		__irq_set_handler_locked(data->irq, handle_edge_irq);
++
++	return 0;
++}
++
++static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq,
++				irq_hw_number_t hw)
++{
++	struct intc_data *priv = d->host_data;
++
++	irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
++
++	return 0;
++}
++
++static const struct irq_domain_ops bcm6345_ext_domain_ops = {
++	.xlate = irq_domain_xlate_twocell,
++	.map = bcm6345_ext_intc_map,
++};
++
++static int __init __bcm6345_ext_intc_init(struct device_node *node,
++					  int num_irqs, int *irqs,
++					  void __iomem *reg, int shift)
++{
++	struct intc_data *data;
++	unsigned int i;
++	int start = VIRQ_BASE;
++
++	data = kzalloc(sizeof(*data), GFP_KERNEL);
++	if (!data)
++		return -ENOMEM;
++
++	raw_spin_lock_init(&data->lock);
++
++	for (i = 0; i < num_irqs; i++) {
++		data->parent_irq[i] = irqs[i];
++
++		irq_set_handler_data(irqs[i], data);
++		irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle);
++	}
++
++	data->reg = reg;
++
++	data->chip.name = "bcm6345-ext-intc";
++	data->chip.irq_ack = bcm6345_ext_intc_irq_ack;
++	data->chip.irq_mask = bcm6345_ext_intc_irq_mask;
++	data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask;
++	data->chip.irq_set_type = bcm6345_ext_intc_set_type;
++
++	/*
++	 * If we have less than 4 irqs, this is the second controller on
++	 * bcm63xx. So increase the VIRQ start to not overlap with the first
++	 * one, but only do so if we actually use a non-zero start.
++	 *
++	 * This can be removed when bcm63xx has no legacy users anymore.
++	 */
++	if (start && num_irqs < 4)
++		start += 4;
++
++	data->domain = irq_domain_add_simple(node, num_irqs, start,
++					     &bcm6345_ext_domain_ops, data);
++	if (!data->domain) {
++		kfree(data);
++		return -ENOMEM;
++	}
++
++	return 0;
++}
++
++void __init bcm6345_ext_intc_init(int num_irqs, int *irqs, void __iomem *reg,
++				  int shift)
++{
++	__bcm6345_ext_intc_init(NULL, num_irqs, irqs, reg, shift);
++}
++
++#ifdef CONFIG_OF
++static int __init bcm6345_ext_intc_of_init(struct device_node *node,
++					   struct device_node *parent)
++{
++	int num_irqs, ret = -EINVAL;
++	unsigned i;
++	void __iomem *base;
++	int irqs[MAX_IRQS] = { 0 };
++	u32 shift;
++
++	num_irqs = of_irq_count(node);
++
++	if (!num_irqs || num_irqs > MAX_IRQS)
++		return -EINVAL;
++
++	if (of_property_read_u32(node, "brcm,field-width", &shift))
++		shift = 4;
++
++	for (i = 0; i < num_irqs; i++) {
++		irqs[i] = irq_of_parse_and_map(node, i);
++		if (!irqs[i]) {
++			ret = -ENOMEM;
++			goto out_unmap;
++		}
++	}
++
++	base = of_iomap(node, 0);
++	if (!base)
++		goto out_unmap;
++
++	ret = __bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift);
++	if (!ret)
++		return 0;
++out_unmap:
++	iounmap(base);
++
++	for (i = 0; i < num_irqs; i++)
++		irq_dispose_mapping(irqs[i]);
++
++	return ret;
++}
++
++IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc",
++		bcm6345_ext_intc_of_init);
++#endif
+--- /dev/null
++++ b/include/linux/irqchip/irq-bcm6345-ext.h
+@@ -0,0 +1,14 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
++ */
++
++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
++
++void bcm6345_ext_intc_init(int n_irqs, int *irqs, void __iomem *reg, int shift);
++
++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H */
diff --git a/target/linux/brcm63xx/patches-4.1/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch b/target/linux/brcm63xx/patches-4.1/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch
new file mode 100644
index 0000000..e45ada6
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch
@@ -0,0 +1,695 @@
+From 86c5d808d660a6aa72cc41d584776fbc8b2736fe Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 14:55:02 +0100
+Subject: [PATCH 5/8] MIPS: BCM63XX: switch to IRQ_DOMAIN
+
+Now that we have working IRQ_DOMAIN drivers for both interrupt controllers,
+switch to using them.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/Kconfig       |    3 +
+ arch/mips/bcm63xx/irq.c |  612 ++++++++---------------------------------------
+ 2 files changed, 108 insertions(+), 507 deletions(-)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -197,6 +197,9 @@ config BCM63XX
+ 	select SYNC_R4K
+ 	select DMA_NONCOHERENT
+ 	select IRQ_CPU
++	select BCM6345_EXT_IRQ
++	select BCM6345_PERIPH_IRQ
++	select IRQ_DOMAIN
+ 	select SYS_SUPPORTS_32BIT_KERNEL
+ 	select SYS_SUPPORTS_BIG_ENDIAN
+ 	select SYS_HAS_EARLY_PRINTK
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -12,7 +12,9 @@
+ #include <linux/interrupt.h>
+ #include <linux/module.h>
+ #include <linux/irq.h>
+-#include <linux/spinlock.h>
++#include <linux/irqchip.h>
++#include <linux/irqchip/irq-bcm6345-ext.h>
++#include <linux/irqchip/irq-bcm6345-periph.h>
+ #include <asm/irq_cpu.h>
+ #include <asm/mipsregs.h>
+ #include <bcm63xx_cpu.h>
+@@ -20,544 +22,140 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
+ 
+-
+-static DEFINE_SPINLOCK(ipic_lock);
+-static DEFINE_SPINLOCK(epic_lock);
+-
+-static u32 irq_stat_addr[2];
+-static u32 irq_mask_addr[2];
+-static void (*dispatch_internal)(int cpu);
+-static int is_ext_irq_cascaded;
+-static unsigned int ext_irq_count;
+-static unsigned int ext_irq_start, ext_irq_end;
+-static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
+-static void (*internal_irq_mask)(struct irq_data *d);
+-static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m);
+-
+-
+-static inline u32 get_ext_irq_perf_reg(int irq)
+-{
+-	if (irq < 4)
+-		return ext_irq_cfg_reg1;
+-	return ext_irq_cfg_reg2;
+-}
+-
+-static inline void handle_internal(int intbit)
+-{
+-	if (is_ext_irq_cascaded &&
+-	    intbit >= ext_irq_start && intbit <= ext_irq_end)
+-		do_IRQ(intbit - ext_irq_start + IRQ_EXTERNAL_BASE);
+-	else
+-		do_IRQ(intbit + IRQ_INTERNAL_BASE);
+-}
+-
+-static inline int enable_irq_for_cpu(int cpu, struct irq_data *d,
+-				     const struct cpumask *m)
+-{
+-	bool enable = cpu_online(cpu);
+-
+-#ifdef CONFIG_SMP
+-	if (m)
+-		enable &= cpumask_test_cpu(cpu, m);
+-	else if (irqd_affinity_was_set(d))
+-		enable &= cpumask_test_cpu(cpu, d->affinity);
+-#endif
+-	return enable;
+-}
+-
+-/*
+- * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
+- * prioritize any interrupt relatively to another. the static counter
+- * will resume the loop where it ended the last time we left this
+- * function.
+- */
+-
+-#define BUILD_IPIC_INTERNAL(width)					\
+-void __dispatch_internal_##width(int cpu)				\
+-{									\
+-	u32 pending[width / 32];					\
+-	unsigned int src, tgt;						\
+-	bool irqs_pending = false;					\
+-	static unsigned int i[2];					\
+-	unsigned int *next = &i[cpu];					\
+-	unsigned long flags;						\
+-									\
+-	/* read registers in reverse order */				\
+-	spin_lock_irqsave(&ipic_lock, flags);				\
+-	for (src = 0, tgt = (width / 32); src < (width / 32); src++) {	\
+-		u32 val;						\
+-									\
+-		val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \
+-		val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \
+-		pending[--tgt] = val;					\
+-									\
+-		if (val)						\
+-			irqs_pending = true;				\
+-	}								\
+-	spin_unlock_irqrestore(&ipic_lock, flags);			\
+-									\
+-	if (!irqs_pending)						\
+-		return;							\
+-									\
+-	while (1) {							\
+-		unsigned int to_call = *next;				\
+-									\
+-		*next = (*next + 1) & (width - 1);			\
+-		if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {	\
+-			handle_internal(to_call);			\
+-			break;						\
+-		}							\
+-	}								\
+-}									\
+-									\
+-static void __internal_irq_mask_##width(struct irq_data *d)		\
+-{									\
+-	u32 val;							\
+-	unsigned irq = d->irq - IRQ_INTERNAL_BASE;			\
+-	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
+-	unsigned bit = irq & 0x1f;					\
+-	unsigned long flags;						\
+-	int cpu;							\
+-									\
+-	spin_lock_irqsave(&ipic_lock, flags);				\
+-	for_each_present_cpu(cpu) {					\
+-		if (!irq_mask_addr[cpu])				\
+-			break;						\
+-									\
+-		val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
+-		val &= ~(1 << bit);					\
+-		bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
+-	}								\
+-	spin_unlock_irqrestore(&ipic_lock, flags);			\
+-}									\
+-									\
+-static void __internal_irq_unmask_##width(struct irq_data *d,		\
+-					  const struct cpumask *m)	\
+-{									\
+-	u32 val;							\
+-	unsigned irq = d->irq - IRQ_INTERNAL_BASE;			\
+-	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
+-	unsigned bit = irq & 0x1f;					\
+-	unsigned long flags;						\
+-	int cpu;							\
+-									\
+-	spin_lock_irqsave(&ipic_lock, flags);				\
+-	for_each_present_cpu(cpu) {					\
+-		if (!irq_mask_addr[cpu])				\
+-			break;						\
+-									\
+-		val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
+-		if (enable_irq_for_cpu(cpu, d, m))			\
+-			val |= (1 << bit);				\
+-		else							\
+-			val &= ~(1 << bit);				\
+-		bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
+-	}								\
+-	spin_unlock_irqrestore(&ipic_lock, flags);			\
+-}
+-
+-BUILD_IPIC_INTERNAL(32);
+-BUILD_IPIC_INTERNAL(64);
+-
+-asmlinkage void plat_irq_dispatch(void)
+-{
+-	u32 cause;
+-
+-	do {
+-		cause = read_c0_cause() & read_c0_status() & ST0_IM;
+-
+-		if (!cause)
+-			break;
+-
+-		if (cause & CAUSEF_IP7)
+-			do_IRQ(7);
+-		if (cause & CAUSEF_IP0)
+-			do_IRQ(0);
+-		if (cause & CAUSEF_IP1)
+-			do_IRQ(1);
+-		if (cause & CAUSEF_IP2)
+-			dispatch_internal(0);
+-		if (is_ext_irq_cascaded) {
+-			if (cause & CAUSEF_IP3)
+-				dispatch_internal(1);
+-		} else {
+-			if (cause & CAUSEF_IP3)
+-				do_IRQ(IRQ_EXT_0);
+-			if (cause & CAUSEF_IP4)
+-				do_IRQ(IRQ_EXT_1);
+-			if (cause & CAUSEF_IP5)
+-				do_IRQ(IRQ_EXT_2);
+-			if (cause & CAUSEF_IP6)
+-				do_IRQ(IRQ_EXT_3);
+-		}
+-	} while (1);
+-}
+-
+-/*
+- * internal IRQs operations: only mask/unmask on PERF irq mask
+- * register.
+- */
+-static void bcm63xx_internal_irq_mask(struct irq_data *d)
+-{
+-	internal_irq_mask(d);
+-}
+-
+-static void bcm63xx_internal_irq_unmask(struct irq_data *d)
+-{
+-	internal_irq_unmask(d, NULL);
+-}
+-
+-/*
+- * external IRQs operations: mask/unmask and clear on PERF external
+- * irq control register.
+- */
+-static void bcm63xx_external_irq_mask(struct irq_data *d)
+-{
+-	unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+-	u32 reg, regaddr;
+-	unsigned long flags;
+-
+-	regaddr = get_ext_irq_perf_reg(irq);
+-	spin_lock_irqsave(&epic_lock, flags);
+-	reg = bcm_perf_readl(regaddr);
+-
+-	if (BCMCPU_IS_6348())
+-		reg &= ~EXTIRQ_CFG_MASK_6348(irq % 4);
+-	else
+-		reg &= ~EXTIRQ_CFG_MASK(irq % 4);
+-
+-	bcm_perf_writel(reg, regaddr);
+-	spin_unlock_irqrestore(&epic_lock, flags);
+-
+-	if (is_ext_irq_cascaded)
+-		internal_irq_mask(irq_get_irq_data(irq + ext_irq_start));
+-}
+-
+-static void bcm63xx_external_irq_unmask(struct irq_data *d)
+-{
+-	unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+-	u32 reg, regaddr;
+-	unsigned long flags;
+-
+-	regaddr = get_ext_irq_perf_reg(irq);
+-	spin_lock_irqsave(&epic_lock, flags);
+-	reg = bcm_perf_readl(regaddr);
+-
+-	if (BCMCPU_IS_6348())
+-		reg |= EXTIRQ_CFG_MASK_6348(irq % 4);
+-	else
+-		reg |= EXTIRQ_CFG_MASK(irq % 4);
+-
+-	bcm_perf_writel(reg, regaddr);
+-	spin_unlock_irqrestore(&epic_lock, flags);
+-
+-	if (is_ext_irq_cascaded)
+-		internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start),
+-				    NULL);
+-}
+-
+-static void bcm63xx_external_irq_clear(struct irq_data *d)
+-{
+-	unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+-	u32 reg, regaddr;
+-	unsigned long flags;
+-
+-	regaddr = get_ext_irq_perf_reg(irq);
+-	spin_lock_irqsave(&epic_lock, flags);
+-	reg = bcm_perf_readl(regaddr);
+-
+-	if (BCMCPU_IS_6348())
+-		reg |= EXTIRQ_CFG_CLEAR_6348(irq % 4);
+-	else
+-		reg |= EXTIRQ_CFG_CLEAR(irq % 4);
+-
+-	bcm_perf_writel(reg, regaddr);
+-	spin_unlock_irqrestore(&epic_lock, flags);
+-}
+-
+-static int bcm63xx_external_irq_set_type(struct irq_data *d,
+-					 unsigned int flow_type)
+-{
+-	unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+-	u32 reg, regaddr;
+-	int levelsense, sense, bothedge;
+-	unsigned long flags;
+-
+-	flow_type &= IRQ_TYPE_SENSE_MASK;
+-
+-	if (flow_type == IRQ_TYPE_NONE)
+-		flow_type = IRQ_TYPE_LEVEL_LOW;
+-
+-	levelsense = sense = bothedge = 0;
+-	switch (flow_type) {
+-	case IRQ_TYPE_EDGE_BOTH:
+-		bothedge = 1;
+-		break;
+-
+-	case IRQ_TYPE_EDGE_RISING:
+-		sense = 1;
+-		break;
+-
+-	case IRQ_TYPE_EDGE_FALLING:
+-		break;
+-
+-	case IRQ_TYPE_LEVEL_HIGH:
+-		levelsense = 1;
+-		sense = 1;
+-		break;
+-
+-	case IRQ_TYPE_LEVEL_LOW:
+-		levelsense = 1;
+-		break;
+-
+-	default:
+-		printk(KERN_ERR "bogus flow type combination given !\n");
+-		return -EINVAL;
+-	}
+-
+-	regaddr = get_ext_irq_perf_reg(irq);
+-	spin_lock_irqsave(&epic_lock, flags);
+-	reg = bcm_perf_readl(regaddr);
+-	irq %= 4;
+-
+-	switch (bcm63xx_get_cpu_id()) {
+-	case BCM6348_CPU_ID:
+-		if (levelsense)
+-			reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq);
+-		else
+-			reg &= ~EXTIRQ_CFG_LEVELSENSE_6348(irq);
+-		if (sense)
+-			reg |= EXTIRQ_CFG_SENSE_6348(irq);
+-		else
+-			reg &= ~EXTIRQ_CFG_SENSE_6348(irq);
+-		if (bothedge)
+-			reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq);
+-		else
+-			reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
+-		break;
+-
+-	case BCM3368_CPU_ID:
+-	case BCM6328_CPU_ID:
+-	case BCM6338_CPU_ID:
+-	case BCM6345_CPU_ID:
+-	case BCM6358_CPU_ID:
+-	case BCM6362_CPU_ID:
+-	case BCM6368_CPU_ID:
+-		if (levelsense)
+-			reg |= EXTIRQ_CFG_LEVELSENSE(irq);
+-		else
+-			reg &= ~EXTIRQ_CFG_LEVELSENSE(irq);
+-		if (sense)
+-			reg |= EXTIRQ_CFG_SENSE(irq);
+-		else
+-			reg &= ~EXTIRQ_CFG_SENSE(irq);
+-		if (bothedge)
+-			reg |= EXTIRQ_CFG_BOTHEDGE(irq);
+-		else
+-			reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
+-		break;
+-	default:
+-		BUG();
+-	}
+-
+-	bcm_perf_writel(reg, regaddr);
+-	spin_unlock_irqrestore(&epic_lock, flags);
+-
+-	irqd_set_trigger_type(d, flow_type);
+-	if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
+-		__irq_set_handler_locked(d->irq, handle_level_irq);
+-	else
+-		__irq_set_handler_locked(d->irq, handle_edge_irq);
+-
+-	return IRQ_SET_MASK_OK_NOCOPY;
+-}
+-
+-#ifdef CONFIG_SMP
+-static int bcm63xx_internal_set_affinity(struct irq_data *data,
+-					 const struct cpumask *dest,
+-					 bool force)
+-{
+-	if (!irqd_irq_disabled(data))
+-		internal_irq_unmask(data, dest);
+-
+-	return 0;
+-}
+-#endif
+-
+-static struct irq_chip bcm63xx_internal_irq_chip = {
+-	.name		= "bcm63xx_ipic",
+-	.irq_mask	= bcm63xx_internal_irq_mask,
+-	.irq_unmask	= bcm63xx_internal_irq_unmask,
+-};
+-
+-static struct irq_chip bcm63xx_external_irq_chip = {
+-	.name		= "bcm63xx_epic",
+-	.irq_ack	= bcm63xx_external_irq_clear,
+-
+-	.irq_mask	= bcm63xx_external_irq_mask,
+-	.irq_unmask	= bcm63xx_external_irq_unmask,
+-
+-	.irq_set_type	= bcm63xx_external_irq_set_type,
+-};
+-
+-static struct irqaction cpu_ip2_cascade_action = {
+-	.handler	= no_action,
+-	.name		= "cascade_ip2",
+-	.flags		= IRQF_NO_THREAD,
+-};
+-
+-#ifdef CONFIG_SMP
+-static struct irqaction cpu_ip3_cascade_action = {
+-	.handler	= no_action,
+-	.name		= "cascade_ip3",
+-	.flags		= IRQF_NO_THREAD,
+-};
+-#endif
+-
+-static struct irqaction cpu_ext_cascade_action = {
+-	.handler	= no_action,
+-	.name		= "cascade_extirq",
+-	.flags		= IRQF_NO_THREAD,
+-};
+-
+-static void bcm63xx_init_irq(void)
++void __init arch_init_irq(void)
+ {
+-	int irq_bits;
+-
+-	irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
+-	irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
+-	irq_stat_addr[1] = bcm63xx_regset_address(RSET_PERF);
+-	irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF);
++	void __iomem *periph_bases[2];
++	void __iomem *ext_intc_bases[2];
++	int periph_irq_count, periph_width, ext_irq_count, ext_shift;
++	int periph_irqs[2] = { 2, 3 };
++	int ext_irqs[6];
++
++	periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
++	periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
++	ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
++	ext_intc_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+ 
+ 	switch (bcm63xx_get_cpu_id()) {
+ 	case BCM3368_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
+-		irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
+-		irq_stat_addr[1] = 0;
+-		irq_mask_addr[1] = 0;
+-		irq_bits = 32;
+-		ext_irq_count = 4;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
++		periph_bases[0] += PERF_IRQMASK_3368_REG;
++		periph_irq_count = 1;
++		periph_width = 1;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_3368;
++		ext_irq_count = 4;
++		ext_irqs[0] = BCM_3368_EXT_IRQ0;
++		ext_irqs[1] = BCM_3368_EXT_IRQ1;
++		ext_irqs[2] = BCM_3368_EXT_IRQ2;
++		ext_irqs[3] = BCM_3368_EXT_IRQ3;
++		ext_shift = 4;
+ 		break;
+ 	case BCM6328_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
+-		irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
+-		irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1);
+-		irq_mask_addr[1] += PERF_IRQMASK_6328_REG(1);
+-		irq_bits = 64;
+-		ext_irq_count = 4;
+-		is_ext_irq_cascaded = 1;
+-		ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+-		ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
++		periph_bases[0] += PERF_IRQMASK_6328_REG(0);
++		periph_bases[1] += PERF_IRQMASK_6328_REG(1);
++		periph_irq_count = 2;
++		periph_width = 2;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6328;
++		ext_irq_count = 4;
++		ext_irqs[0] = BCM_6328_EXT_IRQ0;
++		ext_irqs[1] = BCM_6328_EXT_IRQ1;
++		ext_irqs[2] = BCM_6328_EXT_IRQ2;
++		ext_irqs[3] = BCM_6328_EXT_IRQ3;
++		ext_shift = 4;
+ 		break;
+ 	case BCM6338_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
+-		irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
+-		irq_stat_addr[1] = 0;
+-		irq_mask_addr[1] = 0;
+-		irq_bits = 32;
+-		ext_irq_count = 4;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
++		periph_bases[0] += PERF_IRQMASK_6338_REG;
++		periph_irq_count = 1;
++		periph_width = 1;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6338;
++		ext_irq_count = 4;
++		ext_irqs[0] = 3;
++		ext_irqs[1] = 4;
++		ext_irqs[2] = 5;
++		ext_irqs[3] = 6;
++		ext_shift = 4;
+ 		break;
+ 	case BCM6345_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
+-		irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
+-		irq_stat_addr[1] = 0;
+-		irq_mask_addr[1] = 0;
+-		irq_bits = 32;
+-		ext_irq_count = 4;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
++		periph_bases[0] += PERF_IRQMASK_6345_REG;
++		periph_irq_count = 1;
++		periph_width = 1;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6345;
++		ext_irq_count = 4;
++		ext_irqs[0] = 3;
++		ext_irqs[1] = 4;
++		ext_irqs[2] = 5;
++		ext_irqs[3] = 6;
++		ext_shift = 4;
+ 		break;
+ 	case BCM6348_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
+-		irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
+-		irq_stat_addr[1] = 0;
+-		irq_mask_addr[1] = 0;
+-		irq_bits = 32;
+-		ext_irq_count = 4;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
++		periph_bases[0] += PERF_IRQMASK_6348_REG;
++		periph_irq_count = 1;
++		periph_width = 1;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6348;
++		ext_irq_count = 4;
++		ext_irqs[0] = 3;
++		ext_irqs[1] = 4;
++		ext_irqs[2] = 5;
++		ext_irqs[3] = 6;
++		ext_shift = 5;
+ 		break;
+ 	case BCM6358_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
+-		irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
+-		irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1);
+-		irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1);
+-		irq_bits = 32;
+-		ext_irq_count = 4;
+-		is_ext_irq_cascaded = 1;
+-		ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+-		ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
++		periph_bases[0] += PERF_IRQMASK_6358_REG(0);
++		periph_bases[1] += PERF_IRQMASK_6358_REG(1);
++		periph_irq_count = 2;
++		periph_width = 1;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
++		ext_irq_count = 4;
++		ext_irqs[0] = BCM_6358_EXT_IRQ0;
++		ext_irqs[1] = BCM_6358_EXT_IRQ1;
++		ext_irqs[2] = BCM_6358_EXT_IRQ2;
++		ext_irqs[3] = BCM_6358_EXT_IRQ3;
++		ext_shift = 4;
+ 		break;
+ 	case BCM6362_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
+-		irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
+-		irq_stat_addr[1] += PERF_IRQSTAT_6362_REG(1);
+-		irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1);
+-		irq_bits = 64;
+-		ext_irq_count = 4;
+-		is_ext_irq_cascaded = 1;
+-		ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+-		ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
++		periph_bases[0] += PERF_IRQMASK_6362_REG(0);
++		periph_bases[1] += PERF_IRQMASK_6362_REG(1);
++		periph_irq_count = 2;
++		periph_width = 2;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6362;
++		ext_irq_count = 4;
++		ext_irqs[0] = BCM_6362_EXT_IRQ0;
++		ext_irqs[1] = BCM_6362_EXT_IRQ1;
++		ext_irqs[2] = BCM_6362_EXT_IRQ2;
++		ext_irqs[3] = BCM_6362_EXT_IRQ3;
++		ext_shift = 4;
+ 		break;
+ 	case BCM6368_CPU_ID:
+-		irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
+-		irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
+-		irq_stat_addr[1] += PERF_IRQSTAT_6368_REG(1);
+-		irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1);
+-		irq_bits = 64;
++		periph_bases[0] += PERF_IRQMASK_6368_REG(0);
++		periph_bases[1] += PERF_IRQMASK_6368_REG(1);
++		periph_irq_count = 2;
++		periph_width = 2;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6368;
++		ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6368;
+ 		ext_irq_count = 6;
+-		is_ext_irq_cascaded = 1;
+-		ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+-		ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
+-		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
+-		ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
++		ext_irqs[0] = BCM_6368_EXT_IRQ0;
++		ext_irqs[1] = BCM_6368_EXT_IRQ1;
++		ext_irqs[2] = BCM_6368_EXT_IRQ2;
++		ext_irqs[3] = BCM_6368_EXT_IRQ3;
++		ext_irqs[4] = BCM_6368_EXT_IRQ4;
++		ext_irqs[5] = BCM_6368_EXT_IRQ5;
++		ext_shift = 4;
+ 		break;
+ 	default:
+ 		BUG();
+ 	}
+ 
+-	if (irq_bits == 32) {
+-		dispatch_internal = __dispatch_internal_32;
+-		internal_irq_mask = __internal_irq_mask_32;
+-		internal_irq_unmask = __internal_irq_unmask_32;
+-	} else {
+-		dispatch_internal = __dispatch_internal_64;
+-		internal_irq_mask = __internal_irq_mask_64;
+-		internal_irq_unmask = __internal_irq_unmask_64;
+-	}
+-}
+-
+-void __init arch_init_irq(void)
+-{
+-	int i;
+-
+-	bcm63xx_init_irq();
+ 	mips_cpu_irq_init();
+-	for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i)
+-		irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip,
+-					 handle_level_irq);
+-
+-	for (i = IRQ_EXTERNAL_BASE; i < IRQ_EXTERNAL_BASE + ext_irq_count; ++i)
+-		irq_set_chip_and_handler(i, &bcm63xx_external_irq_chip,
+-					 handle_edge_irq);
+-
+-	if (!is_ext_irq_cascaded) {
+-		for (i = 3; i < 3 + ext_irq_count; ++i)
+-			setup_irq(MIPS_CPU_IRQ_BASE + i, &cpu_ext_cascade_action);
+-	}
+-
+-	setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
+-#ifdef CONFIG_SMP
+-	if (is_ext_irq_cascaded) {
+-		setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
+-		bcm63xx_internal_irq_chip.irq_set_affinity =
+-			bcm63xx_internal_set_affinity;
+-
+-		cpumask_clear(irq_default_affinity);
+-		cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
+-	}
+-#endif
++	bcm6345_periph_intc_init(periph_irq_count, periph_irqs, periph_bases,
++				 periph_width);
++	bcm6345_ext_intc_init(4, ext_irqs, ext_intc_bases[0], ext_shift);
++	if (ext_irq_count > 4)
++		bcm6345_ext_intc_init(2, &ext_irqs[4], ext_intc_bases[1],
++				      ext_shift);
+ }
diff --git a/target/linux/brcm63xx/patches-4.1/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch b/target/linux/brcm63xx/patches-4.1/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch
new file mode 100644
index 0000000..0796bb5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch
@@ -0,0 +1,57 @@
+From 4fd286c3e5a5bebab0391cf1937695b3ed6721a3 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 20:20:30 +0100
+Subject: [PATCH 4/5] MIPS: BCM63XX: wire up BCM6358's external interrupts 4
+ and 5
+
+Due to the external interrupts being non consecutive, the previous
+implementation did not support them. Now that we treat both registers
+as separate irq controllers, there is no such limitation anymore and
+we can expose them for drivers to use.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c                           |    5 ++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h  |    2 ++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |    1 +
+ 3 files changed, 7 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -109,11 +109,14 @@ void __init arch_init_irq(void)
+ 		periph_width = 1;
+ 
+ 		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
+-		ext_irq_count = 4;
++		ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6358;
++		ext_irq_count = 6;
+ 		ext_irqs[0] = BCM_6358_EXT_IRQ0;
+ 		ext_irqs[1] = BCM_6358_EXT_IRQ1;
+ 		ext_irqs[2] = BCM_6358_EXT_IRQ2;
+ 		ext_irqs[3] = BCM_6358_EXT_IRQ3;
++		ext_irqs[4] = BCM_6358_EXT_IRQ4;
++		ext_irqs[5] = BCM_6358_EXT_IRQ5;
+ 		ext_shift = 4;
+ 		break;
+ 	case BCM6362_CPU_ID:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -895,6 +895,8 @@ enum bcm63xx_irq {
+ #define BCM_6358_EXT_IRQ1		(IRQ_INTERNAL_BASE + 26)
+ #define BCM_6358_EXT_IRQ2		(IRQ_INTERNAL_BASE + 27)
+ #define BCM_6358_EXT_IRQ3		(IRQ_INTERNAL_BASE + 28)
++#define BCM_6358_EXT_IRQ4		(IRQ_INTERNAL_BASE + 20)
++#define BCM_6358_EXT_IRQ5		(IRQ_INTERNAL_BASE + 21)
+ 
+ /*
+  * 6362 irqs
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -243,6 +243,7 @@
+ #define PERF_EXTIRQ_CFG_REG_6362	0x18
+ #define PERF_EXTIRQ_CFG_REG_6368	0x18
+ 
++#define PERF_EXTIRQ_CFG_REG2_6358	0x1c
+ #define PERF_EXTIRQ_CFG_REG2_6368	0x1c
+ 
+ /* for 6348 only */
diff --git a/target/linux/brcm63xx/patches-4.1/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch b/target/linux/brcm63xx/patches-4.1/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch
new file mode 100644
index 0000000..661abf6
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch
@@ -0,0 +1,77 @@
+From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:08:36 +0100
+Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper
+
+---
+ arch/mips/bcm63xx/cpu.c                          | 10 ++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
+ 2 files changed, 28 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs);
+ u16 bcm63xx_cpu_id __read_mostly;
+ EXPORT_SYMBOL(bcm63xx_cpu_id);
+ 
++static u32 bcm63xx_cpu_variant __read_mostly;
++
+ static u8 bcm63xx_cpu_rev;
+ static unsigned int bcm63xx_cpu_freq;
+ static unsigned int bcm63xx_memory_size;
+@@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = {
+ 
+ };
+ 
++u32 bcm63xx_get_cpu_variant(void)
++{
++	return bcm63xx_cpu_variant;
++}
++
++EXPORT_SYMBOL(bcm63xx_get_cpu_variant);
++
+ u8 bcm63xx_get_cpu_rev(void)
+ {
+ 	return bcm63xx_cpu_rev;
+@@ -333,6 +342,7 @@ void __init bcm63xx_cpu_init(void)
+ 	/* read out CPU type */
+ 	tmp = bcm_readl(chipid_reg);
+ 	bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
++	bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ 	bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
+ 
+ 	switch (bcm63xx_cpu_id) {
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -19,6 +19,7 @@
+ #define BCM6368_CPU_ID		0x6368
+ 
+ void __init bcm63xx_cpu_init(void);
++u32 bcm63xx_get_cpu_variant(void);
+ u8 bcm63xx_get_cpu_rev(void);
+ unsigned int bcm63xx_get_cpu_freq(void);
+ 
+@@ -82,6 +83,23 @@ static inline u16 __pure bcm63xx_get_cpu
+ #define BCMCPU_IS_6362()	(bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
+ #define BCMCPU_IS_6368()	(bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
+ 
++#define BCMCPU_VARIANT_IS_3368() \
++	(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6328() \
++	(bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
++#define BCMCPU_VARIANT_IS_6338() \
++	(bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
++#define BCMCPU_VARIANT_IS_6345() \
++	(bcm63xx_get_cpu_variant() == BCM6345_CPU_ID)
++#define BCMCPU_VARIANT_IS_6348() \
++	(bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
++#define BCMCPU_VARIANT_IS_6358() \
++	(bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
++#define BCMCPU_VARIANT_IS_6362() \
++	(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
++#define BCMCPU_VARIANT_IS_6368() \
++	(bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
++
+ /*
+  * While registers sets are (mostly) the same across 63xx CPU, base
+  * address of these sets do change.
diff --git a/target/linux/brcm63xx/patches-4.1/331-MIPS-BCM63XX-define-variant-id-field.patch b/target/linux/brcm63xx/patches-4.1/331-MIPS-BCM63XX-define-variant-id-field.patch
new file mode 100644
index 0000000..2e21c65
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/331-MIPS-BCM63XX-define-variant-id-field.patch
@@ -0,0 +1,23 @@
+From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:22:41 +0100
+Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field
+
+Some SoC have a variant id field in the chip id register.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -9,6 +9,8 @@
+ #define PERF_REV_REG			0x0
+ #define REV_CHIPID_SHIFT		16
+ #define REV_CHIPID_MASK			(0xffff << REV_CHIPID_SHIFT)
++#define REV_VARID_SHIFT			12
++#define REV_VARID_MASK			(0xf << REV_VARID_SHIFT)
+ #define REV_REVID_SHIFT			0
+ #define REV_REVID_MASK			(0xff << REV_REVID_SHIFT)
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/332-MIPS-BCM63XX-detect-BCM6328-variants.patch b/target/linux/brcm63xx/patches-4.1/332-MIPS-BCM63XX-detect-BCM6328-variants.patch
new file mode 100644
index 0000000..faa002e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/332-MIPS-BCM63XX-detect-BCM6328-variants.patch
@@ -0,0 +1,68 @@
+From d59120f23279ef62a48d9f94847254b061d0a8b6 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:30:59 +0100
+Subject: [PATCH 22/45] MIPS: BCM63XX: detect BCM6328 variants
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/cpu.c                          | 10 ++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h |  8 ++++++--
+ 2 files changed, 16 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -305,6 +305,7 @@ void __init bcm63xx_cpu_init(void)
+ 	unsigned int tmp;
+ 	unsigned int cpu = smp_processor_id();
+ 	u32 chipid_reg;
++	u8 __maybe_unused varid = 0;
+ 
+ 	/* soc registers location depends on cpu type */
+ 	chipid_reg = 0;
+@@ -344,6 +345,7 @@ void __init bcm63xx_cpu_init(void)
+ 	bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
+ 	bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ 	bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
++	varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
+ 
+ 	switch (bcm63xx_cpu_id) {
+ 	case BCM3368_CPU_ID:
+@@ -353,6 +355,14 @@ void __init bcm63xx_cpu_init(void)
+ 	case BCM6328_CPU_ID:
+ 		bcm63xx_regs_base = bcm6328_regs_base;
+ 		bcm63xx_irqs = bcm6328_irqs;
++
++		if (varid == 1)
++			bcm63xx_cpu_variant = BCM63281_CPU_ID;
++		else if (varid == 3)
++			bcm63xx_cpu_variant = BCM63283_CPU_ID;
++		else
++			pr_warn("unknown BCM6328 variant: %x\n", varid);
++
+ 		break;
+ 	case BCM6338_CPU_ID:
+ 		bcm63xx_regs_base = bcm6338_regs_base;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -11,6 +11,8 @@
+  */
+ #define BCM3368_CPU_ID		0x3368
+ #define BCM6328_CPU_ID		0x6328
++#define BCM63281_CPU_ID		0x63281
++#define BCM63283_CPU_ID		0x63283
+ #define BCM6338_CPU_ID		0x6338
+ #define BCM6345_CPU_ID		0x6345
+ #define BCM6348_CPU_ID		0x6348
+@@ -85,8 +87,10 @@ static inline u16 __pure bcm63xx_get_cpu
+ 
+ #define BCMCPU_VARIANT_IS_3368() \
+ 	(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
+-#define BCMCPU_VARIANT_IS_6328() \
+-	(bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
++#define BCMCPU_VARIANT_IS_63281() \
++	(bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
++#define BCMCPU_VARIANT_IS_63283() \
++	(bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6338() \
+ 	(bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6345() \
diff --git a/target/linux/brcm63xx/patches-4.1/333-MIPS-BCM63XX-detect-BCM6362-variants.patch b/target/linux/brcm63xx/patches-4.1/333-MIPS-BCM63XX-detect-BCM6362-variants.patch
new file mode 100644
index 0000000..62ce12e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/333-MIPS-BCM63XX-detect-BCM6362-variants.patch
@@ -0,0 +1,46 @@
+From 04458c3db8eb79da21ecde40ab36a1dde52bef06 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:33:28 +0100
+Subject: [PATCH 23/45] MIPS: BCM63XX: detect BCM6362 variants
+
+---
+ arch/mips/bcm63xx/cpu.c                          | 8 ++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
+ 2 files changed, 11 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -383,6 +383,14 @@ void __init bcm63xx_cpu_init(void)
+ 	case BCM6362_CPU_ID:
+ 		bcm63xx_regs_base = bcm6362_regs_base;
+ 		bcm63xx_irqs = bcm6362_irqs;
++
++		if (varid == 1)
++			bcm63xx_cpu_variant = BCM6362_CPU_ID;
++		else if (varid == 2)
++			bcm63xx_cpu_variant = BCM6361_CPU_ID;
++		else
++			pr_warn("unknown BCM6362 variant: %x\n", varid);
++
+ 		break;
+ 	case BCM6368_CPU_ID:
+ 		bcm63xx_regs_base = bcm6368_regs_base;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -17,6 +17,7 @@
+ #define BCM6345_CPU_ID		0x6345
+ #define BCM6348_CPU_ID		0x6348
+ #define BCM6358_CPU_ID		0x6358
++#define BCM6361_CPU_ID		0x6361
+ #define BCM6362_CPU_ID		0x6362
+ #define BCM6368_CPU_ID		0x6368
+ 
+@@ -99,6 +100,8 @@ static inline u16 __pure bcm63xx_get_cpu
+ 	(bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6358() \
+ 	(bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
++#define BCMCPU_VARIANT_IS_6361() \
++	(bcm63xx_get_cpu_variant() == BCM6361_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6362() \
+ 	(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6368() \
diff --git a/target/linux/brcm63xx/patches-4.1/334-MIPS-BCM63XX-detect-BCM6368-variants.patch b/target/linux/brcm63xx/patches-4.1/334-MIPS-BCM63XX-detect-BCM6368-variants.patch
new file mode 100644
index 0000000..a993e23
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/334-MIPS-BCM63XX-detect-BCM6368-variants.patch
@@ -0,0 +1,48 @@
+From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:36:56 +0100
+Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants
+
+The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart
+from missing DSL, there is no difference to BCM6368, so treat it such.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/cpu.c                          | 4 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -393,8 +393,12 @@ void __init bcm63xx_cpu_init(void)
+ 
+ 		break;
+ 	case BCM6368_CPU_ID:
++	case BCM6369_CPU_ID:
+ 		bcm63xx_regs_base = bcm6368_regs_base;
+ 		bcm63xx_irqs = bcm6368_irqs;
++
++		/* BCM6369 is a BCM6368 without xDSL, so treat it the same */
++		bcm63xx_cpu_id = BCM6368_CPU_ID;
+ 		break;
+ 	default:
+ 		panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -20,6 +20,7 @@
+ #define BCM6361_CPU_ID		0x6361
+ #define BCM6362_CPU_ID		0x6362
+ #define BCM6368_CPU_ID		0x6368
++#define BCM6369_CPU_ID		0x6369
+ 
+ void __init bcm63xx_cpu_init(void);
+ u32 bcm63xx_get_cpu_variant(void);
+@@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu
+ 	(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6368() \
+ 	(bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6369() \
++	(bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
+ 
+ /*
+  * While registers sets are (mostly) the same across 63xx CPU, base
diff --git a/target/linux/brcm63xx/patches-4.1/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch b/target/linux/brcm63xx/patches-4.1/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch
new file mode 100644
index 0000000..3230add
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch
@@ -0,0 +1,20 @@
+From f67f8134b4537c8bbafe7e1975edfe808b813997 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 03:05:54 +0100
+Subject: [PATCH 45/53] MIPS: BCM63XX: fix PCIe memory window size
+
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -41,7 +41,7 @@
+ 					BCM_CB_MEM_SIZE - 1)
+ 
+ #define BCM_PCIE_MEM_BASE_PA		0x10f00000
+-#define BCM_PCIE_MEM_SIZE		(16 * 1024 * 1024)
++#define BCM_PCIE_MEM_SIZE		(1 * 1024 * 1024)
+ #define BCM_PCIE_MEM_END_PA		(BCM_PCIE_MEM_BASE_PA +		\
+ 					BCM_PCIE_MEM_SIZE - 1)
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch b/target/linux/brcm63xx/patches-4.1/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch
new file mode 100644
index 0000000..d6eb54d
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch
@@ -0,0 +1,70 @@
+From aa05464973bc176478af462ca7c53a9239c651d4 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 03:13:06 +0100
+Subject: [PATCH 46/53] MIPS: BCM63XX: dynamically set the pcie memory windows
+
+Different SoCs use different memory windows (and sizes), so don't
+hardcode it.
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h |  8 ++++----
+ arch/mips/pci/pci-bcm63xx.c                     | 15 ++++++++++-----
+ 2 files changed, 14 insertions(+), 9 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -40,10 +40,10 @@
+ #define BCM_CB_MEM_END_PA		(BCM_CB_MEM_BASE_PA +		\
+ 					BCM_CB_MEM_SIZE - 1)
+ 
+-#define BCM_PCIE_MEM_BASE_PA		0x10f00000
+-#define BCM_PCIE_MEM_SIZE		(1 * 1024 * 1024)
+-#define BCM_PCIE_MEM_END_PA		(BCM_PCIE_MEM_BASE_PA +		\
+-					BCM_PCIE_MEM_SIZE - 1)
++#define BCM_PCIE_MEM_BASE_PA_6328	0x10f00000
++#define BCM_PCIE_MEM_SIZE_6328		(1 * 1024 * 1024)
++#define BCM_PCIE_MEM_END_PA_6328	(BCM_PCIE_MEM_BASE_PA_6328 +	\
++					BCM_PCIE_MEM_SIZE_6328 - 1)
+ 
+ /*
+  * Internal registers are accessed through KSEG3
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -77,8 +77,8 @@ struct pci_controller bcm63xx_cb_control
+ 
+ static struct resource bcm_pcie_mem_resource = {
+ 	.name	= "bcm63xx PCIe memory space",
+-	.start	= BCM_PCIE_MEM_BASE_PA,
+-	.end	= BCM_PCIE_MEM_END_PA,
++	.start	= 0,
++	.end	= 0,
+ 	.flags	= IORESOURCE_MEM,
+ };
+ 
+@@ -195,12 +195,12 @@ static int __init bcm63xx_register_pcie(
+ 	bcm_pcie_writel(val, PCIE_CONFIG2_REG);
+ 
+ 	/* set bar0 to little endian */
+-	val = (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_BASE_SHIFT;
+-	val |= (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_MASK_SHIFT;
++	val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
++	val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
+ 	val |= BASEMASK_REMAP_EN;
+ 	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
+ 
+-	val = (BCM_PCIE_MEM_BASE_PA >> 20) << REBASE_ADDR_BASE_SHIFT;
++	val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
+ 	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
+ 
+ 	register_pci_controller(&bcm63xx_pcie_controller);
+@@ -334,6 +334,11 @@ static int __init bcm63xx_pci_init(void)
+ 	if (!bcm63xx_pci_enabled)
+ 		return -ENODEV;
+ 
++	if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
++		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
++		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
++	}
++
+ 	switch (bcm63xx_get_cpu_id()) {
+ 	case BCM6328_CPU_ID:
+ 	case BCM6362_CPU_ID:
diff --git a/target/linux/brcm63xx/patches-4.1/337-MIPS-BCM63XX-widen-cpuid-field.patch b/target/linux/brcm63xx/patches-4.1/337-MIPS-BCM63XX-widen-cpuid-field.patch
new file mode 100644
index 0000000..0ead82e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/337-MIPS-BCM63XX-widen-cpuid-field.patch
@@ -0,0 +1,56 @@
+From f1477f6e3551fd6beecfee5368fed1325dcd421f Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:54:51 +0100
+Subject: [PATCH 47/53] MIPS: BCM63XX: widen cpuid field
+
+---
+ arch/mips/bcm63xx/cpu.c                          | 2 +-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++----
+ 2 files changed, 5 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -24,7 +24,7 @@ EXPORT_SYMBOL(bcm63xx_regs_base);
+ const int *bcm63xx_irqs;
+ EXPORT_SYMBOL(bcm63xx_irqs);
+ 
+-u16 bcm63xx_cpu_id __read_mostly;
++u32 bcm63xx_cpu_id __read_mostly;
+ EXPORT_SYMBOL(bcm63xx_cpu_id);
+ 
+ static u32 bcm63xx_cpu_variant __read_mostly;
+@@ -127,7 +127,7 @@ unsigned int bcm63xx_get_memory_size(voi
+ 
+ static unsigned int detect_cpu_clock(void)
+ {
+-	u16 cpu_id = bcm63xx_get_cpu_id();
++	u32 cpu_id = bcm63xx_get_cpu_id();
+ 
+ 	switch (cpu_id) {
+ 	case BCM3368_CPU_ID:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -27,7 +27,7 @@ u32 bcm63xx_get_cpu_variant(void);
+ u8 bcm63xx_get_cpu_rev(void);
+ unsigned int bcm63xx_get_cpu_freq(void);
+ 
+-static inline u16 __pure __bcm63xx_get_cpu_id(const u16 cpu_id)
++static inline u32 __pure __bcm63xx_get_cpu_id(const u32 cpu_id)
+ {
+ 	switch (cpu_id) {
+ #ifdef CONFIG_BCM63XX_CPU_3368
+@@ -69,11 +69,11 @@ static inline u16 __pure __bcm63xx_get_c
+ 	return cpu_id;
+ }
+ 
+-extern u16 bcm63xx_cpu_id;
++extern u32 bcm63xx_cpu_id;
+ 
+-static inline u16 __pure bcm63xx_get_cpu_id(void)
++static inline u32 __pure bcm63xx_get_cpu_id(void)
+ {
+-	const u16 cpu_id = bcm63xx_cpu_id;
++	const u32 cpu_id = bcm63xx_cpu_id;
+ 
+ 	return __bcm63xx_get_cpu_id(cpu_id);
+ }
diff --git a/target/linux/brcm63xx/patches-4.1/338-MIPS-BCM63XX-increase-number-of-IRQs.patch b/target/linux/brcm63xx/patches-4.1/338-MIPS-BCM63XX-increase-number-of-IRQs.patch
new file mode 100644
index 0000000..9132e42
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/338-MIPS-BCM63XX-increase-number-of-IRQs.patch
@@ -0,0 +1,39 @@
+From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 15 Dec 2013 20:46:26 +0100
+Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs
+
+Newer SoCs have 128 bit wide irq registers, thus 128 available internal
+interupts.
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++-
+ arch/mips/include/asm/mach-bcm63xx/irq.h         | 2 +-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
+@@ -1,10 +1,12 @@
+ #ifndef BCM63XX_IRQ_H_
+ #define BCM63XX_IRQ_H_
+ 
++#include <irq.h>
+ #include <bcm63xx_cpu.h>
+ 
+ #define IRQ_INTERNAL_BASE		8
+-#define IRQ_EXTERNAL_BASE		100
++#define NR_INTERNAL_IRQS		128
++#define IRQ_EXTERNAL_BASE		(IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS)
+ #define IRQ_EXT_0			(IRQ_EXTERNAL_BASE + 0)
+ #define IRQ_EXT_1			(IRQ_EXTERNAL_BASE + 1)
+ #define IRQ_EXT_2			(IRQ_EXTERNAL_BASE + 2)
+--- a/arch/mips/include/asm/mach-bcm63xx/irq.h
++++ b/arch/mips/include/asm/mach-bcm63xx/irq.h
+@@ -1,7 +1,7 @@
+ #ifndef __ASM_MACH_BCM63XX_IRQ_H
+ #define __ASM_MACH_BCM63XX_IRQ_H
+ 
+-#define NR_IRQS 128
++#define NR_IRQS 256
+ #define MIPS_CPU_IRQ_BASE 0
+ 
+ #endif
diff --git a/target/linux/brcm63xx/patches-4.1/339-MIPS-BCM63XX-add-support-for-BCM63268.patch b/target/linux/brcm63xx/patches-4.1/339-MIPS-BCM63XX-add-support-for-BCM63268.patch
new file mode 100644
index 0000000..277aa70
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/339-MIPS-BCM63XX-add-support-for-BCM63268.patch
@@ -0,0 +1,735 @@
+From 98f63141190ac02c58b78d58f771bd263c61d756 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 17:14:17 +0100
+Subject: [PATCH 48/56] MIPS: BCM63XX: add support for BCM63268
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/Kconfig                         |   5 +
+ arch/mips/bcm63xx/boards/board_bcm963xx.c         |   2 +-
+ arch/mips/bcm63xx/clk.c                           |  25 ++++-
+ arch/mips/bcm63xx/cpu.c                           |  59 +++++++++-
+ arch/mips/bcm63xx/dev-flash.c                     |   6 +
+ arch/mips/bcm63xx/dev-spi.c                       |   4 +-
+ arch/mips/bcm63xx/irq.c                           |  20 +++-
+ arch/mips/bcm63xx/reset.c                         |  21 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h  | 130 ++++++++++++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h |   2 +
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |  79 +++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/ioremap.h      |   1 +
+ 12 files changed, 342 insertions(+), 12 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -60,6 +60,11 @@ config BCM63XX_CPU_6368
+ 	select HW_HAS_PCI
+ 	select BCM63XX_OHCI
+ 	select BCM63XX_EHCI
++
++config BCM63XX_CPU_63268
++	bool "support 63268 CPU"
++	select SYS_HAS_CPU_BMIPS4350
++	select HW_HAS_PCI
+ endmenu
+ 
+ source "arch/mips/bcm63xx/boards/Kconfig"
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -712,7 +712,7 @@ void __init board_prom_init(void)
+ 	/* read base address of boot chip select (0)
+ 	 * 6328/6362 do not have MPI but boot from a fixed address
+ 	 */
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
++	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
+ 		val = 0x18000000;
+ 	} else {
+ 		val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -133,6 +133,8 @@ static void enetsw_set(struct clk *clk,
+ 				CKCTL_6368_SWPKT_USB_EN |
+ 				CKCTL_6368_SWPKT_SAR_EN,
+ 				enable);
++	else if (BCMCPU_IS_63268())
++		bcm_hwclock_set(CKCTL_63268_ROBOSW_EN, enable);
+ 	else
+ 		return;
+ 
+@@ -177,6 +179,8 @@ static void usbh_set(struct clk *clk, in
+ 		bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
+ 	else if (BCMCPU_IS_6368())
+ 		bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
++	else if (BCMCPU_IS_63268())
++		bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
+ 	else
+ 		return;
+ 
+@@ -199,6 +203,8 @@ static void usbd_set(struct clk *clk, in
+ 		bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
+ 	else if (BCMCPU_IS_6368())
+ 		bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
++	else if (BCMCPU_IS_63268())
++		bcm_hwclock_set(CKCTL_63268_USBD_EN, enable);
+ 	else
+ 		return;
+ 
+@@ -225,9 +231,13 @@ static void spi_set(struct clk *clk, int
+ 		mask = CKCTL_6358_SPI_EN;
+ 	else if (BCMCPU_IS_6362())
+ 		mask = CKCTL_6362_SPI_EN;
+-	else
+-		/* BCMCPU_IS_6368 */
++	else if (BCMCPU_IS_6368())
+ 		mask = CKCTL_6368_SPI_EN;
++	else if (BCMCPU_IS_63268())
++		mask = CKCTL_63268_SPI_EN;
++	else
++		return;
++
+ 	bcm_hwclock_set(mask, enable);
+ }
+ 
+@@ -246,6 +256,8 @@ static void hsspi_set(struct clk *clk, i
+ 		mask = CKCTL_6328_HSSPI_EN;
+ 	else if (BCMCPU_IS_6362())
+ 		mask = CKCTL_6362_HSSPI_EN;
++	else if (BCMCPU_IS_63268())
++		mask = CKCTL_63268_HSSPI_EN;
+ 	else
+ 		return;
+ 
+@@ -307,6 +319,8 @@ static void pcie_set(struct clk *clk, in
+ 		bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
+ 	else if (BCMCPU_IS_6362())
+ 		bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
++	else if (BCMCPU_IS_63268())
++		bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
+ }
+ 
+ static struct clk clk_pcie = {
+@@ -386,9 +400,11 @@ struct clk *clk_get(struct device *dev,
+ 		return &clk_periph;
+ 	if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm"))
+ 		return &clk_pcm;
+-	if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec"))
++	if ((BCMCPU_IS_6362() || BCMCPU_IS_6368() || BCMCPU_IS_63268()) &&
++	    !strcmp(id, "ipsec"))
+ 		return &clk_ipsec;
+-	if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie"))
++	if ((BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) &&
++	    !strcmp(id, "pcie"))
+ 		return &clk_pcie;
+ 	return ERR_PTR(-ENOENT);
+ }
+@@ -411,6 +427,7 @@ static int __init bcm63xx_clk_init(void)
+ 		clk_hsspi.rate = HSSPI_PLL_HZ_6328;
+ 		break;
+ 	case BCM6362_CPU_ID:
++	case BCM63268_CPU_ID:
+ 		clk_hsspi.rate = HSSPI_PLL_HZ_6362;
+ 		break;
+ 	}
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -101,6 +101,15 @@ static const int bcm6368_irqs[] = {
+ 
+ };
+ 
++static const unsigned long bcm63268_regs_base[] = {
++	__GEN_CPU_REGS_TABLE(63268)
++};
++
++static const int bcm63268_irqs[] = {
++	__GEN_CPU_IRQ_TABLE(63268)
++
++};
++
+ u32 bcm63xx_get_cpu_variant(void)
+ {
+ 	return bcm63xx_cpu_variant;
+@@ -253,6 +262,27 @@ static unsigned int detect_cpu_clock(voi
+ 
+ 		return (((64 * 1000000) / p1) * p2 * ndiv) / m1;
+ 	}
++	case BCM63268_CPU_ID:
++	{
++		unsigned int tmp, mips_pll_fcvo;
++
++		tmp = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
++		mips_pll_fcvo = (tmp & STRAPBUS_63268_FCVO_MASK) >>
++				STRAPBUS_63268_FCVO_SHIFT;
++		switch (mips_pll_fcvo) {
++		case 0x3:
++		case 0xe:
++			return 320000000;
++		case 0xa:
++			return 333000000;
++		case 0x2:
++		case 0xb:
++		case 0xf:
++			return 400000000;
++		default:
++			return 0;
++		}
++	}
+ 
+ 	default:
+ 		panic("Failed to detect clock for CPU with id=%04X\n", cpu_id);
+@@ -267,7 +297,7 @@ static unsigned int detect_memory_size(v
+ 	unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
+ 	u32 val;
+ 
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
++	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
+ 		return bcm_ddr_readl(DDR_CSEND_REG) << 24;
+ 
+ 	if (BCMCPU_IS_6345()) {
+@@ -305,6 +335,7 @@ void __init bcm63xx_cpu_init(void)
+ 	unsigned int tmp;
+ 	unsigned int cpu = smp_processor_id();
+ 	u32 chipid_reg;
++	bool long_chipid = false;
+ 	u8 __maybe_unused varid = 0;
+ 
+ 	/* soc registers location depends on cpu type */
+@@ -326,6 +357,9 @@ void __init bcm63xx_cpu_init(void)
+ 		case 0x10:
+ 			chipid_reg = BCM_6345_PERF_BASE;
+ 			break;
++		case 0x80:
++			long_chipid = true;
++			/* fall-through */
+ 		default:
+ 			chipid_reg = BCM_6368_PERF_BASE;
+ 			break;
+@@ -333,6 +367,7 @@ void __init bcm63xx_cpu_init(void)
+ 		break;
+ 	}
+ 
++
+ 	/*
+ 	 * really early to panic, but delaying panic would not help since we
+ 	 * will never get any working console
+@@ -342,10 +377,17 @@ void __init bcm63xx_cpu_init(void)
+ 
+ 	/* read out CPU type */
+ 	tmp = bcm_readl(chipid_reg);
+-	bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
+-	bcm63xx_cpu_variant = bcm63xx_cpu_id;
++
++	if (long_chipid) {
++		bcm63xx_cpu_id = tmp & REV_LONG_CHIPID_MASK;
++		bcm63xx_cpu_id >>= REV_LONG_CHIPID_SHIFT;
++	} else {
++		bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
++		varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
++	}
++
+ 	bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
+-	varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
++	bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ 
+ 	switch (bcm63xx_cpu_id) {
+ 	case BCM3368_CPU_ID:
+@@ -400,6 +442,15 @@ void __init bcm63xx_cpu_init(void)
+ 		/* BCM6369 is a BCM6368 without xDSL, so treat it the same */
+ 		bcm63xx_cpu_id = BCM6368_CPU_ID;
+ 		break;
++	case BCM63168_CPU_ID:
++	case BCM63169_CPU_ID:
++	case BCM63268_CPU_ID:
++	case BCM63269_CPU_ID:
++		bcm63xx_regs_base = bcm63268_regs_base;
++		bcm63xx_irqs = bcm63268_irqs;
++
++		bcm63xx_cpu_id = BCM63268_CPU_ID;
++		break;
+ 	default:
+ 		panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
+ 		break;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -94,6 +94,12 @@ static int __init bcm63xx_detect_flash_t
+ 		case STRAPBUS_6368_BOOT_SEL_PARALLEL:
+ 			return BCM63XX_FLASH_TYPE_PARALLEL;
+ 		}
++	case BCM63268_CPU_ID:
++		val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
++		if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
++			return BCM63XX_FLASH_TYPE_SERIAL;
++		else
++			return BCM63XX_FLASH_TYPE_NAND;
+ 	default:
+ 		return -EINVAL;
+ 	}
+--- a/arch/mips/bcm63xx/dev-spi.c
++++ b/arch/mips/bcm63xx/dev-spi.c
+@@ -37,7 +37,7 @@ static __init void bcm63xx_spi_regs_init
+ 	if (BCMCPU_IS_6338() || BCMCPU_IS_6348())
+ 		bcm63xx_regs_spi = bcm6348_regs_spi;
+ 	if (BCMCPU_IS_3368() || BCMCPU_IS_6358() ||
+-		BCMCPU_IS_6362() || BCMCPU_IS_6368())
++		BCMCPU_IS_6362() || BCMCPU_IS_6368() || BCMCPU_IS_63268())
+ 		bcm63xx_regs_spi = bcm6358_regs_spi;
+ }
+ 
+@@ -85,7 +85,7 @@ int __init bcm63xx_spi_register(void)
+ 	}
+ 
+ 	if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
+-		BCMCPU_IS_6368()) {
++		BCMCPU_IS_6368() || BCMCPU_IS_63268()) {
+ 		spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
+ 		spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
+ 		spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT;
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -150,6 +150,20 @@ void __init arch_init_irq(void)
+ 		ext_irqs[5] = BCM_6368_EXT_IRQ5;
+ 		ext_shift = 4;
+ 		break;
++	case BCM63268_CPU_ID:
++		periph_bases[0] += PERF_IRQMASK_63268_REG(0);
++		periph_bases[1] += PERF_IRQMASK_63268_REG(1);
++		periph_irq_count = 2;
++		periph_width = 4;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_63268;
++		ext_irq_count = 4;
++		ext_irqs[0] = BCM_63268_EXT_IRQ0;
++		ext_irqs[1] = BCM_63268_EXT_IRQ1;
++		ext_irqs[2] = BCM_63268_EXT_IRQ2;
++		ext_irqs[3] = BCM_63268_EXT_IRQ3;
++		ext_shift = 4;
++		break;
+ 	default:
+ 		BUG();
+ 	}
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -125,6 +125,20 @@
+ #define BCM6368_RESET_PCIE	0
+ #define BCM6368_RESET_PCIE_EXT	0
+ 
++#define BCM63268_RESET_SPI	SOFTRESET_63268_SPI_MASK
++#define BCM63268_RESET_ENET	0
++#define BCM63268_RESET_USBH	SOFTRESET_63268_USBH_MASK
++#define BCM63268_RESET_USBD	SOFTRESET_63268_USBS_MASK
++#define BCM63268_RESET_DSL	0
++#define BCM63268_RESET_SAR	SOFTRESET_63268_SAR_MASK
++#define BCM63268_RESET_EPHY	0
++#define BCM63268_RESET_ENETSW	SOFTRESET_63268_ENETSW_MASK
++#define BCM63268_RESET_PCM	SOFTRESET_63268_PCM_MASK
++#define BCM63268_RESET_MPI	0
++#define BCM63268_RESET_PCIE	(SOFTRESET_63268_PCIE_MASK | \
++				 SOFTRESET_63268_PCIE_CORE_MASK)
++#define BCM63268_RESET_PCIE_EXT	SOFTRESET_63268_PCIE_EXT_MASK
++
+ /*
+  * core reset bits
+  */
+@@ -156,6 +170,10 @@ static const u32 bcm6368_reset_bits[] =
+ 	__GEN_RESET_BITS_TABLE(6368)
+ };
+ 
++static const u32 bcm63268_reset_bits[] = {
++	__GEN_RESET_BITS_TABLE(63268)
++};
++
+ const u32 *bcm63xx_reset_bits;
+ static int reset_reg;
+ 
+@@ -182,6 +200,9 @@ static int __init bcm63xx_reset_bits_ini
+ 	} else if (BCMCPU_IS_6368()) {
+ 		reset_reg = PERF_SOFTRESET_6368_REG;
+ 		bcm63xx_reset_bits = bcm6368_reset_bits;
++	} else if (BCMCPU_IS_63268()) {
++		reset_reg = PERF_SOFTRESET_63268_REG;
++		bcm63xx_reset_bits = bcm63268_reset_bits;
+ 	}
+ 
+ 	return 0;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -21,6 +21,10 @@
+ #define BCM6362_CPU_ID		0x6362
+ #define BCM6368_CPU_ID		0x6368
+ #define BCM6369_CPU_ID		0x6369
++#define BCM63168_CPU_ID		0x63168
++#define BCM63169_CPU_ID		0x63169
++#define BCM63268_CPU_ID		0x63268
++#define BCM63269_CPU_ID		0x63269
+ 
+ void __init bcm63xx_cpu_init(void);
+ u32 bcm63xx_get_cpu_variant(void);
+@@ -61,6 +65,10 @@ static inline u32 __pure __bcm63xx_get_c
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 		case BCM6368_CPU_ID:
+ #endif
++
++#ifdef CONFIG_BCM63XX_CPU_63268
++		case BCM63268_CPU_ID:
++#endif
+ 		break;
+ 	default:
+ 		unreachable();
+@@ -86,6 +94,7 @@ static inline u32 __pure bcm63xx_get_cpu
+ #define BCMCPU_IS_6358()	(bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
+ #define BCMCPU_IS_6362()	(bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
+ #define BCMCPU_IS_6368()	(bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
++#define BCMCPU_IS_63268()	(bcm63xx_get_cpu_id() == BCM63268_CPU_ID)
+ 
+ #define BCMCPU_VARIANT_IS_3368() \
+ 	(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
+@@ -109,6 +118,14 @@ static inline u32 __pure bcm63xx_get_cpu
+ 	(bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6369() \
+ 	(bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
++#define BCMCPU_VARIANT_IS_63168() \
++	(bcm63xx_get_cpu_variant() == BCM63168_CPU_ID)
++#define BCMCPU_VARIANT_IS_63169() \
++	(bcm63xx_get_cpu_variant() == BCM63169_CPU_ID)
++#define BCMCPU_VARIANT_IS_63268() \
++	(bcm63xx_get_cpu_variant() == BCM63268_CPU_ID)
++#define BCMCPU_VARIANT_IS_63269() \
++	(bcm63xx_get_cpu_variant() == BCM63269_CPU_ID)
+ 
+ /*
+  * While registers sets are (mostly) the same across 63xx CPU, base
+@@ -573,6 +590,52 @@ enum bcm63xx_regs_set {
+ #define BCM_6368_RNG_BASE		(0xb0004180)
+ #define BCM_6368_MISC_BASE		(0xdeadbeef)
+ 
++/*
++ * 63268 register sets base address
++ */
++#define BCM_63268_DSL_LMEM_BASE		(0xdeadbeef)
++#define BCM_63268_PERF_BASE		(0xb0000000)
++#define BCM_63268_TIMER_BASE		(0xb0000080)
++#define BCM_63268_WDT_BASE		(0xb000009c)
++#define BCM_63268_UART0_BASE		(0xb0000180)
++#define BCM_63268_UART1_BASE		(0xb00001a0)
++#define BCM_63268_GPIO_BASE		(0xb00000c0)
++#define BCM_63268_SPI_BASE		(0xb0000800)
++#define BCM_63268_HSSPI_BASE		(0xb0001000)
++#define BCM_63268_UDC0_BASE		(0xdeadbeef)
++#define BCM_63268_USBDMA_BASE		(0xb000c800)
++#define BCM_63268_OHCI0_BASE		(0xb0002600)
++#define BCM_63268_OHCI_PRIV_BASE	(0xdeadbeef)
++#define BCM_63268_USBH_PRIV_BASE	(0xb0002700)
++#define BCM_63268_USBD_BASE		(0xb0002400)
++#define BCM_63268_MPI_BASE		(0xdeadbeef)
++#define BCM_63268_PCMCIA_BASE		(0xdeadbeef)
++#define BCM_63268_PCIE_BASE		(0xb06e0000)
++#define BCM_63268_SDRAM_REGS_BASE	(0xdeadbeef)
++#define BCM_63268_DSL_BASE		(0xdeadbeef)
++#define BCM_63268_UBUS_BASE		(0xdeadbeef)
++#define BCM_63268_ENET0_BASE		(0xdeadbeef)
++#define BCM_63268_ENET1_BASE		(0xdeadbeef)
++#define BCM_63268_ENETDMA_BASE		(0xb000d800)
++#define BCM_63268_ENETDMAC_BASE		(0xb000da00)
++#define BCM_63268_ENETDMAS_BASE		(0xb000dc00)
++#define BCM_63268_ENETSW_BASE		(0xb0700000)
++#define BCM_63268_EHCI0_BASE		(0xb0002500)
++#define BCM_63268_SDRAM_BASE		(0xdeadbeef)
++#define BCM_63268_MEMC_BASE		(0xdeadbeef)
++#define BCM_63268_DDR_BASE		(0xb0003000)
++#define BCM_63268_M2M_BASE		(0xdeadbeef)
++#define BCM_63268_ATM_BASE		(0xdeadbeef)
++#define BCM_63268_XTM_BASE		(0xb0007000)
++#define BCM_63268_XTMDMA_BASE		(0xb000b800)
++#define BCM_63268_XTMDMAC_BASE		(0xdeadbeef)
++#define BCM_63268_XTMDMAS_BASE		(0xdeadbeef)
++#define BCM_63268_PCM_BASE		(0xb000b000)
++#define BCM_63268_PCMDMA_BASE		(0xb000b800)
++#define BCM_63268_PCMDMAC_BASE		(0xdeadbeef)
++#define BCM_63268_PCMDMAS_BASE		(0xdeadbeef)
++#define BCM_63268_RNG_BASE		(0xdeadbeef)
++#define BCM_63268_MISC_BASE		(0xb0001800)
+ 
+ extern const unsigned long *bcm63xx_regs_base;
+ 
+@@ -1041,6 +1104,73 @@ enum bcm63xx_irq {
+ #define BCM_6368_EXT_IRQ4		(IRQ_INTERNAL_BASE + 24)
+ #define BCM_6368_EXT_IRQ5		(IRQ_INTERNAL_BASE + 25)
+ 
++/*
++ * 63268 irqs
++ */
++#define BCM_63268_HIGH_IRQ_BASE		(IRQ_INTERNAL_BASE + 32)
++#define BCM_63268_VERY_HIGH_IRQ_BASE	(BCM_63268_HIGH_IRQ_BASE + 32)
++
++#define BCM_63268_TIMER_IRQ		(IRQ_INTERNAL_BASE + 0)
++#define BCM_63268_SPI_IRQ		(BCM_63268_VERY_HIGH_IRQ_BASE + 16)
++#define BCM_63268_UART0_IRQ		(IRQ_INTERNAL_BASE + 5)
++#define BCM_63268_UART1_IRQ		(BCM_63268_HIGH_IRQ_BASE + 2)
++#define BCM_63268_DSL_IRQ		(IRQ_INTERNAL_BASE + 23)
++#define BCM_63268_UDC0_IRQ		0
++#define BCM_63268_ENET0_IRQ		0
++#define BCM_63268_ENET1_IRQ		0
++#define BCM_63268_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 13)
++#define BCM_63268_HSSPI_IRQ		(IRQ_INTERNAL_BASE + 6)
++#define BCM_63268_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 9)
++#define BCM_63268_EHCI0_IRQ		(IRQ_INTERNAL_BASE + 10)
++#define BCM_63268_USBD_IRQ		(IRQ_INTERNAL_BASE + 11)
++#define BCM_63268_USBD_RXDMA0_IRQ	(IRQ_INTERNAL_BASE + 19)
++#define BCM_63268_USBD_TXDMA0_IRQ	(BCM_63268_HIGH_IRQ_BASE + 4)
++#define BCM_63268_USBD_RXDMA1_IRQ	(IRQ_INTERNAL_BASE + 20)
++#define BCM_63268_USBD_TXDMA1_IRQ	(BCM_63268_HIGH_IRQ_BASE + 5)
++#define BCM_63268_USBD_RXDMA2_IRQ	(IRQ_INTERNAL_BASE + 21)
++#define BCM_63268_USBD_TXDMA2_IRQ	(BCM_63268_HIGH_IRQ_BASE + 6)
++#define BCM_63268_PCMCIA_IRQ		0
++#define BCM_63268_ENET0_RXDMA_IRQ	0
++#define BCM_63268_ENET0_TXDMA_IRQ	0
++#define BCM_63268_ENET1_RXDMA_IRQ	0
++#define BCM_63268_ENET1_TXDMA_IRQ	0
++#define BCM_63268_PCI_IRQ		(BCM_63268_HIGH_IRQ_BASE + 8)
++#define BCM_63268_ATM_IRQ		0
++#define BCM_63268_ENETSW_RXDMA0_IRQ	(IRQ_INTERNAL_BASE + 1)
++#define BCM_63268_ENETSW_RXDMA1_IRQ	(IRQ_INTERNAL_BASE + 2)
++#define BCM_63268_ENETSW_RXDMA2_IRQ	(IRQ_INTERNAL_BASE + 3)
++#define BCM_63268_ENETSW_RXDMA3_IRQ	(IRQ_INTERNAL_BASE + 4)
++#define BCM_63268_ENETSW_TXDMA0_IRQ	(BCM_63268_VERY_HIGH_IRQ_BASE + 0)
++#define BCM_63268_ENETSW_TXDMA1_IRQ	(BCM_63268_VERY_HIGH_IRQ_BASE + 1)
++#define BCM_63268_ENETSW_TXDMA2_IRQ	(BCM_63268_VERY_HIGH_IRQ_BASE + 2)
++#define BCM_63268_ENETSW_TXDMA3_IRQ	(BCM_63268_VERY_HIGH_IRQ_BASE + 3)
++#define BCM_63268_XTM_IRQ		(BCM_63268_HIGH_IRQ_BASE + 17)
++#define BCM_63268_XTM_DMA0_IRQ		(IRQ_INTERNAL_BASE + 26)
++
++#define BCM_63268_RING_OSC_IRQ		(BCM_63268_HIGH_IRQ_BASE + 20)
++#define BCM_63268_WLAN_GPIO_IRQ		(BCM_63268_HIGH_IRQ_BASE + 3)
++#define BCM_63268_WLAN_IRQ		(IRQ_INTERNAL_BASE + 7)
++#define BCM_63268_IPSEC_IRQ		(IRQ_INTERNAL_BASE + 8)
++#define BCM_63268_NAND_IRQ		(BCM_63268_HIGH_IRQ_BASE + 18)
++#define BCM_63268_PCM_IRQ		(IRQ_INTERNAL_BASE + 13)
++#define BCM_63268_DG_IRQ		(IRQ_INTERNAL_BASE + 15)
++#define BCM_63268_EPHY_ENERGY0_IRQ	(IRQ_INTERNAL_BASE + 16)
++#define BCM_63268_EPHY_ENERGY1_IRQ	(IRQ_INTERNAL_BASE + 17)
++#define BCM_63268_EPHY_ENERGY2_IRQ	(IRQ_INTERNAL_BASE + 18)
++#define BCM_63268_EPHY_ENERGY3_IRQ	(IRQ_INTERNAL_BASE + 19)
++#define BCM_63268_IPSEC_DMA0_IRQ	(IRQ_INTERNAL_BASE + 22)
++#define BCM_63268_IPSEC_DMA1_IRQ	(BCM_63268_HIGH_IRQ_BASE + 7)
++#define BCM_63268_FAP0_IRQ		(IRQ_INTERNAL_BASE + 24)
++#define BCM_63268_FAP1_IRQ		(IRQ_INTERNAL_BASE + 25)
++#define BCM_63268_PCM_DMA0_IRQ		(BCM_63268_HIGH_IRQ_BASE + 10)
++#define BCM_63268_PCM_DMA1_IRQ		(BCM_63268_HIGH_IRQ_BASE + 11)
++#define BCM_63268_DECT0_IRQ		(BCM_63268_HIGH_IRQ_BASE + 0)
++#define BCM_63268_DECT1_IRQ		(BCM_63268_HIGH_IRQ_BASE + 1)
++#define BCM_63268_EXT_IRQ0		(BCM_63268_HIGH_IRQ_BASE + 12)
++#define BCM_63268_EXT_IRQ1		(BCM_63268_HIGH_IRQ_BASE + 13)
++#define BCM_63268_EXT_IRQ2		(BCM_63268_HIGH_IRQ_BASE + 14)
++#define BCM_63268_EXT_IRQ3		(BCM_63268_HIGH_IRQ_BASE + 15)
++
+ extern const int *bcm63xx_irqs;
+ 
+ #define __GEN_CPU_IRQ_TABLE(__cpu)					\
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+@@ -22,6 +22,8 @@ static inline unsigned long bcm63xx_gpio
+ 		return 48;
+ 	case BCM6368_CPU_ID:
+ 		return 38;
++	case BCM63268_CPU_ID:
++		return 52;
+ 	case BCM6348_CPU_ID:
+ 	default:
+ 		return 37;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -9,6 +9,8 @@
+ #define PERF_REV_REG			0x0
+ #define REV_CHIPID_SHIFT		16
+ #define REV_CHIPID_MASK			(0xffff << REV_CHIPID_SHIFT)
++#define REV_LONG_CHIPID_SHIFT		12
++#define REV_LONG_CHIPID_MASK		(0xfffff << REV_LONG_CHIPID_SHIFT)
+ #define REV_VARID_SHIFT			12
+ #define REV_VARID_MASK			(0xf << REV_VARID_SHIFT)
+ #define REV_REVID_SHIFT			0
+@@ -211,6 +213,52 @@
+ 					CKCTL_6368_NAND_EN |		\
+ 					CKCTL_6368_IPSEC_EN)
+ 
++#define CKCTL_63268_DISABLE_GLESS	(1 << 0)
++#define CKCTL_63268_VDSL_QPROC_EN	(1 << 1)
++#define CKCTL_63268_VDSL_AFE_EN		(1 << 2)
++#define CKCTL_63268_VDSL_EN		(1 << 3)
++#define CKCTL_63268_MIPS_EN		(1 << 4)
++#define CKCTL_63268_WLAN_OCP_EN		(1 << 5)
++#define CKCTL_63268_DECT_EN		(1 << 6)
++#define CKCTL_63268_FAP0_EN		(1 << 7)
++#define CKCTL_63268_FAP1_EN		(1 << 8)
++#define CKCTL_63268_SAR_EN		(1 << 9)
++#define CKCTL_63268_ROBOSW_EN		(1 << 10)
++#define CKCTL_63268_PCM_EN		(1 << 11)
++#define CKCTL_63268_USBD_EN		(1 << 12)
++#define CKCTL_63268_USBH_EN		(1 << 13)
++#define CKCTL_63268_IPSEC_EN		(1 << 14)
++#define CKCTL_63268_SPI_EN		(1 << 15)
++#define CKCTL_63268_HSSPI_EN		(1 << 16)
++#define CKCTL_63268_PCIE_EN		(1 << 17)
++#define CKCTL_63268_PHYMIPS_EN		(1 << 18)
++#define CKCTL_63268_GMAC_EN		(1 << 19)
++#define CKCTL_63268_NAND_EN		(1 << 20)
++#define CKCTL_63268_TBUS_EN		(1 << 27)
++#define CKCTL_63268_ROBOSW250_EN	(1 << 31)
++
++#define CKCTL_63268_ALL_SAFE_EN		(CKCTL_63268_VDSL_QPROC_EN |	\
++					CKCTL_63268_VDSL_AFE_EN |	\
++					CKCTL_63268_VDSL_EN |		\
++					CKCTL_63268_WLAN_OCP_EN |	\
++					CKCTL_63268_DECT_EN |		\
++					CKCTL_63268_FAP0_EN |		\
++					CKCTL_63268_FAP1_EN |		\
++					CKCTL_63268_SAR_EN |		\
++					CKCTL_63268_ROBOSW_EN |		\
++					CKCTL_63268_PCM_EN |		\
++					CKCTL_63268_USBD_EN |		\
++					CKCTL_63268_USBH_EN |		\
++					CKCTL_63268_IPSEC_EN |		\
++					CKCTL_63268_SPI_EN |		\
++					CKCTL_63268_HSSPI_EN |		\
++					CKCTL_63268_PCIE_EN |		\
++					CKCTL_63268_PHYMIPS_EN |	\
++					CKCTL_63268_GMAC_EN |		\
++					CKCTL_63268_NAND_EN |		\
++					CKCTL_63268_TBUS_EN |		\
++					CKCTL_63268_ROBOSW250_EN)
++
+ /* System PLL Control register	*/
+ #define PERF_SYS_PLL_CTL_REG		0x8
+ #define SYS_PLL_SOFT_RESET		0x1
+@@ -224,6 +272,7 @@
+ #define PERF_IRQMASK_6358_REG(x)	(0xc + (x) * 0x2c)
+ #define PERF_IRQMASK_6362_REG(x)	(0x20 + (x) * 0x10)
+ #define PERF_IRQMASK_6368_REG(x)	(0x20 + (x) * 0x10)
++#define PERF_IRQMASK_63268_REG(x)	(0x20 + (x) * 0x20)
+ 
+ /* Interrupt Status register */
+ #define PERF_IRQSTAT_3368_REG		0x10
+@@ -234,6 +283,7 @@
+ #define PERF_IRQSTAT_6358_REG(x)	(0x10 + (x) * 0x2c)
+ #define PERF_IRQSTAT_6362_REG(x)	(0x28 + (x) * 0x10)
+ #define PERF_IRQSTAT_6368_REG(x)	(0x28 + (x) * 0x10)
++#define PERF_IRQSTAT_63268_REG(x)	(0x30 + (x) * 0x20)
+ 
+ /* External Interrupt Configuration register */
+ #define PERF_EXTIRQ_CFG_REG_3368	0x14
+@@ -244,6 +294,7 @@
+ #define PERF_EXTIRQ_CFG_REG_6358	0x14
+ #define PERF_EXTIRQ_CFG_REG_6362	0x18
+ #define PERF_EXTIRQ_CFG_REG_6368	0x18
++#define PERF_EXTIRQ_CFG_REG_63268	0x18
+ 
+ #define PERF_EXTIRQ_CFG_REG2_6358	0x1c
+ #define PERF_EXTIRQ_CFG_REG2_6368	0x1c
+@@ -274,6 +325,7 @@
+ #define PERF_SOFTRESET_6358_REG		0x34
+ #define PERF_SOFTRESET_6362_REG		0x10
+ #define PERF_SOFTRESET_6368_REG		0x10
++#define PERF_SOFTRESET_63268_REG	0x10
+ 
+ #define SOFTRESET_3368_SPI_MASK		(1 << 0)
+ #define SOFTRESET_3368_ENET_MASK	(1 << 2)
+@@ -367,6 +419,26 @@
+ #define SOFTRESET_6368_USBH_MASK	(1 << 12)
+ #define SOFTRESET_6368_PCM_MASK		(1 << 13)
+ 
++#define SOFTRESET_63268_SPI_MASK	(1 << 0)
++#define SOFTRESET_63268_IPSEC_MASK	(1 << 1)
++#define SOFTRESET_63268_EPHY_MASK	(1 << 2)
++#define SOFTRESET_63268_SAR_MASK	(1 << 3)
++#define SOFTRESET_63268_ENETSW_MASK	(1 << 4)
++#define SOFTRESET_63268_USBS_MASK	(1 << 5)
++#define SOFTRESET_63268_USBH_MASK	(1 << 6)
++#define SOFTRESET_63268_PCM_MASK	(1 << 7)
++#define SOFTRESET_63268_PCIE_CORE_MASK	(1 << 8)
++#define SOFTRESET_63268_PCIE_MASK	(1 << 9)
++#define SOFTRESET_63268_PCIE_EXT_MASK	(1 << 10)
++#define SOFTRESET_63268_WLAN_SHIM_MASK	(1 << 11)
++#define SOFTRESET_63268_DDR_PHY_MASK	(1 << 12)
++#define SOFTRESET_63268_FAP0_MASK	(1 << 13)
++#define SOFTRESET_63268_WLAN_UBUS_MASK	(1 << 14)
++#define SOFTRESET_63268_DECT_MASK	(1 << 15)
++#define SOFTRESET_63268_FAP1_MASK	(1 << 16)
++#define SOFTRESET_63268_PCIE_HARD_MASK	(1 << 17)
++#define SOFTRESET_63268_GPHY_MASK	(1 << 18)
++
+ /* MIPS PLL control register */
+ #define PERF_MIPSPLLCTL_REG		0x34
+ #define MIPSPLLCTL_N1_SHIFT		20
+@@ -1366,6 +1438,13 @@
+ #define STRAPBUS_6362_BOOT_SEL_SERIAL	(1 << 15)
+ #define STRAPBUS_6362_BOOT_SEL_NAND	(0 << 15)
+ 
++#define MISC_STRAPBUS_63268_REG		0x14
++#define STRAPBUS_63268_HSSPI_CLK_FAST	(1 << 9)
++#define STRAPBUS_63268_BOOT_SEL_SERIAL	(1 << 11)
++#define STRAPBUS_63268_BOOT_SEL_NAND	(0 << 11)
++#define STRAPBUS_63268_FCVO_SHIFT	21
++#define STRAPBUS_63268_FCVO_MASK	(0xf << STRAPBUS_63268_FCVO_SHIFT)
++
+ #define MISC_STRAPBUS_6328_REG		0x240
+ #define STRAPBUS_6328_FCVO_SHIFT	7
+ #define STRAPBUS_6328_FCVO_MASK		(0x1f << STRAPBUS_6328_FCVO_SHIFT)
+--- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
++++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
+@@ -25,6 +25,7 @@ static inline int is_bcm63xx_internal_re
+ 	case BCM6328_CPU_ID:
+ 	case BCM6362_CPU_ID:
+ 	case BCM6368_CPU_ID:
++	case BCM63268_CPU_ID:
+ 		if (offset >= 0xb0000000 && offset < 0xb1000000)
+ 			return 1;
+ 		break;
+--- a/arch/mips/bcm63xx/dev-hsspi.c
++++ b/arch/mips/bcm63xx/dev-hsspi.c
+@@ -35,7 +35,7 @@ static struct platform_device bcm63xx_hs
+ 
+ int __init bcm63xx_hsspi_register(void)
+ {
+-	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362())
++	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
+ 		return -ENODEV;
+ 
+ 	spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
+--- a/arch/mips/bcm63xx/dev-enet.c
++++ b/arch/mips/bcm63xx/dev-enet.c
+@@ -176,7 +176,8 @@ static int __init register_shared(void)
+ 	else
+ 		shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
+ 
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
++	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
++		BCMCPU_IS_63268())
+ 		chan_count = 32;
+ 	else if (BCMCPU_IS_6345())
+ 		chan_count = 8;
+@@ -276,7 +277,8 @@ bcm63xx_enetsw_register(const struct bcm
+ {
+ 	int ret;
+ 
+-	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
++		!BCMCPU_IS_63268())
+ 		return -ENODEV;
+ 
+ 	ret = register_shared();
+@@ -297,6 +299,8 @@ bcm63xx_enetsw_register(const struct bcm
+ 		enetsw_pd.num_ports = ENETSW_PORTS_6328;
+ 	else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
+ 		enetsw_pd.num_ports = ENETSW_PORTS_6368;
++	else if (BCMCPU_IS_63268())
++		enetsw_pd.num_ports = ENETSW_PORTS_63268;
+ 
+ 	enetsw_pd.dma_has_sram = true;
+ 	enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
+@@ -62,6 +62,7 @@ struct bcm63xx_enet_platform_data {
+ #define ENETSW_MAX_PORT	8
+ #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
+ #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
++#define ENETSW_PORTS_63268 8 /* 3 FE PHY + 1 GE PHY + 4 RGMII */
+ 
+ #define ENETSW_RGMII_PORT0	4
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch b/target/linux/brcm63xx/patches-4.1/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch
new file mode 100644
index 0000000..4e8a090
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch
@@ -0,0 +1,55 @@
+From 5c290c81dbdb4433600593fe80c88eb4af86e791 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 03:22:40 +0100
+Subject: [PATCH 50/53] MIPS: BCM63XX: add pcie support for BCM63268
+
+---
+ arch/mips/bcm63xx/reset.c                       | 3 ++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 5 +++++
+ arch/mips/pci/pci-bcm63xx.c                     | 4 ++++
+ 3 files changed, 11 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -136,7 +136,8 @@
+ #define BCM63268_RESET_PCM	SOFTRESET_63268_PCM_MASK
+ #define BCM63268_RESET_MPI	0
+ #define BCM63268_RESET_PCIE	(SOFTRESET_63268_PCIE_MASK | \
+-				 SOFTRESET_63268_PCIE_CORE_MASK)
++				 SOFTRESET_63268_PCIE_CORE_MASK | \
++				 SOFTRESET_63268_PCIE_HARD_MASK)
+ #define BCM63268_RESET_PCIE_EXT	SOFTRESET_63268_PCIE_EXT_MASK
+ 
+ /*
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -45,6 +45,11 @@
+ #define BCM_PCIE_MEM_END_PA_6328	(BCM_PCIE_MEM_BASE_PA_6328 +	\
+ 					BCM_PCIE_MEM_SIZE_6328 - 1)
+ 
++#define BCM_PCIE_MEM_BASE_PA_63268	0x11000000
++#define BCM_PCIE_MEM_SIZE_63268		(15 * 1024 * 1024)
++#define BCM_PCIE_MEM_END_PA_63268	(BCM_PCIE_MEM_BASE_PA_63268 +	\
++					BCM_PCIE_MEM_SIZE_63268 - 1)
++
+ /*
+  * Internal registers are accessed through KSEG3
+  */
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -337,11 +337,15 @@ static int __init bcm63xx_pci_init(void)
+ 	if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
+ 		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
+ 		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
++	} else if (BCMCPU_IS_63268()) {
++		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_63268;
++		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_63268;
+ 	}
+ 
+ 	switch (bcm63xx_get_cpu_id()) {
+ 	case BCM6328_CPU_ID:
+ 	case BCM6362_CPU_ID:
++	case BCM63268_CPU_ID:
+ 		return bcm63xx_register_pcie();
+ 	case BCM3368_CPU_ID:
+ 	case BCM6348_CPU_ID:
diff --git a/target/linux/brcm63xx/patches-4.1/341-MIPS-BCM63XX-add-support-for-BCM6318.patch b/target/linux/brcm63xx/patches-4.1/341-MIPS-BCM63XX-add-support-for-BCM6318.patch
new file mode 100644
index 0000000..1bcaae2
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/341-MIPS-BCM63XX-add-support-for-BCM6318.patch
@@ -0,0 +1,675 @@
+From 60c29522a8c77d96145d965589c56befda7d4c3d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 01:24:09 +0100
+Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
+
+---
+ arch/mips/bcm63xx/Kconfig                         |   5 +
+ arch/mips/bcm63xx/boards/board_bcm963xx.c         |   2 +-
+ arch/mips/bcm63xx/clk.c                           |   8 +-
+ arch/mips/bcm63xx/cpu.c                           |  53 +++++++++++
+ arch/mips/bcm63xx/dev-flash.c                     |   3 +
+ arch/mips/bcm63xx/dev-spi.c                       |   2 +-
+ arch/mips/bcm63xx/irq.c                           |  10 ++
+ arch/mips/bcm63xx/prom.c                          |   2 +-
+ arch/mips/bcm63xx/reset.c                         |  24 +++++
+ arch/mips/bcm63xx/setup.c                         |   5 +-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h  | 107 ++++++++++++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |  75 ++++++++++++++-
+ arch/mips/include/asm/mach-bcm63xx/ioremap.h      |   1 +
+ 13 files changed, 291 insertions(+), 6 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -18,6 +18,11 @@ config BCM63XX_EHCI
+ 	select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
+ 	select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
+ 
++config BCM63XX_CPU_6318
++	bool "support 6318 CPU"
++	select SYS_HAS_CPU_BMIPS32_3300
++	select HW_HAS_PCI
++
+ config BCM63XX_CPU_6328
+ 	bool "support 6328 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -712,7 +712,7 @@ void __init board_prom_init(void)
+ 	/* read base address of boot chip select (0)
+ 	 * 6328/6362 do not have MPI but boot from a fixed address
+ 	 */
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
++	if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
+ 		val = 0x18000000;
+ 	} else {
+ 		val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -252,7 +252,9 @@ static void hsspi_set(struct clk *clk, i
+ {
+ 	u32 mask;
+ 
+-	if (BCMCPU_IS_6328())
++	if (BCMCPU_IS_6318())
++		mask = CKCTL_6318_HSSPI_EN;
++	else if (BCMCPU_IS_6328())
+ 		mask = CKCTL_6328_HSSPI_EN;
+ 	else if (BCMCPU_IS_6362())
+ 		mask = CKCTL_6362_HSSPI_EN;
+@@ -417,12 +419,16 @@ void clk_put(struct clk *clk)
+ 
+ EXPORT_SYMBOL(clk_put);
+ 
++#define HSSPI_PLL_HZ_6318	250000000
+ #define HSSPI_PLL_HZ_6328	133333333
+ #define HSSPI_PLL_HZ_6362	400000000
+ 
+ static int __init bcm63xx_clk_init(void)
+ {
+ 	switch (bcm63xx_get_cpu_id()) {
++	case BCM6318_CPU_ID:
++		clk_hsspi.rate = HSSPI_PLL_HZ_6318;
++		break;
+ 	case BCM6328_CPU_ID:
+ 		clk_hsspi.rate = HSSPI_PLL_HZ_6328;
+ 		break;
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -41,6 +41,14 @@ static const int bcm3368_irqs[] = {
+ 	__GEN_CPU_IRQ_TABLE(3368)
+ };
+ 
++static const unsigned long bcm6318_regs_base[] = {
++	__GEN_CPU_REGS_TABLE(6318)
++};
++
++static const int bcm6318_irqs[] = {
++	__GEN_CPU_IRQ_TABLE(6318)
++};
++
+ static const unsigned long bcm6328_regs_base[] = {
+ 	__GEN_CPU_REGS_TABLE(6328)
+ };
+@@ -134,6 +142,10 @@ unsigned int bcm63xx_get_memory_size(voi
+ 	return bcm63xx_memory_size;
+ }
+ 
++#define STRAP_OVERRIDE_BUS_REG		0x0
++#define OVERRIDE_BUS_MIPS_FREQ_SHIFT	23
++#define OVERRIDE_BUS_MIPS_FREQ_MASK	(0x3 << OVERRIDE_BUS_MIPS_FREQ_SHIFT)
++
+ static unsigned int detect_cpu_clock(void)
+ {
+ 	u32 cpu_id = bcm63xx_get_cpu_id();
+@@ -142,6 +154,28 @@ static unsigned int detect_cpu_clock(voi
+ 	case BCM3368_CPU_ID:
+ 		return 300000000;
+ 
++	case BCM6318_CPU_ID:
++	{
++		unsigned int tmp, mips_pll_fcvo;
++
++		tmp = bcm_readl(BCM_6318_STRAP_BASE + STRAP_OVERRIDE_BUS_REG);
++
++		pr_info("strap_override_bus = %08x\n", tmp);
++
++		mips_pll_fcvo = (tmp & OVERRIDE_BUS_MIPS_FREQ_MASK)
++				>> OVERRIDE_BUS_MIPS_FREQ_SHIFT;
++
++		switch (mips_pll_fcvo) {
++		case 0:
++			return 166000000;
++		case 1:
++			return 400000000;
++		case 2:
++			return 250000000;
++		case 3:
++			return 333000000;
++		};
++	}
+ 	case BCM6328_CPU_ID:
+ 	{
+ 		unsigned int tmp, mips_pll_fcvo;
+@@ -297,6 +331,13 @@ static unsigned int detect_memory_size(v
+ 	unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
+ 	u32 val;
+ 
++	if (BCMCPU_IS_6318()) {
++		val = bcm_sdram_readl(SDRAM_CFG_REG);
++		val = val & SDRAM_CFG_6318_SPACE_MASK;
++		val >>= SDRAM_CFG_6318_SPACE_SHIFT;
++		return 1 << (val + 20);
++	}
++
+ 	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
+ 		return bcm_ddr_readl(DDR_CSEND_REG) << 24;
+ 
+@@ -343,6 +384,12 @@ void __init bcm63xx_cpu_init(void)
+ 
+ 	switch (current_cpu_type()) {
+ 	case CPU_BMIPS3300:
++		if ((read_c0_prid() & 0xff) >= 0x33) {
++			/* BCM6318 */
++			chipid_reg = BCM_6368_PERF_BASE;
++			break;
++		}
++
+ 		if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT)
+ 			__cpu_name[cpu] = "Broadcom BCM6338";
+ 		/* fall-through */
+@@ -390,6 +437,10 @@ void __init bcm63xx_cpu_init(void)
+ 	bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ 
+ 	switch (bcm63xx_cpu_id) {
++	case BCM6318_CPU_ID:
++		bcm63xx_regs_base = bcm6318_regs_base;
++		bcm63xx_irqs = bcm6318_irqs;
++		break;
+ 	case BCM3368_CPU_ID:
+ 		bcm63xx_regs_base = bcm3368_regs_base;
+ 		bcm63xx_irqs = bcm3368_irqs;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -60,6 +60,9 @@ static int __init bcm63xx_detect_flash_t
+ 	u32 val;
+ 
+ 	switch (bcm63xx_get_cpu_id()) {
++	case BCM6318_CPU_ID:
++		/* only support serial flash */
++		return BCM63XX_FLASH_TYPE_SERIAL;
+ 	case BCM6328_CPU_ID:
+ 		val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
+ 		if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
+--- a/arch/mips/bcm63xx/dev-spi.c
++++ b/arch/mips/bcm63xx/dev-spi.c
+@@ -70,7 +70,7 @@ static struct platform_device bcm63xx_sp
+ 
+ int __init bcm63xx_spi_register(void)
+ {
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6345())
++	if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345())
+ 		return -ENODEV;
+ 
+ 	spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -49,6 +49,19 @@ void __init arch_init_irq(void)
+ 		ext_irqs[3] = BCM_3368_EXT_IRQ3;
+ 		ext_shift = 4;
+ 		break;
++	case BCM6318_CPU_ID:
++		periph_bases[0] += PERF_IRQMASK_6318_REG;
++		periph_irq_count = 1;
++		periph_width = 4;
++
++		ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6318;
++		ext_irq_count = 4;
++		ext_irqs[0] = BCM_6318_EXT_IRQ0;
++		ext_irqs[1] = BCM_6318_EXT_IRQ0;
++		ext_irqs[2] = BCM_6318_EXT_IRQ0;
++		ext_irqs[3] = BCM_6318_EXT_IRQ0;
++		ext_shift = 4;
++		break;
+ 	case BCM6328_CPU_ID:
+ 		periph_bases[0] += PERF_IRQMASK_6328_REG(0);
+ 		periph_bases[1] += PERF_IRQMASK_6328_REG(1);
+--- a/arch/mips/bcm63xx/prom.c
++++ b/arch/mips/bcm63xx/prom.c
+@@ -68,7 +68,7 @@ void __init prom_init(void)
+ 
+ 			if (reg & OTP_6328_REG3_TP1_DISABLED)
+ 				bmips_smp_enabled = 0;
+-		} else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
++		} else if (BCMCPU_IS_6318() || BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
+ 			bmips_smp_enabled = 0;
+ 		}
+ 
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -43,6 +43,23 @@
+ #define BCM3368_RESET_PCIE	0
+ #define BCM3368_RESET_PCIE_EXT	0
+ 
++
++#define BCM6318_RESET_SPI	SOFTRESET_6318_SPI_MASK
++#define BCM6318_RESET_ENET	0
++#define BCM6318_RESET_USBH	SOFTRESET_6318_USBH_MASK
++#define BCM6318_RESET_USBD	SOFTRESET_6318_USBS_MASK
++#define BCM6318_RESET_DSL	0
++#define BCM6318_RESET_SAR	SOFTRESET_6318_SAR_MASK
++#define BCM6318_RESET_EPHY	SOFTRESET_6318_EPHY_MASK
++#define BCM6318_RESET_ENETSW	SOFTRESET_6318_ENETSW_MASK
++#define BCM6318_RESET_PCM	0
++#define BCM6318_RESET_MPI	0
++#define BCM6318_RESET_PCIE	\
++				(SOFTRESET_6318_PCIE_MASK |		\
++				 SOFTRESET_6318_PCIE_CORE_MASK |	\
++				 SOFTRESET_6318_PCIE_HARD_MASK)
++#define BCM6318_RESET_PCIE_EXT	SOFTRESET_6318_PCIE_EXT_MASK
++
+ #define BCM6328_RESET_SPI	SOFTRESET_6328_SPI_MASK
+ #define BCM6328_RESET_ENET	0
+ #define BCM6328_RESET_USBH	SOFTRESET_6328_USBH_MASK
+@@ -147,6 +164,10 @@ static const u32 bcm3368_reset_bits[] =
+ 	__GEN_RESET_BITS_TABLE(3368)
+ };
+ 
++static const u32 bcm6318_reset_bits[] = {
++	__GEN_RESET_BITS_TABLE(6318)
++};
++
+ static const u32 bcm6328_reset_bits[] = {
+ 	__GEN_RESET_BITS_TABLE(6328)
+ };
+@@ -183,6 +204,9 @@ static int __init bcm63xx_reset_bits_ini
+ 	if (BCMCPU_IS_3368()) {
+ 		reset_reg = PERF_SOFTRESET_6358_REG;
+ 		bcm63xx_reset_bits = bcm3368_reset_bits;
++	} else if (BCMCPU_IS_6318()) {
++		reset_reg = PERF_SOFTRESET_6318_REG;
++		bcm63xx_reset_bits = bcm6318_reset_bits;
+ 	} else if (BCMCPU_IS_6328()) {
+ 		reset_reg = PERF_SOFTRESET_6328_REG;
+ 		bcm63xx_reset_bits = bcm6328_reset_bits;
+--- a/arch/mips/bcm63xx/setup.c
++++ b/arch/mips/bcm63xx/setup.c
+@@ -72,6 +72,9 @@ void bcm63xx_machine_reboot(void)
+ 	case BCM3368_CPU_ID:
+ 		perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368;
+ 		break;
++	case BCM6318_CPU_ID:
++		perf_regs[0] = PERF_EXTIRQ_CFG_REG_6318;
++		break;
+ 	case BCM6328_CPU_ID:
+ 		perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328;
+ 		break;
+@@ -111,7 +114,7 @@ void bcm63xx_machine_reboot(void)
+ 		bcm6348_a1_reboot();
+ 
+ 	printk(KERN_INFO "triggering watchdog soft-reset...\n");
+-	if (BCMCPU_IS_6328()) {
++	if (BCMCPU_IS_6318() || BCMCPU_IS_6328()) {
+ 		bcm_wdt_writel(1, WDT_SOFTRESET_REG);
+ 	} else {
+ 		reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -10,6 +10,7 @@
+  * arm mach-types)
+  */
+ #define BCM3368_CPU_ID		0x3368
++#define BCM6318_CPU_ID		0x6318
+ #define BCM6328_CPU_ID		0x6328
+ #define BCM63281_CPU_ID		0x63281
+ #define BCM63283_CPU_ID		0x63283
+@@ -38,6 +39,10 @@ static inline u32 __pure __bcm63xx_get_c
+ 		case BCM3368_CPU_ID:
+ #endif
+ 
++#ifdef CONFIG_BCM63XX_CPU_6318
++		case BCM6318_CPU_ID:
++#endif
++
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 		case BCM6328_CPU_ID:
+ #endif
+@@ -87,6 +92,7 @@ static inline u32 __pure bcm63xx_get_cpu
+ }
+ 
+ #define BCMCPU_IS_3368()	(bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
++#define BCMCPU_IS_6318()	(bcm63xx_get_cpu_id() == BCM6318_CPU_ID)
+ #define BCMCPU_IS_6328()	(bcm63xx_get_cpu_id() == BCM6328_CPU_ID)
+ #define BCMCPU_IS_6338()	(bcm63xx_get_cpu_id() == BCM6338_CPU_ID)
+ #define BCMCPU_IS_6345()	(bcm63xx_get_cpu_id() == BCM6345_CPU_ID)
+@@ -98,6 +104,8 @@ static inline u32 __pure bcm63xx_get_cpu
+ 
+ #define BCMCPU_VARIANT_IS_3368() \
+ 	(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6318() \
++	(bcm63xx_get_cpu_variant() == BCM6318_CPU_ID)
+ #define BCMCPU_VARIANT_IS_63281() \
+ 	(bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
+ #define BCMCPU_VARIANT_IS_63283() \
+@@ -252,6 +260,56 @@ enum bcm63xx_regs_set {
+ #define BCM_3368_MISC_BASE		(0xdeadbeef)
+ 
+ /*
++ * 6318 register sets base address
++ */
++#define BCM_6318_DSL_LMEM_BASE		(0xdeadbeef)
++#define BCM_6318_PERF_BASE		(0xb0000000)
++#define BCM_6318_TIMER_BASE		(0xb0000040)
++#define BCM_6318_WDT_BASE		(0xb0000068)
++#define BCM_6318_UART0_BASE		(0xb0000100)
++#define BCM_6318_UART1_BASE		(0xdeadbeef)
++#define BCM_6318_GPIO_BASE		(0xb0000080)
++#define BCM_6318_SPI_BASE		(0xdeadbeef)
++#define BCM_6318_HSSPI_BASE		(0xb0003000)
++#define BCM_6318_UDC0_BASE		(0xdeadbeef)
++#define BCM_6318_USBDMA_BASE		(0xb0006800)
++#define BCM_6318_OHCI0_BASE		(0xb0005100)
++#define BCM_6318_OHCI_PRIV_BASE		(0xdeadbeef)
++#define BCM_6318_USBH_PRIV_BASE		(0xb0005200)
++#define BCM_6318_USBD_BASE		(0xb0006000)
++#define BCM_6318_MPI_BASE		(0xdeadbeef)
++#define BCM_6318_PCMCIA_BASE		(0xdeadbeef)
++#define BCM_6318_PCIE_BASE		(0xb0010000)
++#define BCM_6318_SDRAM_REGS_BASE	(0xdeadbeef)
++#define BCM_6318_DSL_BASE		(0xdeadbeef)
++#define BCM_6318_UBUS_BASE		(0xdeadbeef)
++#define BCM_6318_ENET0_BASE		(0xdeadbeef)
++#define BCM_6318_ENET1_BASE		(0xdeadbeef)
++#define BCM_6318_ENETDMA_BASE		(0xb0088000)
++#define BCM_6318_ENETDMAC_BASE		(0xb0088200)
++#define BCM_6318_ENETDMAS_BASE		(0xb0088400)
++#define BCM_6318_ENETSW_BASE		(0xb0080000)
++#define BCM_6318_EHCI0_BASE		(0xb0005000)
++#define BCM_6318_SDRAM_BASE		(0xb0004000)
++#define BCM_6318_MEMC_BASE		(0xdeadbeef)
++#define BCM_6318_DDR_BASE		(0xdeadbeef)
++#define BCM_6318_M2M_BASE		(0xdeadbeef)
++#define BCM_6318_ATM_BASE		(0xdeadbeef)
++#define BCM_6318_XTM_BASE		(0xdeadbeef)
++#define BCM_6318_XTMDMA_BASE		(0xb000c000)
++#define BCM_6318_XTMDMAC_BASE		(0xdeadbeef)
++#define BCM_6318_XTMDMAS_BASE		(0xdeadbeef)
++#define BCM_6318_PCM_BASE		(0xdeadbeef)
++#define BCM_6318_PCMDMA_BASE		(0xdeadbeef)
++#define BCM_6318_PCMDMAC_BASE		(0xdeadbeef)
++#define BCM_6318_PCMDMAS_BASE		(0xdeadbeef)
++#define BCM_6318_RNG_BASE		(0xdeadbeef)
++#define BCM_6318_MISC_BASE		(0xb0000280)
++#define BCM_6318_OTP_BASE		(0xdeadbeef)
++
++#define BCM_6318_STRAP_BASE		(0xb0000900)
++
++/*
+  * 6328 register sets base address
+  */
+ #define BCM_6328_DSL_LMEM_BASE		(0xdeadbeef)
+@@ -774,6 +832,55 @@ enum bcm63xx_irq {
+ #define BCM_3368_EXT_IRQ2		(IRQ_INTERNAL_BASE + 27)
+ #define BCM_3368_EXT_IRQ3		(IRQ_INTERNAL_BASE + 28)
+ 
++/*
++ * 6318 irqs
++ */
++#define BCM_6318_HIGH_IRQ_BASE		(IRQ_INTERNAL_BASE + 32)
++#define BCM_6318_VERY_HIGH_IRQ_BASE	(BCM_6318_HIGH_IRQ_BASE + 32)
++
++#define BCM_6318_TIMER_IRQ		(IRQ_INTERNAL_BASE + 31)
++#define BCM_6318_SPI_IRQ		0
++#define BCM_6318_UART0_IRQ		(IRQ_INTERNAL_BASE + 28)
++#define BCM_6318_UART1_IRQ		0
++#define BCM_6318_DSL_IRQ		(IRQ_INTERNAL_BASE + 21)
++#define BCM_6318_UDC0_IRQ		0
++#define BCM_6318_ENET0_IRQ		0
++#define BCM_6318_ENET1_IRQ		0
++#define BCM_6318_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 12)
++#define BCM_6318_HSSPI_IRQ		(IRQ_INTERNAL_BASE + 29)
++#define BCM_6318_OHCI0_IRQ		(BCM_6318_HIGH_IRQ_BASE + 9)
++#define BCM_6318_EHCI0_IRQ		(BCM_6318_HIGH_IRQ_BASE + 10)
++#define BCM_6318_USBD_IRQ		(IRQ_INTERNAL_BASE + 4)
++#define BCM_6318_USBD_RXDMA0_IRQ	(IRQ_INTERNAL_BASE + 5)
++#define BCM_6318_USBD_TXDMA0_IRQ	(IRQ_INTERNAL_BASE + 6)
++#define BCM_6318_USBD_RXDMA1_IRQ	(IRQ_INTERNAL_BASE + 7)
++#define BCM_6318_USBD_TXDMA1_IRQ	(IRQ_INTERNAL_BASE + 8)
++#define BCM_6318_USBD_RXDMA2_IRQ	(IRQ_INTERNAL_BASE + 9)
++#define BCM_6318_USBD_TXDMA2_IRQ	(IRQ_INTERNAL_BASE + 10)
++#define BCM_6318_PCMCIA_IRQ		0
++#define BCM_6318_ENET0_RXDMA_IRQ	0
++#define BCM_6318_ENET0_TXDMA_IRQ	0
++#define BCM_6318_ENET1_RXDMA_IRQ	0
++#define BCM_6318_ENET1_TXDMA_IRQ	0
++#define BCM_6318_PCI_IRQ		(IRQ_INTERNAL_BASE + 23)
++#define BCM_6318_ATM_IRQ		0
++#define BCM_6318_ENETSW_RXDMA0_IRQ	(BCM_6318_HIGH_IRQ_BASE + 0)
++#define BCM_6318_ENETSW_RXDMA1_IRQ	(BCM_6318_HIGH_IRQ_BASE + 1)
++#define BCM_6318_ENETSW_RXDMA2_IRQ	(BCM_6318_HIGH_IRQ_BASE + 2)
++#define BCM_6318_ENETSW_RXDMA3_IRQ	(BCM_6318_HIGH_IRQ_BASE + 3)
++#define BCM_6318_ENETSW_TXDMA0_IRQ	(BCM_6318_VERY_HIGH_IRQ_BASE + 10)
++#define BCM_6318_ENETSW_TXDMA1_IRQ	(BCM_6318_VERY_HIGH_IRQ_BASE + 11)
++#define BCM_6318_ENETSW_TXDMA2_IRQ	(BCM_6318_VERY_HIGH_IRQ_BASE + 12)
++#define BCM_6318_ENETSW_TXDMA3_IRQ	(BCM_6318_VERY_HIGH_IRQ_BASE + 13)
++#define BCM_6318_XTM_IRQ		(BCM_6318_HIGH_IRQ_BASE + 31)
++#define BCM_6318_XTM_DMA0_IRQ		(BCM_6318_HIGH_IRQ_BASE + 11)
++
++#define BCM_6318_PCM_DMA0_IRQ		(IRQ_INTERNAL_BASE + 2)
++#define BCM_6318_PCM_DMA1_IRQ		(IRQ_INTERNAL_BASE + 3)
++#define BCM_6318_EXT_IRQ0		(IRQ_INTERNAL_BASE + 24)
++#define BCM_6318_EXT_IRQ1		(IRQ_INTERNAL_BASE + 25)
++#define BCM_6318_EXT_IRQ2		(IRQ_INTERNAL_BASE + 26)
++#define BCM_6318_EXT_IRQ3		(IRQ_INTERNAL_BASE + 27)
+ 
+ /*
+  * 6328 irqs
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -52,6 +52,39 @@
+ 					 CKCTL_3368_EMUSB_EN | \
+ 					 CKCTL_3368_USBU_EN)
+ 
++#define CKCTL_6318_ADSL_ASB_EN		(1 << 0)
++#define CKCTL_6318_USB_ASB_EN		(1 << 1)
++#define CKCTL_6318_MIPS_ASB_EN		(1 << 2)
++#define CKCTL_6318_PCIE_ASB_EN		(1 << 3)
++#define CKCTL_6318_PHYMIPS_ASB_EN	(1 << 4)
++#define CKCTL_6318_ROBOSW_ASB_EN	(1 << 5)
++#define CKCTL_6318_SAR_ASB_EN		(1 << 6)
++#define CKCTL_6318_SDR_ASB_EN		(1 << 7)
++#define CKCTL_6318_SWREG_ASB_EN		(1 << 8)
++#define CKCTL_6318_PERIPH_ASB_EN	(1 << 9)
++#define CKCTL_6318_CPUBUS160_EN		(1 << 10)
++#define CKCTL_6318_ADSL_EN		(1 << 11)
++#define CKCTL_6318_SAR125_EN		(1 << 12)
++#define CKCTL_6318_MIPS_EN		(1 << 13)
++#define CKCTL_6318_PCIE_EN		(1 << 14)
++#define CKCTL_6318_ROBOSW250_EN		(1 << 16)
++#define CKCTL_6318_ROBOSW025_EN		(1 << 17)
++#define CKCTL_6318_SDR_EN		(1 << 19)
++#define CKCTL_6318_USB_EN		(1 << 20) /* both device and host */
++#define CKCTL_6318_HSSPI_EN		(1 << 25)
++#define CKCTL_6318_PCIE25_EN		(1 << 27)
++#define CKCTL_6318_PHYMIPS_EN		(1 << 28)
++#define CKCTL_6318_ADSL_AFE_EN		(1 << 29)
++#define CKCTL_6318_ADSL_QPROC_EN	(1 << 30)
++
++#define CKCTL_6318_ALL_SAFE_EN		(CKCTL_6318_PHYMIPS_EN |	\
++					CKCTL_6318_ADSL_QPROC_EN |	\
++					CKCTL_6318_ADSL_AFE_EN |	\
++					CKCTL_6318_ADSL_EN |		\
++					CKCTL_6318_SAR_EN  |		\
++					CKCTL_6318_USB_EN |		\
++					CKCTL_6318_PCIE_EN)
++
+ #define CKCTL_6328_PHYMIPS_EN		(1 << 0)
+ #define CKCTL_6328_ADSL_QPROC_EN	(1 << 1)
+ #define CKCTL_6328_ADSL_AFE_EN		(1 << 2)
+@@ -259,12 +292,27 @@
+ 					CKCTL_63268_TBUS_EN |		\
+ 					CKCTL_63268_ROBOSW250_EN)
+ 
++/* UBUS Clock Control register */
++#define PERF_UB_CKCTL_REG		0x10
++
++#define UB_CKCTL_6318_ADSL_EN		(1 << 0)
++#define UB_CKCTL_6318_ARB_EN		(1 << 1)
++#define UB_CKCTL_6318_MIPS_EN		(1 << 2)
++#define UB_CKCTL_6318_PCIE_EN		(1 << 3)
++#define UB_CKCTL_6318_PERIPH_EN		(1 << 4)
++#define UB_CKCTL_6318_PHYMIPS_EN	(1 << 5)
++#define UB_CKCTL_6318_ROBOSW_EN		(1 << 6)
++#define UB_CKCTL_6318_SAR_EN		(1 << 7)
++#define UB_CKCTL_6318_SDR_EN		(1 << 8)
++#define UB_CKCTL_6318_USB_EN		(1 << 9)
++
+ /* System PLL Control register	*/
+ #define PERF_SYS_PLL_CTL_REG		0x8
+ #define SYS_PLL_SOFT_RESET		0x1
+ 
+ /* Interrupt Mask register */
+ #define PERF_IRQMASK_3368_REG		0xc
++#define PERF_IRQMASK_6318_REG		0x20
+ #define PERF_IRQMASK_6328_REG(x)	(0x20 + (x) * 0x10)
+ #define PERF_IRQMASK_6338_REG		0xc
+ #define PERF_IRQMASK_6345_REG		0xc
+@@ -276,6 +324,7 @@
+ 
+ /* Interrupt Status register */
+ #define PERF_IRQSTAT_3368_REG		0x10
++#define PERF_IRQSTAT_6318_REG		0x30
+ #define PERF_IRQSTAT_6328_REG(x)	(0x28 + (x) * 0x10)
+ #define PERF_IRQSTAT_6338_REG		0x10
+ #define PERF_IRQSTAT_6345_REG		0x10
+@@ -287,6 +336,7 @@
+ 
+ /* External Interrupt Configuration register */
+ #define PERF_EXTIRQ_CFG_REG_3368	0x14
++#define PERF_EXTIRQ_CFG_REG_6318	0x18
+ #define PERF_EXTIRQ_CFG_REG_6328	0x18
+ #define PERF_EXTIRQ_CFG_REG_6338	0x14
+ #define PERF_EXTIRQ_CFG_REG_6345	0x14
+@@ -321,6 +371,7 @@
+ 
+ /* Soft Reset register */
+ #define PERF_SOFTRESET_REG		0x28
++#define PERF_SOFTRESET_6318_REG		0x10
+ #define PERF_SOFTRESET_6328_REG		0x10
+ #define PERF_SOFTRESET_6358_REG		0x34
+ #define PERF_SOFTRESET_6362_REG		0x10
+@@ -334,6 +385,18 @@
+ #define SOFTRESET_3368_USBS_MASK	(1 << 11)
+ #define SOFTRESET_3368_PCM_MASK		(1 << 13)
+ 
++#define SOFTRESET_6318_SPI_MASK		(1 << 0)
++#define SOFTRESET_6318_EPHY_MASK	(1 << 1)
++#define SOFTRESET_6318_SAR_MASK		(1 << 2)
++#define SOFTRESET_6318_ENETSW_MASK	(1 << 3)
++#define SOFTRESET_6318_USBS_MASK	(1 << 4)
++#define SOFTRESET_6318_USBH_MASK	(1 << 5)
++#define SOFTRESET_6318_PCIE_CORE_MASK	(1 << 6)
++#define SOFTRESET_6318_PCIE_MASK	(1 << 7)
++#define SOFTRESET_6318_PCIE_EXT_MASK	(1 << 8)
++#define SOFTRESET_6318_PCIE_HARD_MASK	(1 << 9)
++#define SOFTRESET_6318_ADSL_MASK	(1 << 10)
++
+ #define SOFTRESET_6328_SPI_MASK		(1 << 0)
+ #define SOFTRESET_6328_EPHY_MASK	(1 << 1)
+ #define SOFTRESET_6328_SAR_MASK		(1 << 2)
+@@ -505,8 +568,17 @@
+ #define TIMER_IRQSTAT_TIMER1_IR_EN	(1 << 9)
+ #define TIMER_IRQSTAT_TIMER2_IR_EN	(1 << 10)
+ 
++#define TIMER_IRQMASK_6318_REG		0x0
++#define TIMER_IRQSTAT_6318_REG		0x4
++#define IRQSTATMASK_TIMER0		(1 << 0)
++#define IRQSTATMASK_TIMER1		(1 << 1)
++#define IRQSTATMASK_TIMER2		(1 << 2)
++#define IRQSTATMASK_TIMER3		(1 << 3)
++#define IRQSTATMASK_WDT			(1 << 4)
++
+ /* Timer control register */
+ #define TIMER_CTLx_REG(x)		(0x4 + (x * 4))
++#define TIMER_CTRx_6318_REG(x)		(0x8 + (x * 4))
+ #define TIMER_CTL0_REG			0x4
+ #define TIMER_CTL1_REG			0x8
+ #define TIMER_CTL2_REG			0xC
+@@ -1253,6 +1325,8 @@
+ #define SDRAM_CFG_32B_MASK		(1 << SDRAM_CFG_32B_SHIFT)
+ #define SDRAM_CFG_BANK_SHIFT		13
+ #define SDRAM_CFG_BANK_MASK		(1 << SDRAM_CFG_BANK_SHIFT)
++#define SDRAM_CFG_6318_SPACE_SHIFT	4
++#define SDRAM_CFG_6318_SPACE_MASK	(0xf << SDRAM_CFG_6318_SPACE_SHIFT)
+ 
+ #define SDRAM_MBASE_REG			0xc
+ 
+--- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
++++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
+@@ -22,6 +22,7 @@ static inline int is_bcm63xx_internal_re
+ 		if (offset >= 0xfff00000)
+ 			return 1;
+ 		break;
++	case BCM6318_CPU_ID:
+ 	case BCM6328_CPU_ID:
+ 	case BCM6362_CPU_ID:
+ 	case BCM6368_CPU_ID:
+--- a/arch/mips/bcm63xx/dev-hsspi.c
++++ b/arch/mips/bcm63xx/dev-hsspi.c
+@@ -35,7 +35,8 @@ static struct platform_device bcm63xx_hs
+ 
+ int __init bcm63xx_hsspi_register(void)
+ {
+-	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
++	if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
++		!BCMCPU_IS_63268())
+ 		return -ENODEV;
+ 
+ 	spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
+--- a/arch/mips/bcm63xx/dev-usb-usbd.c
++++ b/arch/mips/bcm63xx/dev-usb-usbd.c
+@@ -41,7 +41,7 @@ int __init bcm63xx_usbd_register(const s
+ 		IRQ_USBD_RXDMA2, IRQ_USBD_TXDMA2 };
+ 	int i;
+ 
+-	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
++	if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6368())
+ 		return 0;
+ 
+ 	usbd_resources[0].start = bcm63xx_regset_address(RSET_USBD);
+--- a/arch/mips/bcm63xx/dev-enet.c
++++ b/arch/mips/bcm63xx/dev-enet.c
+@@ -176,8 +176,8 @@ static int __init register_shared(void)
+ 	else
+ 		shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
+ 
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
+-		BCMCPU_IS_63268())
++	if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
++		BCMCPU_IS_6368() || BCMCPU_IS_63268())
+ 		chan_count = 32;
+ 	else if (BCMCPU_IS_6345())
+ 		chan_count = 8;
+@@ -277,8 +277,8 @@ bcm63xx_enetsw_register(const struct bcm
+ {
+ 	int ret;
+ 
+-	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
+-		!BCMCPU_IS_63268())
++	if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
++		!BCMCPU_IS_6368() && !BCMCPU_IS_63268())
+ 		return -ENODEV;
+ 
+ 	ret = register_shared();
+@@ -295,7 +295,7 @@ bcm63xx_enetsw_register(const struct bcm
+ 
+ 	memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd));
+ 
+-	if (BCMCPU_IS_6328())
++	if (BCMCPU_IS_6318() || BCMCPU_IS_6328())
+ 		enetsw_pd.num_ports = ENETSW_PORTS_6328;
+ 	else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
+ 		enetsw_pd.num_ports = ENETSW_PORTS_6368;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+@@ -9,6 +9,8 @@ int __init bcm63xx_gpio_init(void);
+ static inline unsigned long bcm63xx_gpio_count(void)
+ {
+ 	switch (bcm63xx_get_cpu_id()) {
++	case BCM6318_CPU_ID:
++		return 50;
+ 	case BCM6328_CPU_ID:
+ 		return 32;
+ 	case BCM3368_CPU_ID:
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -81,7 +81,8 @@ static struct platform_device bcm63xx_eh
+ 
+ int __init bcm63xx_ehci_register(void)
+ {
+-	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++	if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
++		!BCMCPU_IS_6362() && !BCMCPU_IS_6368())
+ 		return 0;
+ 
+ 	ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
diff --git a/target/linux/brcm63xx/patches-4.1/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch b/target/linux/brcm63xx/patches-4.1/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch
new file mode 100644
index 0000000..71044f8
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch
@@ -0,0 +1,156 @@
+From 4bdfacdeaf3c988c4f3256c88118893eac640b03 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 14:17:50 +0100
+Subject: [PATCH 52/53] MIPS: BCM63XX: split PCIE reset signals
+
+---
+ arch/mips/bcm63xx/reset.c                          | 39 ++++++++++++++--------
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h |  2 ++
+ arch/mips/pci/pci-bcm63xx.c                        |  7 ++++
+ 3 files changed, 34 insertions(+), 14 deletions(-)
+
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -28,7 +28,9 @@
+ 	[BCM63XX_RESET_PCM]		= BCM## __cpu ##_RESET_PCM,	\
+ 	[BCM63XX_RESET_MPI]		= BCM## __cpu ##_RESET_MPI,	\
+ 	[BCM63XX_RESET_PCIE]		= BCM## __cpu ##_RESET_PCIE,	\
+-	[BCM63XX_RESET_PCIE_EXT]	= BCM## __cpu ##_RESET_PCIE_EXT,
++	[BCM63XX_RESET_PCIE_EXT]	= BCM## __cpu ##_RESET_PCIE_EXT, \
++	[BCM63XX_RESET_PCIE_CORE]	= BCM## __cpu ##_RESET_PCIE_CORE, \
++	[BCM63XX_RESET_PCIE_HARD]	= BCM## __cpu ##_RESET_PCIE_HARD,
+ 
+ #define BCM3368_RESET_SPI	SOFTRESET_3368_SPI_MASK
+ #define BCM3368_RESET_ENET	SOFTRESET_3368_ENET_MASK
+@@ -42,6 +44,8 @@
+ #define BCM3368_RESET_MPI	SOFTRESET_3368_MPI_MASK
+ #define BCM3368_RESET_PCIE	0
+ #define BCM3368_RESET_PCIE_EXT	0
++#define BCM3368_RESET_PCIE_CORE	0
++#define BCM3368_RESET_PCIE_HARD	0
+ 
+ 
+ #define BCM6318_RESET_SPI	SOFTRESET_6318_SPI_MASK
+@@ -54,11 +58,10 @@
+ #define BCM6318_RESET_ENETSW	SOFTRESET_6318_ENETSW_MASK
+ #define BCM6318_RESET_PCM	0
+ #define BCM6318_RESET_MPI	0
+-#define BCM6318_RESET_PCIE	\
+-				(SOFTRESET_6318_PCIE_MASK |		\
+-				 SOFTRESET_6318_PCIE_CORE_MASK |	\
+-				 SOFTRESET_6318_PCIE_HARD_MASK)
++#define BCM6318_RESET_PCIE	SOFTRESET_6318_PCIE_MASK
+ #define BCM6318_RESET_PCIE_EXT	SOFTRESET_6318_PCIE_EXT_MASK
++#define BCM6318_RESET_PCIE_CORE	SOFTRESET_6318_PCIE_CORE_MASK
++#define BCM6318_RESET_PCIE_HARD	SOFTRESET_6318_PCIE_HARD_MASK
+ 
+ #define BCM6328_RESET_SPI	SOFTRESET_6328_SPI_MASK
+ #define BCM6328_RESET_ENET	0
+@@ -70,11 +73,10 @@
+ #define BCM6328_RESET_ENETSW	SOFTRESET_6328_ENETSW_MASK
+ #define BCM6328_RESET_PCM	SOFTRESET_6328_PCM_MASK
+ #define BCM6328_RESET_MPI	0
+-#define BCM6328_RESET_PCIE	\
+-				(SOFTRESET_6328_PCIE_MASK |		\
+-				 SOFTRESET_6328_PCIE_CORE_MASK |	\
+-				 SOFTRESET_6328_PCIE_HARD_MASK)
++#define BCM6328_RESET_PCIE	SOFTRESET_6328_PCIE_MASK
+ #define BCM6328_RESET_PCIE_EXT	SOFTRESET_6328_PCIE_EXT_MASK
++#define BCM6328_RESET_PCIE_CORE	SOFTRESET_6328_PCIE_CORE_MASK
++#define BCM6328_RESET_PCIE_HARD	SOFTRESET_6328_PCIE_HARD_MASK
+ 
+ #define BCM6338_RESET_SPI	SOFTRESET_6338_SPI_MASK
+ #define BCM6338_RESET_ENET	SOFTRESET_6338_ENET_MASK
+@@ -88,6 +90,8 @@
+ #define BCM6338_RESET_MPI	0
+ #define BCM6338_RESET_PCIE	0
+ #define BCM6338_RESET_PCIE_EXT	0
++#define BCM6338_RESET_PCIE_CORE	0
++#define BCM6338_RESET_PCIE_HARD	0
+ 
+ #define BCM6348_RESET_SPI	SOFTRESET_6348_SPI_MASK
+ #define BCM6348_RESET_ENET	SOFTRESET_6348_ENET_MASK
+@@ -101,6 +105,8 @@
+ #define BCM6348_RESET_MPI	0
+ #define BCM6348_RESET_PCIE	0
+ #define BCM6348_RESET_PCIE_EXT	0
++#define BCM6348_RESET_PCIE_CORE	0
++#define BCM6348_RESET_PCIE_HARD	0
+ 
+ #define BCM6358_RESET_SPI	SOFTRESET_6358_SPI_MASK
+ #define BCM6358_RESET_ENET	SOFTRESET_6358_ENET_MASK
+@@ -114,6 +120,8 @@
+ #define BCM6358_RESET_MPI	SOFTRESET_6358_MPI_MASK
+ #define BCM6358_RESET_PCIE	0
+ #define BCM6358_RESET_PCIE_EXT	0
++#define BCM6358_RESET_PCIE_CORE	0
++#define BCM6358_RESET_PCIE_HARD	0
+ 
+ #define BCM6362_RESET_SPI	SOFTRESET_6362_SPI_MASK
+ #define BCM6362_RESET_ENET	0
+@@ -125,9 +133,10 @@
+ #define BCM6362_RESET_ENETSW	SOFTRESET_6362_ENETSW_MASK
+ #define BCM6362_RESET_PCM	SOFTRESET_6362_PCM_MASK
+ #define BCM6362_RESET_MPI	0
+-#define BCM6362_RESET_PCIE      (SOFTRESET_6362_PCIE_MASK | \
+-				 SOFTRESET_6362_PCIE_CORE_MASK)
++#define BCM6362_RESET_PCIE      SOFTRESET_6362_PCIE_MASK
+ #define BCM6362_RESET_PCIE_EXT	SOFTRESET_6362_PCIE_EXT_MASK
++#define BCM6362_RESET_PCIE_CORE	SOFTRESET_6362_PCIE_CORE_MASK
++#define BCM6362_RESET_PCIE_HARD	0
+ 
+ #define BCM6368_RESET_SPI	SOFTRESET_6368_SPI_MASK
+ #define BCM6368_RESET_ENET	0
+@@ -141,6 +150,8 @@
+ #define BCM6368_RESET_MPI	SOFTRESET_6368_MPI_MASK
+ #define BCM6368_RESET_PCIE	0
+ #define BCM6368_RESET_PCIE_EXT	0
++#define BCM6368_RESET_PCIE_CORE	0
++#define BCM6368_RESET_PCIE_HARD	0
+ 
+ #define BCM63268_RESET_SPI	SOFTRESET_63268_SPI_MASK
+ #define BCM63268_RESET_ENET	0
+@@ -152,10 +163,10 @@
+ #define BCM63268_RESET_ENETSW	SOFTRESET_63268_ENETSW_MASK
+ #define BCM63268_RESET_PCM	SOFTRESET_63268_PCM_MASK
+ #define BCM63268_RESET_MPI	0
+-#define BCM63268_RESET_PCIE	(SOFTRESET_63268_PCIE_MASK | \
+-				 SOFTRESET_63268_PCIE_CORE_MASK | \
+-				 SOFTRESET_63268_PCIE_HARD_MASK)
++#define BCM63268_RESET_PCIE	SOFTRESET_63268_PCIE_MASK
+ #define BCM63268_RESET_PCIE_EXT	SOFTRESET_63268_PCIE_EXT_MASK
++#define BCM63268_RESET_PCIE_CORE	SOFTRESET_63268_PCIE_CORE_MASK
++#define BCM63268_RESET_PCIE_HARD	SOFTRESET_63268_PCIE_HARD_MASK
+ 
+ /*
+  * core reset bits
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
+@@ -14,6 +14,8 @@ enum bcm63xx_core_reset {
+ 	BCM63XX_RESET_MPI,
+ 	BCM63XX_RESET_PCIE,
+ 	BCM63XX_RESET_PCIE_EXT,
++	BCM63XX_RESET_PCIE_CORE,
++	BCM63XX_RESET_PCIE_HARD,
+ };
+ 
+ void bcm63xx_core_set_reset(enum bcm63xx_core_reset, int reset);
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -135,9 +135,16 @@ static void __init bcm63xx_reset_pcie(vo
+ 
+ 	/* reset the PCIe core */
+ 	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
+ 	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
++	if (BCMCPU_IS_6328() || BCMCPU_IS_63268()) {
++		bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 1);
++		mdelay(10);
++		bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
++	}
+ 	mdelay(10);
+ 
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
+ 	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
+ 	mdelay(10);
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch b/target/linux/brcm63xx/patches-4.1/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch
new file mode 100644
index 0000000..4ffeac9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch
@@ -0,0 +1,342 @@
+From 11a8ab8dac4ef5d0d70199843043927edce1d4db Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 15 Dec 2013 20:47:34 +0100
+Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318
+
+---
+ arch/mips/bcm63xx/clk.c                           |  25 ++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h   |   6 ++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |  60 +++++++++++-
+ arch/mips/pci/ops-bcm63xx.c                       |  16 +++-
+ arch/mips/pci/pci-bcm63xx.c                       | 106 ++++++++++++++++++----
+ 5 files changed, 184 insertions(+), 29 deletions(-)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -50,6 +50,18 @@ static void bcm_hwclock_set(u32 mask, in
+ 	bcm_perf_writel(reg, PERF_CKCTL_REG);
+ }
+ 
++static void bcm_ub_hwclock_set(u32 mask, int enable)
++{
++	u32 reg;
++
++	reg = bcm_perf_readl(PERF_UB_CKCTL_REG);
++	if (enable)
++		reg |= mask;
++	else
++		reg &= ~mask;
++	bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
++}
++
+ /*
+  * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
+  */
+@@ -317,12 +329,17 @@ static struct clk clk_ipsec = {
+ 
+ static void pcie_set(struct clk *clk, int enable)
+ {
+-	if (BCMCPU_IS_6328())
++	if (BCMCPU_IS_6318()) {
++		bcm_hwclock_set(CKCTL_6318_PCIE_EN, enable);
++		bcm_hwclock_set(CKCTL_6318_PCIE25_EN, enable);
++		bcm_ub_hwclock_set(UB_CKCTL_6318_PCIE_EN, enable);
++	} else if (BCMCPU_IS_6328()) {
+ 		bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
+-	else if (BCMCPU_IS_6362())
++	} else if (BCMCPU_IS_6362()) {
+ 		bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
+-	else if (BCMCPU_IS_63268())
++	} else if (BCMCPU_IS_63268()) {
+ 		bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
++	}
+ }
+ 
+ static struct clk clk_pcie = {
+@@ -405,7 +422,7 @@ struct clk *clk_get(struct device *dev,
+ 	if ((BCMCPU_IS_6362() || BCMCPU_IS_6368() || BCMCPU_IS_63268()) &&
+ 	    !strcmp(id, "ipsec"))
+ 		return &clk_ipsec;
+-	if ((BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) &&
++	if ((BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) &&
+ 	    !strcmp(id, "pcie"))
+ 		return &clk_pcie;
+ 	return ERR_PTR(-ENOENT);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -40,6 +40,12 @@
+ #define BCM_CB_MEM_END_PA		(BCM_CB_MEM_BASE_PA +		\
+ 					BCM_CB_MEM_SIZE - 1)
+ 
++#define BCM_PCIE_MEM_BASE_PA_6318	0x10200000
++#define BCM_PCIE_MEM_SIZE_6318		(1 * 1024 * 1024)
++#define BCM_PCIE_MEM_END_PA_6318	(BCM_PCIE_MEM_BASE_PA_6318 +	\
++					BCM_PCIE_MEM_SIZE_6318 - 1)
++
++
+ #define BCM_PCIE_MEM_BASE_PA_6328	0x10f00000
+ #define BCM_PCIE_MEM_SIZE_6328		(1 * 1024 * 1024)
+ #define BCM_PCIE_MEM_END_PA_6328	(BCM_PCIE_MEM_BASE_PA_6328 +	\
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -1529,6 +1529,17 @@
+  * _REG relative to RSET_PCIE
+  *************************************************************************/
+ 
++#define PCIE_SPECIFIC_REG		0x188
++#define SPECIFIC_ENDIAN_MODE_BAR1_SHIFT	0
++#define SPECIFIC_ENDIAN_MODE_BAR1_MASK	(0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
++#define SPECIFIC_ENDIAN_MODE_BAR2_SHIFT	2
++#define SPECIFIC_ENDIAN_MODE_BAR2_MASK	(0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
++#define SPECIFIC_ENDIAN_MODE_BAR3_SHIFT	4
++#define SPECIFIC_ENDIAN_MODE_BAR3_MASK	(0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
++#define SPECIFIC_ENDIAN_MODE_WORD_ALIGN	0
++#define SPECIFIC_ENDIAN_MODE_HALFWORD_ALIGN 1
++#define SPECIFIC_ENDIAN_MODE_BYTE_ALIGN	2
++
+ #define PCIE_CONFIG2_REG		0x408
+ #define CONFIG2_BAR1_SIZE_EN		1
+ #define CONFIG2_BAR1_SIZE_MASK		0xf
+@@ -1574,7 +1585,54 @@
+ #define PCIE_RC_INT_C			(1 << 2)
+ #define PCIE_RC_INT_D			(1 << 3)
+ 
+-#define PCIE_DEVICE_OFFSET		0x8000
++#define PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG	0x400c
++#define C2P_MEM_WIN_ENDIAN_MODE_MASK	0x3
++#define C2P_MEM_WIN_ENDIAN_NO_SWAP	0
++#define C2P_MEM_WIN_ENDIAN_HALF_WORD_SWAP 1
++#define C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP 2
++#define C2P_MEM_WIN_BASE_ADDR_SHIFT	20
++#define C2P_MEM_WIN_BASE_ADDR_MASK	(0xfff << C2P_MEM_WIN_BASE_ADDR_SHIFT)
++
++#define PCIE_RC_BAR1_CONFIG_LO_REG	0x402c
++#define RC_BAR_CFG_LO_SIZE_256MB	0xd
++#define RC_BAR_CFG_LO_MATCH_ADDR_SHIFT	20
++#define RC_BAR_CFG_LO_MATCH_ADDR_MASK	(0xfff << RC_BAR_CFG_LO_MATCH_ADDR_SHIFT)
++
++#define PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG 0x4070
++#define C2P_BASELIMIT_LIMIT_SHIFT	20
++#define C2P_BASELIMIT_LIMIT_MASK	(0xfff << C2P_BASELIMIT_LIMIT_SHIFT)
++#define C2P_BASELIMIT_BASE_SHIFT	4
++#define C2P_BASELIMIT_BASE_MASK		(0xfff << C2P_BASELIMIT_BASE_SHIFT)
++
++#define PCIE_UBUS_BAR1_CFG_REMAP_REG	0x4088
++#define BAR1_CFG_REMAP_OFFSET_SHIFT	20
++#define BAR1_CFG_REMAP_OFFSET_MASK	(0xfff << BAR1_CFG_REMAP_OFFSET_SHIFT)
++#define BAR1_CFG_REMAP_ACCESS_EN	1
++
++#define PCIE_HARD_DEBUG_REG		0x4204
++#define HARD_DEBUG_SERDES_IDDQ		(1 << 23)
++
++#define PCIE_CPU_INT1_MASK_CLEAR_REG	0x830c
++#define CPU_INT_PCIE_ERR_ATTN_CPU	(1 << 0)
++#define CPU_INT_PCIE_INTA		(1 << 1)
++#define CPU_INT_PCIE_INTB		(1 << 2)
++#define CPU_INT_PCIE_INTC		(1 << 3)
++#define CPU_INT_PCIE_INTD		(1 << 4)
++#define CPU_INT_PCIE_INTR		(1 << 5)
++#define CPU_INT_PCIE_NMI		(1 << 6)
++#define CPU_INT_PCIE_UBUS		(1 << 7)
++#define CPU_INT_IPI			(1 << 8)
++
++#define PCIE_EXT_CFG_INDEX_REG		0x8400
++#define EXT_CFG_FUNC_NUM_SHIFT		12
++#define EXT_CFG_FUNC_NUM_MASK		(0x7 << EXT_CFG_FUNC_NUM_SHIFT)
++#define EXT_CFG_DEV_NUM_SHIFT		15
++#define EXT_CFG_DEV_NUM_MASK		(0xf << EXT_CFG_DEV_NUM_SHIFT)
++#define EXT_CFG_BUS_NUM_SHIFT		20
++#define EXT_CFG_BUS_NUM_MASK		(0xff << EXT_CFG_BUS_NUM_SHIFT)
++
++#define PCIE_DEVICE_OFFSET_6318		0x9000
++#define PCIE_DEVICE_OFFSET_6328		0x8000
+ 
+ /*************************************************************************
+  * _REG relative to RSET_OTP
+--- a/arch/mips/pci/ops-bcm63xx.c
++++ b/arch/mips/pci/ops-bcm63xx.c
+@@ -488,8 +488,12 @@ static int bcm63xx_pcie_read(struct pci_
+ 	if (!bcm63xx_pcie_can_access(bus, devfn))
+ 		return PCIBIOS_DEVICE_NOT_FOUND;
+ 
+-	if (bus->number == PCIE_BUS_DEVICE)
+-		reg += PCIE_DEVICE_OFFSET;
++	if (bus->number == PCIE_BUS_DEVICE) {
++		if (BCMCPU_IS_6318())
++			reg += PCIE_DEVICE_OFFSET_6318;
++		else
++			reg += PCIE_DEVICE_OFFSET_6328;
++	}
+ 
+ 	data = bcm_pcie_readl(reg);
+ 
+@@ -508,8 +512,12 @@ static int bcm63xx_pcie_write(struct pci
+ 	if (!bcm63xx_pcie_can_access(bus, devfn))
+ 		return PCIBIOS_DEVICE_NOT_FOUND;
+ 
+-	if (bus->number == PCIE_BUS_DEVICE)
+-		reg += PCIE_DEVICE_OFFSET;
++	if (bus->number == PCIE_BUS_DEVICE) {
++		if (BCMCPU_IS_6318())
++			reg += PCIE_DEVICE_OFFSET_6318;
++		else
++			reg += PCIE_DEVICE_OFFSET_6328;
++	}
+ 
+ 
+ 	data = bcm_pcie_readl(reg);
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -118,7 +118,7 @@ static void bcm63xx_int_cfg_writel(u32 v
+ 
+ void __iomem *pci_iospace_start;
+ 
+-static void __init bcm63xx_reset_pcie(void)
++static void __init bcm63xx_reset_pcie_gen1(void)
+ {
+ 	u32 val;
+ 	u32 reg;
+@@ -152,20 +152,32 @@ static void __init bcm63xx_reset_pcie(vo
+ 	mdelay(200);
+ }
+ 
+-static struct clk *pcie_clk;
+-
+-static int __init bcm63xx_register_pcie(void)
++static void __init bcm63xx_reset_pcie_gen2(void)
+ {
+ 	u32 val;
+ 
+-	/* enable clock */
+-	pcie_clk = clk_get(NULL, "pcie");
+-	if (IS_ERR_OR_NULL(pcie_clk))
+-		return -ENODEV;
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
+ 
+-	clk_prepare_enable(pcie_clk);
++	/* reset the PCIe core */
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
++	mdelay(10);
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 0);
++	mdelay(10);
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
++	mdelay(10);
++	val = bcm_pcie_readl(PCIE_HARD_DEBUG_REG);
++	val &= ~HARD_DEBUG_SERDES_IDDQ;
++	bcm_pcie_writel(val, PCIE_HARD_DEBUG_REG);
++	mdelay(10);
++	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
++	mdelay(200);
++}
+ 
+-	bcm63xx_reset_pcie();
++static void __init bcm63xx_init_pcie_gen1(void)
++{
++	u32 val;
+ 
+ 	/* configure the PCIe bridge */
+ 	val = bcm_pcie_readl(PCIE_BRIDGE_OPT1_REG);
+@@ -190,6 +202,65 @@ static int __init bcm63xx_register_pcie(
+ 	val |= OPT2_CFG_TYPE1_BD_SEL;
+ 	bcm_pcie_writel(val, PCIE_BRIDGE_OPT2_REG);
+ 
++	/* set bar0 to little endian */
++	val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
++	val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
++	val |= BASEMASK_REMAP_EN;
++	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
++
++	val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
++	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
++}
++
++static void __init bcm63xx_init_pcie_gen2(void)
++{
++	u32 val;
++
++	bcm_pcie_writel(CPU_INT_PCIE_INTA | CPU_INT_PCIE_INTB |
++			CPU_INT_PCIE_INTC | CPU_INT_PCIE_INTD,
++			PCIE_CPU_INT1_MASK_CLEAR_REG);
++
++	val = bcm_pcie_mem_resource.end & C2P_BASELIMIT_LIMIT_MASK;
++	val |= (bcm_pcie_mem_resource.start >> C2P_BASELIMIT_LIMIT_SHIFT) <<
++	       C2P_BASELIMIT_BASE_SHIFT;
++
++	bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG);
++
++	/* set bar0 to little endian */
++	val = bcm_pcie_readl(PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
++	val |= bcm_pcie_mem_resource.start & C2P_MEM_WIN_BASE_ADDR_MASK;
++	val |= C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP;
++	bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
++
++	bcm_pcie_writel(SPECIFIC_ENDIAN_MODE_BYTE_ALIGN, PCIE_SPECIFIC_REG);
++	bcm_pcie_writel(RC_BAR_CFG_LO_SIZE_256MB, PCIE_RC_BAR1_CONFIG_LO_REG);
++	bcm_pcie_writel(BAR1_CFG_REMAP_ACCESS_EN, PCIE_UBUS_BAR1_CFG_REMAP_REG);
++
++	bcm_pcie_writel(PCIE_BUS_DEVICE << EXT_CFG_BUS_NUM_SHIFT,
++			PCIE_EXT_CFG_INDEX_REG);
++}
++
++static struct clk *pcie_clk;
++
++static int __init bcm63xx_register_pcie(void)
++{
++	u32 val;
++
++	/* enable clock */
++	pcie_clk = clk_get(NULL, "pcie");
++	if (IS_ERR_OR_NULL(pcie_clk))
++		return -ENODEV;
++
++	clk_prepare_enable(pcie_clk);
++
++	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
++		bcm63xx_reset_pcie_gen1();
++		bcm63xx_init_pcie_gen1();
++	} else {
++		bcm63xx_reset_pcie_gen2();
++		bcm63xx_init_pcie_gen2();
++	}
++
+ 	/* setup class code as bridge */
+ 	val = bcm_pcie_readl(PCIE_IDVAL3_REG);
+ 	val &= ~IDVAL3_CLASS_CODE_MASK;
+@@ -201,15 +272,6 @@ static int __init bcm63xx_register_pcie(
+ 	val &= ~CONFIG2_BAR1_SIZE_MASK;
+ 	bcm_pcie_writel(val, PCIE_CONFIG2_REG);
+ 
+-	/* set bar0 to little endian */
+-	val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
+-	val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
+-	val |= BASEMASK_REMAP_EN;
+-	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
+-
+-	val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
+-	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
+-
+ 	register_pci_controller(&bcm63xx_pcie_controller);
+ 
+ 	return 0;
+@@ -341,7 +403,10 @@ static int __init bcm63xx_pci_init(void)
+ 	if (!bcm63xx_pci_enabled)
+ 		return -ENODEV;
+ 
+-	if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
++	if (BCMCPU_IS_6318()) {
++		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6318;
++		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6318;
++	} if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
+ 		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
+ 		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
+ 	} else if (BCMCPU_IS_63268()) {
+@@ -350,6 +415,7 @@ static int __init bcm63xx_pci_init(void)
+ 	}
+ 
+ 	switch (bcm63xx_get_cpu_id()) {
++	case BCM6318_CPU_ID:
+ 	case BCM6328_CPU_ID:
+ 	case BCM6362_CPU_ID:
+ 	case BCM63268_CPU_ID:
diff --git a/target/linux/brcm63xx/patches-4.1/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch b/target/linux/brcm63xx/patches-4.1/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch
new file mode 100644
index 0000000..f5b0e77
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch
@@ -0,0 +1,74 @@
+From 9a97177b907330971aa7bf41855fafc2602e1c18 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Dec 2013 12:26:57 +0100
+Subject: [PATCH 51/56] MIPS: BCM63XX: detect flash type early and store the
+ result
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c                          | 10 +++++++---
+ arch/mips/bcm63xx/prom.c                               |  4 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h |  2 ++
+ 3 files changed, 13 insertions(+), 3 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -22,6 +22,8 @@
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+ 
++static int flash_type;
++
+ static struct mtd_partition mtd_partitions[] = {
+ 	{
+ 		.name		= "cfe",
+@@ -108,13 +110,15 @@ static int __init bcm63xx_detect_flash_t
+ 	}
+ }
+ 
++void __init bcm63xx_flash_detect(void)
++{
++	flash_type = bcm63xx_detect_flash_type();
++}
++
+ int __init bcm63xx_flash_register(void)
+ {
+-	int flash_type;
+ 	u32 val;
+ 
+-	flash_type = bcm63xx_detect_flash_type();
+-
+ 	switch (flash_type) {
+ 	case BCM63XX_FLASH_TYPE_PARALLEL:
+ 		/* read base address of boot chip select (0) */
+--- a/arch/mips/bcm63xx/prom.c
++++ b/arch/mips/bcm63xx/prom.c
+@@ -17,6 +17,7 @@
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_regs.h>
++#include <bcm63xx_dev_flash.h>
+ 
+ void __init prom_init(void)
+ {
+@@ -52,6 +53,9 @@ void __init prom_init(void)
+ 	reg &= ~mask;
+ 	bcm_perf_writel(reg, PERF_CKCTL_REG);
+ 
++	/* detect and setup flash access */
++	bcm63xx_flash_detect();
++
+ 	/* do low level board init */
+ 	board_prom_init();
+ 
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -7,6 +7,8 @@ enum {
+ 	BCM63XX_FLASH_TYPE_NAND,
+ };
+ 
++void bcm63xx_flash_detect(void);
++
+ int __init bcm63xx_flash_register(void);
+ 
+ #endif /* __BCM63XX_FLASH_H */
diff --git a/target/linux/brcm63xx/patches-4.1/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch b/target/linux/brcm63xx/patches-4.1/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch
new file mode 100644
index 0000000..c8bef13
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch
@@ -0,0 +1,84 @@
+From 1cacd0f7b0d35f8e3d3f8a69ecb3b5e436d6b9e8 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Dec 2013 13:25:25 +0100
+Subject: [PATCH 52/56] MIPS: BCM63XX: fixup mapped SPI flash access on boot
+
+Some bootloaders leave the flash access in an invalid state with dual
+read enabled; fix it by disabling it and falling back to simple fast
+reads.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 51 ++++++++++++++++++++++++++++++++++++
+ 1 file changed, 51 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -16,6 +16,7 @@
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
+ #include <linux/mtd/physmap.h>
++#include <linux/mtd/spi-nor.h>
+ 
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
+@@ -110,9 +111,59 @@ static int __init bcm63xx_detect_flash_t
+ 	}
+ }
+ 
++#define HSSPI_FLASH_CTRL_REG		0x14
++#define FLASH_CTRL_READ_OPCODE_MASK	0xff
++#define FLASH_CTRL_ADDR_BYTES_MASK	(0x3 << 8)
++#define FLASH_CTRL_ADDR_BYTES_2		(0 << 8)
++#define FLASH_CTRL_ADDR_BYTES_3		(1 << 8)
++#define FLASH_CTRL_ADDR_BYTES_4		(2 << 8)
++#define FLASH_CTRL_DUMMY_BYTES_SHIFT	10
++#define FLASH_CTRL_DUMMY_BYTES_MASK	(0x3 << FLASH_CTRL_DUMMY_BYTES_SHIFT)
++#define FLASH_CTRL_MB_EN		(1 << 23)
++
+ void __init bcm63xx_flash_detect(void)
+ {
+ 	flash_type = bcm63xx_detect_flash_type();
++
++	/* ensure flash mapping has sane values */
++	if (flash_type == BCM63XX_FLASH_TYPE_SERIAL &&
++	    (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
++	     BCMCPU_IS_63268())) {
++		u32 val = bcm_rset_readl(RSET_HSSPI, HSSPI_FLASH_CTRL_REG);
++
++		if (val & FLASH_CTRL_MB_EN) {
++			/* cfe might configure non working dual-io mode */
++			val &= ~FLASH_CTRL_MB_EN;
++			val &= ~FLASH_CTRL_READ_OPCODE_MASK;
++			val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
++			val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
++
++			switch (val & FLASH_CTRL_ADDR_BYTES_MASK) {
++			case FLASH_CTRL_ADDR_BYTES_3:
++				val |= SPINOR_OP_READ_FAST;
++				break;
++			case FLASH_CTRL_ADDR_BYTES_4:
++				val |= SPINOR_OP_READ4_FAST;
++				break;
++			case FLASH_CTRL_ADDR_BYTES_2:
++			default:
++				pr_warn("unsupported address byte mode (%x), not fixing up\n",
++					val & FLASH_CTRL_ADDR_BYTES_MASK);
++				return;
++			}
++		} else {
++			/* ensure dummy bytes is set to 1 for _FAST reads */
++			u8 cmd = val & FLASH_CTRL_READ_OPCODE_MASK;
++
++			if (cmd != SPINOR_OP_READ_FAST && cmd != SPINOR_OP_READ4_FAST)
++				return;
++
++			val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
++			val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
++		}
++
++		bcm_rset_writel(RSET_HSSPI, val, HSSPI_FLASH_CTRL_REG);
++	}
+ }
+ 
+ int __init bcm63xx_flash_register(void)
diff --git a/target/linux/brcm63xx/patches-4.1/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch b/target/linux/brcm63xx/patches-4.1/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch
new file mode 100644
index 0000000..384702c
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch
@@ -0,0 +1,56 @@
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -136,7 +136,11 @@ static struct clk clk_ephy = {
+  */
+ static void enetsw_set(struct clk *clk, int enable)
+ {
+-	if (BCMCPU_IS_6328())
++	if (BCMCPU_IS_6318()) {
++		bcm_hwclock_set(CKCTL_6318_ROBOSW250_EN |
++				CKCTL_6318_ROBOSW025_EN, enable);
++		bcm_ub_hwclock_set(UB_CKCTL_6318_ROBOSW_EN, enable);
++	} else if (BCMCPU_IS_6328())
+ 		bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
+ 	else if (BCMCPU_IS_6362())
+ 		bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
+@@ -183,18 +187,22 @@ static struct clk clk_pcm = {
+  */
+ static void usbh_set(struct clk *clk, int enable)
+ {
+-	if (BCMCPU_IS_6328())
++	if (BCMCPU_IS_6318()) {
++		bcm_hwclock_set(CKCTL_6318_USB_EN, enable);
++		bcm_ub_hwclock_set(UB_CKCTL_6318_USB_EN, enable);
++	} else if (BCMCPU_IS_6328()) {
+ 		bcm_hwclock_set(CKCTL_6328_USBH_EN, enable);
+-	else if (BCMCPU_IS_6348())
++	} else if (BCMCPU_IS_6348()) {
+ 		bcm_hwclock_set(CKCTL_6348_USBH_EN, enable);
+-	else if (BCMCPU_IS_6362())
++	} else if (BCMCPU_IS_6362()) {
+ 		bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
+-	else if (BCMCPU_IS_6368())
++	} else if (BCMCPU_IS_6368()) {
+ 		bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
+-	else if (BCMCPU_IS_63268())
++	} else if (BCMCPU_IS_63268()) {
+ 		bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
+-	else
++	} else {
+ 		return;
++	}
+ 
+ 	if (enable)
+ 		msleep(100);
+@@ -405,9 +413,9 @@ struct clk *clk_get(struct device *dev,
+ 		return &clk_enetsw;
+ 	if (!strcmp(id, "ephy"))
+ 		return &clk_ephy;
+-	if (!strcmp(id, "usbh"))
++	if (!strcmp(id, "usbh") || (BCMCPU_IS_6318() && !strcmp(id, "usbd")))
+ 		return &clk_usbh;
+-	if (!strcmp(id, "usbd"))
++	if (!strcmp(id, "usbd") && !BCMCPU_IS_6318())
+ 		return &clk_usbd;
+ 	if (!strcmp(id, "spi"))
+ 		return &clk_spi;
diff --git a/target/linux/brcm63xx/patches-4.1/347-MIPS-BCM6318-USB-support.patch b/target/linux/brcm63xx/patches-4.1/347-MIPS-BCM6318-USB-support.patch
new file mode 100644
index 0000000..db489f8
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/347-MIPS-BCM6318-USB-support.patch
@@ -0,0 +1,124 @@
+--- a/arch/mips/bcm63xx/usb-common.c
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -109,6 +109,27 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ 		reg |= USBH_PRIV_SETUP_IOC_MASK;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++	} else if (BCMCPU_IS_6318()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++		reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
++		reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
++		reg |= USBH_PRIV_SETUP_IOC_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++		reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
++		reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
+ 	}
+ 
+ 	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+@@ -144,6 +165,27 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ 		reg |= USBH_PRIV_SETUP_IOC_MASK;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++	} else if (BCMCPU_IS_6318()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++		reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
++		reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
++		reg |= USBH_PRIV_SETUP_IOC_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++		reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
++		reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
+ 	}
+ 
+ 	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -681,6 +681,12 @@
+ #define GPIO_MODE_6368_SPI_SSN4		(1 << 30)
+ #define GPIO_MODE_6368_SPI_SSN5		(1 << 31)
+ 
++#define GPIO_PINMUX_SEL0_6318		0x1c
++#define GPIO_PINMUX_SEL0_GPIO13_SHIFT	26
++#define GPIO_PINMUX_SEL0_GPIO13_MASK	(0x3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
++#define GPIO_PINMUX_SEL0_GPIO13_PWRON	(1 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
++#define GPIO_PINMUX_SEL0_GPIO13_LED	(2 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
++#define GPIO_PINMUX_SEL0_GPIO13_GPIO	(3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
+ 
+ #define GPIO_PINMUX_OTHR_REG		0x24
+ #define GPIO_PINMUX_OTHR_6328_USB_SHIFT 12
+@@ -999,6 +1005,7 @@
+ 
+ #define USBH_PRIV_SWAP_6358_REG		0x0
+ #define USBH_PRIV_SWAP_6368_REG		0x1c
++#define USBH_PRIV_SWAP_6318_REG		0x0c
+ 
+ #define USBH_PRIV_SWAP_USBD_SHIFT	6
+ #define USBH_PRIV_SWAP_USBD_MASK	(1 << USBH_PRIV_SWAP_USBD_SHIFT)
+@@ -1024,6 +1031,13 @@
+ #define USBH_PRIV_SETUP_IOC_SHIFT	4
+ #define USBH_PRIV_SETUP_IOC_MASK	(1 << USBH_PRIV_SETUP_IOC_SHIFT)
+ 
++#define USBH_PRIV_SETUP_6318_REG	0x00
++#define USBH_PRIV_PLL_CTRL1_6318_REG	0x04
++#define USBH_PRIV_PLL_CTRL1_SUSP_EN	(1 << 27)
++#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN	(1 << 31)
++#define USBH_PRIV_SIM_CTRL_6318_REG	0x20
++#define USBH_PRIV_SIM_CTRL_LADDR_SEL	(1 << 5)
++
+ 
+ /*************************************************************************
+  * _REG relative to RSET_USBD
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -126,6 +126,15 @@ void __init board_early_setup(const stru
+ 	}
+ 
+ 	bcm_gpio_writel(val, GPIO_MODE_REG);
++
++#if IS_ENABLED(CONFIG_USB)
++	if (BCMCPU_IS_6318() && (board.has_ehci0 || board.has_ohci0)) {
++		val = bcm_gpio_readl(GPIO_PINMUX_SEL0_6318);
++		val &= ~GPIO_PINMUX_SEL0_GPIO13_MASK;
++		val |= GPIO_PINMUX_SEL0_GPIO13_PWRON;
++		bcm_gpio_writel(val, GPIO_PINMUX_SEL0_6318);
++	}
++#endif
+ }
+ 
+ 
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -22,6 +22,8 @@ config BCM63XX_CPU_6318
+ 	bool "support 6318 CPU"
+ 	select SYS_HAS_CPU_BMIPS32_3300
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
++	select BCM63XX_EHCI
+ 
+ config BCM63XX_CPU_6328
+ 	bool "support 6328 CPU"
diff --git a/target/linux/brcm63xx/patches-4.1/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch b/target/linux/brcm63xx/patches-4.1/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch
new file mode 100644
index 0000000..10edbc4
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch
@@ -0,0 +1,71 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -586,6 +586,9 @@
+ #define TIMER_CTL_MONOTONIC_MASK	(1 << 30)
+ #define TIMER_CTL_ENABLE_MASK		(1 << 31)
+ 
++/* Clock reset control (63268 only) */
++#define TIMER_CLK_RST_CTL_REG		0x2c
++#define CLK_RST_CTL_USB_REF_CLK_EN	(1 << 18)
+ 
+ /*************************************************************************
+  * _REG relative to RSET_WDT
+@@ -1533,6 +1536,11 @@
+ #define STRAPBUS_63268_FCVO_SHIFT	21
+ #define STRAPBUS_63268_FCVO_MASK	(0xf << STRAPBUS_63268_FCVO_SHIFT)
+ 
++#define MISC_IDDQ_CTRL_6328_REG		0x48
++#define MISC_IDDQ_CTRL_63268_REG	0x4c
++
++#define IDDQ_CTRL_63268_USBH		(1 << 4)
++
+ #define MISC_STRAPBUS_6328_REG		0x240
+ #define STRAPBUS_6328_FCVO_SHIFT	7
+ #define STRAPBUS_6328_FCVO_MASK		(0x1f << STRAPBUS_6328_FCVO_SHIFT)
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -62,6 +62,26 @@ static void bcm_ub_hwclock_set(u32 mask,
+ 	bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
+ }
+ 
++static void bcm_misc_iddq_set(u32 mask, int enable)
++{
++	u32 offset;
++	u32 reg;
++
++	if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
++		offset = MISC_IDDQ_CTRL_6328_REG;
++	else if (BCMCPU_IS_63268())
++		offset = MISC_IDDQ_CTRL_63268_REG;
++	else
++		return;
++
++	reg = bcm_misc_readl(offset);
++	if (enable)
++		reg &= ~mask;
++	else
++		reg |= mask;
++	bcm_misc_writel(reg, offset);
++}
++
+ /*
+  * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
+  */
+@@ -199,7 +219,17 @@ static void usbh_set(struct clk *clk, in
+ 	} else if (BCMCPU_IS_6368()) {
+ 		bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
+ 	} else if (BCMCPU_IS_63268()) {
++		u32 reg;
++
+ 		bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
++		bcm_misc_iddq_set(IDDQ_CTRL_63268_USBH, enable);
++		bcm63xx_core_set_reset(BCM63XX_RESET_USBH, !enable);
++		reg = bcm_timer_readl(TIMER_CLK_RST_CTL_REG);
++		if (enable)
++			reg |= CLK_RST_CTL_USB_REF_CLK_EN;
++		else
++			reg &= ~CLK_RST_CTL_USB_REF_CLK_EN;
++		bcm_timer_writel(reg, TIMER_CLK_RST_CTL_REG);
+ 	} else {
+ 		return;
+ 	}
diff --git a/target/linux/brcm63xx/patches-4.1/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch b/target/linux/brcm63xx/patches-4.1/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch
new file mode 100644
index 0000000..0b70991
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch
@@ -0,0 +1,117 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -1033,11 +1033,18 @@
+ #define USBH_PRIV_SETUP_6368_REG	0x28
+ #define USBH_PRIV_SETUP_IOC_SHIFT	4
+ #define USBH_PRIV_SETUP_IOC_MASK	(1 << USBH_PRIV_SETUP_IOC_SHIFT)
++#define USBH_PRIV_SETUP_IPP_SHIFT	5
++#define USBH_PRIV_SETUP_IPP_MASK	(1 << USBH_PRIV_SETUP_IPP_SHIFT)
+ 
+ #define USBH_PRIV_SETUP_6318_REG	0x00
++#define USBH_PRIV_PLL_CTRL1_6368_REG	0x18
+ #define USBH_PRIV_PLL_CTRL1_6318_REG	0x04
+-#define USBH_PRIV_PLL_CTRL1_SUSP_EN	(1 << 27)
+-#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN	(1 << 31)
++
++#define USBH_PRIV_PLL_CTRL1_6318_SUSP_EN	(1 << 27)
++#define USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN	(1 << 31)
++#define USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN	(1 << 9)
++#define USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY	(1 << 10)
++
+ #define USBH_PRIV_SIM_CTRL_6318_REG	0x20
+ #define USBH_PRIV_SIM_CTRL_LADDR_SEL	(1 << 5)
+ 
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -72,6 +72,8 @@ config BCM63XX_CPU_63268
+ 	bool "support 63268 CPU"
+ 	select SYS_HAS_CPU_BMIPS4350
+ 	select HW_HAS_PCI
++	select BCM63XX_OHCI
++	select BCM63XX_EHCI
+ endmenu
+ 
+ source "arch/mips/bcm63xx/boards/Kconfig"
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -82,7 +82,7 @@ static struct platform_device bcm63xx_eh
+ int __init bcm63xx_ehci_register(void)
+ {
+ 	if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
+-		!BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++		!BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
+ 		return 0;
+ 
+ 	ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
+--- a/arch/mips/bcm63xx/usb-common.c
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -109,9 +109,24 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ 		reg |= USBH_PRIV_SETUP_IOC_MASK;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++	} else if (BCMCPU_IS_63268()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++		reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++		reg |= USBH_PRIV_SETUP_IOC_MASK;
++		reg &= ~USBH_PRIV_SETUP_IPP_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
++		reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
++			 USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
+ 	} else if (BCMCPU_IS_6318()) {
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+-		reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++		reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+ 
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
+@@ -124,7 +139,7 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
+ 
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+-		reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++		reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+ 
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
+@@ -165,9 +180,24 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ 		reg |= USBH_PRIV_SETUP_IOC_MASK;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++	} else if (BCMCPU_IS_63268()) {
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++		reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++		reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++		reg |= USBH_PRIV_SETUP_IOC_MASK;
++		reg &= ~USBH_PRIV_SETUP_IPP_MASK;
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++
++		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
++		reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
++			 USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
++		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
+ 	} else if (BCMCPU_IS_6318()) {
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+-		reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++		reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+ 
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
+@@ -180,7 +210,7 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
+ 
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+-		reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++		reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
+ 		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+ 
+ 		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
diff --git a/target/linux/brcm63xx/patches-4.1/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch b/target/linux/brcm63xx/patches-4.1/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch
new file mode 100644
index 0000000..974c67f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch
@@ -0,0 +1,108 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -41,6 +41,7 @@ struct board_info {
+ 
+ 	/* USB config */
+ 	struct bcm63xx_usbd_platform_data usbd;
++	unsigned int num_usbh_ports:2;
+ 
+ 	/* DSP config */
+ 	struct bcm63xx_dsp_platform_data dsp;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+@@ -1,6 +1,6 @@
+ #ifndef BCM63XX_DEV_USB_EHCI_H_
+ #define BCM63XX_DEV_USB_EHCI_H_
+ 
+-int bcm63xx_ehci_register(void);
++int bcm63xx_ehci_register(unsigned int num_ports);
+ 
+ #endif /* BCM63XX_DEV_USB_EHCI_H_ */
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+@@ -1,6 +1,6 @@
+ #ifndef BCM63XX_DEV_USB_OHCI_H_
+ #define BCM63XX_DEV_USB_OHCI_H_
+ 
+-int bcm63xx_ohci_register(void);
++int bcm63xx_ohci_register(unsigned int num_ports);
+ 
+ #endif /* BCM63XX_DEV_USB_OHCI_H_ */
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -166,6 +166,8 @@ static struct platform_device bcm63xx_gp
+  */
+ int __init board_register_devices(void)
+ {
++	int usbh_ports = 0;
++
+ 	if (board.has_uart0)
+ 		bcm63xx_uart_register(0);
+ 
+@@ -187,14 +189,21 @@ int __init board_register_devices(void)
+ 	    !board_get_mac_address(board.enetsw.mac_addr))
+ 		bcm63xx_enetsw_register(&board.enetsw);
+ 
++	if ((board.has_ohci0 || board.has_ehci0)) {
++		usbh_ports = board.num_usbh_ports;
++
++		if (!usbh_ports || WARN_ON(usbh_ports > 1 && board.has_usbd))
++			usbh_ports = 1;
++	}
++
+ 	if (board.has_usbd)
+ 		bcm63xx_usbd_register(&board.usbd);
+ 
+ 	if (board.has_ehci0)
+-		bcm63xx_ehci_register();
++		bcm63xx_ehci_register(usbh_ports);
+ 
+ 	if (board.has_ohci0)
+-		bcm63xx_ohci_register();
++		bcm63xx_ohci_register(usbh_ports);
+ 
+ 	if (board.has_dsp)
+ 		bcm63xx_dsp_register(&board.dsp);
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -79,12 +79,14 @@ static struct platform_device bcm63xx_eh
+ 	},
+ };
+ 
+-int __init bcm63xx_ehci_register(void)
++int __init bcm63xx_ehci_register(unsigned int num_ports)
+ {
+ 	if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
+ 		!BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
+ 		return 0;
+ 
++	bcm63xx_ehci_pdata.num_ports = num_ports;	
++
+ 	ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
+ 	ehci_resources[0].end = ehci_resources[0].start;
+ 	ehci_resources[0].end += RSET_EHCI_SIZE - 1;
+--- a/arch/mips/bcm63xx/dev-usb-ohci.c
++++ b/arch/mips/bcm63xx/dev-usb-ohci.c
+@@ -62,7 +62,6 @@ static struct usb_ohci_pdata bcm63xx_ohc
+ 	.big_endian_desc	= 1,
+ 	.big_endian_mmio	= 1,
+ 	.no_big_frame_no	= 1,
+-	.num_ports		= 1,
+ 	.power_on		= bcm63xx_ohci_power_on,
+ 	.power_off		= bcm63xx_ohci_power_off,
+ 	.power_suspend		= bcm63xx_ohci_power_off,
+@@ -80,11 +79,13 @@ static struct platform_device bcm63xx_oh
+ 	},
+ };
+ 
+-int __init bcm63xx_ohci_register(void)
++int __init bcm63xx_ohci_register(unsigned int num_ports)
+ {
+ 	if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
+ 		return -ENODEV;
+ 
++	bcm63xx_ohci_pdata.num_ports = num_ports;
++
+ 	ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
+ 	ohci_resources[0].end = ohci_resources[0].start;
+ 	ohci_resources[0].end += RSET_OHCI_SIZE - 1;
diff --git a/target/linux/brcm63xx/patches-4.1/351-set-board-usbh-ports.patch b/target/linux/brcm63xx/patches-4.1/351-set-board-usbh-ports.patch
new file mode 100644
index 0000000..51cb29d
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/351-set-board-usbh-ports.patch
@@ -0,0 +1,10 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -591,6 +591,7 @@ static struct board_info __initdata boar
+ 	.has_ohci0 = 1,
+ 	.has_pccard = 1,
+ 	.has_ehci0 = 1,
++	.num_usbh_ports			= 2,
+ 
+ 	.leds = {
+ 		{
diff --git a/target/linux/brcm63xx/patches-4.1/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch b/target/linux/brcm63xx/patches-4.1/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch
new file mode 100644
index 0000000..125ac83
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch
@@ -0,0 +1,95 @@
+From 0daf361ea799fba0af5a232036d0f06cea85ad24 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Jun 2014 12:47:49 +0200
+Subject: [PATCH 42/44] MIPS: BCM63XX: allow building support for more than one
+ board type
+
+Use the arguments passed to the kernel to detect being booted with
+CFE as the indicator for bcm963xx board support, allowing the
+non presence of CFE_EPTSEAL to assume a different board type.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Kconfig          |  7 +++----
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |  2 +-
+ arch/mips/bcm63xx/boards/board_common.c   | 13 +++++++++++++
+ arch/mips/bcm63xx/boards/board_common.h   |  6 ++++++
+ 4 files changed, 23 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -1,11 +1,10 @@
+-choice
+-	prompt "Board support"
++menu "Board support"
+ 	depends on BCM63XX
+-	default BOARD_BCM963XX
+ 
+ config BOARD_BCM963XX
+        bool "Generic Broadcom 963xx boards"
+ 	select SSB
++	default y
+        help
+ 
+-endchoice
++endmenu
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -701,7 +701,7 @@ static const struct board_info __initcon
+ /*
+  * early init callback, read nvram data from flash and checksum it
+  */
+-void __init board_prom_init(void)
++void __init board_bcm963xx_init(void)
+ {
+ 	unsigned int i;
+ 	u8 *boot_addr, *cfe;
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -14,6 +14,8 @@
+ #include <linux/ssb/ssb.h>
+ #include <linux/spi/spi.h>
+ #include <asm/addrspace.h>
++#include <asm/bootinfo.h>
++#include <asm/fw/cfe/cfe_api.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_uart.h>
+@@ -31,6 +33,8 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+ 
++#include "board_common.h"
++
+ #define PFX	"board: "
+ 
+ static struct board_info board;
+@@ -81,6 +85,15 @@ const char *board_get_name(void)
+ 	return board.name;
+ }
+ 
++void __init board_prom_init(void)
++{
++	/* detect bootloader */
++	if (fw_arg3 == CFE_EPTSEAL)
++		board_bcm963xx_init();
++	else
++		panic("unsupported bootloader detected");
++}
++
+ static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
+ 
+ /*
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -6,4 +6,10 @@
+ void board_early_setup(const struct board_info *board,
+ 		       int (*get_mac_address)(u8 mac[ETH_ALEN]));
+ 
++#if defined(CONFIG_BOARD_BCM963XX)
++void board_bcm963xx_init(void);
++#else
++static inline void board_bcm963xx_init(void) { }
++#endif
++
+ #endif /* __BOARD_COMMON_H */
diff --git a/target/linux/brcm63xx/patches-4.1/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch b/target/linux/brcm63xx/patches-4.1/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch
new file mode 100644
index 0000000..bdbba03
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch
@@ -0,0 +1,61 @@
+From 8a30097a899b975709f728666d5ad20c8b832d21 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 04:28:14 +0100
+Subject: [PATCH 43/44] MIPS: BCM63XX: allow board implementations to force
+ flash address
+
+Allow board implementations to force the physmap address.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c                         | 19 ++++++++++++++-----
+ .../mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h |  2 ++
+ 2 files changed, 16 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -58,6 +58,12 @@ static struct platform_device mtd_dev =
+ 	},
+ };
+ 
++void __init bcm63xx_flash_force_phys_base_address(u32 start, u32 end)
++{
++	mtd_resources[0].start = start;
++	mtd_resources[0].end = end;
++}
++
+ static int __init bcm63xx_detect_flash_type(void)
+ {
+ 	u32 val;
+@@ -172,12 +178,15 @@ int __init bcm63xx_flash_register(void)
+ 
+ 	switch (flash_type) {
+ 	case BCM63XX_FLASH_TYPE_PARALLEL:
+-		/* read base address of boot chip select (0) */
+-		val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+-		val &= MPI_CSBASE_BASE_MASK;
+ 
+-		mtd_resources[0].start = val;
+-		mtd_resources[0].end = 0x1FFFFFFF;
++		if (!mtd_resources[0].start) {
++			/* read base address of boot chip select (0) */
++			val = bcm_mpi_readl(MPI_CSBASE_REG(0));
++			val &= MPI_CSBASE_BASE_MASK;
++
++			mtd_resources[0].start = val;
++			mtd_resources[0].end = 0x1FFFFFFF;
++		}
+ 
+ 		return platform_device_register(&mtd_dev);
+ 	case BCM63XX_FLASH_TYPE_SERIAL:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -9,6 +9,8 @@ enum {
+ 
+ void bcm63xx_flash_detect(void);
+ 
++void bcm63xx_flash_force_phys_base_address(u32 start, u32 end);
++
+ int __init bcm63xx_flash_register(void);
+ 
+ #endif /* __BCM63XX_FLASH_H */
diff --git a/target/linux/brcm63xx/patches-4.1/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch b/target/linux/brcm63xx/patches-4.1/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch
new file mode 100644
index 0000000..cec6c7e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch
@@ -0,0 +1,188 @@
+From cc025e749a1fece61a6cc0d64bbe7b12472259cc Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:31:12 +0200
+Subject: [PATCH 01/10] MIPS: BCM63XX: move fallback sprom support into its own
+ unit
+
+In preparation for enhancing it, move it into its own file. Require a
+mac address to be passed as the argument to always "reserve" the mac
+regardless of the inclusion state of SSB.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile                         |  2 +-
+ arch/mips/bcm63xx/boards/board_common.c            | 53 ++--------------
+ arch/mips/bcm63xx/sprom.c                          | 70 ++++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h      |  6 ++
+ 4 files changed, 83 insertions(+), 48 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/sprom.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,7 @@ obj-y		+= clk.o cpu.o cs.o gpio.o irq.o
+ 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
+ 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
+ 		   dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
+-		   usb-common.o
++		   usb-common.o sprom.o
+ obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+ 
+ obj-y		+= boards/
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -40,44 +40,6 @@
+ static struct board_info board;
+ 
+ /*
+- * Register a sane SPROMv2 to make the on-board
+- * bcm4318 WLAN work
+- */
+-#ifdef CONFIG_SSB_PCIHOST
+-static struct ssb_sprom bcm63xx_sprom = {
+-	.revision		= 0x02,
+-	.board_rev		= 0x17,
+-	.country_code		= 0x0,
+-	.ant_available_bg	= 0x3,
+-	.pa0b0			= 0x15ae,
+-	.pa0b1			= 0xfa85,
+-	.pa0b2			= 0xfe8d,
+-	.pa1b0			= 0xffff,
+-	.pa1b1			= 0xffff,
+-	.pa1b2			= 0xffff,
+-	.gpio0			= 0xff,
+-	.gpio1			= 0xff,
+-	.gpio2			= 0xff,
+-	.gpio3			= 0xff,
+-	.maxpwr_bg		= 0x004c,
+-	.itssi_bg		= 0x00,
+-	.boardflags_lo		= 0x2848,
+-	.boardflags_hi		= 0x0000,
+-};
+-
+-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+-{
+-	if (bus->bustype == SSB_BUSTYPE_PCI) {
+-		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
+-		return 0;
+-	} else {
+-		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+-		return -EINVAL;
+-	}
+-}
+-#endif
+-
+-/*
+  * return board name for /proc/cpuinfo
+  */
+ const char *board_get_name(void)
+@@ -180,6 +142,7 @@ static struct platform_device bcm63xx_gp
+ int __init board_register_devices(void)
+ {
+ 	int usbh_ports = 0;
++	u8 mac[ETH_ALEN];
+ 
+ 	if (board.has_uart0)
+ 		bcm63xx_uart_register(0);
+@@ -224,15 +187,10 @@ int __init board_register_devices(void)
+ 	/* Generate MAC address for WLAN and register our SPROM,
+ 	 * do this after registering enet devices
+ 	 */
+-#ifdef CONFIG_SSB_PCIHOST
+-	if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+-		memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+-		memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+-		if (ssb_arch_register_fallback_sprom(
+-				&bcm63xx_get_fallback_sprom) < 0)
+-			pr_err(PFX "failed to register fallback SPROM\n");
+-	}
+-#endif
++
++	if (board_get_mac_address(mac) ||
++	    bcm63xx_register_fallback_sprom(mac))
++		pr_err(PFX "failed to register fallback SPROM\n");
+ 
+ 	bcm63xx_spi_register();
+ 
+--- /dev/null
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -0,0 +1,70 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/platform_device.h>
++#include <linux/ssb/ssb.h>
++#include <bcm63xx_fallback_sprom.h>
++#include <board_bcm963xx.h>
++
++#define PFX	"sprom: "
++
++/*
++ * Register a sane SPROMv2 to make the on-board
++ * bcm4318 WLAN work
++ */
++#ifdef CONFIG_SSB_PCIHOST
++static struct ssb_sprom bcm63xx_sprom = {
++	.revision		= 0x02,
++	.board_rev		= 0x17,
++	.country_code		= 0x0,
++	.ant_available_bg	= 0x3,
++	.pa0b0			= 0x15ae,
++	.pa0b1			= 0xfa85,
++	.pa0b2			= 0xfe8d,
++	.pa1b0			= 0xffff,
++	.pa1b1			= 0xffff,
++	.pa1b2			= 0xffff,
++	.gpio0			= 0xff,
++	.gpio1			= 0xff,
++	.gpio2			= 0xff,
++	.gpio3			= 0xff,
++	.maxpwr_bg		= 0x004c,
++	.itssi_bg		= 0x00,
++	.boardflags_lo		= 0x2848,
++	.boardflags_hi		= 0x0000,
++};
++
++int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
++{
++	if (bus->bustype == SSB_BUSTYPE_PCI) {
++		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++		return 0;
++	} else {
++		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
++		return -EINVAL;
++	}
++}
++#endif
++
++int __init bcm63xx_register_fallback_sprom(u8 *mac)
++{
++	int ret = 0;
++
++#ifdef CONFIG_SSB_PCIHOST
++	memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
++	memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
++	memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
++
++	ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
++#endif
++	return ret;
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -0,0 +1,6 @@
++#ifndef __BCM63XX_FALLBACK_SPROM
++#define __BCM63XX_FALLBACK_SPROM
++
++int bcm63xx_register_fallback_sprom(u8 *mac);
++
++#endif
diff --git a/target/linux/brcm63xx/patches-4.1/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch b/target/linux/brcm63xx/patches-4.1/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch
new file mode 100644
index 0000000..cdee70c
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch
@@ -0,0 +1,95 @@
+From 9912a8b3c240a9b0af01ff496b7e8ed9e4cc5b82 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:43:49 +0200
+Subject: [PATCH 02/10] MIPS: BCM63XX: use platform data for the sprom
+
+Similar to ethernet setup, use a platform data struct for passing
+the mac. This eliminates the requirement to allocate an array on
+stack for the mac passed.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_common.c                     | 6 ++----
+ arch/mips/bcm63xx/sprom.c                                   | 8 ++++----
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +++++++-
+ arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h         | 4 ++++
+ 4 files changed, 17 insertions(+), 9 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -142,7 +142,6 @@ static struct platform_device bcm63xx_gp
+ int __init board_register_devices(void)
+ {
+ 	int usbh_ports = 0;
+-	u8 mac[ETH_ALEN];
+ 
+ 	if (board.has_uart0)
+ 		bcm63xx_uart_register(0);
+@@ -188,8 +187,8 @@ int __init board_register_devices(void)
+ 	 * do this after registering enet devices
+ 	 */
+ 
+-	if (board_get_mac_address(mac) ||
+-	    bcm63xx_register_fallback_sprom(mac))
++	if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
++	    bcm63xx_register_fallback_sprom(&board.fallback_sprom))
+ 		pr_err(PFX "failed to register fallback SPROM\n");
+ 
+ 	bcm63xx_spi_register();
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -55,14 +55,14 @@ int bcm63xx_get_fallback_sprom(struct ss
+ }
+ #endif
+ 
+-int __init bcm63xx_register_fallback_sprom(u8 *mac)
++int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
+ {
+ 	int ret = 0;
+ 
+ #ifdef CONFIG_SSB_PCIHOST
+-	memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
+-	memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
+-	memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
++	memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
++	memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
++	memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
+ 
+ 	ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
+ #endif
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -1,6 +1,12 @@
+ #ifndef __BCM63XX_FALLBACK_SPROM
+ #define __BCM63XX_FALLBACK_SPROM
+ 
+-int bcm63xx_register_fallback_sprom(u8 *mac);
++#include <linux/if_ether.h>
++
++struct fallback_sprom_data {
++	u8 mac_addr[ETH_ALEN];
++};
++
++int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
+ 
+ #endif
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -7,6 +7,7 @@
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <bcm63xx_dev_dsp.h>
++#include <bcm63xx_fallback_sprom.h>
+ 
+ /*
+  * flash mapping
+@@ -55,6 +56,9 @@ struct board_info {
+ 	/* External PHY reset GPIO flags from gpio.h */
+ 	unsigned long ephy_reset_gpio_flags;
+ 
++	/* fallback sprom config */
++	struct fallback_sprom_data fallback_sprom;
++
+ 	/* Additional platform devices */
+ 	struct platform_device **devs;
+ 	unsigned int	num_devs;
diff --git a/target/linux/brcm63xx/patches-4.1/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch b/target/linux/brcm63xx/patches-4.1/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch
new file mode 100644
index 0000000..a890ab5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch
@@ -0,0 +1,140 @@
+From 83131acbfb59760a19f3711c09526e191c8aad54 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:52:56 +0200
+Subject: [PATCH 03/10] MIPS: BCM63XX: make fallback sprom optional
+
+Some devices do not provide enough mac addresses to populate wifi in
+addition to ethernet.
+
+Use having pci enabled as a rough heuristic which boards should have it
+enabled.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c           | 12 ++++++++++++
+ arch/mips/bcm63xx/boards/board_common.c             |  5 +++--
+ arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h |  1 +
+ 3 files changed, 16 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -69,6 +69,7 @@ static struct board_info __initdata boar
+ 	.has_uart0			= 1,
+ 	.has_pci			= 1,
+ 	.has_usbd			= 0,
++	.use_fallback_sprom		= 1,
+ 
+ 	.usbd = {
+ 		.use_fullspeed		= 0,
+@@ -218,6 +219,7 @@ static struct board_info __initdata boar
+ 	.has_uart0			= 1,
+ 	.has_enet0			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -263,6 +265,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -323,6 +326,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -377,6 +381,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -435,6 +440,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -458,6 +464,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -476,6 +483,7 @@ static struct board_info __initdata boar
+ 
+ 	.has_uart0			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 	.has_ohci0			= 1,
+ 
+ 	.has_enet0			= 1,
+@@ -498,6 +506,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -524,6 +533,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -576,6 +586,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+@@ -647,6 +658,7 @@ static struct board_info __initdata boar
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
+ 
+ 	.enet0 = {
+ 		.has_phy		= 1,
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -187,8 +187,9 @@ int __init board_register_devices(void)
+ 	 * do this after registering enet devices
+ 	 */
+ 
+-	if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
+-	    bcm63xx_register_fallback_sprom(&board.fallback_sprom))
++	if (board.use_fallback_sprom &&
++	    (board_get_mac_address(board.fallback_sprom.mac_addr) ||
++	     bcm63xx_register_fallback_sprom(&board.fallback_sprom)))
+ 		pr_err(PFX "failed to register fallback SPROM\n");
+ 
+ 	bcm63xx_spi_register();
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -34,6 +34,7 @@ struct board_info {
+ 	unsigned int	has_dsp:1;
+ 	unsigned int	has_uart0:1;
+ 	unsigned int	has_uart1:1;
++	unsigned int	use_fallback_sprom:1;
+ 
+ 	/* ethernet config */
+ 	struct bcm63xx_enet_platform_data enet0;
diff --git a/target/linux/brcm63xx/patches-4.1/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch b/target/linux/brcm63xx/patches-4.1/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch
new file mode 100644
index 0000000..0c4a9be
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch
@@ -0,0 +1,66 @@
+From 1cece9f7aca1f0c193edce201f77a87008c5a405 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:58:38 +0200
+Subject: [PATCH 04/10] MIPS: BCM63XX: allow different types of sprom
+
+Different chips require different sprom contents, so prepare for
+supplying the appropriate sprom type.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c                                   | 13 ++++++++++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h |  5 +++++
+ 2 files changed, 17 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -22,7 +22,7 @@
+  * bcm4318 WLAN work
+  */
+ #ifdef CONFIG_SSB_PCIHOST
+-static struct ssb_sprom bcm63xx_sprom = {
++static __initconst struct ssb_sprom bcm63xx_default_sprom = {
+ 	.revision		= 0x02,
+ 	.board_rev		= 0x17,
+ 	.country_code		= 0x0,
+@@ -43,6 +43,8 @@ static struct ssb_sprom bcm63xx_sprom =
+ 	.boardflags_hi		= 0x0000,
+ };
+ 
++static struct ssb_sprom bcm63xx_sprom;
++
+ int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+ {
+ 	if (bus->bustype == SSB_BUSTYPE_PCI) {
+@@ -60,6 +62,15 @@ int __init bcm63xx_register_fallback_spr
+ 	int ret = 0;
+ 
+ #ifdef CONFIG_SSB_PCIHOST
++	switch (data->type) {
++	case SPROM_DEFAULT:
++		memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
++		       sizeof(bcm63xx_sprom));
++		break;
++	default:
++		return -EINVAL;
++	}
++
+ 	memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -3,8 +3,13 @@
+ 
+ #include <linux/if_ether.h>
+ 
++enum sprom_type {
++	SPROM_DEFAULT, /* default fallback sprom */
++};
++
+ struct fallback_sprom_data {
+ 	u8 mac_addr[ETH_ALEN];
++	enum sprom_type type;
+ };
+ 
+ int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
diff --git a/target/linux/brcm63xx/patches-4.1/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch b/target/linux/brcm63xx/patches-4.1/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch
new file mode 100644
index 0000000..42502eb
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch
@@ -0,0 +1,517 @@
+From cedee63bc73f8b7d45b8c0cba1236986812c1f83 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 22:16:36 +0200
+Subject: [PATCH 05/10] MIPS: BCM63XX: add support for "raw" sproms
+
+Allow using raw sprom content as templates.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 482 ++++++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 482 insertions(+)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -55,13 +55,492 @@ int bcm63xx_get_fallback_sprom(struct ss
+ 		return -EINVAL;
+ 	}
+ }
++
++/* FIXME: use lib_sprom after submission upstream */
++
++/* Get the word-offset for a SSB_SPROM_XXX define. */
++#define SPOFF(offset)	((offset) / sizeof(u16))
++/* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
++#define SPEX16(_outvar, _offset, _mask, _shift)	\
++	out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
++#define SPEX32(_outvar, _offset, _mask, _shift)	\
++	out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \
++			   in[SPOFF(_offset)]) & (_mask)) >> (_shift))
++#define SPEX(_outvar, _offset, _mask, _shift) \
++	SPEX16(_outvar, _offset, _mask, _shift)
++
++#define SPEX_ARRAY8(_field, _offset, _mask, _shift)	\
++	do {	\
++		SPEX(_field[0], _offset +  0, _mask, _shift);	\
++		SPEX(_field[1], _offset +  2, _mask, _shift);	\
++		SPEX(_field[2], _offset +  4, _mask, _shift);	\
++		SPEX(_field[3], _offset +  6, _mask, _shift);	\
++		SPEX(_field[4], _offset +  8, _mask, _shift);	\
++		SPEX(_field[5], _offset + 10, _mask, _shift);	\
++		SPEX(_field[6], _offset + 12, _mask, _shift);	\
++		SPEX(_field[7], _offset + 14, _mask, _shift);	\
++	} while (0)
++
++
++static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in,
++			       u16 mask, u16 shift)
++{
++	u16 v;
++	u8 gain;
++
++	v = in[SPOFF(SSB_SPROM1_AGAIN)];
++	gain = (v & mask) >> shift;
++	if (gain == 0xFF)
++		gain = 2; /* If unset use 2dBm */
++	if (sprom_revision == 1) {
++		/* Convert to Q5.2 */
++		gain <<= 2;
++	} else {
++		/* Q5.2 Fractional part is stored in 0xC0 */
++		gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
++	}
++
++	return (s8)gain;
++}
++
++static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
++{
++	SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
++	SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
++	SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
++	SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
++	SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
++	SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
++	SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
++	SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
++	SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
++	SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
++	     SSB_SPROM2_MAXP_A_LO_SHIFT);
++}
++
++static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
++{
++	u16 loc[3];
++
++	if (out->revision == 3)			/* rev 3 moved MAC */
++		loc[0] = SSB_SPROM3_IL0MAC;
++	else {
++		loc[0] = SSB_SPROM1_IL0MAC;
++		loc[1] = SSB_SPROM1_ET0MAC;
++		loc[2] = SSB_SPROM1_ET1MAC;
++	}
++
++	SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
++	SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
++	     SSB_SPROM1_ETHPHY_ET1A_SHIFT);
++	SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
++	SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
++	SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
++	SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
++	if (out->revision == 1)
++		SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
++		     SSB_SPROM1_BINF_CCODE_SHIFT);
++	SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
++	     SSB_SPROM1_BINF_ANTA_SHIFT);
++	SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
++	     SSB_SPROM1_BINF_ANTBG_SHIFT);
++	SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
++	SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
++	SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
++	SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0);
++	SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0);
++	SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0);
++	SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0);
++	SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1,
++	     SSB_SPROM1_GPIOA_P1_SHIFT);
++	SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0);
++	SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3,
++	     SSB_SPROM1_GPIOB_P3_SHIFT);
++	SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A,
++	     SSB_SPROM1_MAXPWR_A_SHIFT);
++	SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0);
++	SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A,
++	     SSB_SPROM1_ITSSI_A_SHIFT);
++	SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
++	SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
++
++	SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
++	SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
++
++	/* Extract the antenna gain values. */
++	out->antenna_gain.a0 = r123_extract_antgain(out->revision, in,
++						    SSB_SPROM1_AGAIN_BG,
++						    SSB_SPROM1_AGAIN_BG_SHIFT);
++	out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
++						    SSB_SPROM1_AGAIN_A,
++						    SSB_SPROM1_AGAIN_A_SHIFT);
++	if (out->revision >= 2)
++		sprom_extract_r23(out, in);
++}
++
++/* Revs 4 5 and 8 have partially shared layout */
++static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
++{
++	SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
++	     SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
++	SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
++	     SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
++	SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
++	     SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
++	SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
++	     SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
++
++	SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
++	     SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
++	SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
++	     SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
++	SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
++	     SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
++	SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
++	     SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
++
++	SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
++	     SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
++	SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
++	     SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
++	SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
++	     SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
++	SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
++	     SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
++
++	SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
++	     SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
++	SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
++	     SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
++	SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
++	     SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
++	SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
++	     SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
++}
++
++static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
++{
++	u16 il0mac_offset;
++
++	if (out->revision == 4)
++		il0mac_offset = SSB_SPROM4_IL0MAC;
++	else
++		il0mac_offset = SSB_SPROM5_IL0MAC;
++
++	SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
++	SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
++	     SSB_SPROM4_ETHPHY_ET1A_SHIFT);
++	SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
++	SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
++	if (out->revision == 4) {
++		SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
++		SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
++		SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
++		SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
++		SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
++		SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
++	} else {
++		SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
++		SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
++		SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
++		SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
++		SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
++		SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
++	}
++	SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
++	     SSB_SPROM4_ANTAVAIL_A_SHIFT);
++	SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG,
++	     SSB_SPROM4_ANTAVAIL_BG_SHIFT);
++	SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
++	SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
++	     SSB_SPROM4_ITSSI_BG_SHIFT);
++	SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
++	SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
++	     SSB_SPROM4_ITSSI_A_SHIFT);
++	if (out->revision == 4) {
++		SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
++		SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
++		     SSB_SPROM4_GPIOA_P1_SHIFT);
++		SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
++		SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
++		     SSB_SPROM4_GPIOB_P3_SHIFT);
++	} else {
++		SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0);
++		SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1,
++		     SSB_SPROM5_GPIOA_P1_SHIFT);
++		SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0);
++		SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3,
++		     SSB_SPROM5_GPIOB_P3_SHIFT);
++	}
++
++	/* Extract the antenna gain values. */
++	SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01,
++	     SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
++	SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01,
++	     SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
++	SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23,
++	     SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
++	SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23,
++	     SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
++
++	sprom_extract_r458(out, in);
++
++	/* TODO - get remaining rev 4 stuff needed */
++}
++
++static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
++{
++	int i;
++	u16 o;
++	u16 pwr_info_offset[] = {
++		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
++		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
++	};
++	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
++			ARRAY_SIZE(out->core_pwr_info));
++
++	SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
++	SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
++	SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
++	SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
++	SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
++	SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
++	SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
++	SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0);
++	SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
++	     SSB_SPROM8_ANTAVAIL_A_SHIFT);
++	SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
++	     SSB_SPROM8_ANTAVAIL_BG_SHIFT);
++	SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
++	SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
++	     SSB_SPROM8_ITSSI_BG_SHIFT);
++	SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
++	SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
++	     SSB_SPROM8_ITSSI_A_SHIFT);
++	SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
++	SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
++	     SSB_SPROM8_MAXP_AL_SHIFT);
++	SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
++	SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
++	     SSB_SPROM8_GPIOA_P1_SHIFT);
++	SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
++	SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
++	     SSB_SPROM8_GPIOB_P3_SHIFT);
++	SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
++	SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
++	     SSB_SPROM8_TRI5G_SHIFT);
++	SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
++	SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
++	     SSB_SPROM8_TRI5GH_SHIFT);
++	SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0);
++	SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
++	     SSB_SPROM8_RXPO5G_SHIFT);
++	SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
++	SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
++	     SSB_SPROM8_RSSISMC2G_SHIFT);
++	SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
++	     SSB_SPROM8_RSSISAV2G_SHIFT);
++	SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
++	     SSB_SPROM8_BXA2G_SHIFT);
++	SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
++	SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
++	     SSB_SPROM8_RSSISMC5G_SHIFT);
++	SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
++	     SSB_SPROM8_RSSISAV5G_SHIFT);
++	SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
++	     SSB_SPROM8_BXA5G_SHIFT);
++	SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0);
++	SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0);
++	SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0);
++	SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0);
++	SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0);
++	SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0);
++	SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0);
++	SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0);
++	SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0);
++	SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0);
++	SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0);
++	SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0);
++	SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0);
++	SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0);
++	SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0);
++	SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0);
++	SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
++
++	/* Extract the antenna gain values. */
++	SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
++	     SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
++	SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
++	     SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
++	SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
++	     SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
++	SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
++	     SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
++
++	/* Extract cores power info info */
++	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
++		o = pwr_info_offset[i];
++		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
++		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++			SSB_SPROM8_2G_MAXP, 0);
++
++		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
++		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
++		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
++
++		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
++		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++			SSB_SPROM8_5G_MAXP, 0);
++		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
++			SSB_SPROM8_5GH_MAXP, 0);
++		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
++			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
++
++		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
++		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
++	}
++
++	/* Extract FEM info */
++	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
++		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
++	SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
++		SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
++	SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
++		SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
++	SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
++		SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
++	SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
++		SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
++
++	SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
++		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
++	SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
++		SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
++	SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
++		SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
++	SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
++		SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
++	SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
++		SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
++
++	SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
++	     SSB_SPROM8_LEDDC_ON_SHIFT);
++	SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
++	     SSB_SPROM8_LEDDC_OFF_SHIFT);
++
++	SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
++	     SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
++	SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
++	     SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
++	SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
++	     SSB_SPROM8_TXRXC_SWITCH_SHIFT);
++
++	SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
++
++	SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
++	SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
++	SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
++	SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
++
++	SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
++	     SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
++	SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
++	     SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
++	SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
++	     SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
++	     SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
++	SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
++	     SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
++	SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
++	     SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
++	     SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
++	SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
++	     SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
++	     SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
++	SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
++	     SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
++	     SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
++	SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
++	     SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
++
++	SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
++	SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
++	SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
++	SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
++
++	SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
++	     SSB_SPROM8_THERMAL_TRESH_SHIFT);
++	SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
++	     SSB_SPROM8_THERMAL_OFFSET_SHIFT);
++	SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
++	     SSB_SPROM8_TEMPDELTA_PHYCAL,
++	     SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
++	SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
++	     SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
++	SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
++	     SSB_SPROM8_TEMPDELTA_HYSTERESIS,
++	     SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
++	sprom_extract_r458(out, in);
++
++	/* TODO - get remaining rev 8 stuff needed */
++}
++
++static int sprom_extract(struct ssb_sprom *out, const u16 *in, u16 size)
++{
++	memset(out, 0, sizeof(*out));
++
++	out->revision = in[size - 1] & 0x00FF;
++	memset(out->et0mac, 0xFF, 6);		/* preset et0 and et1 mac */
++	memset(out->et1mac, 0xFF, 6);
++
++	switch (out->revision) {
++	case 1:
++	case 2:
++	case 3:
++		sprom_extract_r123(out, in);
++		break;
++	case 4:
++	case 5:
++		sprom_extract_r45(out, in);
++		break;
++	case 8:
++		sprom_extract_r8(out, in);
++		break;
++	default:
++		pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
++			 out->revision);
++		out->revision = 1;
++		sprom_extract_r123(out, in);
++	}
++
++	if (out->boardflags_lo == 0xFFFF)
++		out->boardflags_lo = 0;  /* per specs */
++	if (out->boardflags_hi == 0xFFFF)
++		out->boardflags_hi = 0;  /* per specs */
++
++	return 0;
++}
++
++static __initdata u16 template_sprom[220];
+ #endif
+ 
++
+ int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
+ {
+ 	int ret = 0;
+ 
+ #ifdef CONFIG_SSB_PCIHOST
++	u16 size = 0;
++
+ 	switch (data->type) {
+ 	case SPROM_DEFAULT:
+ 		memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+@@ -71,6 +550,9 @@ int __init bcm63xx_register_fallback_spr
+ 		return -EINVAL;
+ 	}
+ 
++	if (size > 0)
++		sprom_extract(&bcm63xx_sprom, template_sprom, size);
++
+ 	memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
diff --git a/target/linux/brcm63xx/patches-4.1/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch b/target/linux/brcm63xx/patches-4.1/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch
new file mode 100644
index 0000000..65c00b5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch
@@ -0,0 +1,181 @@
+From 7be5bb46003295c9e04fd4e795593b2deaacd783 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 22:33:38 +0200
+Subject: [PATCH 06/10] MIPS: BCM63XX: add raw fallback sproms for most common
+ ssb cards
+
+Add template sproms for BCM4306, BCM4318, BCM4321, BCM4322, and BCM43222.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c                          | 136 +++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h      |   6 +
+ 2 files changed, 142 insertions(+)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -43,6 +43,122 @@ static __initconst struct ssb_sprom bcm6
+ 	.boardflags_hi		= 0x0000,
+ };
+ 
++
++static __initconst u16 bcm4306_sprom[] = {
++	0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
++	0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3034, 0x14d4,
++	0xfa91, 0xfe60, 0xffff, 0xffff, 0x004c, 0xffff, 0xffff, 0xffff,
++	0x003e, 0x0a49, 0xff02, 0x0000, 0xff10, 0xffff, 0xffff, 0x0002,
++};
++
++static __initconst u16 bcm4318_sprom[] = {
++	0x2001, 0x0000, 0x0449, 0x14e4, 0x4318, 0x8000, 0x0002, 0x0000,
++	0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3046, 0x15a7,
++	0xfab0, 0xfe97, 0xffff, 0xffff, 0x0048, 0xffff, 0xffff, 0xffff,
++	0x003e, 0xea49, 0xff02, 0x0000, 0xff08, 0xffff, 0xffff, 0x0002,
++};
++
++static __initconst u16 bcm4321_sprom[] = {
++	0x3001, 0x0000, 0x046c, 0x14e4, 0x4328, 0x8000, 0x0002, 0x0000,
++	0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x5372, 0x0032, 0x4a01, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
++	0xffff, 0x2728, 0x5b5b, 0x222b, 0x5b5b, 0x1927, 0x5b5b, 0x1e36,
++	0x5b5b, 0x303c, 0x3030, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x3e4c, 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0x3e4c,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0x0008, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0004,
++};
++
++static __initconst u16 bcm4322_sprom[] = {
++	0x3001, 0x0000, 0x04bc, 0x14e4, 0x432c, 0x8000, 0x0002, 0x0000,
++	0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x5372, 0x1209, 0x0200, 0x0000, 0x0400, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
++	0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0301,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x2048, 0xfe9a, 0x1571, 0xfabd, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x2048, 0xfeb9, 0x159f, 0xfadd, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x3333, 0x5555, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43222_sprom[] = {
++	0x2001, 0x0000, 0x04d4, 0x14e4, 0x4351, 0x8000, 0x0002, 0x0000,
++	0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x5372, 0x2305, 0x0200, 0x0000, 0x2400, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
++	0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x204c, 0xfea6, 0x1717, 0xfa6d, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x204c, 0xfeb8, 0x167c, 0xfa9e, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x3333, 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333,
++	0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0004, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0008,
++};
++
+ static struct ssb_sprom bcm63xx_sprom;
+ 
+ int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+@@ -542,6 +658,26 @@ int __init bcm63xx_register_fallback_spr
+ 	u16 size = 0;
+ 
+ 	switch (data->type) {
++	case SPROM_BCM4306:
++		memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
++		size = ARRAY_SIZE(bcm4306_sprom);
++		break;
++	case SPROM_BCM4318:
++		memcpy(&template_sprom, &bcm4318_sprom, sizeof(bcm4318_sprom));
++		size = ARRAY_SIZE(bcm4318_sprom);
++		break;
++	case SPROM_BCM4321:
++		memcpy(&template_sprom, &bcm4321_sprom, sizeof(bcm4321_sprom));
++		size = ARRAY_SIZE(bcm4321_sprom);
++		break;
++	case SPROM_BCM4322:
++		memcpy(&template_sprom, &bcm4322_sprom, sizeof(bcm4322_sprom));
++		size = ARRAY_SIZE(bcm4322_sprom);
++		break;
++	case SPROM_BCM43222:
++		memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
++		size = ARRAY_SIZE(bcm43222_sprom);
++		break;
+ 	case SPROM_DEFAULT:
+ 		memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+ 		       sizeof(bcm63xx_sprom));
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -5,6 +5,12 @@
+ 
+ enum sprom_type {
+ 	SPROM_DEFAULT, /* default fallback sprom */
++	/* SSB based */
++	SPROM_BCM4306,
++	SPROM_BCM4318,
++	SPROM_BCM4321,
++	SPROM_BCM4322,
++	SPROM_BCM43222,
+ };
+ 
+ struct fallback_sprom_data {
diff --git a/target/linux/brcm63xx/patches-4.1/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch b/target/linux/brcm63xx/patches-4.1/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch
new file mode 100644
index 0000000..6475f9f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch
@@ -0,0 +1,128 @@
+From 03feb9db77fba3eef3d83e17a87a56979659b248 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 22:48:26 +0200
+Subject: [PATCH 07/10] MIPS: BCM63XX: also register a fallback sprom for bcma
+
+Similar to SSB, register a fallback sprom handler for BCMA.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Kconfig |  1 +
+ arch/mips/bcm63xx/sprom.c        | 40 +++++++++++++++++++++++++++++++++++-----
+ 2 files changed, 36 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -4,6 +4,7 @@ menu "Board support"
+ config BOARD_BCM963XX
+        bool "Generic Broadcom 963xx boards"
+ 	select SSB
++	select BCMA
+ 	default y
+        help
+ 
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -12,6 +12,7 @@
+ #include <linux/string.h>
+ #include <linux/platform_device.h>
+ #include <linux/ssb/ssb.h>
++#include <linux/bcma/bcma.h>
+ #include <bcm63xx_fallback_sprom.h>
+ #include <board_bcm963xx.h>
+ 
+@@ -21,7 +22,7 @@
+  * Register a sane SPROMv2 to make the on-board
+  * bcm4318 WLAN work
+  */
+-#ifdef CONFIG_SSB_PCIHOST
++#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
+ static __initconst struct ssb_sprom bcm63xx_default_sprom = {
+ 	.revision		= 0x02,
+ 	.board_rev		= 0x17,
+@@ -43,7 +44,7 @@ static __initconst struct ssb_sprom bcm6
+ 	.boardflags_hi		= 0x0000,
+ };
+ 
+-
++#if defined (CONFIG_SSB_PCIHOST)
+ static __initconst u16 bcm4306_sprom[] = {
+ 	0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
+ 	0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
+@@ -158,10 +159,12 @@ static __initconst u16 bcm43222_sprom[]
+ 	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
+ 	0xffff, 0xffff, 0xffff, 0x0008,
+ };
++#endif /* CONFIG_SSB_PCIHOST */
+ 
+ static struct ssb_sprom bcm63xx_sprom;
+ 
+-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
++#if defined(CONFIG_SSB_PCIHOST)
++int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+ {
+ 	if (bus->bustype == SSB_BUSTYPE_PCI) {
+ 		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
+@@ -171,6 +174,20 @@ int bcm63xx_get_fallback_sprom(struct ss
+ 		return -EINVAL;
+ 	}
+ }
++#endif
++
++#if defined(CONFIG_BCMA_HOST_PCI)
++int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
++{
++	if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
++		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++		return 0;
++	} else {
++		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
++		return -EINVAL;
++	}
++}
++#endif
+ 
+ /* FIXME: use lib_sprom after submission upstream */
+ 
+@@ -654,10 +671,11 @@ int __init bcm63xx_register_fallback_spr
+ {
+ 	int ret = 0;
+ 
+-#ifdef CONFIG_SSB_PCIHOST
++#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
+ 	u16 size = 0;
+ 
+ 	switch (data->type) {
++#if defined(CONFIG_SSB_PCIHOST)
+ 	case SPROM_BCM4306:
+ 		memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
+ 		size = ARRAY_SIZE(bcm4306_sprom);
+@@ -678,6 +696,7 @@ int __init bcm63xx_register_fallback_spr
+ 		memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
+ 		size = ARRAY_SIZE(bcm43222_sprom);
+ 		break;
++#endif
+ 	case SPROM_DEFAULT:
+ 		memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+ 		       sizeof(bcm63xx_sprom));
+@@ -692,8 +711,19 @@ int __init bcm63xx_register_fallback_spr
+ 	memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
++#endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
++
++#if defined(CONFIG_SSB_PCIHOST)
++	ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_ssb_sprom);
++	if (ret)
++		return ret;
++
++#endif
+ 
+-	ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
++#if defined(CONFIG_BCMA_HOST_PCI)
++	ret = bcma_arch_register_fallback_sprom(bcm63xx_get_fallback_bcma_sprom);
++	if (ret)
++		return ret;
+ #endif
+ 	return ret;
+ }
diff --git a/target/linux/brcm63xx/patches-4.1/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch b/target/linux/brcm63xx/patches-4.1/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch
new file mode 100644
index 0000000..5c0abb9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch
@@ -0,0 +1,303 @@
+From 27bf70e3fe797691b17df07ecbfaf9f5a4419f49 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Wed, 30 Jul 2014 23:14:27 +0200
+Subject: [PATCH 08/10] MIPS: BCM63XX: add BCMA based sprom templates
+
+Add fallback sproms for BCM4313, BCM43131, BCM43217, BCM43225, BCM43227,
+BCM43228, and BCM4331.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c                          | 256 +++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h      |   8 +
+ 2 files changed, 264 insertions(+)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -161,6 +161,226 @@ static __initconst u16 bcm43222_sprom[]
+ };
+ #endif /* CONFIG_SSB_PCIHOST */
+ 
++#if defined(CONFIG_BCMA_HOST_PCI)
++static __initconst u16 bcm4313_sprom[] = {
++	0x2801, 0x0000, 0x0510, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x4727, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x5372, 0x1215, 0x2a00, 0x0800, 0x0800, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
++	0xffff, 0x0011, 0x007a, 0x0000, 0x0000, 0x0000, 0x0000, 0x0201,
++	0x0000, 0x7800, 0x7c0a, 0x0398, 0x0008, 0x0000, 0x0000, 0x0000,
++	0x0044, 0x1684, 0xfd0d, 0xff35, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0048, 0xfed2, 0x15d9, 0xfac6, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0008,
++};
++
++static __initconst u16 bcm43131_sprom[] = {
++	0x2801, 0x0000, 0x05f7, 0x14e4, 0x0070, 0xedbe, 0x1c00, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x43aa, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x5372, 0x1280, 0x0200, 0x0000, 0x8800, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0002, 0x0202,
++	0xffff, 0x0022, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
++	0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
++	0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43217_sprom[] = {
++	0x2801, 0x0000, 0x05e9, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x43a9, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x5372, 0x1252, 0x0200, 0x0000, 0x9800, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
++	0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
++	0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
++	0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x7a08,
++};
++
++static __initconst u16 bcm43225_sprom[] = {
++	0x2801, 0x0000, 0x04da, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0x1008, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x4357, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x5372, 0x1200, 0x0200, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x88ff, 0xffff, 0xffff, 0x0303, 0x0202,
++	0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
++	0xffff, 0x7800, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x204e, 0xfead, 0x1611, 0xfa9a, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x204e, 0xfec1, 0x1674, 0xfab2, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555,
++	0x7555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0002, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43227_sprom[] = {
++	0x2801, 0x0000, 0x0543, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x4358, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x5372, 0x1402, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
++	0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
++	0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xff36, 0x16d2, 0xfaae, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xfeca, 0x159b, 0xfa80, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
++	0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43228_sprom[] = {
++	0x2801, 0x0000, 0x0011, 0x1028, 0x0070, 0xedbe, 0x0000, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x4359, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x5372, 0x1203, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0303, 0x0202,
++	0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0215,
++	0x0215, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x204c, 0xff73, 0x1762, 0xfaa4, 0x3e34, 0x3434, 0xfea1, 0x154c,
++	0xfad0, 0xfea1, 0x144c, 0xfafb, 0xfe7b, 0x13fe, 0xfafc, 0x0000,
++	0x204c, 0xff41, 0x16a3, 0xfa8f, 0x3e34, 0x3434, 0xfe97, 0x1446,
++	0xfb05, 0xfe97, 0x1346, 0xfb32, 0xfeb9, 0x1516, 0xfaee, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x8888, 0x8888, 0x8888,
++	0x8888, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
++	0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
++	0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
++	0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xf008,
++};
++
++static __initconst u16 bcm4331_sprom[] = {
++	0x2801, 0x0000, 0x0525, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
++	0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++	0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++	0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0x1010, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x4331, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x5372, 0x1104, 0x0200, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0xffff, 0x88ff, 0xffff, 0x0707, 0x0202,
++	0xff02, 0x0077, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
++	0x0325, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x2048, 0xfe56, 0x16f2, 0xfa44, 0x3e3c, 0x3c3c, 0xfe77, 0x1657,
++	0xfa75, 0xffff, 0xffff, 0xffff, 0xfe76, 0x15da, 0xfa85, 0x0000,
++	0x2048, 0xfe5c, 0x16b5, 0xfa56, 0x3e3c, 0x3c3c, 0xfe7c, 0x169d,
++	0xfa6b, 0xffff, 0xffff, 0xffff, 0xfe7a, 0x1597, 0xfa97, 0x0000,
++	0x2048, 0xfe68, 0x1734, 0xfa46, 0x3e3c, 0x3c3c, 0xfe7f, 0x15e4,
++	0xfa94, 0xffff, 0xffff, 0xffff, 0xfe7d, 0x1582, 0xfa9f, 0x0000,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++	0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++	0xffff, 0xffff, 0xffff, 0x0009,
++};
++
++#endif  /* CONFIG_BCMA_HOST_PCI */
++
+ static struct ssb_sprom bcm63xx_sprom;
+ 
+ #if defined(CONFIG_SSB_PCIHOST)
+@@ -697,6 +917,42 @@ int __init bcm63xx_register_fallback_spr
+ 		size = ARRAY_SIZE(bcm43222_sprom);
+ 		break;
+ #endif
++#if defined(CONFIG_BCMA_HOST_PCI)
++	case SPROM_BCM4313:
++		memcpy(&template_sprom, &bcm4313_sprom,
++                       sizeof(bcm4313_sprom));
++		size = ARRAY_SIZE(bcm4313_sprom);
++		break;
++	case SPROM_BCM43131:
++		memcpy(&template_sprom, &bcm43131_sprom,
++		       sizeof(bcm43131_sprom));
++		size = ARRAY_SIZE(bcm43131_sprom);
++		break;
++	case SPROM_BCM43217:
++		memcpy(&template_sprom, &bcm43217_sprom,
++		       sizeof(bcm43217_sprom));
++		size = ARRAY_SIZE(bcm43217_sprom);
++		break;
++	case SPROM_BCM43225:
++		memcpy(&template_sprom, &bcm43225_sprom,
++		       sizeof(bcm43225_sprom));
++		size = ARRAY_SIZE(bcm43225_sprom);
++		break;
++	case SPROM_BCM43227:
++		memcpy(&template_sprom, &bcm43227_sprom,
++		       sizeof(bcm43227_sprom));
++		size = ARRAY_SIZE(bcm43227_sprom);
++		break;
++	case SPROM_BCM43228:
++		memcpy(&template_sprom, &bcm43228_sprom,
++		       sizeof(bcm43228_sprom));
++		size = ARRAY_SIZE(bcm43228_sprom);
++		break;
++	case SPROM_BCM4331:
++		memcpy(&template_sprom, &bcm4331_sprom, sizeof(&bcm4331_sprom));
++		size = ARRAY_SIZE(bcm4331_sprom);
++		break;
++#endif
+ 	case SPROM_DEFAULT:
+ 		memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+ 		       sizeof(bcm63xx_sprom));
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -11,6 +11,14 @@ enum sprom_type {
+ 	SPROM_BCM4321,
+ 	SPROM_BCM4322,
+ 	SPROM_BCM43222,
++	/* BCMA based */
++	SPROM_BCM4313,
++	SPROM_BCM43131,
++	SPROM_BCM43217,
++	SPROM_BCM43225,
++	SPROM_BCM43227,
++	SPROM_BCM43228,
++	SPROM_BCM4331,
+ };
+ 
+ struct fallback_sprom_data {
diff --git a/target/linux/brcm63xx/patches-4.1/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch b/target/linux/brcm63xx/patches-4.1/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch
new file mode 100644
index 0000000..74c2846
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch
@@ -0,0 +1,67 @@
+From 8575548b08e33c9ff4fd540abec09dd177e33682 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 31 Jul 2014 19:12:33 +0200
+Subject: [PATCH 09/10] MIPS: BCM63XX: allow board files to provide sprom
+ fixups
+
+Allow board_info files to supply fixups for the base sproms to adapt
+them to the actual used sprom contents in case they do not use the
+default ones.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c                                  | 14 +++++++++++++-
+ .../mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h |  8 ++++++++
+ 2 files changed, 21 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -883,6 +883,14 @@ static int sprom_extract(struct ssb_spro
+ 	return 0;
+ }
+ 
++void sprom_apply_fixups(u16 *sprom, struct sprom_fixup *fixups, int n)
++{
++	unsigned int i;
++
++	for (i = 0; i < n; i++)
++		sprom[fixups[i].offset] = fixups[i].value;
++}
++
+ static __initdata u16 template_sprom[220];
+ #endif
+ 
+@@ -961,8 +969,12 @@ int __init bcm63xx_register_fallback_spr
+ 		return -EINVAL;
+ 	}
+ 
+-	if (size > 0)
++	if (size > 0) {
++		sprom_apply_fixups(template_sprom, data->board_fixups,
++				   data->num_board_fixups);
++
+ 		sprom_extract(&bcm63xx_sprom, template_sprom, size);
++	}
+ 
+ 	memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ 	memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -21,9 +21,17 @@ enum sprom_type {
+ 	SPROM_BCM4331,
+ };
+ 
++struct sprom_fixup {
++	u16 offset;
++	u16 value;
++};
++
+ struct fallback_sprom_data {
+ 	u8 mac_addr[ETH_ALEN];
+ 	enum sprom_type type;
++
++	struct sprom_fixup *board_fixups;
++	unsigned int num_board_fixups;
+ };
+ 
+ int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
diff --git a/target/linux/brcm63xx/patches-4.1/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch b/target/linux/brcm63xx/patches-4.1/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch
new file mode 100644
index 0000000..40591e5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch
@@ -0,0 +1,102 @@
+From f393eaacf178e7e8a61eb11a96edd7dfb35cb49d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 31 Jul 2014 20:39:44 +0200
+Subject: [PATCH 10/10] MIPS: BCM63XX: allow setting a pci bus/device for
+ fallback sprom
+
+Warn if the set pci bus/slot does not match the actual request.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c                          | 31 ++++++++++++++++++----
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h      |  3 +++
+ 2 files changed, 29 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -381,13 +381,25 @@ static __initconst u16 bcm4331_sprom[] =
+ 
+ #endif  /* CONFIG_BCMA_HOST_PCI */
+ 
+-static struct ssb_sprom bcm63xx_sprom;
++struct fallback_sprom_match {
++	u8 pci_bus;
++	u8 pci_dev;
++	struct ssb_sprom sprom;
++};
++
++static struct fallback_sprom_match fallback_sprom;
+ 
+ #if defined(CONFIG_SSB_PCIHOST)
+ int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+ {
+ 	if (bus->bustype == SSB_BUSTYPE_PCI) {
+-		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++		if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
++		    PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
++			pr_warn("ssb_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
++				fallback_sprom.pci_bus, fallback_sprom.pci_dev,
++				bus->host_pci->bus->number,
++				PCI_SLOT(bus->host_pci->devfn));
++		memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
+ 		return 0;
+ 	} else {
+ 		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+@@ -400,7 +412,13 @@ int bcm63xx_get_fallback_ssb_sprom(struc
+ int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
+ {
+ 	if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
+-		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++		if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
++		    PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
++			pr_warn("bcma_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
++				fallback_sprom.pci_bus, fallback_sprom.pci_dev,
++				bus->host_pci->bus->number,
++				PCI_SLOT(bus->host_pci->devfn));
++		memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
+ 		return 0;
+ 	} else {
+ 		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+@@ -962,8 +980,8 @@ int __init bcm63xx_register_fallback_spr
+ 		break;
+ #endif
+ 	case SPROM_DEFAULT:
+-		memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+-		       sizeof(bcm63xx_sprom));
++		memcpy(&fallback_sprom.sprom, &bcm63xx_default_sprom,
++		       sizeof(bcm63xx_default_sprom));
+ 		break;
+ 	default:
+ 		return -EINVAL;
+@@ -973,12 +991,15 @@ int __init bcm63xx_register_fallback_spr
+ 		sprom_apply_fixups(template_sprom, data->board_fixups,
+ 				   data->num_board_fixups);
+ 
+-		sprom_extract(&bcm63xx_sprom, template_sprom, size);
++		sprom_extract(&fallback_sprom.sprom, template_sprom, size);
+ 	}
+ 
+-	memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+-	memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+-	memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
++	memcpy(fallback_sprom.sprom.il0mac, data->mac_addr, ETH_ALEN);
++	memcpy(fallback_sprom.sprom.et0mac, data->mac_addr, ETH_ALEN);
++	memcpy(fallback_sprom.sprom.et1mac, data->mac_addr, ETH_ALEN);
++
++	fallback_sprom.pci_bus = data->pci_bus;
++	fallback_sprom.pci_dev = data->pci_dev;
+ #endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
+ 
+ #if defined(CONFIG_SSB_PCIHOST)
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -30,6 +30,9 @@ struct fallback_sprom_data {
+ 	u8 mac_addr[ETH_ALEN];
+ 	enum sprom_type type;
+ 
++	u8 pci_bus;
++	u8 pci_dev;
++
+ 	struct sprom_fixup *board_fixups;
+ 	unsigned int num_board_fixups;
+ };
diff --git a/target/linux/brcm63xx/patches-4.1/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch b/target/linux/brcm63xx/patches-4.1/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch
new file mode 100644
index 0000000..5ab76e4
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch
@@ -0,0 +1,119 @@
+From 26546e5499d98616322fb3472b977e2e86603f3a Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 24 Jun 2014 10:57:51 +0200
+Subject: [PATCH 45/48] MIPS: BCM63XX: add support for loading DTB
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Kconfig        |    4 ++++
+ arch/mips/bcm63xx/boards/board_common.c |   34 +++++++++++++++++++++++++++++++
+ arch/mips/bcm63xx/prom.c                |    6 ++++++
+ 3 files changed, 44 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -1,6 +1,10 @@
+ menu "Board support"
+ 	depends on BCM63XX
+ 
++config BOARD_BCM63XX_DT
++	bool "Device Tree boards (experimential)"
++	select USE_OF
++
+ config BOARD_BCM963XX
+        bool "Generic Broadcom 963xx boards"
+ 	select SSB
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -10,12 +10,15 @@
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
++#include <linux/of_fdt.h>
++#include <linux/of_platform.h>
+ #include <linux/platform_device.h>
+ #include <linux/ssb/ssb.h>
+ #include <linux/spi/spi.h>
+ #include <asm/addrspace.h>
+ #include <asm/bootinfo.h>
+ #include <asm/fw/cfe/cfe_api.h>
++#include <asm/prom.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_uart.h>
+@@ -126,8 +129,23 @@ void __init board_setup(void)
+ 	/* make sure we're running on expected cpu */
+ 	if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
+ 		panic("unexpected CPU for bcm963xx board");
++
++#if CONFIG_OF
++	if (initial_boot_params)
++		__dt_setup_arch(initial_boot_params);
++#endif
+ }
+ 
++#if CONFIG_OF
++void __init device_tree_init(void)
++{
++	if (!initial_boot_params)
++		return;
++
++	unflatten_and_copy_device_tree();
++}
++#endif
++
+ static struct gpio_led_platform_data bcm63xx_led_data;
+ 
+ static struct platform_device bcm63xx_gpio_leds = {
+@@ -136,6 +154,13 @@ static struct platform_device bcm63xx_gp
+ 	.dev.platform_data	= &bcm63xx_led_data,
+ };
+ 
++#if CONFIG_OF
++static struct of_device_id of_ids[] = {
++	{ /* filled at runtime */ },
++	{ .compatible = "simple-bus" },
++	{ },
++};
++#endif
+ /*
+  * third stage init callback, register all board devices.
+  */
+@@ -143,6 +168,15 @@ int __init board_register_devices(void)
+ {
+ 	int usbh_ports = 0;
+ 
++#if CONFIG_OF
++	if (of_have_populated_dt()) {
++		snprintf(of_ids[0].compatible, sizeof(of_ids[0].compatible),
++			 "brcm,bcm%x", bcm63xx_get_cpu_id());
++
++		of_platform_populate(NULL, of_ids, NULL, NULL);
++	}
++#endif
++
+ 	if (board.has_uart0)
+ 		bcm63xx_uart_register(0);
+ 
+--- a/arch/mips/bcm63xx/prom.c
++++ b/arch/mips/bcm63xx/prom.c
+@@ -8,6 +8,7 @@
+ 
+ #include <linux/init.h>
+ #include <linux/bootmem.h>
++#include <linux/of_fdt.h>
+ #include <linux/smp.h>
+ #include <asm/bootinfo.h>
+ #include <asm/bmips.h>
+@@ -23,6 +24,11 @@ void __init prom_init(void)
+ {
+ 	u32 reg, mask;
+ 
++#if CONFIG_OF
++	if (fw_arg0 == -2)
++		early_init_dt_verify((void *)fw_arg1);
++#endif
++
+ 	bcm63xx_cpu_init();
+ 
+ 	/* stop any running watchdog */
diff --git a/target/linux/brcm63xx/patches-4.1/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch b/target/linux/brcm63xx/patches-4.1/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch
new file mode 100644
index 0000000..fd280d8
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch
@@ -0,0 +1,95 @@
+From 25bf2b5836c892f091651d8a3384c9c57ce1b400 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 26 Jun 2014 12:51:00 +0200
+Subject: [PATCH 46/48] MIPS: BCM63XX: add support for matching the board_info
+ by dtb
+
+Allow using the passed dtb's compatible property to match board_info
+structs instead of nvram's boardname field, which is not unique anyway.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |   15 +++++++++++++++
+ arch/mips/bcm63xx/boards/board_common.c   |   18 ++++++++++++++++++
+ arch/mips/bcm63xx/boards/board_common.h   |    3 +++
+ 3 files changed, 36 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -710,6 +710,10 @@ static const struct board_info __initcon
+ #endif
+ };
+ 
++static struct of_device_id const bcm963xx_boards_dt[] = {
++	{ },
++};
++
+ /*
+  * early init callback, read nvram data from flash and checksum it
+  */
+@@ -721,6 +725,7 @@ void __init board_bcm963xx_init(void)
+ 	char *board_name = NULL;
+ 	u32 val;
+ 	struct bcm_hcs *hcs;
++	const struct of_device_id *board_match;
+ 
+ 	/* read base address of boot chip select (0)
+ 	 * 6328/6362 do not have MPI but boot from a fixed address
+@@ -760,6 +765,16 @@ void __init board_bcm963xx_init(void)
+ 	} else {
+ 		board_name = bcm63xx_nvram_get_name();
+ 	}
++
++	/* find board by compat */
++	board_match = bcm63xx_match_board(bcm963xx_boards_dt);
++	if (board_match) {
++		board_early_setup(board_match->data,
++				  bcm63xx_nvram_get_mac_address);
++
++		return;
++	}
++
+ 	/* find board by name */
+ 	for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
+ 		if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -249,3 +249,21 @@ int __init board_register_devices(void)
+ 
+ 	return 0;
+ }
++
++const struct of_device_id * __init bcm63xx_match_board(const struct of_device_id *m)
++{
++	const struct of_device_id *match;
++	unsigned long dt_root;
++
++	if (!IS_ENABLED(CONFIG_OF) || !initial_boot_params)
++		return NULL;
++
++	dt_root = of_get_flat_dt_root();
++
++	for (match = m; match->compatible[0]; match++) {
++		if (of_flat_dt_is_compatible(dt_root, match->compatible))
++			return match;
++	}
++
++	return NULL;
++}
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -1,11 +1,14 @@
+ #ifndef __BOARD_COMMON_H
+ #define __BOARD_COMMON_H
+ 
++#include <linux/of.h>
+ #include <board_bcm963xx.h>
+ 
+ void board_early_setup(const struct board_info *board,
+ 		       int (*get_mac_address)(u8 mac[ETH_ALEN]));
+ 
++const struct of_device_id *bcm63xx_match_board(const struct of_device_id *);
++
+ #if defined(CONFIG_BOARD_BCM963XX)
+ void board_bcm963xx_init(void);
+ #else
diff --git a/target/linux/brcm63xx/patches-4.1/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch b/target/linux/brcm63xx/patches-4.1/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch
new file mode 100644
index 0000000..653f9fd
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch
@@ -0,0 +1,65 @@
+From e71eea9953c774dfadb754258824fb1888c279f4 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 21 Nov 2014 16:54:06 +0100
+Subject: [PATCH 47/48] MIPS: BCM63XX: populate the compatible to board_info
+ list
+
+Populate the compatible to board_info list to allow dtbs to be used
+for known boards.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |   34 +++++++++++++++++++++++++++++
+ 1 file changed, 34 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -711,6 +711,48 @@ static const struct board_info __initcon
+ };
+ 
+ static struct of_device_id const bcm963xx_boards_dt[] = {
++#ifdef CONFIG_OF
++#ifdef CONFIG_BCM63XX_CPU_3368
++	{ .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6328
++	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6338
++	{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
++	{ .compatible = "brcm,bcm96338w", .data = &board_96338w, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6345
++	{ .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6348
++	{ .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
++	{ .compatible = "brcm,bcm96348r", .data = &board_96348r, },
++	{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
++	{ .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
++	{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
++	{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
++	{ .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
++	{ .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
++	{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
++	{ .compatible = "usr,9108", .data = &board_96348gw_a, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6358
++	{ .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
++	{ .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
++	{ .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
++	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
++	{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
++	{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
++	{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
++	{ .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6368
++#endif
++#ifdef CONFIG_BCM63XX_CPU_63268
++#endif
++#endif /* CONFIG_OF */
+ 	{ },
+ };
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/371_add_of_node_available_by_alias.patch b/target/linux/brcm63xx/patches-4.1/371_add_of_node_available_by_alias.patch
new file mode 100644
index 0000000..dbe1a41
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/371_add_of_node_available_by_alias.patch
@@ -0,0 +1,37 @@
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -144,6 +144,18 @@ void __init device_tree_init(void)
+ 
+ 	unflatten_and_copy_device_tree();
+ }
++
++int board_of_device_present(const char *alias)
++{
++	bool present;
++	struct device_node *np;
++
++	np = of_find_node_by_path(alias);
++	present = of_device_is_available(np);
++	of_node_put(np);
++
++	return present;
++}
+ #endif
+ 
+ static struct gpio_led_platform_data bcm63xx_led_data;
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -15,4 +15,13 @@ void board_bcm963xx_init(void);
+ static inline void board_bcm963xx_init(void) { }
+ #endif
+ 
++#if defined(CONFIG_OF)
++int board_of_device_present(const char *alias);
++#else
++static inline void board_of_device_present(const char *alias)
++{
++	return 0;
++}
++#endif
++
+ #endif /* __BOARD_COMMON_H */
diff --git a/target/linux/brcm63xx/patches-4.1/372_dont_register_pflash_when_available_in_dtb.patch b/target/linux/brcm63xx/patches-4.1/372_dont_register_pflash_when_available_in_dtb.patch
new file mode 100644
index 0000000..25384eb
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/372_dont_register_pflash_when_available_in_dtb.patch
@@ -0,0 +1,21 @@
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -23,6 +23,8 @@
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+ 
++#include "boards/board_common.h"
++
+ static int flash_type;
+ 
+ static struct mtd_partition mtd_partitions[] = {
+@@ -178,6 +180,9 @@ int __init bcm63xx_flash_register(void)
+ 
+ 	switch (flash_type) {
+ 	case BCM63XX_FLASH_TYPE_PARALLEL:
++		/* don't register when already registered through from dtb */
++		if (board_of_device_present("pflash"))
++			return 0;
+ 
+ 		if (!mtd_resources[0].start) {
+ 			/* read base address of boot chip select (0) */
diff --git a/target/linux/brcm63xx/patches-4.1/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch b/target/linux/brcm63xx/patches-4.1/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch
new file mode 100644
index 0000000..555352e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch
@@ -0,0 +1,45 @@
+From 8a0803979163c647736cb234ee1620c049c4915c Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 1 Dec 2014 00:20:07 +0100
+Subject: [PATCH 5/5] MIPS: BCM63XX: register interrupt controllers through DT
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c |   12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -15,6 +15,8 @@
+ #include <linux/irqchip.h>
+ #include <linux/irqchip/irq-bcm6345-ext.h>
+ #include <linux/irqchip/irq-bcm6345-periph.h>
++#include <linux/of.h>
++#include <linux/of_fdt.h>
+ #include <asm/irq_cpu.h>
+ #include <asm/mipsregs.h>
+ #include <bcm63xx_cpu.h>
+@@ -22,6 +24,9 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
+ 
++IRQCHIP_DECLARE(mips_cpu_intc, "mti,cpu-interrupt-controller",
++	     mips_cpu_irq_of_init);
++
+ void __init arch_init_irq(void)
+ {
+ 	void __iomem *periph_bases[2];
+@@ -30,6 +35,13 @@ void __init arch_init_irq(void)
+ 	int periph_irqs[2] = { 2, 3 };
+ 	int ext_irqs[6];
+ 
++#ifdef CONFIG_OF
++	if (initial_boot_params) {
++		irqchip_init();
++		return;
++	}
++#endif
++
+ 	periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+ 	periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+ 	ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
diff --git a/target/linux/brcm63xx/patches-4.1/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch b/target/linux/brcm63xx/patches-4.1/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch
new file mode 100644
index 0000000..f80818d
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch
@@ -0,0 +1,165 @@
+From dbe94a8daaa63ef81b7414f2a17bca8e36dd6daa Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 20 Feb 2015 19:55:32 +0100
+Subject: [PATCH 1/6] gpio: add a simple GPIO driver for bcm63xx
+
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/gpio/Kconfig        |    8 +++
+ drivers/gpio/Makefile       |    1 +
+ drivers/gpio/gpio-bcm63xx.c |  122 +++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 131 insertions(+)
+ create mode 100644 drivers/gpio/gpio-bcm63xx.c
+
+--- a/drivers/gpio/Kconfig
++++ b/drivers/gpio/Kconfig
+@@ -126,6 +126,13 @@ config GPIO_BCM_KONA
+ 	help
+ 	  Turn on GPIO support for Broadcom "Kona" chips.
+ 
++config GPIO_BCM63XX
++	bool "Broadcom BCM63XX GPIO"
++	depends on MIPS || COMPILE_TEST
++	select GPIO_GENERIC
++	help
++	  Turn on GPIO support for Broadcom BCM63XX xDSL chips.
++
+ config GPIO_CLPS711X
+ 	tristate "CLPS711X GPIO support"
+ 	depends on ARCH_CLPS711X || COMPILE_TEST
+--- a/drivers/gpio/Makefile
++++ b/drivers/gpio/Makefile
+@@ -21,6 +21,7 @@ obj-$(CONFIG_GPIO_ALTERA)  	+= gpio-alte
+ obj-$(CONFIG_GPIO_AMD8111)	+= gpio-amd8111.o
+ obj-$(CONFIG_GPIO_ARIZONA)	+= gpio-arizona.o
+ obj-$(CONFIG_GPIO_BCM_KONA)	+= gpio-bcm-kona.o
++obj-$(CONFIG_GPIO_BCM63XX)	+= gpio-bcm63xx.o
+ obj-$(CONFIG_GPIO_BT8XX)	+= gpio-bt8xx.o
+ obj-$(CONFIG_GPIO_CLPS711X)	+= gpio-clps711x.o
+ obj-$(CONFIG_GPIO_CS5535)	+= gpio-cs5535.o
+--- /dev/null
++++ b/drivers/gpio/gpio-bcm63xx.c
+@@ -0,0 +1,122 @@
++/*
++ * Driver for BCM63XX memory-mapped GPIO controllers, based on
++ * Generic driver for memory-mapped GPIO controllers.
++ *
++ * Copyright 2008 MontaVista Software, Inc.
++ * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
++ * Copyright 2015 Jonas Gorski <jogo@openwrt.org>
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of  the GNU General  Public License as published by the
++ * Free Software Foundation;  either version 2 of the  License, or (at your
++ * option) any later version.
++ */
++
++#include <linux/init.h>
++#include <linux/err.h>
++#include <linux/bug.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/spinlock.h>
++#include <linux/compiler.h>
++#include <linux/types.h>
++#include <linux/errno.h>
++#include <linux/log2.h>
++#include <linux/ioport.h>
++#include <linux/io.h>
++#include <linux/gpio.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++#include <linux/mod_devicetable.h>
++#include <linux/basic_mmio_gpio.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++
++static int bcm63xx_gpio_probe(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	struct resource *dat_r, *dirout_r;
++	void __iomem *dat;
++	void __iomem *dirout;
++	unsigned long sz;
++	int err;
++	struct bgpio_chip *bgc;
++	struct bgpio_pdata *pdata = dev_get_platdata(dev);
++
++	dirout_r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	dat_r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
++	if (!dat_r || !dirout_r)
++		return -EINVAL;
++
++	if (resource_size(dat_r) != resource_size(dirout_r))
++		return -EINVAL;
++
++	sz = resource_size(dat_r);
++
++	dat = devm_ioremap_resource(dev, dat_r);
++	if (IS_ERR(dat))
++		return PTR_ERR(dat);
++
++	dirout = devm_ioremap_resource(dev, dirout_r);
++	if (IS_ERR(dirout))
++		return PTR_ERR(dirout);
++
++	bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL);
++	if (!bgc)
++		return -ENOMEM;
++
++	err = bgpio_init(bgc, dev, sz, dat, NULL, NULL, dirout, NULL,
++			 BGPIOF_BIG_ENDIAN_BYTE_ORDER);
++	if (err)
++		return err;
++
++	platform_set_drvdata(pdev, bgc);
++
++	if (dev->of_node) {
++		int id = of_alias_get_id(dev->of_node, "gpio");
++		u32 ngpios;
++
++		if (id >= 0)
++			bgc->gc.label = devm_kasprintf(dev, GFP_KERNEL,
++						       "bcm63xx-gpio.%d", id);
++
++		if (!of_property_read_u32(dev->of_node, "ngpios", &ngpios))
++			bgc->gc.ngpio = ngpios;
++
++	} else if (pdata) {
++		bgc->gc.base = pdata->base;
++		if (pdata->ngpio > 0)
++			bgc->gc.ngpio = pdata->ngpio;
++	}
++
++	return gpiochip_add(&bgc->gc);
++}
++
++static int bcm63xx_gpio_remove(struct platform_device *pdev)
++{
++	struct bgpio_chip *bgc = platform_get_drvdata(pdev);
++
++	return bgpio_remove(bgc);
++}
++
++#ifdef CONFIG_OF
++static struct of_device_id bcm63xx_gpio_of_match[] = {
++	{ .compatible = "brcm,bcm6345-gpio" },
++	{ },
++};
++#endif
++
++static struct platform_driver bcm63xx_gpio_driver = {
++	.probe = bcm63xx_gpio_probe,
++	.remove = bcm63xx_gpio_remove,
++	.driver = {
++		.name = "bcm63xx-gpio",
++		.of_match_table = of_match_ptr(bcm63xx_gpio_of_match),
++	},
++};
++
++module_platform_driver(bcm63xx_gpio_driver);
++
++MODULE_DESCRIPTION("Driver for BCM63XX memory-mapped GPIO controllers");
++MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
++MODULE_LICENSE("GPL");
diff --git a/target/linux/brcm63xx/patches-4.1/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch b/target/linux/brcm63xx/patches-4.1/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch
new file mode 100644
index 0000000..ce32f64
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch
@@ -0,0 +1,216 @@
+From cc99dca188bb63ba390008e2f7fa62d0300233e0 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 20 Feb 2015 23:58:54 +0100
+Subject: [PATCH 2/6] MIPS: BCM63XX: switch to new gpio driver
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_common.c |    2 +
+ arch/mips/bcm63xx/gpio.c                |  147 +++++++------------------------
+ arch/mips/bcm63xx/setup.c                |    3 -
+ 3 files changed, 33 insertions(+), 119 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -189,6 +189,8 @@ int __init board_register_devices(void)
+ 	}
+ #endif
+ 
++	bcm63xx_gpio_init();
++
+ 	if (board.has_uart0)
+ 		bcm63xx_uart_register(0);
+ 
+--- a/arch/mips/bcm63xx/gpio.c
++++ b/arch/mips/bcm63xx/gpio.c
+@@ -5,147 +5,62 @@
+  *
+  * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+  * Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org>
++ * Copyright (C) Jonas Gorski <jogo@openwrt.org>
+  */
+ 
+ #include <linux/kernel.h>
+-#include <linux/module.h>
+-#include <linux/spinlock.h>
+ #include <linux/platform_device.h>
++#include <linux/basic_mmio_gpio.h>
+ #include <linux/gpio.h>
+ 
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_gpio.h>
+-#include <bcm63xx_io.h>
+ #include <bcm63xx_regs.h>
+ 
+-static u32 gpio_out_low_reg;
+-
+-static void bcm63xx_gpio_out_low_reg_init(void)
++static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
+ {
+-	switch (bcm63xx_get_cpu_id()) {
+-	case BCM6345_CPU_ID:
+-		gpio_out_low_reg = GPIO_DATA_LO_REG_6345;
+-		break;
+-	default:
+-		gpio_out_low_reg = GPIO_DATA_LO_REG;
+-		break;
+-	}
+-}
+-
+-static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
+-static u32 gpio_out_low, gpio_out_high;
++	struct resource res[2];
++	struct bgpio_pdata pdata;
+ 
+-static void bcm63xx_gpio_set(struct gpio_chip *chip,
+-			     unsigned gpio, int val)
+-{
+-	u32 reg;
+-	u32 mask;
+-	u32 *v;
+-	unsigned long flags;
+-
+-	if (gpio >= chip->ngpio)
+-		BUG();
+-
+-	if (gpio < 32) {
+-		reg = gpio_out_low_reg;
+-		mask = 1 << gpio;
+-		v = &gpio_out_low;
+-	} else {
+-		reg = GPIO_DATA_HI_REG;
+-		mask = 1 << (gpio - 32);
+-		v = &gpio_out_high;
+-	}
+-
+-	spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
+-	if (val)
+-		*v |= mask;
+-	else
+-		*v &= ~mask;
+-	bcm_gpio_writel(*v, reg);
+-	spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
+-}
++	memset(res, 0, sizeof(res));
++	memset(&pdata, 0, sizeof(pdata));
+ 
+-static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
+-{
+-	u32 reg;
+-	u32 mask;
++	res[0].flags = IORESOURCE_MEM;
++	res[0].start = bcm63xx_regset_address(RSET_GPIO);
++	res[0].start += dir;
+ 
+-	if (gpio >= chip->ngpio)
+-		BUG();
++	res[0].end = res[0].start + 3;
+ 
+-	if (gpio < 32) {
+-		reg = gpio_out_low_reg;
+-		mask = 1 << gpio;
+-	} else {
+-		reg = GPIO_DATA_HI_REG;
+-		mask = 1 << (gpio - 32);
+-	}
++	res[1].flags = IORESOURCE_MEM;
++	res[1].start = bcm63xx_regset_address(RSET_GPIO);
++	res[1].start += data;
+ 
+-	return !!(bcm_gpio_readl(reg) & mask);
+-}
++	res[1].end = res[1].start + 3;
+ 
+-static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
+-				      unsigned gpio, int dir)
+-{
+-	u32 reg;
+-	u32 mask;
+-	u32 tmp;
+-	unsigned long flags;
+-
+-	if (gpio >= chip->ngpio)
+-		BUG();
+-
+-	if (gpio < 32) {
+-		reg = GPIO_CTL_LO_REG;
+-		mask = 1 << gpio;
+-	} else {
+-		reg = GPIO_CTL_HI_REG;
+-		mask = 1 << (gpio - 32);
+-	}
+-
+-	spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
+-	tmp = bcm_gpio_readl(reg);
+-	if (dir == BCM63XX_GPIO_DIR_IN)
+-		tmp &= ~mask;
+-	else
+-		tmp |= mask;
+-	bcm_gpio_writel(tmp, reg);
+-	spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
++	pdata.base = id * 32;
++	pdata.ngpio = ngpio;
+ 
+-	return 0;
++	platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
++					  &pdata, sizeof(pdata));
+ }
+ 
+-static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
++int __init bcm63xx_gpio_init(void)
+ {
+-	return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN);
+-}
++	int ngpio = bcm63xx_gpio_count();
++	int data_low_reg;
+ 
+-static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
+-					 unsigned gpio, int value)
+-{
+-	bcm63xx_gpio_set(chip, gpio, value);
+-	return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT);
+-}
++	if (BCMCPU_IS_6345())
++		data_low_reg = GPIO_DATA_LO_REG_6345;
++	else
++		data_low_reg = GPIO_DATA_LO_REG;
+ 
++	bcm63xx_gpio_init_one(0, GPIO_CTL_LO_REG, data_low_reg, min(ngpio, 32));
+ 
+-static struct gpio_chip bcm63xx_gpio_chip = {
+-	.label			= "bcm63xx-gpio",
+-	.direction_input	= bcm63xx_gpio_direction_input,
+-	.direction_output	= bcm63xx_gpio_direction_output,
+-	.get			= bcm63xx_gpio_get,
+-	.set			= bcm63xx_gpio_set,
+-	.base			= 0,
+-};
++	if (ngpio <= 32)
++		return 0;
+ 
+-int __init bcm63xx_gpio_init(void)
+-{
+-	bcm63xx_gpio_out_low_reg_init();
++	bcm63xx_gpio_init_one(1, GPIO_CTL_HI_REG, GPIO_DATA_HI_REG, ngpio - 32);
+ 
+-	gpio_out_low = bcm_gpio_readl(gpio_out_low_reg);
+-	if (!BCMCPU_IS_6345())
+-		gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG);
+-	bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
+-	pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
++	return 0;
+ 
+-	return gpiochip_add(&bcm63xx_gpio_chip);
+ }
+--- a/arch/mips/bcm63xx/setup.c
++++ b/arch/mips/bcm63xx/setup.c
+@@ -164,9 +164,6 @@ void __init plat_mem_setup(void)
+ 
+ int __init bcm63xx_register_devices(void)
+ {
+-	/* register gpiochip */
+-	bcm63xx_gpio_init();
+-
+ 	return board_register_devices();
+ }
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/376-net-bcm63xx_enet-use-named-gpio-for-ephy-reset-gpio.patch b/target/linux/brcm63xx/patches-4.1/376-net-bcm63xx_enet-use-named-gpio-for-ephy-reset-gpio.patch
new file mode 100644
index 0000000..6d19cc0
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/376-net-bcm63xx_enet-use-named-gpio-for-ephy-reset-gpio.patch
@@ -0,0 +1,46 @@
+From ec905f2ea78ec40602a685ede31c5e4f9893d196 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Feb 2015 16:35:07 +0100
+Subject: [PATCH 3/6] net: bcm63xx_enet: use named gpio for ephy reset gpio
+
+Allow using a named optional gpio for ephy reset gpio registration.
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c |    9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -30,6 +30,7 @@
+ #include <linux/dma-mapping.h>
+ #include <linux/platform_device.h>
+ #include <linux/if_vlan.h>
++#include <linux/gpio/consumer.h>
+ 
+ #include <bcm63xx_dev_enet.h>
+ #include "bcm63xx_enet.h"
+@@ -2848,10 +2849,15 @@ static int bcm_enet_shared_probe(struct
+ {
+ 	struct resource *res;
+ 	void __iomem *p[3];
++	struct gpio_desc *ephy_reset;
+ 	unsigned int i;
+ 
+ 	memset(bcm_enet_shared_base, 0, sizeof(bcm_enet_shared_base));
+ 
++	ephy_reset = devm_gpiod_get_optional(&pdev->dev, "ephy-reset");
++	if (IS_ERR(ephy_reset))
++		return PTR_ERR(ephy_reset);
++
+ 	for (i = 0; i < 3; i++) {
+ 		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
+ 		p[i] = devm_ioremap_resource(&pdev->dev, res);
+@@ -2861,6 +2867,9 @@ static int bcm_enet_shared_probe(struct
+ 
+ 	memcpy(bcm_enet_shared_base, p, sizeof(bcm_enet_shared_base));
+ 
++	if (ephy_reset)
++		gpiod_direction_output(ephy_reset, 0);
++
+ 	return 0;
+ }
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch b/target/linux/brcm63xx/patches-4.1/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch
new file mode 100644
index 0000000..0cbb4f5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch
@@ -0,0 +1,138 @@
+From d13bdf92ec885105cf107183f8464c40e5f3b93b Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Feb 2015 17:21:59 +0100
+Subject: [PATCH 4/6] MIPS: BCM63XX: register lookup for ephy-reset gpio
+
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c          |    2 +-
+ arch/mips/bcm63xx/boards/board_common.c            |    7 +++--
+ arch/mips/bcm63xx/gpio.c                           |   32 ++++++++++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h  |    2 ++
+ .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h |    5 +--
+ 5 files changed, 42 insertions(+), 6 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -54,7 +54,7 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.ephy_reset_gpio		= 36,
+-	.ephy_reset_gpio_flags		= GPIOF_INIT_HIGH,
++	.ephy_reset_gpio_flags		= GPIO_ACTIVE_LOW,
+ };
+ #endif
+ 
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -257,9 +257,10 @@ int __init board_register_devices(void)
+ 
+ 	platform_device_register(&bcm63xx_gpio_leds);
+ 
+-	if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
+-		gpio_request_one(board.ephy_reset_gpio,
+-				board.ephy_reset_gpio_flags, "ephy-reset");
++	if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) {
++		bcm63xx_gpio_ephy_reset(board.ephy_reset_gpio,
++					board.ephy_reset_gpio_flags);
++	}
+ 
+ 	return 0;
+ }
+--- a/arch/mips/bcm63xx/gpio.c
++++ b/arch/mips/bcm63xx/gpio.c
+@@ -8,15 +8,24 @@
+  * Copyright (C) Jonas Gorski <jogo@openwrt.org>
+  */
+ 
++#include <asm/addrspace.h>
++
+ #include <linux/kernel.h>
+ #include <linux/platform_device.h>
+ #include <linux/basic_mmio_gpio.h>
+ #include <linux/gpio.h>
++#include <linux/gpio/machine.h>
+ 
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_gpio.h>
+ #include <bcm63xx_regs.h>
+ 
++/* for registering lookups; make them large enough to hold OF names */
++static char *gpio_chip_labels[] = {
++	"xxxxxxxx.gpio-controller",
++	"xxxxxxxx.gpio-controller",
++};
++
+ static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
+ {
+ 	struct resource res[2];
+@@ -40,6 +49,7 @@ static void __init bcm63xx_gpio_init_one
+ 	pdata.base = id * 32;
+ 	pdata.ngpio = ngpio;
+ 
++	sprintf(gpio_chip_labels[id], "bcm63xx-gpio.%d", id);
+ 	platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
+ 					  &pdata, sizeof(pdata));
+ }
+@@ -64,3 +74,25 @@ int __init bcm63xx_gpio_init(void)
+ 	return 0;
+ 
+ }
++
++static struct gpiod_lookup_table ephy_reset = {
++	.dev_id = "bcm63xx_enet_shared.0",
++	.table = {
++		{ /* filled at runtime */ },
++		{ },
++	},
++};
++
++
++void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags)
++{
++	if (ephy_reset.table[0].chip_label)
++		return;
++
++	ephy_reset.table[0].chip_label = gpio_chip_labels[hw_gpio / 32];
++	ephy_reset.table[0].chip_hwnum = hw_gpio % 32;
++	ephy_reset.table[0].con_id = "ephy-reset";
++	ephy_reset.table[0].flags = flags;
++
++	gpiod_add_lookup_table(&ephy_reset);
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+@@ -2,9 +2,11 @@
+ #define BCM63XX_GPIO_H
+ 
+ #include <linux/init.h>
++#include <linux/gpio/machine.h>
+ #include <bcm63xx_cpu.h>
+ 
+ int __init bcm63xx_gpio_init(void);
++void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags);
+ 
+ static inline unsigned long bcm63xx_gpio_count(void)
+ {
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -3,6 +3,7 @@
+ 
+ #include <linux/types.h>
+ #include <linux/gpio.h>
++#include <linux/gpio/machine.h>
+ #include <linux/leds.h>
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+@@ -54,8 +55,8 @@ struct board_info {
+ 	/* External PHY reset GPIO */
+ 	unsigned int ephy_reset_gpio;
+ 
+-	/* External PHY reset GPIO flags from gpio.h */
+-	unsigned long ephy_reset_gpio_flags;
++	/* External PHY reset GPIO flags from gpio/machine.h */
++	enum gpio_lookup_flags ephy_reset_gpio_flags;
+ 
+ 	/* fallback sprom config */
+ 	struct fallback_sprom_data fallback_sprom;
diff --git a/target/linux/brcm63xx/patches-4.1/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch b/target/linux/brcm63xx/patches-4.1/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch
new file mode 100644
index 0000000..2faf0de
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch
@@ -0,0 +1,34 @@
+From e55892aac9d5508a000647ca66f0e678e02be3bb Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Feb 2015 17:26:50 +0100
+Subject: [PATCH 5/6] MIPS: BCM63XX: do not register gpio-controller if
+present in dtb
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/gpio.c |   7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/gpio.c
++++ b/arch/mips/bcm63xx/gpio.c
+@@ -20,6 +20,8 @@
+ #include <bcm63xx_gpio.h>
+ #include <bcm63xx_regs.h>
+ 
++#include "boards/board_common.h"
++
+ /* for registering lookups; make them large enough to hold OF names */
+ static char *gpio_chip_labels[] = {
+ 	"xxxxxxxx.gpio-controller",
+@@ -50,8 +52,9 @@ static void __init bcm63xx_gpio_init_one
+ 	pdata.ngpio = ngpio;
+ 
+ 	sprintf(gpio_chip_labels[id], "bcm63xx-gpio.%d", id);
+-	platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
+-					  &pdata, sizeof(pdata));
++	if (!board_of_device_present("gpio0"))
++		platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res,
++						  2, &pdata, sizeof(pdata));
+ }
+ 
+ int __init bcm63xx_gpio_init(void)
diff --git a/target/linux/brcm63xx/patches-4.1/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch b/target/linux/brcm63xx/patches-4.1/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch
new file mode 100644
index 0000000..b571999
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch
@@ -0,0 +1,59 @@
+From 1647cccc871bf43876c3df9852869680880d054c Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Wed, 25 Mar 2015 13:52:02 +0100
+Subject: [PATCH 1/2] MIPS: BCM63XX: provide a gpio lookup for the pcmcia
+ ready gpio
+
+To prepare for a time when gpiobases don't need to be fixed anymore.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-pcmcia.c |   13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-pcmcia.c
++++ b/arch/mips/bcm63xx/dev-pcmcia.c
+@@ -10,6 +10,7 @@
+ #include <linux/kernel.h>
+ #include <asm/bootinfo.h>
+ #include <linux/platform_device.h>
++#include <linux/gpio/machine.h>
+ #include <bcm63xx_cs.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_pcmcia.h>
+@@ -101,6 +102,14 @@ static const struct {
+ 	},
+ };
+ 
++static struct gpiod_lookup_table pcmcia_gpios_table = {
++	.dev_id = "bcm63xx_pcmcia.0",
++	.table = {
++		GPIO_LOOKUP("bcm63xx-gpio.0", 0, "ready", GPIO_ACTIVE_HIGH),
++		{ },
++	},
++};
++
+ int __init bcm63xx_pcmcia_register(void)
+ {
+ 	int ret, i;
+@@ -112,16 +121,20 @@ int __init bcm63xx_pcmcia_register(void)
+ 	switch (bcm63xx_get_cpu_id()) {
+ 	case BCM6348_CPU_ID:
+ 		pd.ready_gpio = 22;
++		pcmcia_gpios_table.table[0].chip_hwnum = 22;
+ 		break;
+ 
+ 	case BCM6358_CPU_ID:
+ 		pd.ready_gpio = 18;
++		pcmcia_gpios_table.table[0].chip_hwnum = 18;
+ 		break;
+ 
+ 	default:
+ 		return -ENODEV;
+ 	}
+ 
++	gpiod_add_lookup_table(&pcmcia_gpios_table);
++
+ 	pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA);
+ 	pcmcia_resources[0].end = pcmcia_resources[0].start +
+ 		RSET_PCMCIA_SIZE - 1;
diff --git a/target/linux/brcm63xx/patches-4.1/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch b/target/linux/brcm63xx/patches-4.1/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch
new file mode 100644
index 0000000..524ca1a
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch
@@ -0,0 +1,59 @@
+From c4e04f1c54928a49b227a5420d38b18226838775 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Wed, 25 Mar 2015 13:54:56 +0100
+Subject: [PATCH 2/2] pcmcia: bcm63xx_pmcia: use the new named gpio
+
+Use the new named gpio instead of relying on the hardware gpio numbers
+matching the virtual gpio numbers.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/pcmcia/bcm63xx_pcmcia.c |    9 ++++++++-
+ drivers/pcmcia/bcm63xx_pcmcia.h |    4 ++++
+ 2 files changed, 12 insertions(+), 1 deletion(-)
+
+--- a/drivers/pcmcia/bcm63xx_pcmcia.c
++++ b/drivers/pcmcia/bcm63xx_pcmcia.c
+@@ -237,7 +237,7 @@ static unsigned int __get_socket_status(
+ 		stat |= SS_XVCARD;
+ 	stat |= SS_POWERON;
+ 
+-	if (gpio_get_value(skt->pd->ready_gpio))
++	if (gpiod_get_value(skt->ready_gpio))
+ 		stat |= SS_READY;
+ 
+ 	return stat;
+@@ -373,6 +373,13 @@ static int bcm63xx_drv_pcmcia_probe(stru
+ 		goto err;
+ 	}
+ 
++	/* get ready gpio */
++	skt->ready_gpio = devm_gpiod_get(&pdev->dev, "ready", GPIOD_IN);
++	if (IS_ERR(skt->ready_gpio)) {
++		ret = PTR_ERR(skt->ready_gpio);
++		goto err;
++	}
++
+ 	/* resources are static */
+ 	sock->resource_ops = &pccard_static_ops;
+ 	sock->ops = &bcm63xx_pcmcia_operations;
+--- a/drivers/pcmcia/bcm63xx_pcmcia.h
++++ b/drivers/pcmcia/bcm63xx_pcmcia.h
+@@ -3,6 +3,7 @@
+ 
+ #include <linux/types.h>
+ #include <linux/timer.h>
++#include <linux/gpio/consumer.h>
+ #include <pcmcia/ss.h>
+ #include <bcm63xx_dev_pcmcia.h>
+ 
+@@ -55,6 +56,9 @@ struct bcm63xx_pcmcia_socket {
+ 
+ 	/* base address of io memory */
+ 	void __iomem *io_base;
++
++	/* ready gpio */
++	struct gpio_desc *ready_gpio;
+ };
+ 
+ #endif /* BCM63XX_PCMCIA_H_ */
diff --git a/target/linux/brcm63xx/patches-4.1/400-bcm963xx_flashmap.patch b/target/linux/brcm63xx/patches-4.1/400-bcm963xx_flashmap.patch
new file mode 100644
index 0000000..c693ace
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/400-bcm963xx_flashmap.patch
@@ -0,0 +1,65 @@
+From a4d005c91d403d9f3d0272db6cc46202c06ec774 Mon Sep 17 00:00:00 2001
+From: Axel Gembe <ago@bastart.eu.org>
+Date: Mon, 12 May 2008 18:54:09 +0200
+Subject: [PATCH] bcm963xx: flashmap support
+
+Signed-off-by: Axel Gembe <ago@bastart.eu.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |   19 +----------------
+ drivers/mtd/maps/bcm963xx-flash.c         |   32 ++++++++++++++++++++++++----
+ drivers/mtd/redboot.c                     |   13 +++++++++--
+ 3 files changed, 38 insertions(+), 26 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -35,7 +35,7 @@ static struct mtd_partition mtd_partitio
+ 	}
+ };
+ 
+-static const char *bcm63xx_part_types[] = { "bcm63xxpart", NULL };
++static const char *bcm63xx_part_types[] = { "bcm63xxpart", "RedBoot", NULL };
+ 
+ static struct physmap_flash_data flash_data = {
+ 	.width			= 2,
+--- a/drivers/mtd/redboot.c
++++ b/drivers/mtd/redboot.c
+@@ -72,6 +72,7 @@ static int parse_redboot_partitions(stru
+ 	int nulllen = 0;
+ 	int numslots;
+ 	unsigned long offset;
++	unsigned long fis_origin = 0;
+ #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
+ 	static char nullstring[] = "unallocated";
+ #endif
+@@ -176,6 +177,16 @@ static int parse_redboot_partitions(stru
+ 		goto out;
+ 	}
+ 
++	if (data && data->origin) {
++		fis_origin = data->origin;
++	} else {
++		for (i = 0; i < numslots; i++) {
++			if (!strncmp(buf[i].name, "RedBoot", 8)) {
++				fis_origin = (buf[i].flash_base & (master->size << 1) - 1);
++			}
++		}
++	}
++
+ 	for (i = 0; i < numslots; i++) {
+ 		struct fis_list *new_fl, **prev;
+ 
+@@ -196,10 +207,10 @@ static int parse_redboot_partitions(stru
+ 			goto out;
+ 		}
+ 		new_fl->img = &buf[i];
+-		if (data && data->origin)
+-			buf[i].flash_base -= data->origin;
+-		else
+-			buf[i].flash_base &= master->size-1;
++		if (fis_origin)
++			buf[i].flash_base -= fis_origin;
++
++		buf[i].flash_base &= (master->size << 1) - 1;
+ 
+ 		/* I'm sure the JFFS2 code has done me permanent damage.
+ 		 * I now think the following is _normal_
diff --git a/target/linux/brcm63xx/patches-4.1/401-bcm963xx_real_rootfs_length.patch b/target/linux/brcm63xx/patches-4.1/401-bcm963xx_real_rootfs_length.patch
new file mode 100644
index 0000000..92c264b
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/401-bcm963xx_real_rootfs_length.patch
@@ -0,0 +1,27 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h
+@@ -85,8 +85,10 @@ struct bcm_tag {
+ 	__u32 rootfs_crc;
+ 	/* 224-227: CRC32 of kernel partition */
+ 	__u32 kernel_crc;
+-	/* 228-235: Unused at present */
+-	char reserved1[8];
++	/* 228-231: Image sequence number */
++	char image_sequence[4];
++	/* 222-235: Openwrt: real rootfs length */
++	__u32 real_rootfs_length;
+ 	/* 236-239: CRC32 of header excluding last 20 bytes */
+ 	__u32 header_crc;
+ 	/* 240-255: Unused at present */
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -110,7 +110,8 @@ static int bcm63xx_parse_cfe_partitions(
+ 		} else {
+ 			/* OpenWrt layout */
+ 			rootfsaddr = kerneladdr + kernellen;
+-			rootfslen = spareaddr - rootfsaddr;
++			rootfslen = buf->real_rootfs_length;
++			spareaddr = rootfsaddr + rootfslen;
+ 		}
+ 	} else {
+ 		pr_warn("CFE boot tag CRC invalid (expected %08x, actual %08x)\n",
diff --git a/target/linux/brcm63xx/patches-4.1/402_bcm63xx_enet_vlan_incoming_fixed.patch b/target/linux/brcm63xx/patches-4.1/402_bcm63xx_enet_vlan_incoming_fixed.patch
new file mode 100644
index 0000000..fc2e8ab
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/402_bcm63xx_enet_vlan_incoming_fixed.patch
@@ -0,0 +1,11 @@
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -1633,7 +1633,7 @@ static int compute_hw_mtu(struct bcm_ene
+ 	actual_mtu = mtu;
+ 
+ 	/* add ethernet header + vlan tag size */
+-	actual_mtu += VLAN_ETH_HLEN;
++	actual_mtu += VLAN_ETH_HLEN + VLAN_HLEN;
+ 
+ 	if (actual_mtu < 64 || actual_mtu > BCMENET_MAX_MTU)
+ 		return -EINVAL;
diff --git a/target/linux/brcm63xx/patches-4.1/403-6358-enet1-external-mii-clk.patch b/target/linux/brcm63xx/patches-4.1/403-6358-enet1-external-mii-clk.patch
new file mode 100644
index 0000000..2733e05
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/403-6358-enet1-external-mii-clk.patch
@@ -0,0 +1,22 @@
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -101,6 +101,8 @@ void __init board_early_setup(const stru
+ 		if (BCMCPU_IS_6348())
+ 			val |= GPIO_MODE_6348_G3_EXT_MII |
+ 				GPIO_MODE_6348_G0_EXT_MII;
++		else if (BCMCPU_IS_6358())
++			val |= GPIO_MODE_6358_ENET1_MII_CLK_INV;
+ 	}
+ 
+ 	bcm_gpio_writel(val, GPIO_MODE_REG);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -651,6 +651,8 @@
+ #define GPIO_MODE_6358_EXTRA_SPI_SS	(1 << 7)
+ #define GPIO_MODE_6358_SERIAL_LED	(1 << 10)
+ #define GPIO_MODE_6358_UTOPIA		(1 << 12)
++#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 30)
++#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 31)
+ 
+ #define GPIO_MODE_6368_ANALOG_AFE_0	(1 << 0)
+ #define GPIO_MODE_6368_ANALOG_AFE_1	(1 << 1)
diff --git a/target/linux/brcm63xx/patches-4.1/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch b/target/linux/brcm63xx/patches-4.1/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch
new file mode 100644
index 0000000..6036d2f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch
@@ -0,0 +1,169 @@
+From b11218c750ab92cfab4408a0328f1b36ceec3f33 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 6 Jan 2012 12:24:18 +0100
+Subject: [PATCH 19/63] NET: bcm63xx_enet: move phy_(dis)connect into probe/remove
+
+Only connect/disconnect the phy during probe and remove, not during any
+open/close. The phy seldom changes during the runtime, and disconnecting
+the phy during close will prevent it from keeping any configuration over
+a down/up cycle.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c |   84 +++++++++++++-------------
+ 1 files changed, 41 insertions(+), 43 deletions(-)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -871,10 +871,8 @@ static int bcm_enet_open(struct net_devi
+ 	struct bcm_enet_priv *priv;
+ 	struct sockaddr addr;
+ 	struct device *kdev;
+-	struct phy_device *phydev;
+ 	int i, ret;
+ 	unsigned int size;
+-	char phy_id[MII_BUS_ID_SIZE + 3];
+ 	void *p;
+ 	u32 val;
+ 
+@@ -882,40 +880,10 @@ static int bcm_enet_open(struct net_devi
+ 	kdev = &priv->pdev->dev;
+ 
+ 	if (priv->has_phy) {
+-		/* connect to PHY */
+-		snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
+-			 priv->mii_bus->id, priv->phy_id);
+-
+-		phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
+-				     PHY_INTERFACE_MODE_MII);
+-
+-		if (IS_ERR(phydev)) {
+-			dev_err(kdev, "could not attach to PHY\n");
+-			return PTR_ERR(phydev);
+-		}
+-
+-		/* mask with MAC supported features */
+-		phydev->supported &= (SUPPORTED_10baseT_Half |
+-				      SUPPORTED_10baseT_Full |
+-				      SUPPORTED_100baseT_Half |
+-				      SUPPORTED_100baseT_Full |
+-				      SUPPORTED_Autoneg |
+-				      SUPPORTED_Pause |
+-				      SUPPORTED_MII);
+-		phydev->advertising = phydev->supported;
+-
+-		if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
+-			phydev->advertising |= SUPPORTED_Pause;
+-		else
+-			phydev->advertising &= ~SUPPORTED_Pause;
+-
+-		dev_info(kdev, "attached PHY at address %d [%s]\n",
+-			 phydev->addr, phydev->drv->name);
+-
++		/* Reset state */
+ 		priv->old_link = 0;
+ 		priv->old_duplex = -1;
+ 		priv->old_pause = -1;
+-		priv->phydev = phydev;
+ 	}
+ 
+ 	/* mask all interrupts and request them */
+@@ -925,7 +893,7 @@ static int bcm_enet_open(struct net_devi
+ 
+ 	ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
+ 	if (ret)
+-		goto out_phy_disconnect;
++		return ret;
+ 
+ 	ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, 0,
+ 			  dev->name, dev);
+@@ -1128,9 +1096,6 @@ out_freeirq_rx:
+ out_freeirq:
+ 	free_irq(dev->irq, dev);
+ 
+-out_phy_disconnect:
+-	phy_disconnect(priv->phydev);
+-
+ 	return ret;
+ }
+ 
+@@ -1235,12 +1200,6 @@ static int bcm_enet_stop(struct net_devi
+ 	free_irq(priv->irq_rx, dev);
+ 	free_irq(dev->irq, dev);
+ 
+-	/* release phy */
+-	if (priv->has_phy) {
+-		phy_disconnect(priv->phydev);
+-		priv->phydev = NULL;
+-	}
+-
+ 	return 0;
+ }
+ 
+@@ -1831,6 +1790,8 @@ static int bcm_enet_probe(struct platfor
+ 
+ 	/* MII bus registration */
+ 	if (priv->has_phy) {
++		struct phy_device *phydev;
++		char phy_id[MII_BUS_ID_SIZE + 3];
+ 
+ 		priv->mii_bus = mdiobus_alloc();
+ 		if (!priv->mii_bus) {
+@@ -1868,6 +1829,38 @@ static int bcm_enet_probe(struct platfor
+ 			dev_err(&pdev->dev, "unable to register mdio bus\n");
+ 			goto out_free_mdio;
+ 		}
++
++		/* connect to PHY */
++		snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
++			 priv->mii_bus->id, priv->phy_id);
++
++		phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
++				     PHY_INTERFACE_MODE_MII);
++
++		if (IS_ERR(phydev)) {
++			dev_err(&pdev->dev, "could not attach to PHY\n");
++			goto out_unregister_mdio;
++		}
++
++		/* mask with MAC supported features */
++		phydev->supported &= (SUPPORTED_10baseT_Half |
++				      SUPPORTED_10baseT_Full |
++				      SUPPORTED_100baseT_Half |
++				      SUPPORTED_100baseT_Full |
++				      SUPPORTED_Autoneg |
++				      SUPPORTED_Pause |
++				      SUPPORTED_MII);
++		phydev->advertising = phydev->supported;
++
++		if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
++			phydev->advertising |= SUPPORTED_Pause;
++		else
++			phydev->advertising &= ~SUPPORTED_Pause;
++
++		dev_info(&pdev->dev, "attached PHY at address %d [%s]\n",
++			 phydev->addr, phydev->drv->name);
++
++		priv->phydev = phydev;
+ 	} else {
+ 
+ 		/* run platform code to initialize PHY device */
+@@ -1913,6 +1906,9 @@ static int bcm_enet_probe(struct platfor
+ 	return 0;
+ 
+ out_unregister_mdio:
++	if (priv->phydev)
++		phy_disconnect(priv->phydev);
++
+ 	if (priv->mii_bus)
+ 		mdiobus_unregister(priv->mii_bus);
+ 
+@@ -1954,6 +1950,8 @@ static int bcm_enet_remove(struct platfo
+ 	enet_writel(priv, 0, ENET_MIISC_REG);
+ 
+ 	if (priv->has_phy) {
++		phy_disconnect(priv->phydev);
++		priv->phydev = NULL;
+ 		mdiobus_unregister(priv->mii_bus);
+ 		mdiobus_free(priv->mii_bus);
+ 	} else {
diff --git a/target/linux/brcm63xx/patches-4.1/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch b/target/linux/brcm63xx/patches-4.1/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch
new file mode 100644
index 0000000..2f2eecf
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch
@@ -0,0 +1,53 @@
+From d8237d704fc25eb2fc25ef4403608b78c6a6d4be Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 15 Jul 2012 20:08:57 +0200
+Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports
+
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |   13 +++++++++++++
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c      |   12 ++++++++++++
+ 2 files changed, 25 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -967,6 +967,19 @@
+ #define ENETSW_PORTOV_FDX_MASK		(1 << 1)
+ #define ENETSW_PORTOV_LINKUP_MASK	(1 << 0)
+ 
++/* Port RGMII control register */
++#define ENETSW_RGMII_CTRL_REG(x)	(0x60 + (x))
++#define ENETSW_RGMII_CTRL_GMII_CLK_EN	(1 << 7)
++#define ENETSW_RGMII_CTRL_MII_OVERRIDE_EN (1 << 6)
++#define ENETSW_RGMII_CTRL_MII_MODE_MASK	(3 << 4)
++#define ENETSW_RGMII_CTRL_RGMII_MODE	(0 << 4)
++#define ENETSW_RGMII_CTRL_MII_MODE	(1 << 4)
++#define ENETSW_RGMII_CTRL_RVMII_MODE	(2 << 4)
++#define ENETSW_RGMII_CTRL_TIMING_SEL_EN	(1 << 0)
++
++/* Port RGMII timing register */
++#define ENETSW_RGMII_TIMING_REG(x)	(0x68 + (x))
++
+ /* MDIO control register */
+ #define ENETSW_MDIOC_REG		(0xb0)
+ #define ENETSW_MDIOC_EXT_MASK		(1 << 16)
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -2225,6 +2225,18 @@ static int bcm_enetsw_open(struct net_de
+ 		priv->sw_port_link[i] = 0;
+ 	}
+ 
++	/* enable external ports */
++	for (i = ENETSW_RGMII_PORT0; i < priv->num_ports; i++) {
++		u8 rgmii_ctrl;
++
++		if (!priv->used_ports[i].used)
++			continue;
++
++		rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
++		rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
++		enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
++	}
++
+ 	/* reset mib */
+ 	val = enetsw_readb(priv, ENETSW_GMCR_REG);
+ 	val |= ENETSW_GMCR_RST_MIB_MASK;
diff --git a/target/linux/brcm63xx/patches-4.1/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-4.1/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
new file mode 100644
index 0000000..0c317cb
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
@@ -0,0 +1,135 @@
+From d135d94b3d1fe599d13e7198d5f502912d694c13 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 3 Jul 2011 15:00:38 +0200
+Subject: [PATCH 29/60] MIPS: BCM63XX: Register SPI flash if present
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/dev-flash.c                     |   35 +++++++++++++++++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |    2 +
+ 2 files changed, 33 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -17,9 +17,12 @@
+ #include <linux/mtd/partitions.h>
+ #include <linux/mtd/physmap.h>
+ #include <linux/mtd/spi-nor.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/flash.h>
+ 
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
++#include <bcm63xx_dev_hsspi.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+ 
+@@ -66,6 +69,21 @@ void __init bcm63xx_flash_force_phys_bas
+ 	mtd_resources[0].end = end;
+ }
+ 
++static struct flash_platform_data bcm63xx_flash_data = {
++	.part_probe_types	= bcm63xx_part_types,
++};
++
++static struct spi_board_info bcm63xx_spi_flash_info[] = {
++	{
++		.bus_num	= 0,
++		.chip_select	= 0,
++		.mode		= 0,
++		.max_speed_hz	= 781000,
++		.modalias	= "m25p80",
++		.platform_data	= &bcm63xx_flash_data,
++	},
++};
++
+ static int __init bcm63xx_detect_flash_type(void)
+ {
+ 	u32 val;
+@@ -73,9 +91,15 @@ static int __init bcm63xx_detect_flash_t
+ 	switch (bcm63xx_get_cpu_id()) {
+ 	case BCM6318_CPU_ID:
+ 		/* only support serial flash */
++		bcm63xx_spi_flash_info[0].max_speed_hz = 62500000;
+ 		return BCM63XX_FLASH_TYPE_SERIAL;
+ 	case BCM6328_CPU_ID:
+ 		val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
++		if (val & STRAPBUS_6328_HSSPI_CLK_FAST)
++			bcm63xx_spi_flash_info[0].max_speed_hz = 33333334;
++		else
++			bcm63xx_spi_flash_info[0].max_speed_hz = 16666667;
++
+ 		if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
+ 			return BCM63XX_FLASH_TYPE_SERIAL;
+ 		else
+@@ -94,12 +118,20 @@ static int __init bcm63xx_detect_flash_t
+ 			return BCM63XX_FLASH_TYPE_SERIAL;
+ 	case BCM6362_CPU_ID:
+ 		val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
++		if (val & STRAPBUS_6362_HSSPI_CLK_FAST)
++			bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
++		else
++			bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ 		if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
+ 			return BCM63XX_FLASH_TYPE_SERIAL;
+ 		else
+ 			return BCM63XX_FLASH_TYPE_NAND;
+ 	case BCM6368_CPU_ID:
+ 		val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
++		if (val & STRAPBUS_6368_SPI_CLK_FAST)
++			bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ 		switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
+ 		case STRAPBUS_6368_BOOT_SEL_NAND:
+ 			return BCM63XX_FLASH_TYPE_NAND;
+@@ -110,6 +142,11 @@ static int __init bcm63xx_detect_flash_t
+ 		}
+ 	case BCM63268_CPU_ID:
+ 		val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
++		if (val & STRAPBUS_63268_HSSPI_CLK_FAST)
++			bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
++		else
++			bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ 		if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
+ 			return BCM63XX_FLASH_TYPE_SERIAL;
+ 		else
+@@ -195,8 +232,17 @@ int __init bcm63xx_flash_register(void)
+ 
+ 		return platform_device_register(&mtd_dev);
+ 	case BCM63XX_FLASH_TYPE_SERIAL:
+-		pr_warn("unsupported serial flash detected\n");
+-		return -ENODEV;
++		if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
++		    BCMCPU_IS_63268()) {
++			bcm63xx_spi_flash_info[0].bus_num = 1;
++			bcm63xx_spi_flash_info[0].mode = SPI_RX_DUAL;
++		}
++
++		if (BCMCPU_IS_6358() || BCMCPU_IS_6368())
++			bcm63xx_flash_data.max_transfer_len = SPI_6358_MSG_DATA_SIZE;
++
++		return spi_register_board_info(bcm63xx_spi_flash_info,
++					ARRAY_SIZE(bcm63xx_spi_flash_info));
+ 	case BCM63XX_FLASH_TYPE_NAND:
+ 		pr_warn("unsupported NAND flash detected\n");
+ 		return -ENODEV;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -708,6 +708,7 @@
+ #define GPIO_STRAPBUS_REG		0x40
+ #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
+ #define STRAPBUS_6358_BOOT_SEL_SERIAL	(0 << 1)
++#define STRAPBUS_6368_SPI_CLK_FAST	(1 << 6)
+ #define STRAPBUS_6368_BOOT_SEL_MASK	0x3
+ #define STRAPBUS_6368_BOOT_SEL_NAND	0
+ #define STRAPBUS_6368_BOOT_SEL_SERIAL	1
+@@ -1564,6 +1565,7 @@
+ #define IDDQ_CTRL_63268_USBH		(1 << 4)
+ 
+ #define MISC_STRAPBUS_6328_REG		0x240
++#define STRAPBUS_6328_HSSPI_CLK_FAST	(1 << 4)
+ #define STRAPBUS_6328_FCVO_SHIFT	7
+ #define STRAPBUS_6328_FCVO_MASK		(0x1f << STRAPBUS_6328_FCVO_SHIFT)
+ #define STRAPBUS_6328_BOOT_SEL_SERIAL	(1 << 28)
diff --git a/target/linux/brcm63xx/patches-4.1/412-MTD-physmap-allow-passing-pp_data.patch b/target/linux/brcm63xx/patches-4.1/412-MTD-physmap-allow-passing-pp_data.patch
new file mode 100644
index 0000000..3511120
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/412-MTD-physmap-allow-passing-pp_data.patch
@@ -0,0 +1,41 @@
+From 266c506f4b262bd6aba0776a03d82c98e65d9906 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 1 May 2012 17:32:36 +0200
+Subject: [PATCH 63/79] MTD: physmap: allow passing pp_data
+
+---
+ drivers/mtd/maps/physmap.c  |    4 +++-
+ include/linux/mtd/physmap.h |    1 +
+ 2 files changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/mtd/maps/physmap.c
++++ b/drivers/mtd/maps/physmap.c
+@@ -96,6 +96,7 @@ static int physmap_flash_probe(struct pl
+ {
+ 	struct physmap_flash_data *physmap_data;
+ 	struct physmap_flash_info *info;
++	struct mtd_part_parser_data *pp_data;
+ 	const char * const *probe_type;
+ 	const char * const *part_types;
+ 	int err = 0;
+@@ -187,8 +188,9 @@ static int physmap_flash_probe(struct pl
+ 	spin_lock_init(&info->vpp_lock);
+ 
+ 	part_types = physmap_data->part_probe_types ? : part_probe_types;
++	pp_data = physmap_data->pp_data ? physmap_data->pp_data : NULL;
+ 
+-	mtd_device_parse_register(info->cmtd, part_types, NULL,
++	mtd_device_parse_register(info->cmtd, part_types, pp_data,
+ 				  physmap_data->parts, physmap_data->nr_parts);
+ 	return 0;
+ 
+--- a/include/linux/mtd/physmap.h
++++ b/include/linux/mtd/physmap.h
+@@ -31,6 +31,7 @@ struct physmap_flash_data {
+ 	char                    *probe_type;
+ 	struct mtd_partition	*parts;
+ 	const char * const	*part_probe_types;
++	struct mtd_part_parser_data *pp_data;
+ };
+ 
+ #endif /* __LINUX_MTD_PHYSMAP__ */
diff --git a/target/linux/brcm63xx/patches-4.1/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch b/target/linux/brcm63xx/patches-4.1/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch
new file mode 100644
index 0000000..5f830dd
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch
@@ -0,0 +1,72 @@
+From 8879e209111192c5e9752d7bd203cf7582693328 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 3 May 2012 14:40:03 +0200
+Subject: [PATCH 58/72] BCM63XX: allow providing fixup data in board data
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c           |    9 ++++++++-
+ arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h |   10 ++++++++++
+ 2 files changed, 18 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -35,6 +35,7 @@
+ #include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
++#include <pci_ath9k_fixup.h>
+ 
+ #include "board_common.h"
+ 
+@@ -181,6 +182,7 @@ static struct of_device_id of_ids[] = {
+ int __init board_register_devices(void)
+ {
+ 	int usbh_ports = 0;
++	int i;
+ 
+ #if CONFIG_OF
+ 	if (of_have_populated_dt()) {
+@@ -264,6 +266,10 @@ int __init board_register_devices(void)
+ 					board.ephy_reset_gpio_flags);
+ 	}
+ 
++	/* register any fixups */
++	for (i = 0; i < board.has_caldata; i++)
++		pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
++
+ 	return 0;
+ }
+ 
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -9,6 +9,7 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <bcm63xx_dev_dsp.h>
+ #include <bcm63xx_fallback_sprom.h>
++#include <pci_ath9k_fixup.h>
+ 
+ /*
+  * flash mapping
+@@ -16,6 +17,11 @@
+ #define BCM963XX_CFE_VERSION_OFFSET	0x570
+ #define BCM963XX_NVRAM_OFFSET		0x580
+ 
++struct ath9k_caldata {
++	unsigned int	slot;
++	u32		caldata_offset;
++};
++
+ /*
+  * board definition
+  */
+@@ -36,6 +42,10 @@ struct board_info {
+ 	unsigned int	has_uart0:1;
+ 	unsigned int	has_uart1:1;
+ 	unsigned int	use_fallback_sprom:1;
++	unsigned int	has_caldata:2;
++
++	/* wifi calibration data config */
++	struct ath9k_caldata caldata[2];
+ 
+ 	/* ethernet config */
+ 	struct bcm63xx_enet_platform_data enet0;
diff --git a/target/linux/brcm63xx/patches-4.1/414-MTD-m25p80-allow-passing-pp_data.patch b/target/linux/brcm63xx/patches-4.1/414-MTD-m25p80-allow-passing-pp_data.patch
new file mode 100644
index 0000000..9a8cdf5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/414-MTD-m25p80-allow-passing-pp_data.patch
@@ -0,0 +1,40 @@
+From 7f17dfe9009beb07a3de0e380932a725293829df Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 1 May 2012 17:33:03 +0200
+Subject: [PATCH 64/79] MTD: m25p80: allow passing pp_data
+
+---
+ drivers/mtd/devices/m25p80.c |    3 +++
+ include/linux/spi/flash.h    |    2 ++
+ 2 files changed, 5 insertions(+)
+
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -255,6 +255,9 @@ static int m25p_probe(struct spi_device
+ 	if (data)
+ 		flash->max_transfer_len = data->max_transfer_len;
+ 
++	if (data && data->pp_data)
++		memcpy(&ppdata, data->pp_data, sizeof(ppdata));
++
+ 	ret = spi_nor_scan(nor, flash_name, mode);
+ 	if (ret)
+ 		return ret;
+--- a/include/linux/spi/flash.h
++++ b/include/linux/spi/flash.h
+@@ -12,6 +12,7 @@ struct mtd_part_parser_data;
+  *	with chips that can't be queried for JEDEC or other IDs
+  * @part_probe_types: optional list of MTD parser names to use for
+  *	partitioning
++ * @pp_data: optional partition parser data.
+  *
+  * @max_transfer_len: option maximum read/write length limitation for
+  *	SPI controllers not able to transfer any length commands.
+@@ -30,6 +31,7 @@ struct flash_platform_data {
+ 	char		*type;
+ 
+ 	const char	**part_probe_types;
++	struct mtd_part_parser_data *pp_data;
+ 
+ 	unsigned int	max_transfer_len;
+ 	/* we'll likely add more ... use JEDEC IDs, etc */
diff --git a/target/linux/brcm63xx/patches-4.1/415-MIPS-BCM63XX-export-the-attached-flash-type.patch b/target/linux/brcm63xx/patches-4.1/415-MIPS-BCM63XX-export-the-attached-flash-type.patch
new file mode 100644
index 0000000..d874059
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/415-MIPS-BCM63XX-export-the-attached-flash-type.patch
@@ -0,0 +1,31 @@
+From 066f1e37742ee434496d32a41a9284458de96742 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 13 Jan 2014 12:12:30 +0100
+Subject: [PATCH] MIPS: BCM63XX: export the attached flash type
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c                          | 5 +++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -252,3 +252,8 @@ int __init bcm63xx_flash_register(void)
+ 		return -ENODEV;
+ 	}
+ }
++
++int bcm63xx_flash_get_type(void)
++{
++	return flash_type;
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -13,4 +13,6 @@ void bcm63xx_flash_force_phys_base_addre
+ 
+ int __init bcm63xx_flash_register(void);
+ 
++int bcm63xx_flash_get_type(void);
++
+ #endif /* __BCM63XX_FLASH_H */
diff --git a/target/linux/brcm63xx/patches-4.1/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch b/target/linux/brcm63xx/patches-4.1/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch
new file mode 100644
index 0000000..7a7c825
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch
@@ -0,0 +1,236 @@
+From bbebbf735a02b6d044ed928978ab4bd5f1833364 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 3 May 2012 14:36:11 +0200
+Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices
+
+---
+ arch/mips/bcm63xx/Makefile                         |    3 +-
+ arch/mips/bcm63xx/pci-ath9k-fixup.c                |  190 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/pci_ath9k_fixup.h     |    7 +
+ 3 files changed, 199 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/pci-ath9k-fixup.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,7 @@ obj-y		+= clk.o cpu.o cs.o gpio.o irq.o
+ 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
+ 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
+ 		   dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
+-		   usb-common.o sprom.o
++		   pci-ath9k-fixup.o usb-common.o sprom.o
+ obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+ 
+ obj-y		+= boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -0,0 +1,199 @@
++/*
++ *  Broadcom BCM63XX Ath9k EEPROM fixup helper.
++ *
++ *  Copytight (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
++ *
++ *  Based on
++ *
++ *  Atheros AP94 reference board PCI initialization
++ *
++ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/pci.h>
++#include <linux/delay.h>
++#include <linux/ath9k_platform.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_nvram.h>
++#include <bcm63xx_dev_pci.h>
++#include <bcm63xx_dev_flash.h>
++#include <bcm63xx_dev_hsspi.h>
++#include <pci_ath9k_fixup.h>
++
++#define bcm_hsspi_writel(v, o)	bcm_rset_writel(RSET_HSSPI, (v), (o))
++
++struct ath9k_fixup {
++	unsigned slot;
++	u8 mac[ETH_ALEN];
++	struct ath9k_platform_data pdata;
++};
++
++static int ath9k_num_fixups;
++static struct ath9k_fixup ath9k_fixups[2] = {
++	{
++		.slot = 255,
++		.pdata = {
++			.led_pin	= -1,
++		},
++	},
++	{
++		.slot = 255,
++		.pdata = {
++			.led_pin	= -1,
++		},
++	},
++};
++
++static u16 *bcm63xx_read_eeprom(u16 *eeprom, u32 offset)
++{
++	u32 addr;
++
++	if (BCMCPU_IS_6328()) {
++		addr = 0x18000000;
++	} else {
++		addr = bcm_mpi_readl(MPI_CSBASE_REG(0));
++		addr &= MPI_CSBASE_BASE_MASK;
++	}
++
++	switch (bcm63xx_flash_get_type()) {
++	case BCM63XX_FLASH_TYPE_PARALLEL:
++		memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
++		return eeprom;
++	case BCM63XX_FLASH_TYPE_SERIAL:
++		/* the first megabyte is memory mapped */
++		if (offset < 0x100000) {
++			memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
++			return eeprom;
++		}
++
++		if (BCMCPU_IS_6328()) {
++			/* we can change the memory mapped megabyte */
++			bcm_hsspi_writel(offset & 0xf00000, 0x18);
++			memcpy(eeprom, (void *)KSEG1ADDR(addr + (offset & 0xfffff)), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
++			bcm_hsspi_writel(0, 0x18);
++			return eeprom;
++		}
++		/* can't do anything here without talking to the SPI controller. */
++	case BCM63XX_FLASH_TYPE_NAND:
++	default:
++		return NULL;
++	}
++}
++
++static void ath9k_pci_fixup(struct pci_dev *dev)
++{
++	void __iomem *mem;
++	struct ath9k_platform_data *pdata = NULL;
++	struct pci_dev *bridge = pci_upstream_bridge(dev);
++	u16 *cal_data = NULL;
++	u16 cmd;
++	u32 bar0;
++	u32 val;
++	unsigned i;
++
++	for (i = 0; i < ath9k_num_fixups; i++) {
++		if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn))
++			continue;
++
++		cal_data = ath9k_fixups[i].pdata.eeprom_data;
++		pdata = &ath9k_fixups[i].pdata;
++		break;
++	}
++
++	if (cal_data == NULL)
++		return;
++
++	if (*cal_data != 0xa55a) {
++		pr_err("pci %s: invalid calibration data\n", pci_name(dev));
++		return;
++	}
++
++	pr_info("pci %s: fixup device configuration\n", pci_name(dev));
++
++	switch (bcm63xx_get_cpu_id()) {
++	case BCM6328_CPU_ID:
++		val = BCM_PCIE_MEM_BASE_PA_6328;
++		break;
++	case BCM6348_CPU_ID:
++	case BCM6358_CPU_ID:
++	case BCM6368_CPU_ID:
++		val = BCM_PCI_MEM_BASE_PA;
++		break;
++	default:
++		BUG();
++	}
++
++	mem = ioremap(val, 0x10000);
++	if (!mem) {
++		pr_err("pci %s: ioremap error\n", pci_name(dev));
++		return;
++	}
++
++	if (bridge)
++		pci_enable_device(bridge);
++
++	pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
++	pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
++	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, val);
++
++	pci_read_config_word(dev, PCI_COMMAND, &cmd);
++	cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
++	pci_write_config_word(dev, PCI_COMMAND, cmd);
++
++	/* set offset to first reg address */
++	cal_data += 3;
++	while(*cal_data != 0xffff) {
++		u32 reg;
++		reg = *cal_data++;
++		val = *cal_data++;
++		val |= (*cal_data++) << 16;
++
++		writel(val, mem + reg);
++		udelay(100);
++	}
++
++	pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
++	dev->vendor = val & 0xffff;
++	dev->device = (val >> 16) & 0xffff;
++
++	pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
++	dev->revision = val & 0xff;
++	dev->class = val >> 8; /* upper 3 bytes */
++
++	pci_read_config_word(dev, PCI_COMMAND, &cmd);
++	cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
++	pci_write_config_word(dev, PCI_COMMAND, cmd);
++
++	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
++
++	if (bridge)
++		pci_disable_device(bridge);
++
++	iounmap(mem);
++
++	dev->dev.platform_data = pdata;
++}
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
++
++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
++{
++	if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
++		return;
++
++	ath9k_fixups[ath9k_num_fixups].slot = slot;
++
++	if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
++		return;
++
++	if (bcm63xx_nvram_get_mac_address(ath9k_fixups[ath9k_num_fixups].mac))
++		return;
++
++	ath9k_fixups[ath9k_num_fixups].pdata.macaddr = ath9k_fixups[ath9k_num_fixups].mac;
++	ath9k_num_fixups++;
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -0,0 +1,7 @@
++#ifndef _PCI_ATH9K_FIXUP
++#define _PCI_ATH9K_FIXUP
++
++
++void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
++
++#endif /* _PCI_ATH9K_FIXUP */
diff --git a/target/linux/brcm63xx/patches-4.1/417-MTD-bcm63xxpart-allow-passing-a-caldata-offset.patch b/target/linux/brcm63xx/patches-4.1/417-MTD-bcm63xxpart-allow-passing-a-caldata-offset.patch
new file mode 100644
index 0000000..3b02c07
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/417-MTD-bcm63xxpart-allow-passing-a-caldata-offset.patch
@@ -0,0 +1,120 @@
+Allow bcm63xxpart to receive a caldata offset if calibration data is
+contained in flash.
+---
+ drivers/mtd/bcm63xxpart.c      |   51 ++++++++++++++++++++++++++++++++++++---
+ include/linux/mtd/partitions.h |    2 +
+ 2 files changed, 49 insertions(+), 4 deletions(-)
+
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -53,10 +53,12 @@ static int bcm63xx_parse_cfe_partitions(
+ 	struct mtd_partition *parts;
+ 	int ret;
+ 	size_t retlen;
+-	unsigned int rootfsaddr, kerneladdr, spareaddr;
++	unsigned int rootfsaddr, kerneladdr, spareaddr, nvramaddr;
+ 	unsigned int rootfslen, kernellen, sparelen, totallen;
+ 	unsigned int cfelen, nvramlen;
+ 	unsigned int cfe_erasesize;
++	unsigned int caldatalen1 = 0, caldataaddr1 = 0;
++	unsigned int caldatalen2 = 0, caldataaddr2 = 0;
+ 	int i;
+ 	u32 computed_crc;
+ 	bool rootfs_first = false;
+@@ -70,6 +72,24 @@ static int bcm63xx_parse_cfe_partitions(
+ 	cfelen = cfe_erasesize;
+ 	nvramlen = bcm63xx_nvram_get_psi_size() * SZ_1K;
+ 	nvramlen = roundup(nvramlen, cfe_erasesize);
++	nvramaddr = master->size - nvramlen;
++
++	if (data) {
++		if (data->caldata[0]) {
++			caldatalen1 = cfe_erasesize;
++			caldataaddr1 = rounddown(data->caldata[0],
++						 cfe_erasesize);
++		}
++		if (data->caldata[1]) {
++			caldatalen2 = cfe_erasesize;
++			caldataaddr2 = rounddown(data->caldata[1],
++						 cfe_erasesize);
++		}
++		if (caldataaddr1 == caldataaddr2) {
++			caldataaddr2 = 0;
++			caldatalen2 = 0;
++		}
++	}
+ 
+ 	/* Allocate memory for buffer */
+ 	buf = vmalloc(sizeof(struct bcm_tag));
+@@ -121,7 +141,7 @@ static int bcm63xx_parse_cfe_partitions(
+ 		rootfsaddr = 0;
+ 		spareaddr = cfelen;
+ 	}
+-	sparelen = master->size - spareaddr - nvramlen;
++	sparelen = min_not_zero(nvramaddr, caldataaddr1) - spareaddr;
+ 
+ 	/* Determine number of partitions */
+ 	if (rootfslen > 0)
+@@ -130,6 +150,12 @@ static int bcm63xx_parse_cfe_partitions(
+ 	if (kernellen > 0)
+ 		nrparts++;
+ 
++	if (caldatalen1 > 0)
++		nrparts++;
++
++	if (caldatalen2 > 0)
++		nrparts++;
++
+ 	/* Ask kernel for more memory */
+ 	parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL);
+ 	if (!parts) {
+@@ -167,15 +193,32 @@ static int bcm63xx_parse_cfe_partitions(
+ 		curpart++;
+ 	}
+ 
++	if (caldatalen1 > 0) {
++		if (caldatalen2 > 0)
++			parts[curpart].name = "cal_data1";
++		else
++			parts[curpart].name = "cal_data";
++		parts[curpart].offset = caldataaddr1;
++		parts[curpart].size = caldatalen1;
++		curpart++;
++	}
++
++	if (caldatalen2 > 0) {
++		parts[curpart].name = "cal_data2";
++		parts[curpart].offset = caldataaddr2;
++		parts[curpart].size = caldatalen2;
++		curpart++;
++	}
++
+ 	parts[curpart].name = "nvram";
+-	parts[curpart].offset = master->size - nvramlen;
++	parts[curpart].offset = nvramaddr;
+ 	parts[curpart].size = nvramlen;
+ 	curpart++;
+ 
+ 	/* Global partition "linux" to make easy firmware upgrade */
+ 	parts[curpart].name = "linux";
+ 	parts[curpart].offset = cfelen;
+-	parts[curpart].size = master->size - cfelen - nvramlen;
++	parts[curpart].size = min_not_zero(nvramaddr, caldataaddr1) - cfelen;
+ 
+ 	for (i = 0; i < nrparts; i++)
+ 		pr_info("Partition %d is %s offset %llx and length %llx\n", i,
+--- a/include/linux/mtd/partitions.h
++++ b/include/linux/mtd/partitions.h
+@@ -56,10 +56,12 @@ struct device_node;
+ /**
+  * struct mtd_part_parser_data - used to pass data to MTD partition parsers.
+  * @origin: for RedBoot, start address of MTD device
++ * @caldata: for CFE, start address of wifi calibration data
+  * @of_node: for OF parsers, device node containing partitioning information
+  */
+ struct mtd_part_parser_data {
+ 	unsigned long origin;
++	unsigned long caldata[2];
+ 	struct device_node *of_node;
+ };
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/418-MIPS-BCM63XX-pass-caldata-info-to-flash.patch b/target/linux/brcm63xx/patches-4.1/418-MIPS-BCM63XX-pass-caldata-info-to-flash.patch
new file mode 100644
index 0000000..374604f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/418-MIPS-BCM63XX-pass-caldata-info-to-flash.patch
@@ -0,0 +1,83 @@
+From 977f8a30103b9c4992cab8f49357fe0d4274004f Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 3 May 2012 14:55:26 +0200
+Subject: [PATCH 69/80] MIPS: BCM63XX: pass caldata info to flash
+
+---
+ arch/mips/bcm63xx/boards/board_common.c              |    2 +-
+ arch/mips/bcm63xx/dev-flash.c                          |    9 ++++++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h |    4 +++-
+ 3 files changed, 12 insertions(+), 3 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -254,7 +254,7 @@ int __init board_register_devices(void)
+ 	if (board.num_spis)
+ 		spi_register_board_info(board.spis, board.num_spis);
+ 
+-	bcm63xx_flash_register();
++	bcm63xx_flash_register(board.has_caldata, board.caldata);
+ 
+ 	bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
+ 	bcm63xx_led_data.leds = board.leds;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -38,12 +38,15 @@ static struct mtd_partition mtd_partitio
+ 	}
+ };
+ 
++static struct mtd_part_parser_data bcm63xx_parser_data;
++
+ static const char *bcm63xx_part_types[] = { "bcm63xxpart", "RedBoot", NULL };
+ 
+ static struct physmap_flash_data flash_data = {
+ 	.width			= 2,
+ 	.parts			= mtd_partitions,
+ 	.part_probe_types	= bcm63xx_part_types,
++	.pp_data		= &bcm63xx_parser_data,
+ };
+ 
+ static struct resource mtd_resources[] = {
+@@ -71,6 +74,7 @@ void __init bcm63xx_flash_force_phys_bas
+ 
+ static struct flash_platform_data bcm63xx_flash_data = {
+ 	.part_probe_types	= bcm63xx_part_types,
++	.pp_data		= &bcm63xx_parser_data,
+ };
+ 
+ static struct spi_board_info bcm63xx_spi_flash_info[] = {
+@@ -211,9 +215,13 @@ void __init bcm63xx_flash_detect(void)
+ 	}
+ }
+ 
+-int __init bcm63xx_flash_register(void)
++int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata)
+ {
+ 	u32 val;
++	unsigned int i;
++
++	for (i = 0; i < num_caldata; i++)
++		bcm63xx_parser_data.caldata[i] = caldata[i].caldata_offset;
+ 
+ 	switch (flash_type) {
+ 	case BCM63XX_FLASH_TYPE_PARALLEL:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -1,6 +1,8 @@
+ #ifndef __BCM63XX_FLASH_H
+ #define __BCM63XX_FLASH_H
+ 
++#include <board_bcm963xx.h>
++
+ enum {
+ 	BCM63XX_FLASH_TYPE_PARALLEL,
+ 	BCM63XX_FLASH_TYPE_SERIAL,
+@@ -11,7 +13,7 @@ void bcm63xx_flash_detect(void);
+ 
+ void bcm63xx_flash_force_phys_base_address(u32 start, u32 end);
+ 
+-int __init bcm63xx_flash_register(void);
++int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata);
+ 
+ int bcm63xx_flash_get_type(void);
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/420-BCM63XX-add-endian-check-for-ath9k.patch b/target/linux/brcm63xx/patches-4.1/420-BCM63XX-add-endian-check-for-ath9k.patch
new file mode 100644
index 0000000..9d75f3a
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/420-BCM63XX-add-endian-check-for-ath9k.patch
@@ -0,0 +1,51 @@
+--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -2,6 +2,7 @@
+ #define _PCI_ATH9K_FIXUP
+ 
+ 
+-void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
++void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
++	unsigned endian_check) __init;
+ 
+ #endif /* _PCI_ATH9K_FIXUP */
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -20,6 +20,7 @@
+ struct ath9k_caldata {
+ 	unsigned int	slot;
+ 	u32		caldata_offset;
++	unsigned int	endian_check:1;
+ };
+ 
+ /*
+--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -181,12 +181,14 @@ static void ath9k_pci_fixup(struct pci_d
+ }
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
+ 
+-void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
++	unsigned endian_check)
+ {
+ 	if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
+ 		return;
+ 
+ 	ath9k_fixups[ath9k_num_fixups].slot = slot;
++	ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
+ 
+ 	if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
+ 		return;
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -268,7 +268,8 @@ int __init board_register_devices(void)
+ 
+ 	/* register any fixups */
+ 	for (i = 0; i < board.has_caldata; i++)
+-		pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
++		pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
++			board.caldata[i].endian_check);
+ 
+ 	return 0;
+ }
diff --git a/target/linux/brcm63xx/patches-4.1/421-BCM63XX-add-led-pin-for-ath9k.patch b/target/linux/brcm63xx/patches-4.1/421-BCM63XX-add-led-pin-for-ath9k.patch
new file mode 100644
index 0000000..84a26be
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/421-BCM63XX-add-led-pin-for-ath9k.patch
@@ -0,0 +1,49 @@
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -269,7 +269,7 @@ int __init board_register_devices(void)
+ 	/* register any fixups */
+ 	for (i = 0; i < board.has_caldata; i++)
+ 		pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
+-			board.caldata[i].endian_check);
++			board.caldata[i].endian_check, board.caldata[i].led_pin);
+ 
+ 	return 0;
+ }
+--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -182,13 +182,14 @@ static void ath9k_pci_fixup(struct pci_d
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
+ 
+ void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
+-	unsigned endian_check)
++	unsigned endian_check, int led_pin)
+ {
+ 	if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
+ 		return;
+ 
+ 	ath9k_fixups[ath9k_num_fixups].slot = slot;
+ 	ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
++	ath9k_fixups[ath9k_num_fixups].pdata.led_pin = led_pin;
+ 
+ 	if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
+ 		return;
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -21,6 +21,7 @@ struct ath9k_caldata {
+ 	unsigned int	slot;
+ 	u32		caldata_offset;
+ 	unsigned int	endian_check:1;
++	int		led_pin;
+ };
+ 
+ /*
+--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -3,6 +3,6 @@
+ 
+ 
+ void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
+-	unsigned endian_check) __init;
++	unsigned endian_check, int led_pin) __init;
+ 
+ #endif /* _PCI_ATH9K_FIXUP */
diff --git a/target/linux/brcm63xx/patches-4.1/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch b/target/linux/brcm63xx/patches-4.1/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch
new file mode 100644
index 0000000..47273b8
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch
@@ -0,0 +1,206 @@
+From 5ed5b5e9614fa5b02da699ab565af76c7e63d64d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 7 Jan 2013 17:45:39 +0100
+Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices
+
+---
+ arch/mips/bcm63xx/Makefile                         |    2 +-
+ arch/mips/bcm63xx/boards/board_bcm963xx.c          |   17 ++++-
+ arch/mips/bcm63xx/dev-flash.c                      |    2 +-
+ arch/mips/bcm63xx/pci-rt2x00-fixup.c               |   71 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/bcm63xx_dev_flash.h   |    2 +-
+ .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h |    9 ++-
+ .../include/asm/mach-bcm63xx/pci_rt2x00_fixup.h    |    9 +++
+ 7 files changed, 104 insertions(+), 8 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/pci-rt2x00-fixup.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,7 @@ obj-y		+= clk.o cpu.o cs.o gpio.o irq.o
+ 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
+ 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
+ 		   dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
+-		   pci-ath9k-fixup.o usb-common.o sprom.o
++		   pci-ath9k-fixup.o pci-rt2x00-fixup.o usb-common.o sprom.o
+ obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+ 
+ obj-y		+= boards/
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -36,6 +36,7 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+ #include <pci_ath9k_fixup.h>
++#include <pci_rt2x00_fixup.h>
+ 
+ #include "board_common.h"
+ 
+@@ -267,9 +268,19 @@ int __init board_register_devices(void)
+ 	}
+ 
+ 	/* register any fixups */
+-	for (i = 0; i < board.has_caldata; i++)
+-		pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
+-			board.caldata[i].endian_check, board.caldata[i].led_pin);
++	for (i = 0; i < board.has_caldata; i++) {
++		switch (board.caldata[i].vendor) {
++		case PCI_VENDOR_ID_ATHEROS:
++			pci_enable_ath9k_fixup(board.caldata[i].slot,
++				board.caldata[i].caldata_offset, board.caldata[i].endian_check,
++				board.caldata[i].led_pin);
++			break;
++		case PCI_VENDOR_ID_RALINK:
++			pci_enable_rt2x00_fixup(board.caldata[i].slot,
++				board.caldata[i].eeprom);
++			break;
++		}
++	}
+ 
+ 	return 0;
+ }
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -215,7 +215,7 @@ void __init bcm63xx_flash_detect(void)
+ 	}
+ }
+ 
+-int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata)
++int __init bcm63xx_flash_register(int num_caldata, struct bcm63xx_caldata *caldata)
+ {
+ 	u32 val;
+ 	unsigned int i;
+--- /dev/null
++++ b/arch/mips/bcm63xx/pci-rt2x00-fixup.c
+@@ -0,0 +1,72 @@
++/*
++ *  Broadcom BCM63XX RT2x00 EEPROM fixup helper.
++ *
++ *  Copyright (C) 2012 Álvaro Fernández Rojas <noltari@gmail.com>
++ *
++ *  Based on
++ *
++ *  Broadcom BCM63XX Ath9k EEPROM fixup helper.
++ *
++ *  Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/if_ether.h>
++#include <linux/pci.h>
++#include <linux/platform_device.h>
++#include <linux/rt2x00_platform.h>
++
++#include <bcm63xx_nvram.h>
++#include <pci_rt2x00_fixup.h>
++
++struct rt2x00_fixup {
++	unsigned slot;
++	u8 mac[ETH_ALEN];
++	struct rt2x00_platform_data pdata;
++};
++
++static int rt2x00_num_fixups;
++static struct rt2x00_fixup rt2x00_fixups[2] = {
++	{
++		.slot = 255,
++	},
++	{
++		.slot = 255,
++	},
++};
++
++static void rt2x00_pci_fixup(struct pci_dev *dev)
++{
++	unsigned i;
++	struct rt2x00_platform_data *pdata = NULL;
++
++	for (i = 0; i < rt2x00_num_fixups; i++) {
++		if (rt2x00_fixups[i].slot != PCI_SLOT(dev->devfn))
++			continue;
++
++		pdata = &rt2x00_fixups[i].pdata;
++		break;
++	}
++
++	dev->dev.platform_data = pdata;
++}
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RALINK, PCI_ANY_ID, rt2x00_pci_fixup);
++
++void __init pci_enable_rt2x00_fixup(unsigned slot, char* eeprom)
++{
++	if (rt2x00_num_fixups >= ARRAY_SIZE(rt2x00_fixups))
++		return;
++
++	rt2x00_fixups[rt2x00_num_fixups].slot = slot;
++	rt2x00_fixups[rt2x00_num_fixups].pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
++
++	if (bcm63xx_nvram_get_mac_address(rt2x00_fixups[rt2x00_num_fixups].mac))
++		return;
++
++	rt2x00_fixups[rt2x00_num_fixups].pdata.mac_address = rt2x00_fixups[rt2x00_num_fixups].mac;
++	rt2x00_num_fixups++;
++}
++
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -13,7 +13,7 @@ void bcm63xx_flash_detect(void);
+ 
+ void bcm63xx_flash_force_phys_base_address(u32 start, u32 end);
+ 
+-int __init bcm63xx_flash_register(int num_caldata, struct ath9k_caldata *caldata);
++int __init bcm63xx_flash_register(int num_caldata, struct bcm63xx_caldata *caldata);
+ 
+ int bcm63xx_flash_get_type(void);
+ 
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -10,6 +10,7 @@
+ #include <bcm63xx_dev_dsp.h>
+ #include <bcm63xx_fallback_sprom.h>
+ #include <pci_ath9k_fixup.h>
++#include <pci_rt2x00_fixup.h>
+ 
+ /*
+  * flash mapping
+@@ -17,11 +18,15 @@
+ #define BCM963XX_CFE_VERSION_OFFSET	0x570
+ #define BCM963XX_NVRAM_OFFSET		0x580
+ 
+-struct ath9k_caldata {
++struct bcm63xx_caldata {
++	unsigned int	vendor;
+ 	unsigned int	slot;
+ 	u32		caldata_offset;
++	/* Atheros */
+ 	unsigned int	endian_check:1;
+ 	int		led_pin;
++	/* Ralink */
++	char*		eeprom;
+ };
+ 
+ /*
+@@ -47,7 +52,7 @@ struct board_info {
+ 	unsigned int	has_caldata:2;
+ 
+ 	/* wifi calibration data config */
+-	struct ath9k_caldata caldata[2];
++	struct bcm63xx_caldata caldata[2];
+ 
+ 	/* ethernet config */
+ 	struct bcm63xx_enet_platform_data enet0;
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
+@@ -0,0 +1,9 @@
++#ifndef _PCI_RT2X00_FIXUP
++#define _PCI_RT2X00_FIXUP
++
++#define PCI_VENDOR_ID_RALINK 0x1814
++
++void pci_enable_rt2x00_fixup(unsigned slot, char* eeprom) __init;
++
++#endif /* _PCI_RT2X00_FIXUP */
++
diff --git a/target/linux/brcm63xx/patches-4.1/423-bcm63xx_enet_add_b53_support.patch b/target/linux/brcm63xx/patches-4.1/423-bcm63xx_enet_add_b53_support.patch
new file mode 100644
index 0000000..f7697e1
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/423-bcm63xx_enet_add_b53_support.patch
@@ -0,0 +1,169 @@
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
+@@ -336,6 +336,9 @@ struct bcm_enet_priv {
+ 	struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
+ 	int sw_port_link[ENETSW_MAX_PORT];
+ 
++	/* platform device for associated switch */
++	struct platform_device *b53_device;
++
+ 	/* used to poll switch port state */
+ 	struct timer_list swphy_poll;
+ 	spinlock_t enetsw_mdio_lock;
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -31,6 +31,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/if_vlan.h>
+ #include <linux/gpio/consumer.h>
++#include <linux/platform_data/b53.h>
+ 
+ #include <bcm63xx_dev_enet.h>
+ #include "bcm63xx_enet.h"
+@@ -1975,7 +1976,8 @@ static int bcm_enet_remove(struct platfo
+ 	return 0;
+ }
+ 
+-struct platform_driver bcm63xx_enet_driver = {
++
++static struct platform_driver bcm63xx_enet_driver = {
+ 	.probe	= bcm_enet_probe,
+ 	.remove	= bcm_enet_remove,
+ 	.driver	= {
+@@ -1984,6 +1986,42 @@ struct platform_driver bcm63xx_enet_driv
+ 	},
+ };
+ 
++struct b53_platform_data bcm63xx_b53_pdata = {
++	.chip_id = 0x6300,
++	.big_endian = 1,
++};
++
++struct platform_device bcm63xx_b53_dev = {
++	.name		= "b53-switch",
++	.id		= -1,
++	.dev		= {
++		.platform_data = &bcm63xx_b53_pdata,
++	},
++};
++
++static int bcmenet_switch_register(struct bcm_enet_priv *priv, u16 port_mask)
++{
++	int ret;
++
++	bcm63xx_b53_pdata.regs = priv->base;
++	bcm63xx_b53_pdata.enabled_ports = port_mask;
++	bcm63xx_b53_pdata.alias = priv->net_dev->name;
++
++	ret = platform_device_register(&bcm63xx_b53_dev);
++	if (!ret)
++		priv->b53_device = &bcm63xx_b53_dev;
++
++	return ret;
++}
++
++static void bcmenet_switch_unregister(struct bcm_enet_priv *priv)
++{
++	if (priv->b53_device)
++		platform_device_unregister(&bcm63xx_b53_dev);
++
++	priv->b53_device = NULL;
++}
++
+ /*
+  * switch mii access callbacks
+  */
+@@ -2237,29 +2275,6 @@ static int bcm_enetsw_open(struct net_de
+ 		enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
+ 	}
+ 
+-	/* reset mib */
+-	val = enetsw_readb(priv, ENETSW_GMCR_REG);
+-	val |= ENETSW_GMCR_RST_MIB_MASK;
+-	enetsw_writeb(priv, val, ENETSW_GMCR_REG);
+-	mdelay(1);
+-	val &= ~ENETSW_GMCR_RST_MIB_MASK;
+-	enetsw_writeb(priv, val, ENETSW_GMCR_REG);
+-	mdelay(1);
+-
+-	/* force CPU port state */
+-	val = enetsw_readb(priv, ENETSW_IMPOV_REG);
+-	val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
+-	enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
+-
+-	/* enable switch forward engine */
+-	val = enetsw_readb(priv, ENETSW_SWMODE_REG);
+-	val |= ENETSW_SWMODE_FWD_EN_MASK;
+-	enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
+-
+-	/* enable jumbo on all ports */
+-	enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
+-	enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
+-
+ 	/* initialize flow control buffer allocation */
+ 	enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
+ 			ENETDMA_BUFALLOC_REG(priv->rx_chan));
+@@ -2719,6 +2734,9 @@ static int bcm_enetsw_probe(struct platf
+ 	struct bcm63xx_enetsw_platform_data *pd;
+ 	struct resource *res_mem;
+ 	int ret, irq_rx, irq_tx;
++	unsigned i, num_ports = 0;
++	u16 port_mask = BIT(8);
++	u8 val;
+ 
+ 	/* stop if shared driver failed, assume driver->probe will be
+ 	 * called in the same order we register devices (correct ?)
+@@ -2808,6 +2826,43 @@ static int bcm_enetsw_probe(struct platf
+ 	priv->pdev = pdev;
+ 	priv->net_dev = dev;
+ 
++	/* reset mib */
++	val = enetsw_readb(priv, ENETSW_GMCR_REG);
++	val |= ENETSW_GMCR_RST_MIB_MASK;
++	enetsw_writeb(priv, val, ENETSW_GMCR_REG);
++	mdelay(1);
++	val &= ~ENETSW_GMCR_RST_MIB_MASK;
++	enetsw_writeb(priv, val, ENETSW_GMCR_REG);
++	mdelay(1);
++
++	/* force CPU port state */
++	val = enetsw_readb(priv, ENETSW_IMPOV_REG);
++	val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
++	enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
++
++	/* enable switch forward engine */
++	val = enetsw_readb(priv, ENETSW_SWMODE_REG);
++	val |= ENETSW_SWMODE_FWD_EN_MASK;
++	enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
++
++	/* enable jumbo on all ports */
++	enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
++	enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
++
++	for (i = 0; i < priv->num_ports; i++) {
++		struct bcm63xx_enetsw_port *port = &priv->used_ports[i];
++
++		if (!port->used)
++			continue;
++
++		num_ports++;
++		port_mask |= BIT(i);
++	}
++
++	/* only register if there is more than one external port */
++	if (num_ports > 1)
++		bcmenet_switch_register(priv, port_mask);
++
+ 	return 0;
+ 
+ out_put_clk:
+@@ -2836,6 +2891,9 @@ static int bcm_enetsw_remove(struct plat
+ 	priv = netdev_priv(dev);
+ 	unregister_netdev(dev);
+ 
++	/* remove switch */
++	bcmenet_switch_unregister(priv);
++
+ 	/* release device resources */
+ 	iounmap(priv->base);
+ 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
diff --git a/target/linux/brcm63xx/patches-4.1/424-bcm63xx_enet_no_request_mem_region.patch b/target/linux/brcm63xx/patches-4.1/424-bcm63xx_enet_no_request_mem_region.patch
new file mode 100644
index 0000000..a087308
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/424-bcm63xx_enet_no_request_mem_region.patch
@@ -0,0 +1,15 @@
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -2781,12 +2781,6 @@ static int bcm_enetsw_probe(struct platf
+ 	if (ret)
+ 		goto out;
+ 
+-	if (!request_mem_region(res_mem->start, resource_size(res_mem),
+-				"bcm63xx_enetsw")) {
+-		ret = -EBUSY;
+-		goto out;
+-	}
+-
+ 	priv->base = ioremap(res_mem->start, resource_size(res_mem));
+ 	if (priv->base == NULL) {
+ 		ret = -ENOMEM;
diff --git a/target/linux/brcm63xx/patches-4.1/425-bcm63xxpart_parse_paritions_from_dt.patch b/target/linux/brcm63xx/patches-4.1/425-bcm63xxpart_parse_paritions_from_dt.patch
new file mode 100644
index 0000000..53fc4c5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/425-bcm63xxpart_parse_paritions_from_dt.patch
@@ -0,0 +1,357 @@
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -32,6 +32,7 @@
+ #include <linux/vmalloc.h>
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
++#include <linux/of.h>
+ 
+ #include <asm/mach-bcm63xx/bcm63xx_nvram.h>
+ #include <asm/mach-bcm63xx/bcm963xx_tag.h>
+@@ -43,66 +44,35 @@
+ 
+ #define BCM63XX_CFE_MAGIC_OFFSET 0x4e0
+ 
+-static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,
+-					struct mtd_partition **pparts,
+-					struct mtd_part_parser_data *data)
++static bool node_has_compatible(struct device_node *pp)
++{
++	return of_get_property(pp, "compatible", NULL);
++}
++
++static int parse_bcmtag(struct mtd_info *master, struct mtd_partition *pparts,
++			int next_part, size_t offset, size_t size)
+ {
+-	/* CFE, NVRAM and global Linux are always present */
+-	int nrparts = 3, curpart = 0;
+ 	struct bcm_tag *buf;
+-	struct mtd_partition *parts;
++	u32 computed_crc;
+ 	int ret;
+ 	size_t retlen;
+-	unsigned int rootfsaddr, kerneladdr, spareaddr, nvramaddr;
+-	unsigned int rootfslen, kernellen, sparelen, totallen;
+-	unsigned int cfelen, nvramlen;
+-	unsigned int cfe_erasesize;
+-	unsigned int caldatalen1 = 0, caldataaddr1 = 0;
+-	unsigned int caldatalen2 = 0, caldataaddr2 = 0;
+-	int i;
+-	u32 computed_crc;
++	unsigned int rootfsaddr, kerneladdr;
++	unsigned int rootfslen, kernellen, totallen;
+ 	bool rootfs_first = false;
+-
+-	if (!bcm63xx_is_cfe_present())
+-		return -EINVAL;
+-
+-	cfe_erasesize = max_t(uint32_t, master->erasesize,
+-			      BCM63XX_CFE_BLOCK_SIZE);
+-
+-	cfelen = cfe_erasesize;
+-	nvramlen = bcm63xx_nvram_get_psi_size() * SZ_1K;
+-	nvramlen = roundup(nvramlen, cfe_erasesize);
+-	nvramaddr = master->size - nvramlen;
+-
+-	if (data) {
+-		if (data->caldata[0]) {
+-			caldatalen1 = cfe_erasesize;
+-			caldataaddr1 = rounddown(data->caldata[0],
+-						 cfe_erasesize);
+-		}
+-		if (data->caldata[1]) {
+-			caldatalen2 = cfe_erasesize;
+-			caldataaddr2 = rounddown(data->caldata[1],
+-						 cfe_erasesize);
+-		}
+-		if (caldataaddr1 == caldataaddr2) {
+-			caldataaddr2 = 0;
+-			caldatalen2 = 0;
+-		}
+-	}
++	int curr_part = next_part;
+ 
+ 	/* Allocate memory for buffer */
+-	buf = vmalloc(sizeof(struct bcm_tag));
++	buf = vmalloc(sizeof(*buf));
+ 	if (!buf)
+ 		return -ENOMEM;
+ 
+ 	/* Get the tag */
+-	ret = mtd_read(master, cfelen, sizeof(struct bcm_tag), &retlen,
++	ret = mtd_read(master, offset, sizeof(*buf), &retlen,
+ 		       (void *)buf);
+ 
+-	if (retlen != sizeof(struct bcm_tag)) {
++	if (retlen != sizeof(*buf)) {
+ 		vfree(buf);
+-		return -EIO;
++		return 0;
+ 	}
+ 
+ 	computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf,
+@@ -121,7 +91,6 @@ static int bcm63xx_parse_cfe_partitions(
+ 
+ 		kerneladdr = kerneladdr - BCM63XX_EXTENDED_SIZE;
+ 		rootfsaddr = rootfsaddr - BCM63XX_EXTENDED_SIZE;
+-		spareaddr = roundup(totallen, master->erasesize) + cfelen;
+ 
+ 		if (rootfsaddr < kerneladdr) {
+ 			/* default Broadcom layout */
+@@ -130,8 +99,8 @@ static int bcm63xx_parse_cfe_partitions(
+ 		} else {
+ 			/* OpenWrt layout */
+ 			rootfsaddr = kerneladdr + kernellen;
+-			rootfslen = buf->real_rootfs_length;
+-			spareaddr = rootfsaddr + rootfslen;
++			rootfslen = size - kernellen -
++				    sizeof(*buf);
+ 		}
+ 	} else {
+ 		pr_warn("CFE boot tag CRC invalid (expected %08x, actual %08x)\n",
+@@ -139,16 +108,153 @@ static int bcm63xx_parse_cfe_partitions(
+ 		kernellen = 0;
+ 		rootfslen = 0;
+ 		rootfsaddr = 0;
+-		spareaddr = cfelen;
+ 	}
+-	sparelen = min_not_zero(nvramaddr, caldataaddr1) - spareaddr;
+ 
+-	/* Determine number of partitions */
+-	if (rootfslen > 0)
+-		nrparts++;
++	if (kernellen > 0) {
++		int kernelpart = curr_part;
+ 
+-	if (kernellen > 0)
+-		nrparts++;
++		if (rootfslen > 0 && rootfs_first)
++			kernelpart++;
++		pparts[kernelpart].name = "kernel";
++		pparts[kernelpart].offset = kerneladdr;
++		pparts[kernelpart].size = kernellen;
++		curr_part++;
++	}
++
++	if (rootfslen > 0) {
++		int rootfspart = curr_part;
++
++		if (kernellen > 0 && rootfs_first)
++			rootfspart--;
++		pparts[rootfspart].name = "rootfs";
++		pparts[rootfspart].offset = rootfsaddr;
++		pparts[rootfspart].size = rootfslen;
++
++		curr_part++;
++	}
++
++	vfree(buf);
++
++	return curr_part - next_part;
++}
++
++
++static int bcm63xx_parse_cfe_partitions_of(struct mtd_info *master,
++					   struct mtd_partition **pparts,
++					   struct mtd_part_parser_data *data)
++{
++	struct device_node *dp = data->of_node;
++	struct device_node *pp;
++	int i, nr_parts = 0;
++	const char *partname;
++	int len;
++
++	for_each_child_of_node(dp, pp) {
++		if (node_has_compatible(pp))
++			continue;
++
++		if (!of_get_property(pp, "reg", &len))
++			continue;
++
++		partname = of_get_property(pp, "label", &len);
++		if (!partname)
++			partname = of_get_property(pp, "name", &len);
++
++		if (!strcmp(partname, "linux"))
++			nr_parts += 2;
++
++		nr_parts++;
++	}
++
++	*pparts = kzalloc(nr_parts * sizeof(**pparts), GFP_KERNEL);
++	if (!*pparts)
++		return -ENOMEM;
++
++	i = 0;
++	for_each_child_of_node(dp, pp) {
++		const __be32 *reg;
++		int a_cells, s_cells;
++		size_t size, offset;
++
++		if (node_has_compatible(pp))
++			continue;
++
++		reg = of_get_property(pp, "reg", &len);
++		if (!reg)
++			continue;
++
++		a_cells = of_n_addr_cells(pp);
++		s_cells = of_n_size_cells(pp);
++		offset = of_read_number(reg, a_cells);
++		size = of_read_number(reg + a_cells, s_cells);
++		partname = of_get_property(pp, "label", &len);
++		if (!partname)
++			partname = of_get_property(pp, "name", &len);
++
++		if (!strcmp(partname, "linux"))
++			i += parse_bcmtag(master, *pparts, i, offset, size);
++
++		if (of_get_property(pp, "read-only", &len))
++			(*pparts)[i].mask_flags |= MTD_WRITEABLE;
++
++		if (of_get_property(pp, "lock", &len))
++			(*pparts)[i].mask_flags |= MTD_POWERUP_LOCK;
++
++		(*pparts)[i].offset = offset;
++		(*pparts)[i].size = size;
++		(*pparts)[i].name = partname;
++
++		i++;
++	}
++
++	return i;
++}
++
++static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,
++					struct mtd_partition **pparts,
++					struct mtd_part_parser_data *data)
++{
++	/* CFE, NVRAM and global Linux are always present */
++	int nrparts = 5, curpart = 0;
++	struct mtd_partition *parts;
++	unsigned int nvramaddr;
++	unsigned int cfelen, nvramlen;
++	unsigned int cfe_erasesize;
++	unsigned int caldatalen1 = 0, caldataaddr1 = 0;
++	unsigned int caldatalen2 = 0, caldataaddr2 = 0;
++	unsigned int imageaddr, imagelen;
++	int i;
++
++	if (!bcm63xx_is_cfe_present())
++		return -EINVAL;
++
++	cfe_erasesize = max_t(uint32_t, master->erasesize,
++			      BCM63XX_CFE_BLOCK_SIZE);
++
++	cfelen = cfe_erasesize;
++	nvramlen = bcm63xx_nvram_get_psi_size() * SZ_1K;
++	nvramlen = roundup(nvramlen, cfe_erasesize);
++	nvramaddr = master->size - nvramlen;
++
++	if (data) {
++		if (data->caldata[0]) {
++			caldatalen1 = cfe_erasesize;
++			caldataaddr1 = rounddown(data->caldata[0],
++						 cfe_erasesize);
++		}
++		if (data->caldata[1]) {
++			caldatalen2 = cfe_erasesize;
++			caldataaddr2 = rounddown(data->caldata[1],
++						 cfe_erasesize);
++		}
++		if (caldataaddr1 == caldataaddr2) {
++			caldataaddr2 = 0;
++			caldatalen2 = 0;
++		}
++	}
++
++	imageaddr = cfelen;
++	imagelen = min_not_zero(nvramaddr, caldataaddr1) - imageaddr;
+ 
+ 	if (caldatalen1 > 0)
+ 		nrparts++;
+@@ -158,10 +264,8 @@ static int bcm63xx_parse_cfe_partitions(
+ 
+ 	/* Ask kernel for more memory */
+ 	parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL);
+-	if (!parts) {
+-		vfree(buf);
++	if (!parts)
+ 		return -ENOMEM;
+-	}
+ 
+ 	/* Start building partition list */
+ 	parts[curpart].name = "CFE";
+@@ -169,29 +273,7 @@ static int bcm63xx_parse_cfe_partitions(
+ 	parts[curpart].size = cfelen;
+ 	curpart++;
+ 
+-	if (kernellen > 0) {
+-		int kernelpart = curpart;
+-
+-		if (rootfslen > 0 && rootfs_first)
+-			kernelpart++;
+-		parts[kernelpart].name = "kernel";
+-		parts[kernelpart].offset = kerneladdr;
+-		parts[kernelpart].size = kernellen;
+-		curpart++;
+-	}
+-
+-	if (rootfslen > 0) {
+-		int rootfspart = curpart;
+-
+-		if (kernellen > 0 && rootfs_first)
+-			rootfspart--;
+-		parts[rootfspart].name = "rootfs";
+-		parts[rootfspart].offset = rootfsaddr;
+-		parts[rootfspart].size = rootfslen;
+-		if (sparelen > 0  && !rootfs_first)
+-			parts[rootfspart].size += sparelen;
+-		curpart++;
+-	}
++	curpart += parse_bcmtag(master, parts, curpart, imageaddr, imagelen);
+ 
+ 	if (caldatalen1 > 0) {
+ 		if (caldatalen2 > 0)
+@@ -217,25 +299,33 @@ static int bcm63xx_parse_cfe_partitions(
+ 
+ 	/* Global partition "linux" to make easy firmware upgrade */
+ 	parts[curpart].name = "linux";
+-	parts[curpart].offset = cfelen;
+-	parts[curpart].size = min_not_zero(nvramaddr, caldataaddr1) - cfelen;
++	parts[curpart].offset = imageaddr;
++	parts[curpart].size = imagelen;
++	curpart++;
+ 
+-	for (i = 0; i < nrparts; i++)
++	for (i = 0; i < curpart; i++)
+ 		pr_info("Partition %d is %s offset %llx and length %llx\n", i,
+ 			parts[i].name, parts[i].offset,	parts[i].size);
+ 
+-	pr_info("Spare partition is offset %x and length %x\n",	spareaddr,
+-		sparelen);
+-
+ 	*pparts = parts;
+-	vfree(buf);
+ 
+ 	return nrparts;
+ };
+ 
++
++static int bcm63xx_parse_partitions(struct mtd_info *master,
++				    struct mtd_partition **pparts,
++				    struct mtd_part_parser_data *data)
++{
++	if (data && data->of_node)
++		return bcm63xx_parse_cfe_partitions_of(master, pparts, data);
++	else
++		return bcm63xx_parse_cfe_partitions(master, pparts, data);
++}
++
+ static struct mtd_part_parser bcm63xx_cfe_parser = {
+ 	.owner = THIS_MODULE,
+-	.parse_fn = bcm63xx_parse_cfe_partitions,
++	.parse_fn = bcm63xx_parse_partitions,
+ 	.name = "bcm63xxpart",
+ };
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/427-boards_probe_switch.patch b/target/linux/brcm63xx/patches-4.1/427-boards_probe_switch.patch
new file mode 100644
index 0000000..127d1ef
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/427-boards_probe_switch.patch
@@ -0,0 +1,119 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -118,6 +118,8 @@ static struct board_info __initdata boar
+ 	.has_uart0			= 1,
+ 	.has_enet0			= 1,
+ 	.enet0 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -161,6 +163,8 @@ static struct board_info __initdata boar
+ 	.has_uart0			= 1,
+ 	.has_enet0			= 1,
+ 	.enet0 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -272,6 +276,8 @@ static struct board_info __initdata boar
+ 		.use_internal_phy	= 1,
+ 	},
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -334,6 +340,8 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -388,6 +396,8 @@ static struct board_info __initdata boar
+ 		.use_internal_phy	= 1,
+ 	},
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -448,6 +458,8 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -471,6 +483,8 @@ static struct board_info __initdata boar
+ 		.use_internal_phy	= 1,
+ 	},
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -490,6 +504,8 @@ static struct board_info __initdata boar
+ 	.has_enet1			= 1,
+ 	.enet0 = {
+ 		.has_phy		= 1,
++		.phy_id			= 0,
++		.has_phy		= 1,
+ 		.use_internal_phy	= 1,
+ 	},
+ 	.enet1 = {
+@@ -513,6 +529,8 @@ static struct board_info __initdata boar
+ 		.use_internal_phy	= 1,
+ 	},
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -541,6 +559,8 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -594,6 +614,8 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -643,6 +665,8 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+@@ -666,6 +690,8 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
diff --git a/target/linux/brcm63xx/patches-4.1/499-allow_better_context_for_board_patches.patch b/target/linux/brcm63xx/patches-4.1/499-allow_better_context_for_board_patches.patch
new file mode 100644
index 0000000..18a1cd4
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/499-allow_better_context_for_board_patches.patch
@@ -0,0 +1,56 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -56,7 +56,7 @@ static struct board_info __initdata boar
+ 	.ephy_reset_gpio		= 36,
+ 	.ephy_reset_gpio_flags		= GPIO_ACTIVE_LOW,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_3368 */
+ 
+ /*
+  * known 6328 boards
+@@ -105,7 +105,7 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6328 */
+ 
+ /*
+  * known 6338 boards
+@@ -198,7 +198,7 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6338 */
+ 
+ /*
+  * known 6345 boards
+@@ -210,7 +210,7 @@ static struct board_info __initdata boar
+ 
+ 	.has_uart0			= 1,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6345 */
+ 
+ /*
+  * known 6348 boards
+@@ -537,7 +537,7 @@ static struct board_info __initdata boar
+ 
+ 	.has_ohci0 = 1,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6348 */
+ 
+ /*
+  * known 6358 boards
+@@ -698,7 +698,7 @@ static struct board_info __initdata boar
+ 
+ 	.has_ohci0			= 1,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
+ /*
+  * all boards
diff --git a/target/linux/brcm63xx/patches-4.1/500-board-D4PW.patch b/target/linux/brcm63xx/patches-4.1/500-board-D4PW.patch
new file mode 100644
index 0000000..b0d93b0
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/500-board-D4PW.patch
@@ -0,0 +1,41 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -537,6 +537,22 @@ static struct board_info __initdata boar
+ 
+ 	.has_ohci0 = 1,
+ };
++
++static struct board_info __initdata board_96348_D4PW = {
++	.name				= "D-4P-W",
++	.expected_cpu_id		= 0x6348,
++
++	.has_enet1			= 1,
++	.has_pci			= 1,
++	.has_uart0 			= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+ 
+ /*
+@@ -726,6 +742,7 @@ static const struct board_info __initcon
+ 	&board_DV201AMR,
+ 	&board_96348gw_a,
+ 	&board_rta1025w_16,
++	&board_96348_D4PW,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -757,6 +774,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+ 	{ .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
+ 	{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++	{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ 	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ 	{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+ 	{ .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
diff --git a/target/linux/brcm63xx/patches-4.1/501-board-NB4.patch b/target/linux/brcm63xx/patches-4.1/501-board-NB4.patch
new file mode 100644
index 0000000..35335fc
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/501-board-NB4.patch
@@ -0,0 +1,83 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -714,6 +714,62 @@ static struct board_info __initdata boar
+ 
+ 	.has_ohci0			= 1,
+ };
++
++static struct board_info __initdata board_nb4_ser_r0 = {
++	.name				= "NB4-SER-r0",
++	.expected_cpu_id		= 0x6358,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++
++	.has_ohci0 = 1,
++	.has_pccard = 1,
++	.has_ehci0 = 1,
++	.num_usbh_ports			= 2,
++};
++
++static struct board_info __initdata board_nb4_fxc_r1 = {
++	.name				= "NB4-FXC-r1",
++	.expected_cpu_id		= 0x6358,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++
++	.has_ohci0 = 1,
++	.has_pccard = 1,
++	.has_ehci0 = 1,
++	.num_usbh_ports			= 2,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
+ /*
+@@ -750,6 +806,8 @@ static const struct board_info __initcon
+ 	&board_96358vw2,
+ 	&board_AGPFS0,
+ 	&board_DWVS0,
++	&board_nb4_ser_r0,
++	&board_nb4_fxc_r1,
+ #endif
+ };
+ 
+@@ -791,6 +849,8 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
++	{ .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, },
++	{ .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ #endif
diff --git a/target/linux/brcm63xx/patches-4.1/502-board-96338W2_E7T.patch b/target/linux/brcm63xx/patches-4.1/502-board-96338W2_E7T.patch
new file mode 100644
index 0000000..4bf4fd7
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/502-board-96338W2_E7T.patch
@@ -0,0 +1,39 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -198,6 +198,20 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct board_info __initdata board_96338w2_e7t = {
++	.name				= "96338W2_E7T",
++	.expected_cpu_id		= 0x6338,
++
++	.has_enet0			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6338 */
+ 
+ /*
+@@ -785,6 +799,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	&board_96338gw,
+ 	&board_96338w,
++	&board_96338w2_e7t,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	&board_96345gw2,
+@@ -822,6 +837,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+ 	{ .compatible = "brcm,bcm96338w", .data = &board_96338w, },
++	{ .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	{ .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
diff --git a/target/linux/brcm63xx/patches-4.1/503-board-CPVA642.patch b/target/linux/brcm63xx/patches-4.1/503-board-CPVA642.patch
new file mode 100644
index 0000000..8bdcdd0
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/503-board-CPVA642.patch
@@ -0,0 +1,45 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -680,6 +680,26 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_CPVA642 = {
++	.name                           = "CPVA642",
++	.expected_cpu_id                = 0x6358,
++
++	.has_uart0			= 1,
++	.has_enet1                      = 1,
++	.has_pci                        = 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100        = 1,
++		.force_duplex_full      = 1,
++ 	},
++
++	.has_ohci0 = 1,
++	.has_ehci0 = 1,
++};
++
++
+ static struct board_info __initdata board_AGPFS0 = {
+ 	.name				= "AGPF-S0",
+ 	.expected_cpu_id		= 0x6358,
+@@ -820,6 +840,7 @@ static const struct board_info __initcon
+ 	&board_96358vw,
+ 	&board_96358vw2,
+ 	&board_AGPFS0,
++	&board_CPVA642,
+ 	&board_DWVS0,
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
+@@ -867,6 +888,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
+ 	{ .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, },
+ 	{ .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, },
++	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ #endif
diff --git a/target/linux/brcm63xx/patches-4.1/504-board_dsl_274xb_rev_c.patch b/target/linux/brcm63xx/patches-4.1/504-board_dsl_274xb_rev_c.patch
new file mode 100644
index 0000000..0b89b42
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/504-board_dsl_274xb_rev_c.patch
@@ -0,0 +1,42 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -749,6 +749,23 @@ static struct board_info __initdata boar
+ 	.has_ohci0			= 1,
+ };
+ 
++/* D-Link DSL-274xB revison C2/C3 */
++static struct board_info __initdata board_dsl_274xb_rev_c = {
++	.name				= "AW4139",
++	.expected_cpu_id		= 0x6358,
++
++	.has_uart0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
++
+ static struct board_info __initdata board_nb4_ser_r0 = {
+ 	.name				= "NB4-SER-r0",
+ 	.expected_cpu_id		= 0x6358,
+@@ -842,6 +859,7 @@ static const struct board_info __initcon
+ 	&board_AGPFS0,
+ 	&board_CPVA642,
+ 	&board_DWVS0,
++	&board_dsl_274xb_rev_c,
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
+ #endif
+@@ -881,6 +899,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
+ 	{ .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
+ 	{ .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
++	{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ 	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ 	{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
diff --git a/target/linux/brcm63xx/patches-4.1/505-board_spw500v.patch b/target/linux/brcm63xx/patches-4.1/505-board_spw500v.patch
new file mode 100644
index 0000000..6391c89
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/505-board_spw500v.patch
@@ -0,0 +1,64 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -567,6 +567,45 @@ static struct board_info __initdata boar
+ 		.force_duplex_full	= 1,
+ 	},
+ };
++
++static struct sprom_fixup __initdata spw500v_fixups[] = {
++	{ .offset = 46, .value = 0x3046 },
++	{ .offset = 47, .value = 0x15a7 },
++	{ .offset = 48, .value = 0xfa89 },
++	{ .offset = 49, .value = 0xfe79 },
++	{ .offset = 57, .value = 0x6a49 },
++};
++
++static struct board_info __initdata board_spw500v = {
++	.name				= "SPW500V",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++
++	.has_dsp			= 1,
++	.dsp = {
++		.gpio_rst		= 6,
++		.gpio_int		= 34,
++		.ext_irq		= 2,
++		.cs			= 2,
++	},
++
++	.fallback_sprom = {
++		.type			= SPROM_BCM4318,
++		.pci_bus		= 0,
++		.pci_dev		= 1,
++		.board_fixups		= spw500v_fixups,
++		.num_board_fixups	= ARRAY_SIZE(spw500v_fixups),
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+ 
+ /*
+@@ -851,6 +890,7 @@ static const struct board_info __initcon
+ 	&board_96348gw_a,
+ 	&board_rta1025w_16,
+ 	&board_96348_D4PW,
++	&board_spw500v,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -892,6 +932,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+ 	{ .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
+ 	{ .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
++	{ .compatible = "t-com,spw500v", .data = &board_spw500v, },
+ 	{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ 	{ .compatible = "usr,9108", .data = &board_96348gw_a, },
+ #endif
diff --git a/target/linux/brcm63xx/patches-4.1/506-board_gw6200_gw6000.patch b/target/linux/brcm63xx/patches-4.1/506-board_gw6200_gw6000.patch
new file mode 100644
index 0000000..f25f451
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/506-board_gw6200_gw6000.patch
@@ -0,0 +1,87 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -456,6 +456,66 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_gw6200 = {
++	.name				= "GW6200",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++	.enet1 = {
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.has_ohci0 = 1,
++
++	.has_dsp			= 1,
++		.dsp = {
++		.gpio_rst		= 8, /* FIXME: What is real GPIO here? */
++		.gpio_int		= 34,
++		.ext_irq		= 2,
++		.cs			= 2,
++	},
++};
++
++static struct board_info __initdata board_gw6000 = {
++	.name				= "GW6000",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++	.enet1 = {
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.has_ohci0 = 1,
++
++	.has_dsp			= 1,
++	.dsp = {
++		.gpio_rst		= 6,
++		.gpio_int		= 34,
++		.ext_irq		= 2,
++		.cs			= 2,
++	},
++};
++
++
++
+ static struct board_info __initdata board_FAST2404 = {
+ 	.name				= "F@ST2404",
+ 	.expected_cpu_id		= 0x6348,
+@@ -883,6 +943,8 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ 	&board_96348r,
+ 	&board_96348gw,
++	&board_gw6000,
++	&board_gw6200,
+ 	&board_96348gw_10,
+ 	&board_96348gw_11,
+ 	&board_FAST2404,
+@@ -933,6 +995,8 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
+ 	{ .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
+ 	{ .compatible = "t-com,spw500v", .data = &board_spw500v, },
++	{ .compatible = "tecom,gw6000", .data = &board_gw6000, },
++	{ .compatible = "tecom,gw6200", .data = &board_gw6200, },
+ 	{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ 	{ .compatible = "usr,9108", .data = &board_96348gw_a, },
+ #endif
diff --git a/target/linux/brcm63xx/patches-4.1/507-board-MAGIC.patch b/target/linux/brcm63xx/patches-4.1/507-board-MAGIC.patch
new file mode 100644
index 0000000..d2d2416
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/507-board-MAGIC.patch
@@ -0,0 +1,59 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -666,6 +666,40 @@ static struct board_info __initdata boar
+ 		.num_board_fixups	= ARRAY_SIZE(spw500v_fixups),
+ 	},
+ };
++
++static struct board_info __initdata board_96348sv = {
++	.name				= "MAGIC",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++	.enet1 = {
++		/* it has BP_ENET_EXTERNAL_PHY */
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.has_ohci0			= 1,
++	.has_pccard			= 1,
++	.has_ehci0			= 1,
++
++	.has_dsp			= 1,
++	.dsp = {
++		.gpio_rst		= 25,
++		.gpio_int		= 34,
++		.cs			= 2,
++		.ext_irq		= 2,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+ 
+ /*
+@@ -953,6 +987,7 @@ static const struct board_info __initcon
+ 	&board_rta1025w_16,
+ 	&board_96348_D4PW,
+ 	&board_spw500v,
++	&board_96348sv,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -997,6 +1032,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "t-com,spw500v", .data = &board_spw500v, },
+ 	{ .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ 	{ .compatible = "tecom,gw6200", .data = &board_gw6200, },
++	{ .compatible = "telsey,magic", .data = &board_96348sv, },
+ 	{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ 	{ .compatible = "usr,9108", .data = &board_96348gw_a, },
+ #endif
diff --git a/target/linux/brcm63xx/patches-4.1/508-board_hw553.patch b/target/linux/brcm63xx/patches-4.1/508-board_hw553.patch
new file mode 100644
index 0000000..8cc14fb
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/508-board_hw553.patch
@@ -0,0 +1,53 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -954,6 +954,34 @@ static struct board_info __initdata boar
+ 	.has_ehci0 = 1,
+ 	.num_usbh_ports			= 2,
+ };
++
++static struct board_info __initdata board_HW553 = {
++	.name                           = "HW553",
++	.expected_cpu_id                = 0x6358,
++
++	.has_uart0			= 1,
++
++	.has_enet1                      = 1,
++	.has_pci                        = 1,
++	.use_fallback_sprom		= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100        = 1,
++		.force_duplex_full      = 1,
++	},
++
++	.has_ohci0 = 1,
++	.has_ehci0 = 1,
++	.num_usbh_ports			= 2,
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM4318,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
+ /*
+@@ -999,6 +1027,7 @@ static const struct board_info __initcon
+ 	&board_dsl_274xb_rev_c,
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
++	&board_HW553,
+ #endif
+ };
+ 
+@@ -1042,6 +1071,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
+ 	{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ 	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
++	{ .compatible = "huawei,hg553", .data = &board_HW553, },
+ 	{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
diff --git a/target/linux/brcm63xx/patches-4.1/509-board_rta1320_16m.patch b/target/linux/brcm63xx/patches-4.1/509-board_rta1320_16m.patch
new file mode 100644
index 0000000..0b0d970
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/509-board_rta1320_16m.patch
@@ -0,0 +1,40 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -212,6 +212,21 @@ static struct board_info __initdata boar
+ 		.force_duplex_full	= 1,
+ 	},
+ };
++
++static struct board_info __initdata board_rta1320_16m = {
++	.name				= "RTA1320_16M",
++	.expected_cpu_id		= 0x6338,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6338 */
+ 
+ /*
+@@ -998,6 +1013,7 @@ static const struct board_info __initcon
+ 	&board_96338gw,
+ 	&board_96338w,
+ 	&board_96338w2_e7t,
++	&board_rta1320_16m,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	&board_96345gw2,
+@@ -1042,6 +1058,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+ 	{ .compatible = "brcm,bcm96338w", .data = &board_96338w, },
++	{ .compatible = "dynalink,rta1320", .data = &board_rta1320_16m, },
+ 	{ .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
diff --git a/target/linux/brcm63xx/patches-4.1/510-board_spw303v.patch b/target/linux/brcm63xx/patches-4.1/510-board_spw303v.patch
new file mode 100644
index 0000000..c251e76
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/510-board_spw303v.patch
@@ -0,0 +1,40 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -997,6 +997,21 @@ static struct board_info __initdata boar
+ 		.pci_dev			= 1,
+ 	},
+ };
++
++ /* T-Home Speedport W 303V Typ B */
++static struct board_info __initdata board_spw303v = {
++	.name			= "96358-502V",
++	.expected_cpu_id	= 0x6358,
++
++	.has_uart0		= 1,
++	.has_enet0		= 1,
++	.has_pci		= 1,
++
++	.enet0 = {
++		.has_phy 		= 1,
++		.use_internal_phy 	= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
+ /*
+@@ -1044,6 +1059,7 @@ static const struct board_info __initcon
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
+ 	&board_HW553,
++	&board_spw303v,
+ #endif
+ };
+ 
+@@ -1095,6 +1111,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
+ 	{ .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, },
+ 	{ .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, },
++	{ .compatible = "t-com,spw303v", .data = &board_spw303v, },
+ 	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
diff --git a/target/linux/brcm63xx/patches-4.1/511-board_V2500V.patch b/target/linux/brcm63xx/patches-4.1/511-board_V2500V.patch
new file mode 100644
index 0000000..82c9883
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/511-board_V2500V.patch
@@ -0,0 +1,93 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -715,6 +715,27 @@ static struct board_info __initdata boar
+ 		.ext_irq		= 2,
+ 	},
+ };
++
++static struct board_info __initdata board_V2500V_BB = {
++	.name				= "V2500V_BB",
++        .expected_cpu_id                = 0x6348,
++
++        .has_uart0                      = 1,
++        .has_enet0                      = 1,
++        .has_enet1                      = 1,
++        .has_pci                        = 1,
++
++        .enet0 = {
++                .has_phy                = 1,
++                .use_internal_phy       = 1,
++        },
++        .enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++                .force_speed_100        = 1,
++                .force_duplex_full      = 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+ 
+ /*
+@@ -1047,6 +1068,7 @@ static const struct board_info __initcon
+ 	&board_96348_D4PW,
+ 	&board_spw500v,
+ 	&board_96348sv,
++	&board_V2500V_BB,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1086,6 +1108,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+ 	{ .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
+ 	{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++	{ .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
+ 	{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ 	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ 	{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+@@ -1145,6 +1168,22 @@ void __init board_bcm963xx_init(void)
+ 		val &= MPI_CSBASE_BASE_MASK;
+ 	}
+ 	boot_addr = (u8 *)KSEG1ADDR(val);
++	printk(KERN_INFO PFX "Boot address 0x%08x\n",(unsigned int)boot_addr);
++
++	/* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */
++	/* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/
++	/* Loading firmware from the CFE Prompt always loads to Bank 0 */
++	/* Do an early check of CFE and then select bank 0 */
++
++	if (boot_addr == (u8 *)0xbf800000) {
++		u8 *tmp_boot_addr = (u8*)0xbfc00000;
++
++		bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET);
++		if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) {
++			printk(KERN_INFO PFX "V2500V: nvram bank 0\n");
++			boot_addr = tmp_boot_addr;
++		}
++	}
+ 
+ 	/* dump cfe version */
+ 	cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -20,6 +20,7 @@
+ #include <linux/spi/spi.h>
+ #include <linux/spi/flash.h>
+ 
++#include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
+ #include <bcm63xx_dev_hsspi.h>
+@@ -234,6 +235,13 @@ int __init bcm63xx_flash_register(int nu
+ 			val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+ 			val &= MPI_CSBASE_BASE_MASK;
+ 
++			/* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
++			/* Loading from CFE always uses Bank 0 */
++			if (!strcmp(board_get_name(), "V2500V_BB")) {
++				pr_info("V2500V: Start in Bank 0\n");
++				val = val + 0x400000; // Select Bank 0 start address
++			}
++
+ 			mtd_resources[0].start = val;
+ 			mtd_resources[0].end = 0x1FFFFFFF;
+ 		}
diff --git a/target/linux/brcm63xx/patches-4.1/512-board_BTV2110.patch b/target/linux/brcm63xx/patches-4.1/512-board_BTV2110.patch
new file mode 100644
index 0000000..ba0a530
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/512-board_BTV2110.patch
@@ -0,0 +1,44 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -410,6 +410,25 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++
++/* BT Voyager 2110 */
++static struct board_info __initdata board_V2110 = {
++	.name				= "V2110",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
++
++
+ static struct board_info __initdata board_96348gw = {
+ 	.name				= "96348GW",
+ 	.expected_cpu_id		= 0x6348,
+@@ -1069,6 +1088,7 @@ static const struct board_info __initcon
+ 	&board_spw500v,
+ 	&board_96348sv,
+ 	&board_V2500V_BB,
++	&board_V2110,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1108,6 +1128,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+ 	{ .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
+ 	{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++	{ .compatible = "bt,v2110", .data = &board_V2110, },
+ 	{ .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
+ 	{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ 	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
diff --git a/target/linux/brcm63xx/patches-4.1/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch b/target/linux/brcm63xx/patches-4.1/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch
new file mode 100644
index 0000000..962f040
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch
@@ -0,0 +1,224 @@
+From e796582b499f0ba6acaa1ac3a10c09cceaab7702 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 04:55:52 +0100
+Subject: [PATCH] MIPS: BCM63XX: add inventel Livebox support
+
+---
+ arch/mips/bcm63xx/boards/Kconfig         |    6 +
+ arch/mips/bcm63xx/boards/Makefile        |    1 +
+ arch/mips/bcm63xx/boards/board_common.c  |    2 +-
+ arch/mips/bcm63xx/boards/board_common.h  |    6 +
+ arch/mips/bcm63xx/boards/board_livebox.c |  215 ++++++++++++++++++++++++++++++
+ 5 files changed, 229 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/boards/board_livebox.c
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -12,4 +12,10 @@ config BOARD_BCM963XX
+ 	default y
+        help
+ 
++config BOARD_LIVEBOX
++	bool "Inventel Livebox(es) boards"
++	select SSB
++	help
++	  Inventel Livebox boards using the RedBoot bootloader.
++
+ endmenu
+--- a/arch/mips/bcm63xx/boards/Makefile
++++ b/arch/mips/bcm63xx/boards/Makefile
+@@ -1,2 +1,3 @@
+ obj-y					+= board_common.o
+ obj-$(CONFIG_BOARD_BCM963XX)		+= board_bcm963xx.o
++obj-$(CONFIG_BOARD_LIVEBOX)		+= board_livebox.o
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -58,7 +58,7 @@ void __init board_prom_init(void)
+ 	if (fw_arg3 == CFE_EPTSEAL)
+ 		board_bcm963xx_init();
+ 	else
+-		panic("unsupported bootloader detected");
++		board_livebox_init();
+ }
+ 
+ static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -24,4 +24,10 @@ static inline void board_of_device_prese
+ }
+ #endif
+ 
++#if defined(CONFIG_BOARD_LIVEBOX)
++void board_livebox_init(void);
++#else
++static inline void board_livebox_init(void) { }
++#endif
++
+ #endif /* __BOARD_COMMON_H */
+--- /dev/null
++++ b/arch/mips/bcm63xx/boards/board_livebox.c
+@@ -0,0 +1,164 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/input.h>
++#include <asm/addrspace.h>
++#include <bcm63xx_board.h>
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_dev_flash.h>
++#include <board_bcm963xx.h>
++
++#include "board_common.h"
++
++#define PFX	"board_livebox: "
++
++static unsigned int mac_addr_used = 0;
++
++/*
++ * known 6348 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6348
++static struct board_info __initdata board_livebox_blue5g = {
++	.name				= "Livebox-blue-5g",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++
++	.enet1 = {
++		  .has_phy		= 1,
++		  .phy_id 		= 31,
++	},
++
++	.ephy_reset_gpio		= 6,
++	.ephy_reset_gpio_flags		= GPIO_ACTIVE_LOW,
++
++	.has_ohci0			= 1,
++	.has_pccard			= 1,
++
++	.has_dsp			= 0, /*TODO some Liveboxes have dsp*/
++	.dsp = {
++		.gpio_rst		= 6,
++		.gpio_int		= 35,
++		.cs			= 2,
++		.ext_irq		= 2,
++	},
++};
++#endif
++
++/*
++ * all boards
++ */
++static const struct board_info __initdata *bcm963xx_boards[] = {
++#ifdef CONFIG_BCM63XX_CPU_6348
++	&board_livebox_blue5g
++#endif
++};
++
++static struct of_device_id const livebox_boards_dt[] = {
++	{ .compatible = "inventel,livebox-blue-5g", .data = &board_livebox_blue5g, },
++	{ }
++};
++
++/*
++ * register & return a new board mac address
++ */
++static int livebox_get_mac_address(u8 *mac)
++{
++	u8 *p;
++	int count;
++
++	memcpy(mac, (u8 *)0xBEBFF377, ETH_ALEN);
++
++	p = mac + ETH_ALEN - 1;
++	count = mac_addr_used;
++
++	while (count--) {
++		do {
++			(*p)++;
++			if (*p != 0)
++				break;
++			p--;
++		} while (p != mac);
++	}
++
++	if (p == mac) {
++		printk(KERN_ERR PFX "unable to fetch mac address\n");
++		return -ENODEV;
++	}
++        mac_addr_used++;
++
++	return 0;
++}
++
++/*
++ * early init callback
++ */
++#define LIVEBOX_GPIO_DETECT_MASK	0x000000ff
++#define LIVEBOX_BOOT_ADDR		0x1e400000
++
++#define LIVEBOX_HW_BLUE5G_9		0x90
++
++void __init board_livebox_init(void)
++{
++	u32 val;
++	u8 hw_version;
++	const struct board_info *board;
++	const struct of_device_id *board_match;
++
++	/* find board by compat */
++	board_match = bcm63xx_match_board(livebox_boards_dt);
++	if (board_match) {
++		board = board_match->data;
++	} else {
++		/* Get hardware version */
++		val = bcm_gpio_readl(GPIO_CTL_LO_REG);
++		val &= ~LIVEBOX_GPIO_DETECT_MASK;
++		bcm_gpio_writel(val, GPIO_CTL_LO_REG);
++
++		hw_version = bcm_gpio_readl(GPIO_DATA_LO_REG);
++		hw_version &= LIVEBOX_GPIO_DETECT_MASK;
++
++		switch (hw_version) {
++		case LIVEBOX_HW_BLUE5G_9:
++			printk(KERN_INFO PFX "Livebox BLUE5G.9\n");
++			board = bcm963xx_boards[0];
++			break;
++		default:
++			printk(KERN_INFO PFX "Unknown livebox version: %02x\n",
++			       hw_version);
++			/* use default livebox configuration */
++			board = bcm963xx_boards[0];
++			break;
++		}
++	}
++
++	/* use default livebox configuration */
++	board_early_setup(board, livebox_get_mac_address);
++
++	/* read base address of boot chip select (0) */
++	val = bcm_mpi_readl(MPI_CSBASE_REG(0));
++	val &= MPI_CSBASE_BASE_MASK;
++	if (val != LIVEBOX_BOOT_ADDR) {
++		printk(KERN_NOTICE PFX "flash address is: 0x%08x, forcing to: 0x%08x\n",
++			val, LIVEBOX_BOOT_ADDR);
++		bcm63xx_flash_force_phys_base_address(LIVEBOX_BOOT_ADDR, 0x1ebfffff);
++	}
++}
diff --git a/target/linux/brcm63xx/patches-4.1/514-board_ct536_ct5621.patch b/target/linux/brcm63xx/patches-4.1/514-board_ct536_ct5621.patch
new file mode 100644
index 0000000..cf3701f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/514-board_ct536_ct5621.patch
@@ -0,0 +1,54 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -429,6 +429,34 @@ static struct board_info __initdata boar
+ };
+ 
+ 
++static struct board_info __initdata board_ct536_ct5621 = {
++	.name				= "CT536_CT5621",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 0,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.has_ohci0 = 1,
++	.has_pccard = 1,
++	.has_ehci0 = 1,
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM4318,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++	},
++};
++
+ static struct board_info __initdata board_96348gw = {
+ 	.name				= "96348GW",
+ 	.expected_cpu_id		= 0x6348,
+@@ -1089,6 +1117,7 @@ static const struct board_info __initcon
+ 	&board_96348sv,
+ 	&board_V2500V_BB,
+ 	&board_V2110,
++	&board_ct536_ct5621,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1130,6 +1159,8 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
+ 	{ .compatible = "bt,v2110", .data = &board_V2110, },
+ 	{ .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
++	{ .compatible = "comtrend,ct-536+", .data = &board_ct536_ct5621, },
++	{ .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
+ 	{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ 	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ 	{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
diff --git a/target/linux/brcm63xx/patches-4.1/515-board_DWV-S0_fixes.patch b/target/linux/brcm63xx/patches-4.1/515-board_DWV-S0_fixes.patch
new file mode 100644
index 0000000..03a124c
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/515-board_DWV-S0_fixes.patch
@@ -0,0 +1,19 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -945,6 +945,8 @@ static struct board_info __initdata boar
+ 	.name				= "DWV-S0",
+ 	.expected_cpu_id		= 0x6358,
+ 
++	.has_uart0			= 1,
++
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
+@@ -963,6 +965,7 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.has_ohci0			= 1,
++	.has_ehci0			= 1,
+ };
+ 
+ /* D-Link DSL-274xB revison C2/C3 */
diff --git a/target/linux/brcm63xx/patches-4.1/516-board_96348A-122.patch b/target/linux/brcm63xx/patches-4.1/516-board_96348A-122.patch
new file mode 100644
index 0000000..a192986
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/516-board_96348A-122.patch
@@ -0,0 +1,50 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -457,6 +457,31 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_96348A_122 = {
++	.name				= "96348A-122",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.has_ohci0 = 1,
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM4318,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++	},
++};
++
+ static struct board_info __initdata board_96348gw = {
+ 	.name				= "96348GW",
+ 	.expected_cpu_id		= 0x6348,
+@@ -1121,6 +1146,7 @@ static const struct board_info __initcon
+ 	&board_V2500V_BB,
+ 	&board_V2110,
+ 	&board_ct536_ct5621,
++	&board_96348A_122,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1163,6 +1189,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "bt,v2110", .data = &board_V2110, },
+ 	{ .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
+ 	{ .compatible = "comtrend,ct-536+", .data = &board_ct536_ct5621, },
++	{ .compatible = "comtrend,ct-5365", .data = &board_96348A_122, },
+ 	{ .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
+ 	{ .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ 	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
diff --git a/target/linux/brcm63xx/patches-4.1/517-RTA1205W_16_uart_fixes.patch b/target/linux/brcm63xx/patches-4.1/517-RTA1205W_16_uart_fixes.patch
new file mode 100644
index 0000000..ba5a7f9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/517-RTA1205W_16_uart_fixes.patch
@@ -0,0 +1,10 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -634,6 +634,7 @@ static struct board_info __initdata boar
+ 	.name				= "RTA1025W_16",
+ 	.expected_cpu_id		= 0x6348,
+ 
++	.has_uart0			= 1,
+ 	.has_enet0			= 1,
+ 	.has_enet1			= 1,
+ 	.has_pci			= 1,
diff --git a/target/linux/brcm63xx/patches-4.1/519_board_CPVA502plus.patch b/target/linux/brcm63xx/patches-4.1/519_board_CPVA502plus.patch
new file mode 100644
index 0000000..c1757dc
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/519_board_CPVA502plus.patch
@@ -0,0 +1,46 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -428,6 +428,27 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_CPVA502plus = {
++	.name				= "CPVA502+",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++	},
++
++	.ephy_reset_gpio		= 4,
++	.ephy_reset_gpio_flags		= GPIO_ACTIVE_LOW,
++};
+ 
+ static struct board_info __initdata board_ct536_ct5621 = {
+ 	.name				= "CT536_CT5621",
+@@ -1148,6 +1169,7 @@ static const struct board_info __initcon
+ 	&board_V2110,
+ 	&board_ct536_ct5621,
+ 	&board_96348A_122,
++	&board_CPVA502plus,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1200,6 +1222,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "t-com,spw500v", .data = &board_spw500v, },
+ 	{ .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ 	{ .compatible = "tecom,gw6200", .data = &board_gw6200, },
++	{ .compatible = "telsey,cpva502+", .data = &board_CPVA502plus, },
+ 	{ .compatible = "telsey,magic", .data = &board_96348sv, },
+ 	{ .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ 	{ .compatible = "usr,9108", .data = &board_96348gw_a, },
diff --git a/target/linux/brcm63xx/patches-4.1/520-bcm63xx-add-support-for-96368MVWG-board.patch b/target/linux/brcm63xx/patches-4.1/520-bcm63xx-add-support-for-96368MVWG-board.patch
new file mode 100644
index 0000000..11b60ff
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/520-bcm63xx-add-support-for-96368MVWG-board.patch
@@ -0,0 +1,119 @@
+From eeacc2529942051504bc957726aa178671344421 Mon Sep 17 00:00:00 2001
+From: Maxime Bizon <mbizon@freebox.fr>
+Date: Wed, 20 Jan 2010 16:21:30 +0100
+Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board.
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c          |   95 ++++++++++++++++++++
+ .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h |    2 +
+ 2 files changed, 97 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1133,6 +1133,59 @@ static struct board_info __initdata boar
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
+ /*
++ * known 6368 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6368
++static struct board_info __initdata board_96368mvwg = {
++	.name				= "96368MVWG",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++
++	.has_usbd			= 1,
++
++	.usbd = {
++		.use_fullspeed		= 0,
++		.port_no		= 0,
++	},
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "port1",
++			},
++
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "port2",
++			},
++
++			[4] = {
++				.used	= 1,
++				.phy_id	= 0x12,
++				.name	= "port0",
++			},
++
++			[5] = {
++				.used	= 1,
++				.phy_id	= 0x11,
++				.name	= "port3",
++			},
++		},
++	},
++
++	.has_ohci0 = 1,
++	.has_ehci0 = 1,
++};
++#endif /* CONFIG_BCM63XX_CPU_6368 */
++
++/*
+  * all boards
+  */
+ static const struct board_info __initconst *bcm963xx_boards[] = {
+@@ -1184,6 +1237,10 @@ static const struct board_info __initcon
+ 	&board_HW553,
+ 	&board_spw303v,
+ #endif
++
++#ifdef CONFIG_BCM63XX_CPU_6368
++	&board_96368mvwg,
++#endif
+ };
+ 
+ static struct of_device_id const bcm963xx_boards_dt[] = {
+@@ -1244,6 +1301,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
++	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ #endif
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -85,12 +85,25 @@ void __init board_early_setup(const stru
+ 		bcm63xx_pci_enabled = 1;
+ 		if (BCMCPU_IS_6348())
+ 			val |= GPIO_MODE_6348_G2_PCI;
++
++		if (BCMCPU_IS_6368())
++			val |= GPIO_MODE_6368_PCI_REQ1 |
++				GPIO_MODE_6368_PCI_GNT1 |
++				GPIO_MODE_6368_PCI_INTB |
++				GPIO_MODE_6368_PCI_REQ0 |
++				GPIO_MODE_6368_PCI_GNT0;
+ 	}
+ #endif
+ 
+ 	if (board.has_pccard) {
+ 		if (BCMCPU_IS_6348())
+ 			val |= GPIO_MODE_6348_G1_MII_PCCARD;
++
++		if (BCMCPU_IS_6368())
++			val |= GPIO_MODE_6368_PCMCIA_CD1 |
++				GPIO_MODE_6368_PCMCIA_CD2 |
++				GPIO_MODE_6368_PCMCIA_VS1 |
++				GPIO_MODE_6368_PCMCIA_VS2;
+ 	}
+ 
+ 	if (board.has_enet0 && !board.enet0.use_internal_phy) {
diff --git a/target/linux/brcm63xx/patches-4.1/521-bcm63xx-add-support-for-96368MVNgr-board.patch b/target/linux/brcm63xx/patches-4.1/521-bcm63xx-add-support-for-96368MVNgr-board.patch
new file mode 100644
index 0000000..1464cdc
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/521-bcm63xx-add-support-for-96368MVNgr-board.patch
@@ -0,0 +1,74 @@
+From f457fc2eb9bb915b5a4d251c7c68d4694cf07b01 Mon Sep 17 00:00:00 2001
+From: Maxime Bizon <mbizon@freebox.fr>
+Date: Fri, 4 Nov 2011 12:33:48 +0100
+Subject: [PATCH 33/63] bcm63xx: add support for 96368MVNgr board.
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |   67 +++++++++++++++++++++++++++++
+ 1 files changed, 67 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1183,6 +1183,46 @@ static struct board_info __initdata boar
+ 	.has_ohci0 = 1,
+ 	.has_ehci0 = 1,
+ };
++
++static struct board_info __initdata board_96368mvngr = {
++	.name				= "96368MVNgr",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "port1",
++			},
++
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "port2",
++			},
++
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "port3",
++			},
++
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "port4",
++			},
++		},
++	},
++
++	.has_ohci0 = 1,
++	.has_ehci0 = 1,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6368 */
+ 
+ /*
+@@ -1240,6 +1280,7 @@ static const struct board_info __initcon
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	&board_96368mvwg,
++	&board_96368mvngr,
+ #endif
+ };
+ 
+@@ -1301,6 +1342,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
++	{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
diff --git a/target/linux/brcm63xx/patches-4.1/522-MIPS-BCM63XX-add-96328avng-reference-board.patch b/target/linux/brcm63xx/patches-4.1/522-MIPS-BCM63XX-add-96328avng-reference-board.patch
new file mode 100644
index 0000000..1b54fa9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/522-MIPS-BCM63XX-add-96328avng-reference-board.patch
@@ -0,0 +1,45 @@
+From c93c2bbf0cc96da5a47d77f01daf6c983cfe4216 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 29 May 2012 10:52:25 +0200
+Subject: [PATCH] MIPS: BCM63XX: add 96328avng reference board
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |   77 +++++++++++++++++++++++++++++
+ 1 files changed, 77 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -104,6 +104,33 @@ static struct board_info __initdata boar
+ 			.active_low	= 1,
+ 		},
+ 	},
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
+ };
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch b/target/linux/brcm63xx/patches-4.1/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch
new file mode 100644
index 0000000..e778676
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch
@@ -0,0 +1,69 @@
+From f0649f7b7c672cf452a1796a1422bf615e1973f8 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 29 May 2012 11:01:12 +0200
+Subject: [PATCH] MIPS: BCM63XX: add 963281TAN reference board
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |   71 +++++++++++++++++++++++++++++
+ 1 files changed, 71 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -132,6 +132,41 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct board_info __initdata board_963281TAN = {
++	.name				= "963281TAN",
++	.expected_cpu_id		= 0x6328,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+ 
+ /*
+@@ -1261,6 +1296,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
++	&board_963281TAN,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	&board_96338gw,
+@@ -1317,6 +1353,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
++	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
+ 	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
diff --git a/target/linux/brcm63xx/patches-4.1/524-board_dsl_274xb_rev_f.patch b/target/linux/brcm63xx/patches-4.1/524-board_dsl_274xb_rev_f.patch
new file mode 100644
index 0000000..2b32cd0
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/524-board_dsl_274xb_rev_f.patch
@@ -0,0 +1,80 @@
+From 66808f706b3dcd83a9f5157997ff478a880a2906 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Mon, 30 Apr 2012 09:10:51 +0200
+Subject: [PATCH 70/79] MIPS: BCM63XX: Add board definition for D-Link
+ DSL-274xB rev F1
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |  104 +++++++++++++++++++++++++++++
+ 1 files changed, 104 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -167,6 +167,51 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct board_info __initdata board_dsl_274xb_f1 = {
++	.name				= "AW4339U",
++	.expected_cpu_id		= 0x6328,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++
++	.has_caldata			= 1,
++	.caldata = {
++		{
++			.vendor		= PCI_VENDOR_ID_ATHEROS,
++			.caldata_offset	= 0x7d1000,
++			.slot		= 0,
++			.led_pin	= -1,
++		},
++	},
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 4",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 3",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 2",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 1",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+ 
+ /*
+@@ -1297,6 +1342,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
+ 	&board_963281TAN,
++	&board_dsl_274xb_f1,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	&board_96338gw,
+@@ -1355,6 +1401,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
+ 	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++	{ .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
diff --git a/target/linux/brcm63xx/patches-4.1/525-board_96348w3.patch b/target/linux/brcm63xx/patches-4.1/525-board_96348w3.patch
new file mode 100644
index 0000000..daac5b5
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/525-board_96348w3.patch
@@ -0,0 +1,44 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -828,6 +828,25 @@ static struct board_info __initdata boar
+ 	.has_ohci0 = 1,
+ };
+ 
++/* NetGear DG834G v4 */
++static struct board_info __initdata board_96348W3 = {
++ 	.name	 			= "96348W3",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0	 		= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.has_ohci0	 		= 1,
++};
++
+ static struct board_info __initdata board_96348_D4PW = {
+ 	.name				= "D-4P-W",
+ 	.expected_cpu_id		= 0x6348,
+@@ -1372,6 +1391,7 @@ static const struct board_info __initcon
+ 	&board_ct536_ct5621,
+ 	&board_96348A_122,
+ 	&board_CPVA502plus,
++	&board_96348W3,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1427,6 +1447,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ 	{ .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+ 	{ .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
++ 	{ .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
+ 	{ .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
+ 	{ .compatible = "t-com,spw500v", .data = &board_spw500v, },
+ 	{ .compatible = "tecom,gw6000", .data = &board_gw6000, },
diff --git a/target/linux/brcm63xx/patches-4.1/526-board_CT6373-1.patch b/target/linux/brcm63xx/patches-4.1/526-board_CT6373-1.patch
new file mode 100644
index 0000000..4422348
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/526-board_CT6373-1.patch
@@ -0,0 +1,50 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1214,6 +1214,31 @@ static struct board_info __initdata boar
+ 	.num_usbh_ports			= 2,
+ };
+ 
++static struct board_info __initdata board_ct6373_1 = {
++	.name				= "CT6373-1",
++	.expected_cpu_id	= 0x6358,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++
++	.has_enet1			= 1,
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM4318,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++	},
++};
++
+ static struct board_info __initdata board_HW553 = {
+ 	.name                           = "HW553",
+ 	.expected_cpu_id                = 0x6358,
+@@ -1403,6 +1428,7 @@ static const struct board_info __initcon
+ 	&board_dsl_274xb_rev_c,
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
++	&board_ct6373_1,
+ 	&board_HW553,
+ 	&board_spw303v,
+ #endif
+@@ -1461,6 +1487,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
+ 	{ .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
+ 	{ .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
++	{ .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
+ 	{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ 	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ 	{ .compatible = "huawei,hg553", .data = &board_HW553, },
diff --git a/target/linux/brcm63xx/patches-4.1/527-board_dva-g3810bn-tl-1.patch b/target/linux/brcm63xx/patches-4.1/527-board_dva-g3810bn-tl-1.patch
new file mode 100644
index 0000000..a093ba1
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/527-board_dva-g3810bn-tl-1.patch
@@ -0,0 +1,55 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1281,6 +1281,36 @@ static struct board_info __initdata boar
+ 		.use_internal_phy 	= 1,
+ 	},
+ };
++
++/* D-Link DVA-G3810BN/TL */
++static struct board_info __initdata board_DVAG3810BN = {
++	.name			= "DVAG3810BN",
++	.expected_cpu_id	= 0x6358,
++
++	.has_uart0		= 1,
++	.has_enet0		= 1,
++	.has_enet1		= 1,
++	.has_pci		= 1,
++
++	.enet0 = {
++		.has_phy		= 0,
++		.use_internal_phy	= 1,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++
++	.has_ohci0		= 1,
++	.has_pccard		= 1,
++	.has_ehci0		= 1,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
+ /*
+@@ -1431,6 +1461,7 @@ static const struct board_info __initcon
+ 	&board_ct6373_1,
+ 	&board_HW553,
+ 	&board_spw303v,
++	&board_DVAG3810BN,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6368
+@@ -1490,6 +1521,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
+ 	{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ 	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
++	{ .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, },
+ 	{ .compatible = "huawei,hg553", .data = &board_HW553, },
+ 	{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
diff --git a/target/linux/brcm63xx/patches-4.1/528-board_nb6.patch b/target/linux/brcm63xx/patches-4.1/528-board_nb6.patch
new file mode 100644
index 0000000..8b49108
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/528-board_nb6.patch
@@ -0,0 +1,112 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -10,6 +10,8 @@
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
++#include <linux/platform_device.h>
++#include <linux/rtl8367.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -26,6 +28,9 @@
+ 
+ #define HCS_OFFSET_128K			0x20000
+ 
++#define NB6_GPIO_RTL8367_SDA	18
++#define NB6_GPIO_RTL8367_SCK	20
++
+ /*
+  * known 3368 boards
+  */
+@@ -1313,6 +1318,69 @@ static struct board_info __initdata boar
+ };
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+ 
++#ifdef CONFIG_BCM63XX_CPU_6362
++static struct rtl8367_extif_config nb6_rtl8367_extif0_cfg = {
++	.mode = RTL8367_EXTIF_MODE_RGMII,
++	.txdelay = 1,
++	.rxdelay = 5,
++	.ability = {
++		.force_mode = 1,
++		.txpause = 1,
++		.rxpause = 1,
++		.link = 1,
++		.duplex = 1,
++		.speed = RTL8367_PORT_SPEED_1000,
++	},
++};
++
++static struct rtl8367_platform_data nb6_rtl8367_data = {
++	.gpio_sda	= NB6_GPIO_RTL8367_SDA,
++	.gpio_sck	= NB6_GPIO_RTL8367_SCK,
++	.extif0_cfg	= &nb6_rtl8367_extif0_cfg,
++};
++
++static struct platform_device nb6_rtl8367_device = {
++	.name		= RTL8367_DRIVER_NAME,
++	.id		= -1,
++	.dev = {
++		.platform_data	= &nb6_rtl8367_data,
++	}
++};
++
++static struct platform_device * __initdata nb6_devices[] = {
++	&nb6_rtl8367_device,
++};
++
++static struct board_info __initdata board_nb6 = {
++	.name				= "NB6",
++	.expected_cpu_id		= 0x6362,
++
++	.has_uart0			= 1,
++
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 2,
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[4] = {
++				.used	= 1,
++				.phy_id	= 0xff,
++				.bypass_link = 1,
++				.force_speed = 1000,
++				.force_duplex_full = 1,
++				.name	= "RGMII",
++			},
++		},
++	},
++
++	.devs = nb6_devices,
++	.num_devs = ARRAY_SIZE(nb6_devices),
++};
++#endif /* CONFIG_BCM63XX_CPU_6362 */
++
+ /*
+  * known 6368 boards
+  */
+@@ -1464,6 +1532,10 @@ static const struct board_info __initcon
+ 	&board_DVAG3810BN,
+ #endif
+ 
++#ifdef CONFIG_BCM63XX_CPU_6362
++	&board_nb6,
++#endif
++
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
+@@ -1532,6 +1604,9 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "t-com,spw303v", .data = &board_spw303v, },
+ 	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_6362
++	{ .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, },
++#endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
diff --git a/target/linux/brcm63xx/patches-4.1/529-board_fast2604.patch b/target/linux/brcm63xx/patches-4.1/529-board_fast2604.patch
new file mode 100644
index 0000000..f82cfb7
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/529-board_fast2604.patch
@@ -0,0 +1,42 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -763,6 +763,23 @@ static struct board_info __initdata boar
+ 	.has_ehci0			= 1,
+ };
+ 
++static struct board_info __initdata board_FAST2604 = {
++	.name						= "F@ST2604",
++	.expected_cpu_id			= 0x6348,
++
++	.has_uart0					= 1,
++	.has_pci					= 1,
++	.has_ohci0					= 1,
++
++	.has_enet1					= 1,
++	.enet1 = {
++		.has_phy			= 1,
++		.phy_id				= 0,
++		.force_speed_100		= 1,
++		.force_duplex_full		= 1,
++	},
++};
++
+ static struct board_info __initdata board_rta1025w_16 = {
+ 	.name				= "RTA1025W_16",
+ 	.expected_cpu_id		= 0x6348,
+@@ -1503,6 +1520,7 @@ static const struct board_info __initcon
+ 	&board_96348gw_10,
+ 	&board_96348gw_11,
+ 	&board_FAST2404,
++	&board_FAST2604,
+ 	&board_DV201AMR,
+ 	&board_96348gw_a,
+ 	&board_rta1025w_16,
+@@ -1578,6 +1596,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
+  	{ .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
+ 	{ .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
++ 	{ .compatible = "sagem,f@st2604", .data = &board_FAST2604, },
+ 	{ .compatible = "t-com,spw500v", .data = &board_spw500v, },
+ 	{ .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ 	{ .compatible = "tecom,gw6200", .data = &board_gw6200, },
diff --git a/target/linux/brcm63xx/patches-4.1/530-board_A4001N1.patch b/target/linux/brcm63xx/patches-4.1/530-board_A4001N1.patch
new file mode 100644
index 0000000..fa164ee
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/530-board_A4001N1.patch
@@ -0,0 +1,69 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -173,6 +173,50 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_A4001N1 = {
++	.name					= "963281T_TEF",
++	.expected_cpu_id			= 0x6328,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++	.num_usbh_ports				= 1,
++	.has_enetsw				= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "Port 1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "Port 2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "Port 3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "Port 4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43225,
++		.pci_bus			= 1,
++		.pci_dev			= 0,
++	},
++};
++
+ static struct board_info __initdata board_dsl_274xb_f1 = {
+ 	.name				= "AW4339U",
+ 	.expected_cpu_id		= 0x6328,
+@@ -1501,6 +1545,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
+ 	&board_963281TAN,
++	&board_A4001N1,
+ 	&board_dsl_274xb_f1,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+@@ -1566,6 +1611,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
++	{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ 	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
+ 	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+ 	{ .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
diff --git a/target/linux/brcm63xx/patches-4.1/531-board_AR-5387un.patch b/target/linux/brcm63xx/patches-4.1/531-board_AR-5387un.patch
new file mode 100644
index 0000000..32808ed
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/531-board_AR-5387un.patch
@@ -0,0 +1,98 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -138,6 +138,79 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct sprom_fixup __initdata ar5387un_fixups[] = {
++	{ .offset = 2, .value = 0x05bb },
++	{ .offset = 65, .value = 0x1204 },
++	{ .offset = 78, .value = 0x0303 },
++	{ .offset = 79, .value = 0x0202 },
++	{ .offset = 80, .value = 0xff02 },
++	{ .offset = 87, .value = 0x0315 },
++	{ .offset = 88, .value = 0x0315 },
++	{ .offset = 96, .value = 0x2048 },
++	{ .offset = 97, .value = 0xff11 },
++	{ .offset = 98, .value = 0x1567 },
++	{ .offset = 99, .value = 0xfb24 },
++	{ .offset = 100, .value = 0x3e3c },
++	{ .offset = 101, .value = 0x4038 },
++	{ .offset = 102, .value = 0xfe7f },
++	{ .offset = 103, .value = 0x1279 },
++	{ .offset = 112, .value = 0x2048 },
++	{ .offset = 113, .value = 0xff03 },
++	{ .offset = 114, .value = 0x154c },
++	{ .offset = 115, .value = 0xfb27 },
++	{ .offset = 116, .value = 0x3e3c },
++	{ .offset = 117, .value = 0x4038 },
++	{ .offset = 118, .value = 0xfe87 },
++	{ .offset = 119, .value = 0x1233 },
++	{ .offset = 203, .value = 0x2226 },
++};
++
++static struct board_info __initdata board_AR5387un = {
++	.name					= "96328A-1441N1",
++	.expected_cpu_id			= 0x6328,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++	.num_usbh_ports				= 1,
++	.has_enetsw				= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "Port 1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "Port 2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "Port 3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "Port 4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43225,
++		.pci_bus			= 1,
++		.pci_dev			= 0,
++		.board_fixups			= ar5387un_fixups,
++		.num_board_fixups		= ARRAY_SIZE(ar5387un_fixups),
++	},
++};
++
+ static struct board_info __initdata board_963281TAN = {
+ 	.name				= "963281TAN",
+ 	.expected_cpu_id		= 0x6328,
+@@ -1544,6 +1617,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
++	&board_AR5387un,
+ 	&board_963281TAN,
+ 	&board_A4001N1,
+ 	&board_dsl_274xb_f1,
+@@ -1614,6 +1688,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ 	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
+ 	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++	{ .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ 	{ .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
diff --git a/target/linux/brcm63xx/patches-4.1/532-board_AR-5381u.patch b/target/linux/brcm63xx/patches-4.1/532-board_AR-5381u.patch
new file mode 100644
index 0000000..a071558
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/532-board_AR-5381u.patch
@@ -0,0 +1,80 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -138,6 +138,61 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct sprom_fixup __initdata ar5381u_fixups[] = {
++	{ .offset = 97, .value = 0xfee5 },
++	{ .offset = 98, .value = 0x157c },
++	{ .offset = 99, .value = 0xfae7 },
++	{ .offset = 113, .value = 0xfefa },
++	{ .offset = 114, .value = 0x15d6 },
++	{ .offset = 115, .value = 0xfaf8 },
++};
++
++static struct board_info __initdata board_AR5381u = {
++	.name					= "96328A-1241N",
++	.expected_cpu_id			= 0x6328,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.use_fallback_sprom			= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++	.num_usbh_ports				= 1,
++	.has_enetsw				= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "Port 1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "Port 2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "Port 3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "Port 4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43225,
++		.pci_bus			= 1,
++		.pci_dev			= 0,
++		.board_fixups			= ar5381u_fixups,
++		.num_board_fixups		= ARRAY_SIZE(ar5381u_fixups),
++	},
++};
++
+ static struct sprom_fixup __initdata ar5387un_fixups[] = {
+ 	{ .offset = 2, .value = 0x05bb },
+ 	{ .offset = 65, .value = 0x1204 },
+@@ -1617,6 +1672,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
++	&board_AR5381u,
+ 	&board_AR5387un,
+ 	&board_963281TAN,
+ 	&board_A4001N1,
+@@ -1688,6 +1744,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ 	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
+ 	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++	{ .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
+ 	{ .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ 	{ .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
+ #endif
diff --git a/target/linux/brcm63xx/patches-4.1/533-board_rta770bw.patch b/target/linux/brcm63xx/patches-4.1/533-board_rta770bw.patch
new file mode 100644
index 0000000..277f7af
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/533-board_rta770bw.patch
@@ -0,0 +1,41 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -523,6 +523,22 @@ static struct board_info __initdata boar
+ 
+ 	.has_uart0			= 1,
+ };
++
++static struct board_info __initdata board_rta770bw = {
++	.name				= "RTA770BW",
++	.expected_cpu_id		= 0x6345,
++
++	.has_uart0			= 1,
++
++	.has_enet0			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6345 */
+ 
+ /*
+@@ -1686,6 +1702,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	&board_96345gw2,
++	&board_rta770bw,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ 	&board_96348r,
+@@ -1756,6 +1773,7 @@ static struct of_device_id const bcm963x
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	{ .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
++	{ .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ 	{ .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
diff --git a/target/linux/brcm63xx/patches-4.1/534-board_hw556.patch b/target/linux/brcm63xx/patches-4.1/534-board_hw556.patch
new file mode 100644
index 0000000..4a01493
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/534-board_hw556.patch
@@ -0,0 +1,124 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -10,6 +10,7 @@
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
++#include <linux/pci_ids.h>
+ #include <linux/platform_device.h>
+ #include <linux/rtl8367.h>
+ #include <asm/addrspace.h>
+@@ -1477,6 +1478,93 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_HW556_C = {
++	.name					= "HW556_C",
++	.expected_cpu_id			= 0x6358,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++	.num_usbh_ports				= 2,
++
++	.has_caldata				= 1,
++	.caldata = {
++		{
++			.vendor			= PCI_VENDOR_ID_RALINK,
++			.caldata_offset		= 0xeffe00,
++			.slot			= 1,
++			.eeprom			= "rt2x00.eeprom",
++		},
++	},
++
++	.has_enet1				= 1,
++	.enet1 = {
++		.has_phy			= 1,
++		.phy_id				= 0,
++		.force_speed_100		= 1,
++		.force_duplex_full		= 1,
++	},
++};
++static struct board_info __initdata board_HW556_A = {
++	.name					= "HW556_A",
++	.expected_cpu_id			= 0x6358,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++	.num_usbh_ports				= 2,
++
++	.has_caldata				= 1,
++	.caldata = {
++		{
++			.vendor			= PCI_VENDOR_ID_ATHEROS,
++			.caldata_offset		= 0xf7e000,
++			.slot			= 1,
++			.endian_check		= 1,
++			.led_pin		= 2,
++		},
++	},
++
++	.has_enet1				= 1,
++	.enet1 = {
++		.has_phy			= 1,
++		.phy_id				= 0,
++		.force_speed_100		= 1,
++		.force_duplex_full		= 1,
++	},
++};
++static struct board_info __initdata board_HW556_B = {
++	.name					= "HW556_B",
++	.expected_cpu_id			= 0x6358,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++	.num_usbh_ports				= 2,
++
++	.has_caldata				= 1,
++	.caldata = {
++		{
++			.vendor			= PCI_VENDOR_ID_ATHEROS,
++			.caldata_offset		= 0xefe000,
++			.slot			= 1,
++			.endian_check		= 1,
++			.led_pin		= 2,
++		},
++	},
++
++	.has_enet1				= 1,
++	.enet1 = {
++		.has_phy			= 1,
++		.phy_id				= 0,
++		.force_speed_100		= 1,
++		.force_duplex_full		= 1,
++	},
++};
++
+  /* T-Home Speedport W 303V Typ B */
+ static struct board_info __initdata board_spw303v = {
+ 	.name			= "96358-502V",
+@@ -1738,6 +1826,9 @@ static const struct board_info __initcon
+ 	&board_nb4_fxc_r1,
+ 	&board_ct6373_1,
+ 	&board_HW553,
++	&board_HW556_A,
++	&board_HW556_B,
++	&board_HW556_C,
+ 	&board_spw303v,
+ 	&board_DVAG3810BN,
+ #endif
+@@ -1810,6 +1901,9 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ 	{ .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, },
+ 	{ .compatible = "huawei,hg553", .data = &board_HW553, },
++	{ .compatible = "huawei,hg556a-a", .data = &board_HW556_A, },
++	{ .compatible = "huawei,hg556a-b", .data = &board_HW556_B, },
++	{ .compatible = "huawei,hg556a-c", .data = &board_HW556_C, },
+ 	{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+ 	{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
diff --git a/target/linux/brcm63xx/patches-4.1/535-board_rta770w.patch b/target/linux/brcm63xx/patches-4.1/535-board_rta770w.patch
new file mode 100644
index 0000000..99623e7
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/535-board_rta770w.patch
@@ -0,0 +1,46 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -540,6 +540,27 @@ static struct board_info __initdata boar
+ 		.force_duplex_full	= 1,
+ 	},
+ };
++
++// Actually this board is the very same as the rta770bw,
++// where the additional 'b' within the name just
++// just indicates 'Annex B'. The ADSL Modem itself is able
++// to handle both Annex A as well as Annex B -
++// the loaded firmware makes the only difference
++static struct board_info __initdata board_rta770w = {
++	.name				= "RTA770W",
++	.expected_cpu_id		= 0x6345,
++
++	.has_uart0			= 1,
++
++	.has_enet0			= 1,
++
++	.enet0 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6345 */
+ 
+ /*
+@@ -1791,6 +1812,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	&board_96345gw2,
+ 	&board_rta770bw,
++	&board_rta770w,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ 	&board_96348r,
+@@ -1865,6 +1887,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ 	{ .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
+ 	{ .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
++	{ .compatible = "dynalink,rta770w", .data = &board_rta770w, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ 	{ .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
diff --git a/target/linux/brcm63xx/patches-4.1/536-board_fast2704.patch b/target/linux/brcm63xx/patches-4.1/536-board_fast2704.patch
new file mode 100644
index 0000000..e1a128c
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/536-board_fast2704.patch
@@ -0,0 +1,75 @@
+From: Marcin Jurkowski <marcin1j@gmail.com>
+Date: Thu, 31 Oct 2013 22:33:10 +0000
+Subject: [PATCH] bcm63xx: Add kernel support for Sagemcom F@ST2704V2 ADSL
+ router
+
+This adds kernel support support for Sagemcom F@st 2704 wireless ADSL
+router.
+It's a BCM6328-based 802.11n wireless router with USB port and ADSL2+
+modem equipped with 64 MiB RAM and 8 MiB flash.
+
+Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
+---
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -390,6 +390,44 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct board_info __initdata board_FAST2704V2 = {
++	.name				= "F@ST2704V2",
++	.expected_cpu_id		= 0x6328,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.has_usbd			= 1,
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+ 
+ /*
+@@ -1802,6 +1840,7 @@ static const struct board_info __initcon
+ 	&board_963281TAN,
+ 	&board_A4001N1,
+ 	&board_dsl_274xb_f1,
++	&board_FAST2704V2,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	&board_96338gw,
+@@ -1877,6 +1916,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
+ 	{ .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ 	{ .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
++	{ .compatible = "sagem,f@st2704v2", .data = &board_FAST2704V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ 	{ .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
diff --git a/target/linux/brcm63xx/patches-4.1/537-board_fast2504n.patch b/target/linux/brcm63xx/patches-4.1/537-board_fast2504n.patch
new file mode 100644
index 0000000..bfc68df
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/537-board_fast2504n.patch
@@ -0,0 +1,68 @@
+From: Max Staudt <openwrt.max@enpas.org>
+Date: Wed, 15 Jan 2014 18:51:13 +0000
+Subject: [PATCH] brcm63xx: F@ST2504n board support (Linux-3.10.26)
+
+Signed-off-by: Max Staudt <openwrt.max@enpas.org>
+---
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1731,6 +1731,43 @@ static struct board_info __initdata boar
+ 	.devs = nb6_devices,
+ 	.num_devs = ARRAY_SIZE(nb6_devices),
+ };
++
++static struct board_info __initdata board_fast2504n = {
++	.name				= "F@ST2504n",
++	.expected_cpu_id		= 0x6362,
++
++	.has_uart0			= 1,
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "Port 1",
++			},
++
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6362 */
+ 
+ /*
+@@ -1896,6 +1933,7 @@ static const struct board_info __initcon
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6362
+ 	&board_nb6,
++	&board_fast2504n,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6368
+@@ -1977,6 +2015,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6362
++	{ .compatible = "sagem,f@st2504n", .data = &board_fast2504n, },
+ 	{ .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
diff --git a/target/linux/brcm63xx/patches-4.1/550-MIPS-BCM63XX-remove-leds-and-buttons.patch b/target/linux/brcm63xx/patches-4.1/550-MIPS-BCM63XX-remove-leds-and-buttons.patch
new file mode 100644
index 0000000..fe55401
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/550-MIPS-BCM63XX-remove-leds-and-buttons.patch
@@ -0,0 +1,343 @@
+From 997f53b174c63153335508c22dc4493e8e5808d6 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Feb 2015 17:52:32 +0100
+Subject: [PATCH] MIPS: BCM63XX: remove leds and buttons
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c |  262 -----------------------------
+ 1 file changed, 262 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -51,14 +51,6 @@ static struct board_info __initdata boar
+ 		.use_internal_phy	= 1,
+ 	},
+ 
+-	.leds = {
+-		{
+-			.name		= "CVG834G:green:power",
+-			.gpio		= 37,
+-			.default_trigger= "default-on",
+-		},
+-	},
+-
+ 	.ephy_reset_gpio		= 36,
+ 	.ephy_reset_gpio_flags		= GPIO_ACTIVE_LOW,
+ };
+@@ -82,35 +74,6 @@ static struct board_info __initdata boar
+ 		.port_no		= 0,
+ 	},
+ 
+-	.leds = {
+-		{
+-			.name		= "96328avng::ppp-fail",
+-			.gpio		= 2,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "96328avng::power",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "96328avng::power-fail",
+-			.gpio		= 8,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "96328avng::wps",
+-			.gpio		= 9,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "96328avng::ppp",
+-			.gpio		= 11,
+-			.active_low	= 1,
+-		},
+-	},
+-
+ 	.has_enetsw			= 1,
+ 
+ 	.enetsw = {
+@@ -448,35 +411,6 @@ static struct board_info __initdata boar
+ 	},
+ 
+ 	.has_ohci0			= 1,
+-
+-	.leds = {
+-		{
+-			.name		= "adsl",
+-			.gpio		= 3,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ses",
+-			.gpio		= 5,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 0,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 1,
+-			.active_low	= 1,
+-		}
+-	},
+ };
+ 
+ static struct board_info __initdata board_96338w = {
+@@ -491,35 +425,6 @@ static struct board_info __initdata boar
+ 		.force_speed_100	= 1,
+ 		.force_duplex_full	= 1,
+ 	},
+-
+-	.leds = {
+-		{
+-			.name		= "adsl",
+-			.gpio		= 3,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ses",
+-			.gpio		= 5,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 0,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 1,
+-			.active_low	= 1,
+-		},
+-	},
+ };
+ 
+ static struct board_info __initdata board_96338w2_e7t = {
+@@ -618,36 +523,6 @@ static struct board_info __initdata boar
+ 		.has_phy		= 1,
+ 		.use_internal_phy	= 1,
+ 	},
+-
+-	.leds = {
+-		{
+-			.name		= "adsl-fail",
+-			.gpio		= 2,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp",
+-			.gpio		= 3,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 0,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 1,
+-			.active_low	= 1,
+-		},
+-	},
+ };
+ 
+ static struct board_info __initdata board_96348gw_10 = {
+@@ -682,35 +557,6 @@ static struct board_info __initdata boar
+ 		.cs			= 2,
+ 		.ext_irq		= 2,
+ 	},
+-
+-	.leds = {
+-		{
+-			.name		= "adsl-fail",
+-			.gpio		= 2,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp",
+-			.gpio		= 3,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 0,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 1,
+-			.active_low	= 1,
+-		},
+-	},
+ };
+ 
+ static struct board_info __initdata board_96348gw_11 = {
+@@ -739,35 +585,6 @@ static struct board_info __initdata boar
+ 	.has_ohci0 = 1,
+ 	.has_pccard = 1,
+ 	.has_ehci0 = 1,
+-
+-	.leds = {
+-		{
+-			.name		= "adsl-fail",
+-			.gpio		= 2,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp",
+-			.gpio		= 3,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 0,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 1,
+-			.active_low	= 1,
+-		},
+-	},
+ };
+ 
+ 
+@@ -893,35 +710,6 @@ static struct board_info __initdata boar
+ 		.ext_irq		= 2,
+ 		.cs			= 2,
+ 	},
+-
+-	.leds = {
+-		{
+-			.name		= "adsl-fail",
+-			.gpio		= 2,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp",
+-			.gpio		= 3,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 0,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 1,
+-			.active_low	= 1,
+-		},
+-	},
+ };
+ 
+ static struct board_info __initdata board_gw6200 = {
+@@ -1258,33 +1046,6 @@ static struct board_info __initdata boar
+ 	.has_ohci0 = 1,
+ 	.has_pccard = 1,
+ 	.has_ehci0 = 1,
+-
+-	.leds = {
+-		{
+-			.name		= "adsl-fail",
+-			.gpio		= 15,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp",
+-			.gpio		= 22,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 23,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 4,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 5,
+-		},
+-	},
+ };
+ 
+ static struct board_info __initdata board_96358vw2 = {
+@@ -1314,29 +1075,6 @@ static struct board_info __initdata boar
+ 	.has_pccard = 1,
+ 	.has_ehci0 = 1,
+ 	.num_usbh_ports			= 2,
+-
+-	.leds = {
+-		{
+-			.name		= "adsl",
+-			.gpio		= 22,
+-			.active_low	= 1,
+-		},
+-		{
+-			.name		= "ppp-fail",
+-			.gpio		= 23,
+-		},
+-		{
+-			.name		= "power",
+-			.gpio		= 5,
+-			.active_low	= 1,
+-			.default_trigger = "default-on",
+-		},
+-		{
+-			.name		= "stop",
+-			.gpio		= 4,
+-			.active_low	= 1,
+-		},
+-	},
+ };
+ 
+ static struct board_info __initdata board_CPVA642 = {
diff --git a/target/linux/brcm63xx/patches-4.1/555-board_96318ref.patch b/target/linux/brcm63xx/patches-4.1/555-board_96318ref.patch
new file mode 100644
index 0000000..252fd3f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/555-board_96318ref.patch
@@ -0,0 +1,79 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -57,6 +57,56 @@ static struct board_info __initdata boar
+ #endif /* CONFIG_BCM63XX_CPU_3368 */
+ 
+ /*
++ * known 6318 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6318
++static struct board_info __initdata board_96318ref = {
++	.name				= "96318REF",
++	.expected_cpu_id		= 0x6318,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++
++	.has_usbd			= 1,
++
++	.usbd = {
++		.use_fullspeed		= 0,
++		.port_no		= 0,
++	},
++
++	.has_enetsw			= 1,
++
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++};
++#endif /* CONFIG_BCM63XX_CPU_6318 */
++
++/*
+  * known 6328 boards
+  */
+ #ifdef CONFIG_BCM63XX_CPU_6328
+@@ -1608,6 +1658,9 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_3368
+ 	&board_cvg834g,
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_6318
++	&board_96318ref,
++#endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
+ 	&board_AR5381u,
+@@ -1685,6 +1738,9 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_3368
+ 	{ .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_6318
++	{ .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
++#endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ 	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
diff --git a/target/linux/brcm63xx/patches-4.1/556-board_96318ref_p300.patch b/target/linux/brcm63xx/patches-4.1/556-board_96318ref_p300.patch
new file mode 100644
index 0000000..18d0f07
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/556-board_96318ref_p300.patch
@@ -0,0 +1,70 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -104,6 +104,51 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct board_info __initdata board_96318ref_p300 = {
++	.name				= "96318REF_P300",
++	.expected_cpu_id		= 0x6318,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++
++	.has_usbd			= 1,
++
++	.usbd = {
++		.use_fullspeed		= 0,
++		.port_no		= 0,
++	},
++
++	.has_enetsw			= 1,
++
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6318 */
+ 
+ /*
+@@ -1660,6 +1705,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ 	&board_96318ref,
++	&board_96318ref_p300,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
+@@ -1740,6 +1786,7 @@ static struct of_device_id const bcm963x
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ 	{ .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
++	{ .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
diff --git a/target/linux/brcm63xx/patches-4.1/557-board_bcm963269bhr.patch b/target/linux/brcm63xx/patches-4.1/557-board_bcm963269bhr.patch
new file mode 100644
index 0000000..89a2a4f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/557-board_bcm963269bhr.patch
@@ -0,0 +1,73 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1697,6 +1697,52 @@ static struct board_info __initdata boar
+ #endif /* CONFIG_BCM63XX_CPU_6368 */
+ 
+ /*
++ * known 63268/63269 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_63268
++static struct board_info __initdata board_963269bhr = {
++	.name				= "963269BHR",
++	.expected_cpu_id		= 0x63268,
++
++	.has_uart0			= 1,
++
++	.has_pci			= 1,
++
++	.has_ehci0			= 1,
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "port1",
++			},
++
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "port2",
++			},
++
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "port3",
++			},
++
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "port4",
++			},
++		},
++	},
++};
++#endif /* CONFIG_BCM63XX_CPU_63268 */
++
++/*
+  * all boards
+  */
+ static const struct board_info __initconst *bcm963xx_boards[] = {
+@@ -1777,6 +1823,9 @@ static const struct board_info __initcon
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_63268
++	&board_963269bhr,
++#endif
+ };
+ 
+ static struct of_device_id const bcm963xx_boards_dt[] = {
+@@ -1864,6 +1913,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
++	{ .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ #endif
+ #endif /* CONFIG_OF */
+ 	{ },
diff --git a/target/linux/brcm63xx/patches-4.1/558-board_AR1004G.patch b/target/linux/brcm63xx/patches-4.1/558-board_AR1004G.patch
new file mode 100644
index 0000000..74aad59
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/558-board_AR1004G.patch
@@ -0,0 +1,49 @@
+From: "mexit@o2.pl" <mexit@o2.pl>
+Date: Sun, 24 Nov 2013 21:33:38 +0000
+Subject: [PATCH 4/5] brcm63xx: add support for Asmax AR 1004g router
+
+Support for Asmax AR 1004g router
+
+Signed-off-by: Adrian Feliks <mexit@o2.pl>
+---
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -682,6 +682,22 @@ static struct board_info __initdata boar
+ 	.has_ehci0 = 1,
+ };
+ 
++static struct board_info __initdata board_96348gw_10_AR1004G = {
++	.name				= "AR1004G",
++	.expected_cpu_id		= 0x6348,
++
++	.has_uart0			= 1,
++	.has_enet1			= 1,
++	.has_pci			= 1,
++	
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++};
++
+ 
+ /* BT Voyager 2110 */
+ static struct board_info __initdata board_V2110 = {
+@@ -1794,6 +1810,7 @@ static const struct board_info __initcon
+ 	&board_96348A_122,
+ 	&board_CPVA502plus,
+ 	&board_96348W3,
++	&board_96348gw_10_AR1004G,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1858,6 +1875,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "dynalink,rta770w", .data = &board_rta770w, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
++	{ .compatible = "asmax,ar1004g", .data = &board_96348gw_10_AR1004G, },
+ 	{ .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
+ 	{ .compatible = "brcm,bcm96348r", .data = &board_96348r, },
+ 	{ .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
diff --git a/target/linux/brcm63xx/patches-4.1/559-board_vw6339gu.patch b/target/linux/brcm63xx/patches-4.1/559-board_vw6339gu.patch
new file mode 100644
index 0000000..2e647c9
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/559-board_vw6339gu.patch
@@ -0,0 +1,72 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1756,6 +1756,53 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct board_info __initdata board_vw6339gu = {
++	.name				= "VW6339GU",
++	.expected_cpu_id		= 0x63268,
++
++	.has_uart0			= 1,
++
++	.has_ehci0			= 1,
++	.has_ohci0			= 1,
++	.num_usbh_ports			= 1,
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "LAN2",
++			},
++
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "LAN3",
++			},
++
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "LAN4",
++			},
++
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "LAN1",
++			},
++
++			[4] = {
++				.used	= 1,
++				.phy_id	= 7,
++				.name	= "WAN",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_63268 */
+ 
+ /*
+@@ -1842,6 +1889,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ 	&board_963269bhr,
++	&board_vw6339gu,
+ #endif
+ };
+ 
+@@ -1932,6 +1980,7 @@ static struct of_device_id const bcm963x
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ 	{ .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
++	{ .compatible = "inteno,vg50", .data = &board_vw6339gu, },
+ #endif
+ #endif /* CONFIG_OF */
+ 	{ },
diff --git a/target/linux/brcm63xx/patches-4.1/560-board_963268gu_p300.patch b/target/linux/brcm63xx/patches-4.1/560-board_963268gu_p300.patch
new file mode 100644
index 0000000..5e51d80
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/560-board_963268gu_p300.patch
@@ -0,0 +1,85 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1716,6 +1716,66 @@ static struct board_info __initdata boar
+  * known 63268/63269 boards
+  */
+ #ifdef CONFIG_BCM63XX_CPU_63268
++static struct board_info __initdata board_963268bu_p300 = {
++	.name				= "963268BU_P300",
++	.expected_cpu_id		= 0x63268,
++
++	.has_uart0			= 1,
++
++	.has_ehci0			= 1,
++	.has_ohci0			= 1,
++	.num_usbh_ports			= 1,
++
++	.has_usbd			= 1,
++
++	.usbd = {
++		.use_fullspeed		= 0,
++		.port_no		= 0,
++	},
++
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 17,
++				.name	= "FE1",
++			},
++
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "GbE2",
++			},
++
++			[4] = {
++				.used	= 1,
++				.phy_id	= 0,
++				.name	= "GbE3",
++			},
++
++			[5] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "GbE1",
++			},
++
++			[6] = {
++				.used	= 1,
++				.phy_id	= 24,
++				.name	= "GbE4",
++			},
++
++			[7] = {
++				.used	= 1,
++				.phy_id	= 25,
++				.name	= "GbE5",
++			},
++		},
++	},
++};
++
+ static struct board_info __initdata board_963269bhr = {
+ 	.name				= "963269BHR",
+ 	.expected_cpu_id		= 0x63268,
+@@ -1888,6 +1948,7 @@ static const struct board_info __initcon
+ 	&board_96368mvngr,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
++	&board_963268bu_p300,
+ 	&board_963269bhr,
+ 	&board_vw6339gu,
+ #endif
+@@ -1979,6 +2040,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
++	{ .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, },
+ 	{ .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ 	{ .compatible = "inteno,vg50", .data = &board_vw6339gu, },
+ #endif
diff --git a/target/linux/brcm63xx/patches-4.1/561-board_WAP-5813n.patch b/target/linux/brcm63xx/patches-4.1/561-board_WAP-5813n.patch
new file mode 100644
index 0000000..5d0f914
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/561-board_WAP-5813n.patch
@@ -0,0 +1,94 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -12,7 +12,9 @@
+ #include <linux/string.h>
+ #include <linux/pci_ids.h>
+ #include <linux/platform_device.h>
++#include <linux/platform_data/b53.h>
+ #include <linux/rtl8367.h>
++#include <linux/spi/spi.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -1710,6 +1712,65 @@ static struct board_info __initdata boar
+ 	.has_ohci0 = 1,
+ 	.has_ehci0 = 1,
+ };
++
++static struct b53_platform_data WAP5813n_b53_pdata = {
++	.alias = "eth0",
++};
++
++static struct spi_board_info WAP5813n_spi_devices[] = {
++	{
++		.modalias = "b53-switch",
++		.max_speed_hz = 781000,
++		.bus_num = 0,
++		.chip_select = 0,
++		.platform_data = &WAP5813n_b53_pdata,
++	}
++};
++
++static struct sprom_fixup __initdata wap5813n_fixups[] = {
++	{ .offset = 97, .value = 0xfeed },
++	{ .offset = 98, .value = 0x15d1 },
++	{ .offset = 99, .value = 0xfb0d },
++	{ .offset = 113, .value = 0xfef7 },
++	{ .offset = 114, .value = 0x15f7 },
++	{ .offset = 115, .value = 0xfb1a },
++};
++
++static struct board_info __initdata board_WAP5813n = {
++	.name				= "96369R-1231N",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++
++	.has_enetsw			= 1,
++	.enetsw = {
++		.used_ports = {
++			[4] = {
++				.used = 1,
++				.phy_id = 0xff,
++				.bypass_link = 1,
++				.force_speed = 1000,
++				.force_duplex_full = 1,
++				.name = "RGMII",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43222,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++		.board_fixups			= wap5813n_fixups,
++		.num_board_fixups		= ARRAY_SIZE(wap5813n_fixups),
++	},
++
++	.spis = WAP5813n_spi_devices,
++	.num_spis = ARRAY_SIZE(WAP5813n_spi_devices),
++};
+ #endif /* CONFIG_BCM63XX_CPU_6368 */
+ 
+ /*
+@@ -1946,6 +2007,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
++	&board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ 	&board_963268bu_p300,
+@@ -2038,6 +2100,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
++	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ 	{ .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, },
diff --git a/target/linux/brcm63xx/patches-4.1/562-board_VR-3025u.patch b/target/linux/brcm63xx/patches-4.1/562-board_VR-3025u.patch
new file mode 100644
index 0000000..fc17426
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/562-board_VR-3025u.patch
@@ -0,0 +1,79 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1713,6 +1713,60 @@ static struct board_info __initdata boar
+ 	.has_ehci0 = 1,
+ };
+ 
++static struct sprom_fixup __initdata vr3025u_fixups[] = {
++	{ .offset = 97, .value = 0xfeb3 },
++	{ .offset = 98, .value = 0x1618 },
++	{ .offset = 99, .value = 0xfab0 },
++	{ .offset = 113, .value = 0xfed1 },
++	{ .offset = 114, .value = 0x1609 },
++	{ .offset = 115, .value = 0xfad9 },
++};
++
++static struct board_info __initdata board_VR3025u = {
++	.name					= "96368M-1541N",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.use_fallback_sprom			= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++
++	.has_enetsw				= 1,
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "port1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "port2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "port3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "port4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43222,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++		.board_fixups			= vr3025u_fixups,
++		.num_board_fixups		= ARRAY_SIZE(vr3025u_fixups),
++	},
++};
++
+ static struct b53_platform_data WAP5813n_b53_pdata = {
+ 	.alias = "eth0",
+ };
+@@ -2007,6 +2061,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
++	&board_VR3025u,
+ 	&board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+@@ -2100,6 +2155,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
++	{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ 	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
diff --git a/target/linux/brcm63xx/patches-4.1/563-board_VR-3025un.patch b/target/linux/brcm63xx/patches-4.1/563-board_VR-3025un.patch
new file mode 100644
index 0000000..5dc5e8b
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/563-board_VR-3025un.patch
@@ -0,0 +1,79 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1767,6 +1767,60 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct sprom_fixup __initdata vr3025un_fixups[] = {
++	{ .offset = 97, .value = 0xfeb3 },
++	{ .offset = 98, .value = 0x1618 },
++	{ .offset = 99, .value = 0xfab0 },
++	{ .offset = 113, .value = 0xfed1 },
++	{ .offset = 114, .value = 0x1609 },
++	{ .offset = 115, .value = 0xfad9 },
++};
++
++static struct board_info __initdata board_VR3025un = {
++	.name					= "96368M-1341N",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.use_fallback_sprom			= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++
++	.has_enetsw				= 1,
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "port1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "port2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "port3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "port4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43222,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++		.board_fixups			= vr3025un_fixups,
++		.num_board_fixups		= ARRAY_SIZE(vr3025un_fixups),
++	},
++};
++
+ static struct b53_platform_data WAP5813n_b53_pdata = {
+ 	.alias = "eth0",
+ };
+@@ -2062,6 +2116,7 @@ static const struct board_info __initcon
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
+ 	&board_VR3025u,
++	&board_VR3025un,
+ 	&board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+@@ -2156,6 +2211,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ 	{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
++	{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ 	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
diff --git a/target/linux/brcm63xx/patches-4.1/564-board_P870HW-51a_v2.patch b/target/linux/brcm63xx/patches-4.1/564-board_P870HW-51a_v2.patch
new file mode 100644
index 0000000..af62746
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/564-board_P870HW-51a_v2.patch
@@ -0,0 +1,68 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1722,6 +1722,49 @@ static struct sprom_fixup __initdata vr3
+ 	{ .offset = 115, .value = 0xfad9 },
+ };
+ 
++static struct board_info __initdata board_P870HW51A_V2 = {
++	.name				= "P870HW-51a_v2",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++
++	.has_enetsw			= 1,
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "port1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "port2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "port3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "port4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM4318,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++	},
++};
++
+ static struct board_info __initdata board_VR3025u = {
+ 	.name					= "96368M-1541N",
+ 	.expected_cpu_id		= 0x6368,
+@@ -2115,6 +2158,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
++	&board_P870HW51A_V2,
+ 	&board_VR3025u,
+ 	&board_VR3025un,
+ 	&board_WAP5813n,
+@@ -2213,6 +2257,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ 	{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ 	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++	{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ 	{ .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, },
diff --git a/target/linux/brcm63xx/patches-4.1/565-board_hw520.patch b/target/linux/brcm63xx/patches-4.1/565-board_hw520.patch
new file mode 100644
index 0000000..56371f3
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/565-board_hw520.patch
@@ -0,0 +1,56 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1360,6 +1360,37 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_HW520 = {
++	.name				= "HW6358GW_B",
++	.expected_cpu_id		= 0x6358,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++
++	.has_enet0			= 1,
++	.enet0 = {
++		.has_phy		= 1,
++		.use_internal_phy	= 1,
++	},
++
++	.has_enet1			= 1,
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100	= 1,
++		.force_duplex_full	= 1,
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM4318,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++	},
++};
++
+ static struct board_info __initdata board_HW553 = {
+ 	.name                           = "HW553",
+ 	.expected_cpu_id                = 0x6358,
+@@ -2142,6 +2173,7 @@ static const struct board_info __initcon
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
+ 	&board_ct6373_1,
++	&board_HW520,
+ 	&board_HW553,
+ 	&board_HW556_A,
+ 	&board_HW556_B,
+@@ -2234,6 +2266,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ 	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ 	{ .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, },
++	{ .compatible = "huawei,hg520v", .data = &board_HW520, },
+ 	{ .compatible = "huawei,hg553", .data = &board_HW553, },
+ 	{ .compatible = "huawei,hg556a-a", .data = &board_HW556_A, },
+ 	{ .compatible = "huawei,hg556a-b", .data = &board_HW556_B, },
diff --git a/target/linux/brcm63xx/patches-4.1/566-board_A4001N.patch b/target/linux/brcm63xx/patches-4.1/566-board_A4001N.patch
new file mode 100644
index 0000000..4647e81
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/566-board_A4001N.patch
@@ -0,0 +1,69 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -362,6 +362,50 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_A4001N = {
++	.name				= "96328dg2x2",
++	.expected_cpu_id		= 0x6328,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 1,
++	.has_enetsw			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id	= 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43225,
++		.pci_bus			= 1,
++		.pci_dev			= 0,
++	},
++};
++
+ static struct board_info __initdata board_A4001N1 = {
+ 	.name					= "963281T_TEF",
+ 	.expected_cpu_id			= 0x6328,
+@@ -2124,6 +2168,7 @@ static const struct board_info __initcon
+ 	&board_AR5381u,
+ 	&board_AR5387un,
+ 	&board_963281TAN,
++	&board_A4001N,
+ 	&board_A4001N1,
+ 	&board_dsl_274xb_f1,
+ 	&board_FAST2704V2,
+@@ -2212,6 +2257,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
++	{ .compatible = "adb,a4001n", .data = &board_A4001N, },
+ 	{ .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ 	{ .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
+ 	{ .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
diff --git a/target/linux/brcm63xx/patches-4.1/567-board_dsl-2751b_e1.patch b/target/linux/brcm63xx/patches-4.1/567-board_dsl-2751b_e1.patch
new file mode 100644
index 0000000..4d5b294
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/567-board_dsl-2751b_e1.patch
@@ -0,0 +1,94 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -151,6 +151,75 @@ static struct board_info __initdata boar
+ 		},
+ 	},
+ };
++
++static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
++	{ .offset = 96, .value = 0x2046 },
++	{ .offset = 97, .value = 0xfe9d },
++	{ .offset = 98, .value = 0x1854 },
++	{ .offset = 99, .value = 0xfa59 },
++	{ .offset = 112, .value = 0x2046 },
++	{ .offset = 113, .value = 0xfe79 },
++	{ .offset = 114, .value = 0x17f5 },
++	{ .offset = 115, .value = 0xfa47 },
++	{ .offset = 161, .value = 0x2222 },
++	{ .offset = 162, .value = 0x2222 },
++	{ .offset = 169, .value = 0x2222 },
++	{ .offset = 170, .value = 0x2222 },
++	{ .offset = 171, .value = 0x5555 },
++	{ .offset = 172, .value = 0x5555 },
++	{ .offset = 173, .value = 0x4444 },
++	{ .offset = 174, .value = 0x4444 },
++	{ .offset = 175, .value = 0x5555 },
++	{ .offset = 176, .value = 0x5555 },
++};
++
++static struct board_info __initdata board_dsl_2751b_d1 = {
++	.name				= "AW5200B",
++	.expected_cpu_id		= 0x6318,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++
++	.has_enetsw			= 1,
++
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type 				= SPROM_BCM43217,
++		.pci_bus			= 1,
++		.pci_dev			= 0,
++		.board_fixups			= dsl2751b_e1_fixups,
++		.num_board_fixups		= ARRAY_SIZE(dsl2751b_e1_fixups),
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6318 */
+ 
+ /*
+@@ -2162,6 +2231,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ 	&board_96318ref,
+ 	&board_96318ref_p300,
++	&board_dsl_2751b_d1,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
+@@ -2255,6 +2325,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ 	{ .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
+ 	{ .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, },
++	{ .compatible = "d-link,dsl-275xb-d", .data = &board_dsl_2751b_d1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	{ .compatible = "adb,a4001n", .data = &board_A4001N, },
diff --git a/target/linux/brcm63xx/patches-4.1/568-board_DGND3700v1_3800B.patch b/target/linux/brcm63xx/patches-4.1/568-board_DGND3700v1_3800B.patch
new file mode 100644
index 0000000..9f722ee
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/568-board_DGND3700v1_3800B.patch
@@ -0,0 +1,67 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1857,6 +1857,48 @@ static struct board_info __initdata boar
+ 	.has_ehci0 = 1,
+ };
+ 
++static struct b53_platform_data DGND3700v1_3800B_b53_pdata = {
++	.alias    = "eth0",
++};
++
++static struct spi_board_info DGND3700v1_3800B_spi_devices[] = {
++	{
++		.modalias = "b53-switch",
++		.max_speed_hz = 781000,
++		.bus_num = 0,
++		.chip_select = 1,
++		.platform_data = &DGND3700v1_3800B_b53_pdata,
++	}
++};
++
++static struct board_info __initdata board_DGND3700v1_3800B = {
++	.name				= "DGND3700v1_3800B",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 2,
++
++	.has_enetsw			= 1,
++	.enetsw = {
++		.used_ports = {
++			[5] = {
++				.used  = 1,
++				.phy_id  = 0xff,
++				.bypass_link = 1,
++				.force_speed = 1000,
++				.force_duplex_full = 1,
++				.name  = "RGMII",
++			},
++		},
++	},
++
++	.spis = DGND3700v1_3800B_spi_devices,
++	.num_spis = ARRAY_SIZE(DGND3700v1_3800B_spi_devices),
++};
++
+ static struct sprom_fixup __initdata vr3025u_fixups[] = {
+ 	{ .offset = 97, .value = 0xfeb3 },
+ 	{ .offset = 98, .value = 0x1618 },
+@@ -2305,6 +2347,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
++	&board_DGND3700v1_3800B,
+ 	&board_P870HW51A_V2,
+ 	&board_VR3025u,
+ 	&board_VR3025un,
+@@ -2407,6 +2450,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ 	{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ 	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++	{ .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, },
+ 	{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
diff --git a/target/linux/brcm63xx/patches-4.1/569-board_homehub2a.patch b/target/linux/brcm63xx/patches-4.1/569-board_homehub2a.patch
new file mode 100644
index 0000000..6897cef
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/569-board_homehub2a.patch
@@ -0,0 +1,51 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1473,6 +1473,32 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct board_info __initdata board_homehub2a = {
++	.name				= "HOMEHUB2A",
++	.expected_cpu_id		= 0x6358,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 2,
++
++	.has_enet1			= 1,
++	.enet1 = {
++		.has_phy		= 1,
++		.phy_id			= 0,
++		.force_speed_100        = 1,
++		.force_duplex_full      = 1,
++	},
++
++	.fallback_sprom = {
++		.type 			= SPROM_BCM4322,
++		.pci_bus		= 0,
++		.pci_dev		= 1,
++	},
++};
++
+ static struct board_info __initdata board_HW520 = {
+ 	.name				= "HW6358GW_B",
+ 	.expected_cpu_id		= 0x6358,
+@@ -2330,6 +2356,7 @@ static const struct board_info __initcon
+ 	&board_nb4_ser_r0,
+ 	&board_nb4_fxc_r1,
+ 	&board_ct6373_1,
++	&board_homehub2a,
+ 	&board_HW520,
+ 	&board_HW553,
+ 	&board_HW556_A,
+@@ -2439,6 +2466,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, },
+ 	{ .compatible = "t-com,spw303v", .data = &board_spw303v, },
+ 	{ .compatible = "telsey,cpva642", .data = &board_CPVA642, },
++	{ .compatible = "thomson,homehub2a", .data = &board_homehub2a, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6362
+ 	{ .compatible = "sagem,f@st2504n", .data = &board_fast2504n, },
diff --git a/target/linux/brcm63xx/patches-4.1/570-board_HG655b.patch b/target/linux/brcm63xx/patches-4.1/570-board_HG655b.patch
new file mode 100644
index 0000000..fad8209
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/570-board_HG655b.patch
@@ -0,0 +1,72 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1925,6 +1925,53 @@ static struct board_info __initdata boar
+ 	.num_spis = ARRAY_SIZE(DGND3700v1_3800B_spi_devices),
+ };
+ 
++static struct board_info __initdata board_HG655b = {
++	.name				= "HW65x",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 2,
++
++	.has_caldata			= 1,
++	.caldata = {
++		{
++			.vendor			= PCI_VENDOR_ID_RALINK,
++			.caldata_offset		= 0x7c0000,
++			.slot			= 1,
++			.eeprom			= "rt2x00.eeprom",
++		},
++	},
++
++	.has_enetsw			= 1,
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "port1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "port2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "port3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "port4",
++			},
++		},
++	},
++};
++
+ static struct sprom_fixup __initdata vr3025u_fixups[] = {
+ 	{ .offset = 97, .value = 0xfeb3 },
+ 	{ .offset = 98, .value = 0x1618 },
+@@ -2375,6 +2422,7 @@ static const struct board_info __initcon
+ 	&board_96368mvwg,
+ 	&board_96368mvngr,
+ 	&board_DGND3700v1_3800B,
++	&board_HG655b,
+ 	&board_P870HW51A_V2,
+ 	&board_VR3025u,
+ 	&board_VR3025un,
+@@ -2478,6 +2526,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ 	{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ 	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++	{ .compatible = "huawei,hg655b", .data = &board_HG655b, },
+ 	{ .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, },
+ 	{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
diff --git a/target/linux/brcm63xx/patches-4.1/571-board_fast2704n.patch b/target/linux/brcm63xx/patches-4.1/571-board_fast2704n.patch
new file mode 100644
index 0000000..664a120
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/571-board_fast2704n.patch
@@ -0,0 +1,65 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -220,6 +220,46 @@ static struct board_info __initdata boar
+ 		.num_board_fixups		= ARRAY_SIZE(dsl2751b_e1_fixups),
+ 	},
+ };
++
++static struct board_info __initdata board_FAST2704N = {
++	.name				= "F@ST2704N",
++	.expected_cpu_id		= 0x6318,
++
++	.has_uart0			= 1,
++	.has_pci			= 1,
++	.use_fallback_sprom		= 1,
++
++	.has_enetsw			= 1,
++
++	.has_ohci0			= 1,
++	.has_ehci0			= 1,
++	.num_usbh_ports			= 1,
++
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used	= 1,
++				.phy_id = 1,
++				.name	= "Port 1",
++			},
++			[1] = {
++				.used	= 1,
++				.phy_id	= 2,
++				.name	= "Port 2",
++			},
++			[2] = {
++				.used	= 1,
++				.phy_id	= 3,
++				.name	= "Port 3",
++			},
++			[3] = {
++				.used	= 1,
++				.phy_id	= 4,
++				.name	= "Port 4",
++			},
++		},
++	},
++};
+ #endif /* CONFIG_BCM63XX_CPU_6318 */
+ 
+ /*
+@@ -2347,6 +2387,7 @@ static const struct board_info __initcon
+ 	&board_96318ref,
+ 	&board_96318ref_p300,
+ 	&board_dsl_2751b_d1,
++	&board_FAST2704N,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	&board_96328avng,
+@@ -2444,6 +2485,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
+ 	{ .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, },
+ 	{ .compatible = "d-link,dsl-275xb-d", .data = &board_dsl_2751b_d1, },
++	{ .compatible = "sagem,f@st2704n", .data = &board_FAST2704N, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ 	{ .compatible = "adb,a4001n", .data = &board_A4001N, },
diff --git a/target/linux/brcm63xx/patches-4.1/572-board_VR-3026e.patch b/target/linux/brcm63xx/patches-4.1/572-board_VR-3026e.patch
new file mode 100644
index 0000000..c19c4f8
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/572-board_VR-3026e.patch
@@ -0,0 +1,79 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -2163,6 +2163,60 @@ static struct board_info __initdata boar
+ 	},
+ };
+ 
++static struct sprom_fixup __initdata vr3026e_fixups[] = {
++	{ .offset = 97, .value = 0xfeb3 },
++	{ .offset = 98, .value = 0x1618 },
++	{ .offset = 99, .value = 0xfab0 },
++	{ .offset = 113, .value = 0xfed1 },
++	{ .offset = 114, .value = 0x1609 },
++	{ .offset = 115, .value = 0xfad9 },
++};
++
++static struct board_info __initdata board_VR3026e = {
++	.name					= "96368MT-1341N1",
++	.expected_cpu_id		= 0x6368,
++
++	.has_uart0				= 1,
++	.has_pci				= 1,
++	.use_fallback_sprom			= 1,
++	.has_ohci0				= 1,
++	.has_ehci0				= 1,
++
++	.has_enetsw				= 1,
++	.enetsw = {
++		.used_ports = {
++			[0] = {
++				.used		= 1,
++				.phy_id		= 1,
++				.name		= "port1",
++			},
++			[1] = {
++				.used		= 1,
++				.phy_id		= 2,
++				.name		= "port2",
++			},
++			[2] = {
++				.used		= 1,
++				.phy_id		= 3,
++				.name		= "port3",
++			},
++			[3] = {
++				.used		= 1,
++				.phy_id		= 4,
++				.name		= "port4",
++			},
++		},
++	},
++
++	.fallback_sprom = {
++		.type				= SPROM_BCM43222,
++		.pci_bus			= 0,
++		.pci_dev			= 1,
++		.board_fixups			= vr3026e_fixups,
++		.num_board_fixups		= ARRAY_SIZE(vr3026e_fixups),
++	},
++};
++
+ static struct b53_platform_data WAP5813n_b53_pdata = {
+ 	.alias = "eth0",
+ };
+@@ -2467,6 +2521,7 @@ static const struct board_info __initcon
+ 	&board_P870HW51A_V2,
+ 	&board_VR3025u,
+ 	&board_VR3025un,
++	&board_VR3026e,
+ 	&board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+@@ -2567,6 +2622,7 @@ static struct of_device_id const bcm963x
+ 	{ .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ 	{ .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ 	{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
++	{ .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
+ 	{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ 	{ .compatible = "huawei,hg655b", .data = &board_HG655b, },
+ 	{ .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, },
diff --git a/target/linux/brcm63xx/patches-4.1/800-wl_exports.patch b/target/linux/brcm63xx/patches-4.1/800-wl_exports.patch
new file mode 100644
index 0000000..68d37c7
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/800-wl_exports.patch
@@ -0,0 +1,25 @@
+--- a/arch/mips/bcm63xx/nvram.c
++++ b/arch/mips/bcm63xx/nvram.c
+@@ -40,6 +40,12 @@ struct bcm963xx_nvram {
+ static struct bcm963xx_nvram nvram;
+ static int mac_addr_used;
+ 
++/*
++ * Required export for WL
++ */
++u32 nvram_buf[5] = { 0, cpu_to_le32(20), 0, 0, 0 };
++EXPORT_SYMBOL(nvram_buf);
++
+ void __init bcm63xx_nvram_init(void *addr)
+ {
+ 	unsigned int check_len;
+--- a/arch/mips/mm/cache.c
++++ b/arch/mips/mm/cache.c
+@@ -59,6 +59,7 @@ void (*_dma_cache_wback)(unsigned long s
+ void (*_dma_cache_inv)(unsigned long start, unsigned long size);
+ 
+ EXPORT_SYMBOL(_dma_cache_wback_inv);
++EXPORT_SYMBOL(_dma_cache_inv);
+ 
+ #endif /* CONFIG_DMA_NONCOHERENT || CONFIG_DMA_MAYBE_COHERENT */
+ 
diff --git a/target/linux/brcm63xx/patches-4.1/801-ssb_export_fallback_sprom.patch b/target/linux/brcm63xx/patches-4.1/801-ssb_export_fallback_sprom.patch
new file mode 100644
index 0000000..11a8353
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/801-ssb_export_fallback_sprom.patch
@@ -0,0 +1,31 @@
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -8,6 +8,7 @@
+  */
+ 
+ #include <linux/init.h>
++#include <linux/export.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
+ #include <linux/platform_device.h>
+@@ -387,7 +388,19 @@ struct fallback_sprom_match {
+ 	struct ssb_sprom sprom;
+ };
+ 
+-static struct fallback_sprom_match fallback_sprom;
++struct fallback_sprom_match fallback_sprom;
++
++int bcm63xx_get_fallback_sprom(uint pci_bus, uint pci_slot, struct ssb_sprom *out)
++{
++	if (pci_bus != fallback_sprom.pci_bus ||
++	    pci_slot != fallback_sprom.pci_dev)
++		pr_warn("fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
++			fallback_sprom.pci_bus, fallback_sprom.pci_dev,
++			pci_bus, pci_slot);
++	memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
++	return 0;
++}
++EXPORT_SYMBOL(bcm63xx_get_fallback_sprom);
+ 
+ #if defined(CONFIG_SSB_PCIHOST)
+ int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
diff --git a/target/linux/brcm63xx/patches-4.1/802-rtl8367r_fix_RGMII_support.patch b/target/linux/brcm63xx/patches-4.1/802-rtl8367r_fix_RGMII_support.patch
new file mode 100644
index 0000000..9037d89
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/802-rtl8367r_fix_RGMII_support.patch
@@ -0,0 +1,30 @@
+From e3208e6087642b95a5bab3101fc9c6e34892c861 Mon Sep 17 00:00:00 2001
+From: Miguel GAIO <miguel.gaio@efixo.com>
+Date: Fri, 6 Jul 2012 14:12:33 +0200
+Subject: [PATCH 6/8] * [rtl8367r] Fix RGMII support
+
+---
+ drivers/net/phy/rtl8367.c  |    5 +++++
+ 1 files changed, 5 insertions(+), 0 deletions(-)
+
+--- a/drivers/net/phy/rtl8367.c
++++ b/drivers/net/phy/rtl8367.c
+@@ -146,6 +146,10 @@
+ #define   RTL8367_EXT_RGMXF_TXDELAY_MASK	1
+ #define   RTL8367_EXT_RGMXF_RXDELAY_MASK	0x7
+ 
++#define RTL8367_PHY_AD_REG			0x130f
++#define    RTL8370_PHY_AD_DUMMY_1_OFFSET	5
++#define    RTL8370_PHY_AD_DUMMY_1_MASK		0xe0
++
+ #define RTL8367_DI_FORCE_REG(_x)		(0x1310 + (_x))
+ #define   RTL8367_DI_FORCE_MODE			BIT(12)
+ #define   RTL8367_DI_FORCE_NWAY			BIT(7)
+@@ -894,6 +898,7 @@ static int rtl8367_extif_set_mode(struct
+ 	case RTL8367_EXTIF_MODE_RGMII_33V:
+ 		REG_WR(smi, RTL8367_CHIP_DEBUG0_REG, 0x0367);
+ 		REG_WR(smi, RTL8367_CHIP_DEBUG1_REG, 0x7777);
++		REG_RMW(smi, RTL8367_PHY_AD_REG, BIT(5), 0);
+ 		break;
+ 
+ 	case RTL8367_EXTIF_MODE_TMII_MAC:
diff --git a/target/linux/brcm63xx/patches-4.1/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch b/target/linux/brcm63xx/patches-4.1/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch
new file mode 100644
index 0000000..8b603e8
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch
@@ -0,0 +1,26 @@
+From ff3409ab17d56450943364ba49a16960e3cdda9b Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 6 Apr 2014 22:33:16 +0200
+Subject: [RFC] jffs2: work around unaligned accesses failing on bcm63xx/smp
+
+Unligned memcpy_fromio randomly fails with an unaligned dst. Work around
+it by ensuring we are always doing aligned copies.
+
+Should fix filename corruption in jffs2 with SMP.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ fs/jffs2/nodelist.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/fs/jffs2/nodelist.h
++++ b/fs/jffs2/nodelist.h
+@@ -255,7 +255,7 @@ struct jffs2_full_dirent
+ 	uint32_t ino; /* == zero for unlink */
+ 	unsigned int nhash;
+ 	unsigned char type;
+-	unsigned char name[0];
++	unsigned char name[0] __attribute__((aligned((sizeof(long)))));
+ };
+ 
+ /*
diff --git a/target/linux/brcm63xx/patches-4.1/804-bcm63xx_enet_63268_rgmii_ports.patch b/target/linux/brcm63xx/patches-4.1/804-bcm63xx_enet_63268_rgmii_ports.patch
new file mode 100644
index 0000000..770f39e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/804-bcm63xx_enet_63268_rgmii_ports.patch
@@ -0,0 +1,13 @@
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -2272,6 +2272,10 @@ static int bcm_enetsw_open(struct net_de
+ 
+ 		rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
+ 		rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
++		if (BCMCPU_IS_63268()) {
++			rgmii_ctrl |= ENETSW_RGMII_CTRL_TIMING_SEL_EN;
++			rgmii_ctrl |= ENETSW_RGMII_CTRL_MII_OVERRIDE_EN;
++		}
+ 		enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
+ 	}
+ 
diff --git a/target/linux/brcm63xx/profiles/00-default.mk b/target/linux/brcm63xx/profiles/00-default.mk
new file mode 100644
index 0000000..a25be92
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/00-default.mk
@@ -0,0 +1,15 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/Default
+  NAME:=Default Profile
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/Default/description
+  Package set compatible with most boards.
+endef
+$(eval $(call Profile,Default))
diff --git a/target/linux/brcm63xx/profiles/01-generic.mk b/target/linux/brcm63xx/profiles/01-generic.mk
new file mode 100644
index 0000000..2a9eb15
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/01-generic.mk
@@ -0,0 +1,123 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/963281TAN
+  NAME:=Generic 963281TAN
+  PACKAGES:=
+endef
+define Profile/963281TAN/Description
+  Package set optimized for 963281TAN.
+endef
+$(eval $(call Profile,963281TAN))
+
+define Profile/96328avng
+  NAME:=Generic 96328avng
+  PACKAGES:=
+endef
+define Profile/96328avng/Description
+  Package set optimized for 96328avng.
+endef
+$(eval $(call Profile,96328avng))
+
+define Profile/96338GW
+  NAME:=Generic 96338GW
+  PACKAGES:=
+endef
+define Profile/96338GW/Description
+  Package set optimized for 96338GW.
+endef
+$(eval $(call Profile,96338GW))
+
+define Profile/96338W
+  NAME:=Generic 96338W
+  PACKAGES:=
+endef
+define Profile/96338W/Description
+  Package set optimized for 96338W.
+endef
+$(eval $(call Profile,96338W))
+
+define Profile/96345GW2
+  NAME:=Generic 96345GW2
+  PACKAGES:=
+endef
+define Profile/96345GW2/Description
+  Package set optimized for 96345GW2.
+endef
+$(eval $(call Profile,96345GW2))
+
+define Profile/96348GW
+  NAME:=Generic 96348GW
+  PACKAGES:=
+endef
+define Profile/96348GW/Description
+  Package set optimized for 96348GW.
+endef
+$(eval $(call Profile,96348GW))
+
+define Profile/96348GW_10
+  NAME:=Generic 96348GW-10
+  PACKAGES:=
+endef
+define Profile/96348GW_10/Description
+  Package set optimized for 96348GW-10.
+endef
+$(eval $(call Profile,96348GW_10))
+
+define Profile/96348GW_11
+  NAME:=Generic 96348GW-11
+  PACKAGES:=
+endef
+define Profile/96348GW_11/Description
+  Package set optimized for 96348GW-11.
+endef
+$(eval $(call Profile,96348GW_11))
+
+define Profile/96348R
+  NAME:=Generic 96348R
+  PACKAGES:=
+endef
+define Profile/96348R/Description
+  Package set optimized for 96348R.
+endef
+$(eval $(call Profile,96348R))
+
+define Profile/96358VW
+  NAME:=Generic 96358VW
+  PACKAGES:=
+endef
+define Profile/96358VW/Description
+  Package set optimized for 96358VW.
+endef
+$(eval $(call Profile,96358VW))
+
+define Profile/96358VW2
+  NAME:=Generic 96358VW2
+  PACKAGES:=
+endef
+define Profile/96358VW2/Description
+  Package set optimized for 96358VW2.
+endef
+$(eval $(call Profile,96358VW2))
+
+define Profile/96368MVNgr
+  NAME:=Generic 96368MVNgr
+  PACKAGES:=
+endef
+define Profile/96368MVNgr/Description
+  Package set optimized for 96368MVNgr.
+endef
+$(eval $(call Profile,96368MVNgr))
+
+define Profile/96368MVWG
+  NAME:=Generic 96368MVWG
+  PACKAGES:=
+endef
+define Profile/96368MVWG/Description
+  Package set optimized for 96368MVWG.
+endef
+$(eval $(call Profile,96368MVWG))
diff --git a/target/linux/brcm63xx/profiles/adb.mk b/target/linux/brcm63xx/profiles/adb.mk
new file mode 100644
index 0000000..13c7524
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/adb.mk
@@ -0,0 +1,26 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/A4001N
+  NAME:=ADB P.DG A4001N
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/A4001N/Description
+  Package set optimized for A4001N.
+endef
+$(eval $(call Profile,A4001N))
+
+define Profile/A4001N1
+  NAME:=ADB P.DG A4001N1
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/A4001N1/Description
+  Package set optimized for A4001N1.
+endef
+$(eval $(call Profile,A4001N1))
diff --git a/target/linux/brcm63xx/profiles/alcatel.mk b/target/linux/brcm63xx/profiles/alcatel.mk
new file mode 100644
index 0000000..ec93a19
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/alcatel.mk
@@ -0,0 +1,16 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/RG100A
+  NAME:=Alcatel RG100A
+  PACKAGES:=kmod-b43 wpad-mini\
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/RG100A/Description
+  Package set optimized for RG100A.
+endef
+$(eval $(call Profile,RG100A))
diff --git a/target/linux/brcm63xx/profiles/asmax.mk b/target/linux/brcm63xx/profiles/asmax.mk
new file mode 100644
index 0000000..c8f0072
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/asmax.mk
@@ -0,0 +1,15 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/AR1004G
+  NAME:=Asmax AR 1004G
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/AR1004G/Description
+  Package set optimized for AR 1004G.
+endef
+$(eval $(call Profile,AR1004G))
diff --git a/target/linux/brcm63xx/profiles/belkin.mk b/target/linux/brcm63xx/profiles/belkin.mk
new file mode 100644
index 0000000..4bd50b0
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/belkin.mk
@@ -0,0 +1,15 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/F5D7633
+  NAME:=Belkin F5D7633
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/F5D7633/Description
+  Package set optimized for F5D7633.
+endef
+$(eval $(call Profile,F5D7633))
diff --git a/target/linux/brcm63xx/profiles/broadcom.mk b/target/linux/brcm63xx/profiles/broadcom.mk
new file mode 100644
index 0000000..520a676
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/broadcom.mk
@@ -0,0 +1,42 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/BCM96318REF
+  NAME:=Broadcom BCM9618REF reference board
+  PACKAGES:= kmod-b43 wpad-mini kmod-usb-ohci kmod-usb2 kmod-bcm63xx-udc
+endef
+define Profile/BCM96318REF/Description
+  Package set optimized for the Broadcom BCM96318REF reference board.
+endef
+$(eval $(call Profile,BCM96318REF))
+
+define Profile/BCM96318REF_P300
+  NAME:=Broadcom BCM96318REF_P300 reference board
+  PACKAGES:= kmod-b43 wpad-mini kmod-usb-ohci kmod-usb2 kmod-bcm63xx-udc
+endef
+define Profile/BCM96318REF_P300/Description
+  Package set optimized for the Broadcom BCM96318REF_P300 reference board.
+endef
+$(eval $(call Profile,BCM96318REF_P300))
+
+define Profile/BCM963268BU_P300
+  NAME:=Broadcom BCM963268BU_P300 reference board
+  PACKAGES:= kmod-usb-ohci kmod-usb2 kmod-bcm63xx-udc
+endef
+define Profile/BCM963268BU_P300/Description
+  Package set optimized for the Broadcom BCM963268BU_P300 reference board.
+endef
+$(eval $(call Profile,BCM963268BU_P300))
+
+define Profile/BCM963269BHR
+  NAME:=Broadcom BCM963269BHR reference board
+  PACKAGES:= kmod-usb-ohci kmod-usb2 kmod-bcm63xx-udc
+endef
+define Profile/BCM963269BHR/Description
+  Package set optimized for the Broadcom BCM963269BHR reference board.
+endef
+$(eval $(call Profile,BCM963269BHR))
diff --git a/target/linux/brcm63xx/profiles/bt.mk b/target/linux/brcm63xx/profiles/bt.mk
new file mode 100644
index 0000000..f76ac5c
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/bt.mk
@@ -0,0 +1,34 @@
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/BTHOMEHUB2A
+  NAME:=BT Home Hub 2A
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci kmod-ledtrig-usbdev
+endef
+define Profile/BTHOMEHUB2A/Description
+  Package set optimized for BTHOMEHUB2A.
+endef
+$(eval $(call Profile,BTHOMEHUB2A))
+
+define Profile/BTV2110
+  NAME:=BT Voyager V2110
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/BTV2500V/Description
+  Package set optimized for BTV2110.
+endef
+$(eval $(call Profile,BTV2110))
+
+define Profile/BTV2500V
+  NAME:=BT Voyager V2500V
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/BTV2500V/Description
+  Package set optimized for BTV2500V.
+endef
+$(eval $(call Profile,BTV2500V))
diff --git a/target/linux/brcm63xx/profiles/comtrend.mk b/target/linux/brcm63xx/profiles/comtrend.mk
new file mode 100644
index 0000000..99fec4a
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/comtrend.mk
@@ -0,0 +1,93 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/AR5381u
+  NAME:=Comtrend AR-5381u
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/AR5381u/Description
+  Package set optimized for AR-5381u.
+endef
+$(eval $(call Profile,AR5381u))
+
+define Profile/AR5387un
+  NAME:=Comtrend AR-5387un
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/AR5387un/Description
+  Package set optimized for AR-5387un.
+endef
+$(eval $(call Profile,AR5387un))
+
+define Profile/CT536_CT5621
+  NAME:=Comtrend CT-536+/CT-5621
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/CT536_CT5621/Description
+  Package set optimized for CT-536+/CT-5621.
+endef
+$(eval $(call Profile,CT536_CT5621))
+
+define Profile/CT5365
+  NAME:=Comtrend CT-5365
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/CT5365/Description
+  Package set optimized for CT-5365.
+endef
+$(eval $(call Profile,CT5365))
+
+define Profile/CT6373
+  NAME:=Comtrend CT-6373
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/CT6373/Description
+  Package set optimized for CT-6373.
+endef
+$(eval $(call Profile,CT6373))
+
+define Profile/VR3025u
+  NAME:=Comtrend VR-3025u
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/VR3025u/Description
+  Package set optimized for VR-3025u.
+endef
+$(eval $(call Profile,VR3025u))
+
+define Profile/VR3025un
+  NAME:=Comtrend VR-3025un
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/VR3025un/Description
+  Package set optimized for VR-3025un.
+endef
+$(eval $(call Profile,VR3025un))
+
+define Profile/VR3026e
+  NAME:=Comtrend VR-3026e
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/VR3026e/Description
+  Package set optimized for VR-3026e.
+endef
+$(eval $(call Profile,VR3026e))
+
+define Profile/WAP5813n
+  NAME:=Comtrend WAP-5813n
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/WAP5813n/Description
+  Package set optimized for WAP-5813n.
+endef
+$(eval $(call Profile,WAP5813n))
diff --git a/target/linux/brcm63xx/profiles/d-link.mk b/target/linux/brcm63xx/profiles/d-link.mk
new file mode 100644
index 0000000..1bd5fc8
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/d-link.mk
@@ -0,0 +1,71 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/DSL2640B_B
+  NAME:=D-Link DSL-2640B rev B2
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/DSL2640B_B/Description
+  Package set optimized for DSL-2640B rev B2.
+endef
+$(eval $(call Profile,DSL2640B_B))
+
+define Profile/DSL2640U
+  NAME:=D-Link DSL-2640U/BRU/C
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/DSL2640U/Description
+  Package set optimized for DSL-2640U
+endef
+$(eval $(call Profile,DSL2640U))
+
+define Profile/DSL2650U
+  NAME:=D-Link DSL-2650U
+  PACKAGES:=kmod-b43 wpad-mini\
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/DSL2650U/Description
+  Package set optimized for DSL-2650U.
+endef
+$(eval $(call Profile,DSL2650U))
+
+define Profile/DSL274XB_C
+  NAME:=D-Link DSL-2740B/DSL-2741B rev C2/C3
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/DSL274XB_C/Description
+  Package set optimized for DSL-2740B/DSL-2741B rev C2/C3.
+endef
+$(eval $(call Profile,DSL274XB_C))
+
+define Profile/DSL274XB_F
+  NAME:=D-Link DSL-2740B/DSL-2741B rev F1
+  PACKAGES:=kmod-ath9k wpad-mini
+endef
+define Profile/DSL274XB_F/Description
+  Package set optimized for DSL-2740B/DSL-2741B rev F1.
+endef
+$(eval $(call Profile,DSL274XB_F))
+
+define Profile/DSL275XB_D
+  NAME:=D-Link DSL-2750B/DSL-2751 rev D1
+  PACKAGES:=kmod-b43 wpad-mini kmod-usb-ohci kmod-usb2
+endef
+define Profile/DSL275XB_D/Description
+  Package set optimized for DSL-2750B/DSL-2751 rev D1.
+endef
+$(eval $(call Profile,DSL275XB_D))
+
+define Profile/DVAG3810BN
+  NAME:=D-Link DVA-G3810BN/TL
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/DVAG3810BN/Description
+  Package set optimized for DVA-G3810BN/TL.
+endef
+$(eval $(call Profile,DVAG3810BN))
diff --git a/target/linux/brcm63xx/profiles/davolink.mk b/target/linux/brcm63xx/profiles/davolink.mk
new file mode 100644
index 0000000..0097a80
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/davolink.mk
@@ -0,0 +1,15 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/DV201AMR
+  NAME:=Davolink DV-201AMR
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/DV201AMR/Description
+  Package set optimized for DV-201AMR.
+endef
+$(eval $(call Profile,DV201AMR))
diff --git a/target/linux/brcm63xx/profiles/dynalink.mk b/target/linux/brcm63xx/profiles/dynalink.mk
new file mode 100644
index 0000000..f15699f
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/dynalink.mk
@@ -0,0 +1,42 @@
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/RTA770BW
+  NAME:=Dynalink RTA770BW (Siemens SE 515)
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/RTA770BW/Description
+  Package set optimized for RTA770BW.
+endef
+$(eval $(call Profile,RTA770BW))
+
+define Profile/RTA770W
+  NAME:=Dynalink RTA770W
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/RTA770W/Description
+  Package set optimized for RTA770W.
+endef
+$(eval $(call Profile,RTA770W))
+
+define Profile/RTA1025W
+  NAME:=Dynalink RTA1025W
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/RTA1025W/Description
+  Package set optimized for RTA1025W.
+endef
+$(eval $(call Profile,RTA1025W))
+
+define Profile/RTA1320
+  NAME:=Dynalink RTA1320
+  PACKAGES:=
+endef
+define Profile/RTA1320/Description
+  Package set optimized for RTA1320.
+endef
+$(eval $(call Profile,RTA1320))
diff --git a/target/linux/brcm63xx/profiles/huawei.mk b/target/linux/brcm63xx/profiles/huawei.mk
new file mode 100644
index 0000000..a6764b7
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/huawei.mk
@@ -0,0 +1,55 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/HG520v
+  NAME:=Huawei EchoLife HG520v
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/HG520v/Description
+  Package set optimized for Huawei HG520v.
+endef
+$(eval $(call Profile,HG520v))
+
+define Profile/HG553
+  NAME:=Huawei EchoLife HG553
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci kmod-ledtrig-usbdev
+endef
+define Profile/HG553/Description
+  Package set optimized for Huawei HG553.
+endef
+$(eval $(call Profile,HG553))
+
+define Profile/HG556a_AB
+  NAME:=Huawei EchoLife HG556a (version A/B - Atheros)
+  PACKAGES:=kmod-ath9k wpad-mini \
+	kmod-usb2 kmod-usb-ohci kmod-ledtrig-usbdev
+endef
+define Profile/HG556a_AB/Description
+  Package set optimized for Huawei HG556a version A/B (Atheros).
+endef
+$(eval $(call Profile,HG556a_AB))
+
+define Profile/HG556a_C
+  NAME:=Huawei EchoLife HG556a (version C - Ralink)
+  PACKAGES:=kmod-rt2800-pci wpad-mini \
+	kmod-usb2 kmod-usb-ohci kmod-ledtrig-usbdev
+endef
+define Profile/HG556a_C/Description
+  Package set optimized for Huawei HG556a version C (Ralink).
+endef
+$(eval $(call Profile,HG556a_C))
+
+define Profile/HG655b
+  NAME:=Huawei HG655b
+  PACKAGES:=kmod-rt2800-pci wpad-mini \
+	kmod-usb2 kmod-usb-ohci kmod-ledtrig-usbdev
+endef
+define Profile/HG655b/Description
+  Package set optimized for Huawei HG655b, HG655d.
+endef
+$(eval $(call Profile,HG655b))
diff --git a/target/linux/brcm63xx/profiles/inteno.mk b/target/linux/brcm63xx/profiles/inteno.mk
new file mode 100644
index 0000000..a8043c9
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/inteno.mk
@@ -0,0 +1,15 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/VG50
+  NAME:=Inteno VG50 Multi-WAN CPE
+  PACKAGES:= kmod-usb-ohci kmod-usb2
+endef
+define Profile/VG50/Description
+  Package set optimized for the Inteno VG50 Multi-WAN CPE.
+endef
+$(eval $(call Profile,VG50))
diff --git a/target/linux/brcm63xx/profiles/inventel.mk b/target/linux/brcm63xx/profiles/inventel.mk
new file mode 100644
index 0000000..a6733fc
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/inventel.mk
@@ -0,0 +1,15 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/Livebox
+  NAME:=Inventel Livebox 1
+  PACKAGES:=kmod-b43 wpad-mini kmod-usb-ohci
+endef
+define Profile/Livebox/Description
+  Package set optimized for Inventel Livebox 1.
+endef
+$(eval $(call Profile,Livebox))
diff --git a/target/linux/brcm63xx/profiles/netgear.mk b/target/linux/brcm63xx/profiles/netgear.mk
new file mode 100644
index 0000000..bc345bb
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/netgear.mk
@@ -0,0 +1,43 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/CVG834G
+  NAME:=Netgear CVG834G
+  PACKAGES:=
+endef
+define Profile/CVG834G/Description
+  Package set optimized for CVG834G.
+endef
+$(eval $(call Profile,CVG834G))
+
+define Profile/DG834GTPN
+  NAME:=Netgear DG834GT/PN
+  PACKAGES:=kmod-ath5k wpad-mini
+endef
+define Profile/DG834GTPN/Description
+  Package set optimized for DG834GT/PN.
+endef
+$(eval $(call Profile,DG834GTPN))
+
+define Profile/DG834GV4
+  NAME:=Netgear DG834G v4
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/DG834GTPN/Description
+  Package set optimized for DG834G v4.
+endef
+$(eval $(call Profile,DG834GV4))
+
+define Profile/DGND3700v1_3800B
+  NAME:=Netgear DGND3700 v1 / DGND3800B
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci kmod-ledtrig-usbdev
+endef
+define Profile/DGND3700v1_3800B/Description
+  Package set optimized for DGND3700 v1 / DGND3800B.
+endef
+$(eval $(call Profile,DGND3700v1_3800B))
diff --git a/target/linux/brcm63xx/profiles/pirelli.mk b/target/linux/brcm63xx/profiles/pirelli.mk
new file mode 100644
index 0000000..5861719
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/pirelli.mk
@@ -0,0 +1,35 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/A226G
+  NAME:=Pirelli A226G
+  PACKAGES:=kmod-b43 wpad-mini\
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/A226G/Description
+  Package set optimized for A226G.
+endef
+$(eval $(call Profile,A226G))
+
+define Profile/A226M
+  NAME:=Pirelli A226M/A226M-FWB
+  PACKAGES:=kmod-usb2 kmod-usb-ohci
+endef
+define Profile/A226M/Description
+  Package set optimized for A226M/A226M-FWB.
+endef
+$(eval $(call Profile,A226M))
+
+define Profile/AGPF_S0
+  NAME:=Pirelli Alice Gate VoIP 2 Plus Wi-Fi AGPF-S0
+  PACKAGES:=kmod-b43 wpad-mini\
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/AGPF_S0/Description
+  Package set optimized for AGPF-S0.
+endef
+$(eval $(call Profile,AGPF_S0))
diff --git a/target/linux/brcm63xx/profiles/sagem.mk b/target/linux/brcm63xx/profiles/sagem.mk
new file mode 100644
index 0000000..7d9a160
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/sagem.mk
@@ -0,0 +1,53 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/FAST2404
+  NAME:=Sagem F@ST2404
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/FAST2404/Description
+  Package set optimized for F@ST2404.
+endef
+$(eval $(call Profile,FAST2404))
+
+define Profile/FAST2504n
+  NAME:=Sagem F@ST2504n
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/FAST2504n/Description
+  Package set optimized for F@ST2504n.
+endef
+$(eval $(call Profile,FAST2504n))
+
+define Profile/FAST2604
+  NAME:=Sagem F@ST2604
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/FAST2604/Description
+  Package set optimized for F@ST2604.
+endef
+$(eval $(call Profile,FAST2604))
+
+define Profile/FAST2704N
+  NAME:=Sagem F@ST2704N
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/FAST2704N/Description
+  Package set optimized for F@ST2704N.
+endef
+$(eval $(call Profile,FAST2704N))
+
+define Profile/FAST2704V2
+  NAME:=Sagem F@ST2704V2
+  PACKAGES:=kmod-b43 wpad-mini\
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/FAST2704V2/Description
+  Package set optimized for F@ST2704V2.
+endef
+$(eval $(call Profile,FAST2704V2))
diff --git a/target/linux/brcm63xx/profiles/sfr.mk b/target/linux/brcm63xx/profiles/sfr.mk
new file mode 100644
index 0000000..8b0dd44
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/sfr.mk
@@ -0,0 +1,26 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/Neufbox4
+  NAME:=SFR Neufbox4
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/Neufbox4/Description
+  Package set optimized for Neufbox4.
+endef
+$(eval $(call Profile,Neufbox4))
+
+define Profile/Neufbox6
+  NAME:=SFR Neufbox6
+  PACKAGES:=kmod-b43 wpad-mini \
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/Neufbox6/Description
+  Package set optimized for Neufbox6.
+endef
+$(eval $(call Profile,Neufbox6))
diff --git a/target/linux/brcm63xx/profiles/t-com.mk b/target/linux/brcm63xx/profiles/t-com.mk
new file mode 100644
index 0000000..f1eaf0a
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/t-com.mk
@@ -0,0 +1,25 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/SPW303V
+  NAME:=T-Com Speedport W 303V
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/SPW303V/Description
+  Package set optimized for SPW303V.
+endef
+$(eval $(call Profile,SPW303V))
+
+
+define Profile/SPW500V
+  NAME:=T-Com Speedport W 500V
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/SPW500V/Description
+  Package set optimized for SPW500V.
+endef
+$(eval $(call Profile,SPW500V))
diff --git a/target/linux/brcm63xx/profiles/tecom.mk b/target/linux/brcm63xx/profiles/tecom.mk
new file mode 100644
index 0000000..038ef5e
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/tecom.mk
@@ -0,0 +1,28 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/GW6000
+  NAME:=Tecom GW6000
+  PACKAGES:=kmod-brcm-wl kmod-usb-ohci kmod-usb-storage \
+	kmod-fs-ext4 kmod-nls-cp437 kmod-nls-iso8859-1 e2fsprogs \
+	kmod-ipt-nathelper-extra wlc
+endef
+define Profile/GW6000/Description
+  Package set optimized for GW6000.
+endef
+$(eval $(call Profile,GW6000))
+
+define Profile/GW6200
+  NAME:=Tecom GW6200
+  PACKAGES:=kmod-brcm-wl kmod-usb-ohci kmod-usb-storage \
+	kmod-fs-ext4 kmod-nls-cp437 kmod-nls-iso8859-1 e2fsprogs \
+	kmod-ipt-nathelper-extra wlc
+endef
+define Profile/GW6200/Description
+  Package set optimized for GW6200.
+endef
+$(eval $(call Profile,GW6200))
diff --git a/target/linux/brcm63xx/profiles/telsey.mk b/target/linux/brcm63xx/profiles/telsey.mk
new file mode 100644
index 0000000..759a273
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/telsey.mk
@@ -0,0 +1,34 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/CPVA502PLUS
+  NAME:=Telsey CPVA502+
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/CPVA502PLUS/Description
+  Package set optimized for CPVA502+.
+endef
+$(eval $(call Profile,CPVA502PLUS))
+
+define Profile/CPVA642
+  NAME:=Telsey CPVA642-type (CPA-ZNTE60T)
+  PACKAGES:=kmod-rt61-pci wpad-mini\
+	kmod-usb2 kmod-usb-ohci
+endef
+define Profile/CPVA642/Description
+  Package set optimized for CPVA642-type.
+endef
+$(eval $(call Profile,CPVA642))
+
+define Profile/MAGIC
+  NAME:=Telsey MAGIC (Alice W-Gate)
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/MAGIC/Description
+  Package set optimized for Telsey MAGIC (Alice W-Gate)
+endef
+$(eval $(call Profile,CPVA502PLUS))
diff --git a/target/linux/brcm63xx/profiles/tp-link.mk b/target/linux/brcm63xx/profiles/tp-link.mk
new file mode 100644
index 0000000..a7e7f26
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/tp-link.mk
@@ -0,0 +1,15 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/TDW8900GB
+  NAME:=TP-Link TD-W8900GB
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/TDW8900GB/Description
+  Package set optimized for TD-W8900GB.
+endef
+$(eval $(call Profile,TDW8900GB))
diff --git a/target/linux/brcm63xx/profiles/usrobotics.mk b/target/linux/brcm63xx/profiles/usrobotics.mk
new file mode 100644
index 0000000..76b5e12
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/usrobotics.mk
@@ -0,0 +1,16 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/USR9108
+  NAME:=USRobotics 9108
+  PACKAGES:=kmod-b43 wpad-mini\
+	kmod-usb-ohci
+endef
+define Profile/USR9108/Description
+  Package set optimized for USR9108.
+endef
+$(eval $(call Profile,USR9108))
diff --git a/target/linux/brcm63xx/profiles/zyxel.mk b/target/linux/brcm63xx/profiles/zyxel.mk
new file mode 100644
index 0000000..3aca094
--- /dev/null
+++ b/target/linux/brcm63xx/profiles/zyxel.mk
@@ -0,0 +1,15 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/P870HW_51a_v2
+  NAME:=ZyXEL P870HW-51a v2
+  PACKAGES:=kmod-b43 wpad-mini
+endef
+define Profile/P870HW_51a_v2/Description
+  Package set optimized for P870HW-51a v2.
+endef
+$(eval $(call Profile,P870HW_51a_v2))
diff --git a/target/linux/brcm63xx/smp/config-default b/target/linux/brcm63xx/smp/config-default
new file mode 100644
index 0000000..8afdf5e
--- /dev/null
+++ b/target/linux/brcm63xx/smp/config-default
@@ -0,0 +1,13 @@
+CONFIG_CPU_RMAP=y
+# CONFIG_KEXEC is not set
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_NR_CPUS=2
+CONFIG_RCU_STALL_COMMON=y
+CONFIG_RFS_ACCEL=y
+CONFIG_RPS=y
+CONFIG_SMP=y
+CONFIG_SMP_UP=y
+CONFIG_STOP_MACHINE=y
+CONFIG_TREE_RCU=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+CONFIG_XPS=y
diff --git a/target/linux/brcm63xx/smp/target.mk b/target/linux/brcm63xx/smp/target.mk
new file mode 100644
index 0000000..b0ccf97
--- /dev/null
+++ b/target/linux/brcm63xx/smp/target.mk
@@ -0,0 +1,8 @@
+BOARDNAME:=smp
+
+define Target/Description
+	Build firmware images for BCM63XX boards with SMP support.
+	Currently only BCM6362 and BCM6368 supported.
+endef
+
+