aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/adm5120/patches/200-amba_pl010_hacks.patch
blob: 97b06acec8b42dad53cd6f765edd5a8d34f9213f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -52,11 +52,10 @@
 
 #include <asm/io.h>
 
-#define UART_NR		8
-
 #define SERIAL_AMBA_MAJOR	204
 #define SERIAL_AMBA_MINOR	16
-#define SERIAL_AMBA_NR		UART_NR
+#define SERIAL_AMBA_NR		CONFIG_SERIAL_AMBA_PL010_NUMPORTS
+#define SERIAL_AMBA_NAME	CONFIG_SERIAL_AMBA_PL010_PORTNAME
 
 #define AMBA_ISR_PASS_LIMIT	256
 
@@ -82,7 +81,7 @@
 	struct uart_amba_port *uap = (struct uart_amba_port *)port;
 	unsigned int cr;
 
-	cr = readb(uap->port.membase + UART010_CR);
+	cr = readl(uap->port.membase + UART010_CR);
 	cr &= ~UART010_CR_TIE;
 	writel(cr, uap->port.membase + UART010_CR);
 }
@@ -92,7 +91,7 @@
 	struct uart_amba_port *uap = (struct uart_amba_port *)port;
 	unsigned int cr;
 
-	cr = readb(uap->port.membase + UART010_CR);
+	cr = readl(uap->port.membase + UART010_CR);
 	cr |= UART010_CR_TIE;
 	writel(cr, uap->port.membase + UART010_CR);
 }
@@ -102,7 +101,7 @@
 	struct uart_amba_port *uap = (struct uart_amba_port *)port;
 	unsigned int cr;
 
-	cr = readb(uap->port.membase + UART010_CR);
+	cr = readl(uap->port.membase + UART010_CR);
 	cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
 	writel(cr, uap->port.membase + UART010_CR);
 }
@@ -112,7 +111,7 @@
 	struct uart_amba_port *uap = (struct uart_amba_port *)port;
 	unsigned int cr;
 
-	cr = readb(uap->port.membase + UART010_CR);
+	cr = readl(uap->port.membase + UART010_CR);
 	cr |= UART010_CR_MSIE;
 	writel(cr, uap->port.membase + UART010_CR);
 }
@@ -122,9 +121,9 @@
 	struct tty_struct *tty = uap->port.info->tty;
 	unsigned int status, ch, flag, rsr, max_count = 256;
 
-	status = readb(uap->port.membase + UART01x_FR);
+	status = readl(uap->port.membase + UART01x_FR);
 	while (UART_RX_DATA(status) && max_count--) {
-		ch = readb(uap->port.membase + UART01x_DR);
+		ch = readl(uap->port.membase + UART01x_DR);
 		flag = TTY_NORMAL;
 
 		uap->port.icount.rx++;
@@ -133,7 +132,7 @@
 		 * Note that the error handling code is
 		 * out of the main execution path
 		 */
-		rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
+		rsr = readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
 		if (unlikely(rsr & UART01x_RSR_ANY)) {
 			writel(0, uap->port.membase + UART01x_ECR);
 
@@ -165,7 +164,7 @@
 		uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
 
 	ignore_char:
-		status = readb(uap->port.membase + UART01x_FR);
+		status = readl(uap->port.membase + UART01x_FR);
 	}
 	spin_unlock(&uap->port.lock);
 	tty_flip_buffer_push(tty);
@@ -210,7 +209,7 @@
 
 	writel(0, uap->port.membase + UART010_ICR);
 
-	status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
+	status = readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 
 	delta = status ^ uap->old_status;
 	uap->old_status = status;
@@ -238,7 +237,7 @@
 
 	spin_lock(&uap->port.lock);
 
-	status = readb(uap->port.membase + UART010_IIR);
+	status = readl(uap->port.membase + UART010_IIR);
 	if (status) {
 		do {
 			if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
@@ -251,7 +250,7 @@
 			if (pass_counter-- == 0)
 				break;
 
-			status = readb(uap->port.membase + UART010_IIR);
+			status = readl(uap->port.membase + UART010_IIR);
 		} while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
 				   UART010_IIR_TIS));
 		handled = 1;
@@ -265,7 +264,7 @@
 static unsigned int pl010_tx_empty(struct uart_port *port)
 {
 	struct uart_amba_port *uap = (struct uart_amba_port *)port;
-	unsigned int status = readb(uap->port.membase + UART01x_FR);
+	unsigned int status = readl(uap->port.membase + UART01x_FR);
 	return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
 }
 
@@ -275,7 +274,7 @@
 	unsigned int result = 0;
 	unsigned int status;
 
-	status = readb(uap->port.membase + UART01x_FR);
+	status = readl(uap->port.membase + UART01x_FR);
 	if (status & UART01x_FR_DCD)
 		result |= TIOCM_CAR;
 	if (status & UART01x_FR_DSR)
@@ -301,7 +300,7 @@
 	unsigned int lcr_h;
 
 	spin_lock_irqsave(&uap->port.lock, flags);
-	lcr_h = readb(uap->port.membase + UART010_LCRH);
+	lcr_h = readl(uap->port.membase + UART010_LCRH);
 	if (break_state == -1)
 		lcr_h |= UART01x_LCRH_BRK;
 	else
@@ -334,7 +333,7 @@
 	/*
 	 * initialise the old status of the modem signals
 	 */
-	uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
+	uap->old_status = readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 
 	/*
 	 * Finally, enable interrupts
@@ -365,7 +364,7 @@
 	writel(0, uap->port.membase + UART010_CR);
 
 	/* disable break condition and fifos */
-	writel(readb(uap->port.membase + UART010_LCRH) &
+	writel(readl(uap->port.membase + UART010_LCRH) &
 		~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
 	       uap->port.membase + UART010_LCRH);
 
@@ -387,7 +386,7 @@
 	/*
 	 * Ask the core to calculate the divisor for us.
 	 */
-	baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16); 
+	baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
 	quot = uart_get_divisor(port, baud);
 
 	switch (termios->c_cflag & CSIZE) {
@@ -450,7 +449,7 @@
 		uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
 
 	/* first, disable everything */
-	old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
+	old_cr = readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
 
 	if (UART_ENABLE_MS(port, termios->c_cflag))
 		old_cr |= UART010_CR_MSIE;
@@ -540,7 +539,7 @@
 	.verify_port	= pl010_verify_port,
 };
 
-static struct uart_amba_port *amba_ports[UART_NR];
+static struct uart_amba_port *amba_ports[SERIAL_AMBA_NR];
 
 #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
 
@@ -550,7 +549,7 @@
 	unsigned int status;
 
 	do {
-		status = readb(uap->port.membase + UART01x_FR);
+		status = readl(uap->port.membase + UART01x_FR);
 		barrier();
 	} while (!UART_TX_READY(status));
 	writel(ch, uap->port.membase + UART01x_DR);
@@ -567,7 +566,7 @@
 	/*
 	 *	First save the CR then disable the interrupts
 	 */
-	old_cr = readb(uap->port.membase + UART010_CR);
+	old_cr = readl(uap->port.membase + UART010_CR);
 	writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
 
 	uart_console_write(&uap->port, s, count, pl010_console_putchar);
@@ -577,7 +576,7 @@
 	 *	and restore the TCR
 	 */
 	do {
-		status = readb(uap->port.membase + UART01x_FR);
+		status = readl(uap->port.membase + UART01x_FR);
 		barrier();
 	} while (status & UART01x_FR_BUSY);
 	writel(old_cr, uap->port.membase + UART010_CR);
@@ -589,9 +588,9 @@
 pl010_console_get_options(struct uart_amba_port *uap, int *baud,
 			     int *parity, int *bits)
 {
-	if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
+	if (readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
 		unsigned int lcr_h, quot;
-		lcr_h = readb(uap->port.membase + UART010_LCRH);
+		lcr_h = readl(uap->port.membase + UART010_LCRH);
 
 		*parity = 'n';
 		if (lcr_h & UART01x_LCRH_PEN) {
@@ -606,8 +605,8 @@
 		else
 			*bits = 8;
 
-		quot = readb(uap->port.membase + UART010_LCRL) |
-		       readb(uap->port.membase + UART010_LCRM) << 8;
+		quot = readl(uap->port.membase + UART010_LCRL) |
+		       readl(uap->port.membase + UART010_LCRM) << 8;
 		*baud = uap->port.uartclk / (16 * (quot + 1));
 	}
 }
@@ -625,7 +624,7 @@
 	 * if so, search for the first available port that does have
 	 * console support.
 	 */
-	if (co->index >= UART_NR)
+	if (co->index >= SERIAL_AMBA_NR)
 		co->index = 0;
 	uap = amba_ports[co->index];
 	if (!uap)
@@ -643,7 +642,7 @@
 
 static struct uart_driver amba_reg;
 static struct console amba_console = {
-	.name		= "ttyAM",
+	.name		= SERIAL_AMBA_NAME,
 	.write		= pl010_console_write,
 	.device		= uart_console_device,
 	.setup		= pl010_console_setup,
@@ -659,11 +658,11 @@
 
 static struct uart_driver amba_reg = {
 	.owner			= THIS_MODULE,
-	.driver_name		= "ttyAM",
-	.dev_name		= "ttyAM",
+	.driver_name		= SERIAL_AMBA_NAME,
+	.dev_name		= SERIAL_AMBA_NAME,
 	.major			= SERIAL_AMBA_MAJOR,
 	.minor			= SERIAL_AMBA_MINOR,
-	.nr			= UART_NR,
+	.nr			= SERIAL_AMBA_NR,
 	.cons			= AMBA_CONSOLE,
 };
 
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -287,10 +287,25 @@
 	help
 	  This selects the ARM(R) AMBA(R) PrimeCell PL010 UART.  If you have
 	  an Integrator/AP or Integrator/PP2 platform, or if you have a
-	  Cirrus Logic EP93xx CPU, say Y or M here.
+	  Cirrus Logic EP93xx CPU or an Infineon ADM5120 SOC, say Y or M here.
 
 	  If unsure, say N.
 
+config SERIAL_AMBA_PL010_NUMPORTS
+	int "Maximum number of AMBA PL010 serial ports"
+	depends on SERIAL_AMBA_PL010
+	default "8"
+	---help---
+	  Set this to the number of serial ports you want the AMBA PL010 driver
+	  to support.
+
+config SERIAL_AMBA_PL010_PORTNAME
+	string "Name of the AMBA PL010 serial ports"
+	depends on SERIAL_AMBA_PL010
+	default "ttyAM"
+	---help---
+	  ::: To be written :::
+
 config SERIAL_AMBA_PL010_CONSOLE
 	bool "Support for console on AMBA serial port"
 	depends on SERIAL_AMBA_PL010=y