1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
|
/*
* $Id$
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the
* Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
* Boston, MA 02110-1301, USA.
*
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <asm/io.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include <adm5120_info.h>
#include <adm5120_defs.h>
#include <adm5120_switch.h>
#include <adm5120_mpmc.h>
#if 1
# define mem_dbg(f, a...) printk("mem_detect: " f, ## a)
#else
# define mem_dbg(f, a...)
#endif
unsigned long adm5120_memsize;
#define MEM_READL(a) __raw_readl((void __iomem *)(a))
#define MEM_WRITEL(a, v) __raw_writel((v), (void __iomem *)(a))
static int __init mem_check_pattern(u8 *addr, unsigned long offs)
{
u32 *p1 = (u32 *)addr;
u32 *p2 = (u32 *)(addr+offs);
u32 t,u,v;
/* save original value */
t = MEM_READL(p1);
u = MEM_READL(p2);
if (t != u)
return 0;
v = 0x55555555;
if (u == v)
v = 0xAAAAAAAA;
mem_dbg("write 0x%08X to 0x%08lX\n", v, (unsigned long)p1);
MEM_WRITEL(p1, v);
/* flush write buffers */
MPMC_WRITE_REG(CTRL, MPMC_READ_REG(CTRL) | MPMC_CTRL_DWB);
u = MEM_READL(p2);
mem_dbg("pattern at 0x%08lX is 0x%08X\n", (unsigned long)p2, u);
/* restore original value */
MEM_WRITEL(p1, t);
return (v == u);
}
static void __init adm5120_detect_memsize(void)
{
u32 memctrl;
u32 size, maxsize;
u8 *p;
memctrl = SW_READ_REG(MEMCTRL);
switch (memctrl & MEMCTRL_SDRS_MASK) {
case MEMCTRL_SDRS_4M:
maxsize = 4 << 20;
break;
case MEMCTRL_SDRS_8M:
maxsize = 8 << 20;
break;
case MEMCTRL_SDRS_16M:
maxsize = 16 << 20;
break;
default:
maxsize = 64 << 20;
break;
}
mem_dbg("checking for %uMB chip in 1st bank\n", maxsize >> 20);
/* detect size of the 1st SDRAM bank */
p = (u8 *)KSEG1ADDR(0);
for (size = 2<<20; size <= (maxsize >> 1); size <<= 1) {
if (mem_check_pattern(p, size)) {
/* mirrored address */
mem_dbg("mirrored data found at offset 0x%08X\n", size);
break;
}
}
mem_dbg("chip size in 1st bank is %uMB\n", size >> 20);
adm5120_memsize = size;
if (size != maxsize)
/* 2nd bank is not supported */
goto out;
if ((memctrl & MEMCTRL_SDR1_ENABLE) == 0)
/* 2nd bank is disabled */
goto out;
/*
* some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
* are missing.
*/
mem_dbg("check presence of 2nd bank\n");
p = (u8 *)KSEG1ADDR(maxsize+size-4);
if (mem_check_pattern(p, 0)) {
adm5120_memsize += size;
}
if (maxsize != size) {
/* adjusting MECTRL register */
memctrl &= ~(MEMCTRL_SDRS_MASK);
switch (size>>20) {
case 4:
memctrl |= MEMCTRL_SDRS_4M;
break;
case 8:
memctrl |= MEMCTRL_SDRS_8M;
break;
case 16:
memctrl |= MEMCTRL_SDRS_16M;
break;
default:
memctrl |= MEMCTRL_SDRS_64M;
break;
}
SW_WRITE_REG(MEMCTRL, memctrl);
}
out:
mem_dbg("%dx%uMB memory found\n", (adm5120_memsize == size) ? 1 : 2 ,
size >>20);
}
void __init adm5120_mem_init(void)
{
adm5120_detect_memsize();
add_memory_region(0, adm5120_memsize, BOOT_MEM_RAM);
}
|