diff options
Diffstat (limited to 'target/linux/imx6/patches-3.10/0012-ARM-imx-Add-LVDS-general-purpose-clocks-to-i.MX6Q.patch')
| -rw-r--r-- | target/linux/imx6/patches-3.10/0012-ARM-imx-Add-LVDS-general-purpose-clocks-to-i.MX6Q.patch | 70 |
1 files changed, 0 insertions, 70 deletions
diff --git a/target/linux/imx6/patches-3.10/0012-ARM-imx-Add-LVDS-general-purpose-clocks-to-i.MX6Q.patch b/target/linux/imx6/patches-3.10/0012-ARM-imx-Add-LVDS-general-purpose-clocks-to-i.MX6Q.patch deleted file mode 100644 index 3f1b6ebfde..0000000000 --- a/target/linux/imx6/patches-3.10/0012-ARM-imx-Add-LVDS-general-purpose-clocks-to-i.MX6Q.patch +++ /dev/null @@ -1,70 +0,0 @@ -From: Sean Cross <xobs@kosagi.com> -Subject: [PATCH 1/3] ARM: imx: Add LVDS general-purpose clocks to i.MX6Q - -The i.MX6 has two general-purpose LVDS clocks that can be driven -from a variety of sources. This patch adds a mux and a gate for -both of these clocks. - -Signed-off-by: Sean Cross <xobs@kosagi.com> -Signed-off-by: Shawn Guo <shawn.guo@linaro.org> ---- - .../devicetree/bindings/clock/imx6q-clock.txt | 4 ++++ - arch/arm/mach-imx/clk-imx6q.c | 20 +++++++++++++++++++- - 2 files changed, 23 insertions(+), 1 deletion(-) - ---- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt -+++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt -@@ -208,6 +208,10 @@ clocks and IDs. - pll4_post_div 193 - pll5_post_div 194 - pll5_video_div 195 -+ lvds1_sel 204 -+ lvds2_sel 205 -+ lvds1_gate 206 -+ lvds2_gate 207 - - Examples: - ---- a/arch/arm/mach-imx/clk-imx6q.c -+++ b/arch/arm/mach-imx/clk-imx6q.c -@@ -205,6 +205,11 @@ static const char *vpu_axi_sels[] = { "a - static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div", - "dummy", "axi", "enfc", "ipu1_di0", "ipu1_di1", "ipu2_di0", - "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_post_div", }; -+static const char *lvds_sels[] = { -+ "dummy", "dummy", "dummy", "dummy", "dummy", "dummy", -+ "pll4_audio", "pll5_video", "pll8_mlb", "enet_ref", -+ "pcie_ref", "sata_ref", -+}; - - enum mx6q_clks { - dummy, ckil, ckih, osc, pll2_pfd0_352m, pll2_pfd1_594m, pll2_pfd2_396m, -@@ -238,7 +243,8 @@ enum mx6q_clks { - pll4_audio, pll5_video, pll8_mlb, pll7_usb_host, pll6_enet, ssi1_ipg, - ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5, - sata_ref, sata_ref_100m, pcie_ref, pcie_ref_125m, enet_ref, usbphy1_gate, -- usbphy2_gate, pll4_post_div, pll5_post_div, pll5_video_div, clk_max -+ usbphy2_gate, pll4_post_div, pll5_post_div, pll5_video_div, -+ lvds1_sel, lvds2_sel, lvds1_gate, lvds2_gate, clk_max - }; - - static struct clk *clk[clk_max]; -@@ -340,6 +346,18 @@ int __init mx6q_clocks_init(void) - base + 0xe0, 0, 2, 0, clk_enet_ref_table, - &imx_ccm_lock); - -+ clk[lvds1_sel] = imx_clk_mux("lvds1_sel", base + 0x160, 0, 5, lvds_sels, ARRAY_SIZE(lvds_sels)); -+ clk[lvds2_sel] = imx_clk_mux("lvds2_sel", base + 0x160, 5, 5, lvds_sels, ARRAY_SIZE(lvds_sels)); -+ -+ /* -+ * lvds1_gate and lvds2_gate are pseudo-gates. Both can be -+ * independently configured as clock inputs or outputs. We treat -+ * the "output_enable" bit as a gate, even though it's really just -+ * enabling clock output. -+ */ -+ clk[lvds1_gate] = imx_clk_gate("lvds1_gate", "dummy", base + 0x160, 10); -+ clk[lvds2_gate] = imx_clk_gate("lvds2_gate", "dummy", base + 0x160, 11); -+ - /* name parent_name reg idx */ - clk[pll2_pfd0_352m] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0); - clk[pll2_pfd1_594m] = imx_clk_pfd("pll2_pfd1_594m", "pll2_bus", base + 0x100, 1); |