diff options
Diffstat (limited to 'target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if')
6 files changed, 0 insertions, 2381 deletions
diff --git a/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvCompVer.txt b/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvCompVer.txt deleted file mode 100644 index 85bfa612cd..0000000000 --- a/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvCompVer.txt +++ /dev/null @@ -1,4 +0,0 @@ -Global HAL Version: FEROCEON_HAL_3_1_7
-Unit HAL Version: 3.1.3
-Description: This component includes an implementation of the unit HAL drivers
-
diff --git a/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.c b/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.c deleted file mode 100644 index 672d3e31f8..0000000000 --- a/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.c +++ /dev/null @@ -1,669 +0,0 @@ -/******************************************************************************* -Copyright (C) Marvell International Ltd. and its affiliates - -This software file (the "File") is owned and distributed by Marvell -International Ltd. and/or its affiliates ("Marvell") under the following -alternative licensing terms. Once you have made an election to distribute the -File under one of the following license alternatives, please (i) delete this -introductory statement regarding license alternatives, (ii) delete the two -license alternatives that you have not elected to use and (iii) preserve the -Marvell copyright notice above. - -******************************************************************************** -Marvell Commercial License Option - -If you received this File from Marvell and you have entered into a commercial -license agreement (a "Commercial License") with Marvell, the File is licensed -to you under the terms of the applicable Commercial License. - -******************************************************************************** -Marvell GPL License Option - -If you received this File from Marvell, you may opt to use, redistribute and/or -modify this File in accordance with the terms and conditions of the General -Public License Version 2, June 1991 (the "GPL License"), a copy of which is -available along with the File in the license.txt file or by writing to the Free -Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -on the worldwide web at http://www.gnu.org/licenses/gpl.txt. - -THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -DISCLAIMED. The GPL License provides additional details about this warranty -disclaimer. -******************************************************************************** -Marvell BSD License Option - -If you received this File from Marvell, you may opt to use, redistribute and/or -modify this File under the following licensing terms. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - * Neither the name of Marvell nor the names of its contributors may be - used to endorse or promote products derived from this software without - specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -*******************************************************************************/ - -#include "mvPciIf.h" -#include "ctrlEnv/sys/mvSysPex.h" - -#if defined(MV_INCLUDE_PCI) -#include "ctrlEnv/sys/mvSysPci.h" -#endif - - -/* defines */ -#ifdef MV_DEBUG - #define DB(x) x -#else - #define DB(x) -#endif - - -/******************************************************************************* -* mvPciInit - Initialize PCI interfaces -* -* DESCRIPTION: -* -* INPUT: -* -* -* OUTPUT: -* None. -* -* RETURN: -* MV_OK if function success otherwise MV_ERROR or MV_BAD_PARAM -* -*******************************************************************************/ - - -MV_STATUS mvPciIfInit(MV_U32 pciIf, PCI_IF_MODE pciIfmode) -{ - PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); - - if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) - { - #if defined(MV_INCLUDE_PCI) - - MV_PCI_MOD pciMod; - - if (PCI_IF_MODE_HOST == pciIfmode) - { - pciMod = MV_PCI_MOD_HOST; - } - else if (PCI_IF_MODE_DEVICE == pciIfmode) - { - pciMod = MV_PCI_MOD_DEVICE; - } - else - { - mvOsPrintf("%s: ERROR!!! Bus %d mode %d neither host nor device!\n", - __FUNCTION__, pciIf, pciIfmode); - return MV_FAIL; - } - - return mvPciInit(pciIf - MV_PCI_START_IF, pciMod); - #else - return MV_OK; - #endif - } - else if (PCI_IF_TYPE_PEX == pciIfType) - { - #if defined(MV_INCLUDE_PEX) - - MV_PEX_TYPE pexType; - - if (PCI_IF_MODE_HOST == pciIfmode) - { - pexType = MV_PEX_ROOT_COMPLEX; - } - else if (PCI_IF_MODE_DEVICE == pciIfmode) - { - pexType = MV_PEX_END_POINT; - } - else - { - mvOsPrintf("%s: ERROR!!! Bus %d type %d neither root complex nor" \ - " end point\n", __FUNCTION__, pciIf, pciIfmode); - return MV_FAIL; - } - return mvPexInit(pciIf - MV_PEX_START_IF, pexType); - - #else - return MV_OK; - #endif - - } - else - { - mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); - } - - return MV_FAIL; - -} - -/* PCI configuration space read write */ - -/******************************************************************************* -* mvPciConfigRead - Read from configuration space -* -* DESCRIPTION: -* This function performs a 32 bit read from PCI configuration space. -* It supports both type 0 and type 1 of Configuration Transactions -* (local and over bridge). In order to read from local bus segment, use -* bus number retrieved from mvPciLocalBusNumGet(). Other bus numbers -* will result configuration transaction of type 1 (over bridge). -* -* INPUT: -* pciIf - PCI interface number. -* bus - PCI segment bus number. -* dev - PCI device number. -* func - Function number. -* regOffs - Register offset. -* -* OUTPUT: -* None. -* -* RETURN: -* 32bit register data, 0xffffffff on error -* -*******************************************************************************/ -MV_U32 mvPciIfConfigRead (MV_U32 pciIf, MV_U32 bus, MV_U32 dev, MV_U32 func, - MV_U32 regOff) -{ - PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); - - if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) - { - #if defined(MV_INCLUDE_PCI) - return mvPciConfigRead(pciIf - MV_PCI_START_IF, - bus, - dev, - func, - regOff); - #else - return 0xffffffff; - #endif - } - else if (PCI_IF_TYPE_PEX == pciIfType) - { - #if defined(MV_INCLUDE_PEX) - return mvPexConfigRead(pciIf - MV_PEX_START_IF, - bus, - dev, - func, - regOff); - #else - return 0xffffffff; - #endif - - } - else - { - mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); - } - - return 0; - -} - -/******************************************************************************* -* mvPciConfigWrite - Write to configuration space -* -* DESCRIPTION: -* This function performs a 32 bit write to PCI configuration space. -* It supports both type 0 and type 1 of Configuration Transactions -* (local and over bridge). In order to write to local bus segment, use -* bus number retrieved from mvPciLocalBusNumGet(). Other bus numbers -* will result configuration transaction of type 1 (over bridge). -* -* INPUT: -* pciIf - PCI interface number. -* bus - PCI segment bus number. -* dev - PCI device number. -* func - Function number. -* regOffs - Register offset. -* data - 32bit data. -* -* OUTPUT: -* None. -* -* RETURN: -* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -* -*******************************************************************************/ -MV_STATUS mvPciIfConfigWrite(MV_U32 pciIf, MV_U32 bus, MV_U32 dev, - MV_U32 func, MV_U32 regOff, MV_U32 data) -{ - PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); - - if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) - { - #if defined(MV_INCLUDE_PCI) - return mvPciConfigWrite(pciIf - MV_PCI_START_IF, - bus, - dev, - func, - regOff, - data); - #else - return MV_OK; - #endif - } - else if (PCI_IF_TYPE_PEX == pciIfType) - { - #if defined(MV_INCLUDE_PEX) - return mvPexConfigWrite(pciIf - MV_PEX_START_IF, - bus, - dev, - func, - regOff, - data); - #else - return MV_OK; - #endif - - } - else - { - mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); - } - - return MV_FAIL; - -} - -/******************************************************************************* -* mvPciMasterEnable - Enable/disale PCI interface master transactions. -* -* DESCRIPTION: -* This function performs read modified write to PCI command status -* (offset 0x4) to set/reset bit 2. After this bit is set, the PCI -* master is allowed to gain ownership on the bus, otherwise it is -* incapable to do so. -* -* INPUT: -* pciIf - PCI interface number. -* enable - Enable/disable parameter. -* -* OUTPUT: -* None. -* -* RETURN: -* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -* -*******************************************************************************/ -MV_STATUS mvPciIfMasterEnable(MV_U32 pciIf, MV_BOOL enable) -{ - - PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); - - if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) - { - #if defined(MV_INCLUDE_PCI) - return mvPciMasterEnable(pciIf - MV_PCI_START_IF, - enable); - #else - return MV_OK; - #endif - } - else if (PCI_IF_TYPE_PEX == pciIfType) - { - #if defined(MV_INCLUDE_PEX) - return mvPexMasterEnable(pciIf - MV_PEX_START_IF, - enable); - #else - return MV_OK; - #endif - } - else - { - mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); - } - - return MV_FAIL; - -} - - -/******************************************************************************* -* mvPciSlaveEnable - Enable/disale PCI interface slave transactions. -* -* DESCRIPTION: -* This function performs read modified write to PCI command status -* (offset 0x4) to set/reset bit 0 and 1. After those bits are set, -* the PCI slave is allowed to respond to PCI IO space access (bit 0) -* and PCI memory space access (bit 1). -* -* INPUT: -* pciIf - PCI interface number. -* dev - PCI device number. -* enable - Enable/disable parameter. -* -* OUTPUT: -* None. -* -* RETURN: -* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -* -*******************************************************************************/ -MV_STATUS mvPciIfSlaveEnable(MV_U32 pciIf,MV_U32 bus, MV_U32 dev, MV_BOOL enable) -{ - - PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); - - if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) - { - #if defined(MV_INCLUDE_PCI) - return mvPciSlaveEnable(pciIf - MV_PCI_START_IF,bus,dev, - enable); - #else - return MV_OK; - #endif - } - else if (PCI_IF_TYPE_PEX == pciIfType) - { - #if defined(MV_INCLUDE_PEX) - return mvPexSlaveEnable(pciIf - MV_PEX_START_IF,bus,dev, - enable); - #else - return MV_OK; - #endif - } - else - { - mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); - } - - return MV_FAIL; - -} - -/******************************************************************************* -* mvPciLocalBusNumSet - Set PCI interface local bus number. -* -* DESCRIPTION: -* This function sets given PCI interface its local bus number. -* Note: In case the PCI interface is PCI-X, the information is read-only. -* -* INPUT: -* pciIf - PCI interface number. -* busNum - Bus number. -* -* OUTPUT: -* None. -* -* RETURN: -* MV_NOT_ALLOWED in case PCI interface is PCI-X. -* MV_BAD_PARAM on bad parameters , -* otherwise MV_OK -* -*******************************************************************************/ -MV_STATUS mvPciIfLocalBusNumSet(MV_U32 pciIf, MV_U32 busNum) -{ - PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); - - if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) - { - #if defined(MV_INCLUDE_PCI) - return mvPciLocalBusNumSet(pciIf - MV_PCI_START_IF, - busNum); - #else - return MV_OK; - #endif - } - else if (PCI_IF_TYPE_PEX == pciIfType) - { - #if defined(MV_INCLUDE_PEX) - return mvPexLocalBusNumSet(pciIf - MV_PEX_START_IF, - busNum); - #else - return MV_OK; - #endif - } - else - { - mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); - } - - return MV_FAIL; - -} - -/******************************************************************************* -* mvPciLocalBusNumGet - Get PCI interface local bus number. -* -* DESCRIPTION: -* This function gets the local bus number of a given PCI interface. -* -* INPUT: -* pciIf - PCI interface number. -* -* OUTPUT: -* None. -* -* RETURN: -* Local bus number.0xffffffff on Error -* -*******************************************************************************/ -MV_U32 mvPciIfLocalBusNumGet(MV_U32 pciIf) -{ - PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); - - if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) - { - #if defined(MV_INCLUDE_PCI) - return mvPciLocalBusNumGet(pciIf - MV_PCI_START_IF); - #else - return 0xFFFFFFFF; - #endif - } - else if (PCI_IF_TYPE_PEX == pciIfType) - { - #if defined(MV_INCLUDE_PEX) - return mvPexLocalBusNumGet(pciIf - MV_PEX_START_IF); - #else - return 0xFFFFFFFF; - #endif - - } - else - { - mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n",__FUNCTION__, pciIf); - } - - return 0; - -} - - -/******************************************************************************* -* mvPciLocalDevNumSet - Set PCI interface local device number. -* -* DESCRIPTION: -* This function sets given PCI interface its local device number. -* Note: In case the PCI interface is PCI-X, the information is read-only. -* -* INPUT: -* pciIf - PCI interface number. -* devNum - Device number. -* -* OUTPUT: -* None. -* -* RETURN: -* MV_NOT_ALLOWED in case PCI interface is PCI-X. MV_BAD_PARAM on bad parameters , -* otherwise MV_OK -* -*******************************************************************************/ -MV_STATUS mvPciIfLocalDevNumSet(MV_U32 pciIf, MV_U32 devNum) -{ - PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); - - if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) - { - #if defined(MV_INCLUDE_PCI) - return mvPciLocalDevNumSet(pciIf - MV_PCI_START_IF, - devNum); - #else - return MV_OK; - #endif - } - else if (PCI_IF_TYPE_PEX == pciIfType) - { - #if defined(MV_INCLUDE_PEX) - return mvPexLocalDevNumSet(pciIf - MV_PEX_START_IF, - devNum); - #else - return MV_OK; - #endif - } - else - { - mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); - } - - return MV_FAIL; - -} - -/******************************************************************************* -* mvPciLocalDevNumGet - Get PCI interface local device number. -* -* DESCRIPTION: -* This function gets the local device number of a given PCI interface. -* -* INPUT: -* pciIf - PCI interface number. -* -* OUTPUT: -* None. -* -* RETURN: -* Local device number. 0xffffffff on Error -* -*******************************************************************************/ -MV_U32 mvPciIfLocalDevNumGet(MV_U32 pciIf) -{ - PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); - - if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) - { - #if defined(MV_INCLUDE_PCI) - return mvPciLocalDevNumGet(pciIf - MV_PCI_START_IF); - #else - return 0xFFFFFFFF; - #endif - } - else if (PCI_IF_TYPE_PEX == pciIfType) - { - #if defined(MV_INCLUDE_PEX) - return mvPexLocalDevNumGet(pciIf - MV_PEX_START_IF); - #else - return 0xFFFFFFFF; - #endif - - } - else - { - mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); - } - - return 0; - -} - -/******************************************************************************* -* mvPciIfTypeGet - -* -* DESCRIPTION: -* -* INPUT: -* -* OUTPUT: -* None. -* -* RETURN: -* -*******************************************************************************/ - -PCI_IF_TYPE mvPciIfTypeGet(MV_U32 pciIf) -{ - - if ((pciIf >= MV_PCI_START_IF)&&(pciIf < MV_PCI_MAX_IF + MV_PCI_START_IF)) - { - return PCI_IF_TYPE_CONVEN_PCIX; - } - else if ((pciIf >= MV_PEX_START_IF) && - (pciIf < MV_PEX_MAX_IF + MV_PEX_START_IF)) - { - return PCI_IF_TYPE_PEX; - - } - else - { - mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); - } - - return 0xffffffff; - -} - -/******************************************************************************* -* mvPciIfTypeGet - -* -* DESCRIPTION: -* -* INPUT: -* -* OUTPUT: -* None. -* -* RETURN: -* -*******************************************************************************/ - -MV_U32 mvPciRealIfNumGet(MV_U32 pciIf) -{ - - PCI_IF_TYPE pciIfType = mvPciIfTypeGet(pciIf); - - if (PCI_IF_TYPE_CONVEN_PCIX == pciIfType) - { - return (pciIf - MV_PCI_START_IF); - } - else if (PCI_IF_TYPE_PEX == pciIfType) - { - return (pciIf - MV_PEX_START_IF); - - } - else - { - mvOsPrintf("%s: ERROR!!! Invalid pciIf %d\n", __FUNCTION__, pciIf); - } - - return 0xffffffff; - -} - - - diff --git a/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.h b/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.h deleted file mode 100644 index 9c2d1604e7..0000000000 --- a/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIf.h +++ /dev/null @@ -1,134 +0,0 @@ -/******************************************************************************* -Copyright (C) Marvell International Ltd. and its affiliates - -This software file (the "File") is owned and distributed by Marvell -International Ltd. and/or its affiliates ("Marvell") under the following -alternative licensing terms. Once you have made an election to distribute the -File under one of the following license alternatives, please (i) delete this -introductory statement regarding license alternatives, (ii) delete the two -license alternatives that you have not elected to use and (iii) preserve the -Marvell copyright notice above. - -******************************************************************************** -Marvell Commercial License Option - -If you received this File from Marvell and you have entered into a commercial -license agreement (a "Commercial License") with Marvell, the File is licensed -to you under the terms of the applicable Commercial License. - -******************************************************************************** -Marvell GPL License Option - -If you received this File from Marvell, you may opt to use, redistribute and/or -modify this File in accordance with the terms and conditions of the General -Public License Version 2, June 1991 (the "GPL License"), a copy of which is -available along with the File in the license.txt file or by writing to the Free -Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -on the worldwide web at http://www.gnu.org/licenses/gpl.txt. - -THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -DISCLAIMED. The GPL License provides additional details about this warranty -disclaimer. -******************************************************************************** -Marvell BSD License Option - -If you received this File from Marvell, you may opt to use, redistribute and/or -modify this File under the following licensing terms. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - * Neither the name of Marvell nor the names of its contributors may be - used to endorse or promote products derived from this software without - specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -*******************************************************************************/ - -#ifndef __INCPCIIFH -#define __INCPCIIFH - -#include "mvSysHwConfig.h" -#include "pci-if/mvPciIfRegs.h" -#if defined(MV_INCLUDE_PEX) -#include "pex/mvPex.h" -#endif -#if defined(MV_INCLUDE_PCI) -#include "pci/mvPci.h" -#endif -#include "ctrlEnv/mvCtrlEnvLib.h" -#include "ctrlEnv/mvCtrlEnvAddrDec.h" - -typedef enum _mvPCIIfType -{ - PCI_IF_TYPE_CONVEN_PCIX, - PCI_IF_TYPE_PEX - -}PCI_IF_TYPE; - -typedef enum _mvPCIIfMode -{ - PCI_IF_MODE_HOST, - PCI_IF_MODE_DEVICE -}PCI_IF_MODE; - - -/* Global Functions prototypes */ - -/* mvPciIfInit - Initialize PCI interfaces*/ -MV_STATUS mvPciIfInit(MV_U32 pciIf, PCI_IF_MODE pciIfmode); - -/* mvPciIfConfigRead - Read from configuration space */ -MV_U32 mvPciIfConfigRead (MV_U32 pciIf, MV_U32 bus, MV_U32 dev, - MV_U32 func,MV_U32 regOff); - -/* mvPciIfConfigWrite - Write to configuration space */ -MV_STATUS mvPciIfConfigWrite(MV_U32 pciIf, MV_U32 bus, MV_U32 dev, - MV_U32 func, MV_U32 regOff, MV_U32 data); - -/* mvPciIfMasterEnable - Enable/disale PCI interface master transactions.*/ -MV_STATUS mvPciIfMasterEnable(MV_U32 pciIf, MV_BOOL enable); - -/* mvPciIfSlaveEnable - Enable/disale PCI interface slave transactions.*/ -MV_STATUS mvPciIfSlaveEnable(MV_U32 pciIf,MV_U32 bus, MV_U32 dev, - MV_BOOL enable); - -/* mvPciIfLocalBusNumSet - Set PCI interface local bus number.*/ -MV_STATUS mvPciIfLocalBusNumSet(MV_U32 pciIf, MV_U32 busNum); - -/* mvPciIfLocalBusNumGet - Get PCI interface local bus number.*/ -MV_U32 mvPciIfLocalBusNumGet(MV_U32 pciIf); - -/* mvPciIfLocalDevNumSet - Set PCI interface local device number.*/ -MV_STATUS mvPciIfLocalDevNumSet(MV_U32 pciIf, MV_U32 devNum); - -/* mvPciIfLocalDevNumGet - Get PCI interface local device number.*/ -MV_U32 mvPciIfLocalDevNumGet(MV_U32 pciIf); - -/* mvPciIfTypeGet - Get PCI If type*/ -PCI_IF_TYPE mvPciIfTypeGet(MV_U32 pciIf); - -MV_U32 mvPciRealIfNumGet(MV_U32 pciIf); - -/* mvPciIfAddrDecShow - Display address decode windows attributes */ -MV_VOID mvPciIfAddrDecShow(MV_VOID); - -#endif /* #ifndef __INCPCIIFH */ - diff --git a/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIfRegs.h b/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIfRegs.h deleted file mode 100644 index 08d4d2d901..0000000000 --- a/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/mvPciIfRegs.h +++ /dev/null @@ -1,245 +0,0 @@ -/******************************************************************************* -Copyright (C) Marvell International Ltd. and its affiliates - -This software file (the "File") is owned and distributed by Marvell -International Ltd. and/or its affiliates ("Marvell") under the following -alternative licensing terms. Once you have made an election to distribute the -File under one of the following license alternatives, please (i) delete this -introductory statement regarding license alternatives, (ii) delete the two -license alternatives that you have not elected to use and (iii) preserve the -Marvell copyright notice above. - -******************************************************************************** -Marvell Commercial License Option - -If you received this File from Marvell and you have entered into a commercial -license agreement (a "Commercial License") with Marvell, the File is licensed -to you under the terms of the applicable Commercial License. - -******************************************************************************** -Marvell GPL License Option - -If you received this File from Marvell, you may opt to use, redistribute and/or -modify this File in accordance with the terms and conditions of the General -Public License Version 2, June 1991 (the "GPL License"), a copy of which is -available along with the File in the license.txt file or by writing to the Free -Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -on the worldwide web at http://www.gnu.org/licenses/gpl.txt. - -THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -DISCLAIMED. The GPL License provides additional details about this warranty -disclaimer. -******************************************************************************** -Marvell BSD License Option - -If you received this File from Marvell, you may opt to use, redistribute and/or -modify this File under the following licensing terms. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - * Neither the name of Marvell nor the names of its contributors may be - used to endorse or promote products derived from this software without - specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -*******************************************************************************/ - -#ifndef __INCPCIIFREGSH -#define __INCPCIIFREGSH - - -/* defines */ -#define MAX_PCI_DEVICES 32 -#define MAX_PCI_FUNCS 8 -#define MAX_PCI_BUSSES 128 - -/***************************************/ -/* PCI Configuration registers */ -/***************************************/ - -/*********************************************/ -/* PCI Configuration, Function 0, Registers */ -/*********************************************/ - - -/* Standard registers */ -#define PCI_DEVICE_AND_VENDOR_ID 0x000 -#define PCI_STATUS_AND_COMMAND 0x004 -#define PCI_CLASS_CODE_AND_REVISION_ID 0x008 -#define PCI_BIST_HDR_TYPE_LAT_TMR_CACHE_LINE 0x00C -#define PCI_MEMORY_BAR_BASE_ADDR(barNum) (0x010 + ((barNum) << 2)) -#define PCI_SUBSYS_ID_AND_SUBSYS_VENDOR_ID 0x02C -#define PCI_EXPANSION_ROM_BASE_ADDR_REG 0x030 -#define PCI_CAPABILTY_LIST_POINTER 0x034 -#define PCI_INTERRUPT_PIN_AND_LINE 0x03C - - -/* PCI Device and Vendor ID Register (PDVIR) */ -#define PDVIR_VEN_ID_OFFS 0 /* Vendor ID */ -#define PDVIR_VEN_ID_MASK (0xffff << PDVIR_VEN_ID_OFFS) - -#define PDVIR_DEV_ID_OFFS 16 /* Device ID */ -#define PDVIR_DEV_ID_MASK (0xffff << PDVIR_DEV_ID_OFFS) - -/* PCI Status and Command Register (PSCR) */ -#define PSCR_IO_EN BIT0 /* IO Enable */ -#define PSCR_MEM_EN BIT1 /* Memory Enable */ -#define PSCR_MASTER_EN BIT2 /* Master Enable */ -#define PSCR_SPECIAL_EN BIT3 /* Special Cycle Enable */ -#define PSCR_MEM_WRI_INV BIT4 /* Memory Write and Invalidate Enable */ -#define PSCR_VGA BIT5 /* VGA Palette Snoops */ -#define PSCR_PERR_EN BIT6 /* Parity Errors Respond Enable */ -#define PSCR_ADDR_STEP BIT7 /* Address Stepping Enable (Wait Cycle En)*/ -#define PSCR_SERR_EN BIT8 /* Ability to assert SERR# line */ -#define PSCR_FAST_BTB_EN BIT9 /* generate fast back-to-back transactions*/ -#define PSCR_CAP_LIST BIT20 /* Capability List Support */ -#define PSCR_66MHZ_EN BIT21 /* 66 MHz Capable */ -#define PSCR_UDF_EN BIT22 /* User definable features */ -#define PSCR_TAR_FAST_BB BIT23 /* fast back-to-back transactions capable */ -#define PSCR_DATA_PERR BIT24 /* Data Parity reported */ - -#define PSCR_DEVSEL_TIM_OFFS 25 /* DEVSEL timing */ -#define PSCR_DEVSEL_TIM_MASK (0x3 << PSCR_DEVSEL_TIM_OFFS) -#define PSCR_DEVSEL_TIM_FAST (0x0 << PSCR_DEVSEL_TIM_OFFS) -#define PSCR_DEVSEL_TIM_MED (0x1 << PSCR_DEVSEL_TIM_OFFS) -#define PSCR_DEVSEL_TIM_SLOW (0x2 << PSCR_DEVSEL_TIM_OFFS) - -#define PSCR_SLAVE_TABORT BIT27 /* Signalled Target Abort */ -#define PSCR_MASTER_TABORT BIT28 /* Recieved Target Abort */ -#define PSCR_MABORT BIT29 /* Recieved Master Abort */ -#define PSCR_SYSERR BIT30 /* Signalled system error */ -#define PSCR_DET_PARERR BIT31 /* Detect Parity Error */ - -/* PCI configuration register offset=0x08 fields - (PCI_CLASS_CODE_AND_REVISION_ID)(PCCRI) */ - -#define PCCRIR_REVID_OFFS 0 /* Revision ID */ -#define PCCRIR_REVID_MASK (0xff << PCCRIR_REVID_OFFS) - -#define PCCRIR_FULL_CLASS_OFFS 8 /* Full Class Code */ -#define PCCRIR_FULL_CLASS_MASK (0xffffff << PCCRIR_FULL_CLASS_OFFS) - -#define PCCRIR_PROGIF_OFFS 8 /* Prog .I/F*/ -#define PCCRIR_PROGIF_MASK (0xff << PCCRIR_PROGIF_OFFS) - -#define PCCRIR_SUB_CLASS_OFFS 16 /* Sub Class*/ -#define PCCRIR_SUB_CLASS_MASK (0xff << PCCRIR_SUB_CLASS_OFFS) - -#define PCCRIR_BASE_CLASS_OFFS 24 /* Base Class*/ -#define PCCRIR_BASE_CLASS_MASK (0xff << PCCRIR_BASE_CLASS_OFFS) - -/* PCI configuration register offset=0x0C fields - (PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE)(PBHTLTCL) */ - -#define PBHTLTCLR_CACHELINE_OFFS 0 /* Specifies the cache line size */ -#define PBHTLTCLR_CACHELINE_MASK (0xff << PBHTLTCLR_CACHELINE_OFFS) - -#define PBHTLTCLR_LATTIMER_OFFS 8 /* latency timer */ -#define PBHTLTCLR_LATTIMER_MASK (0xff << PBHTLTCLR_LATTIMER_OFFS) - -#define PBHTLTCLR_HEADTYPE_FULL_OFFS 16 /* Full Header Type */ -#define PBHTLTCLR_HEADTYPE_FULL_MASK (0xff << PBHTLTCLR_HEADTYPE_FULL_OFFS) - -#define PBHTLTCLR_MULTI_FUNC BIT23 /* Multi/Single function */ - -#define PBHTLTCLR_HEADER_OFFS 16 /* Header type */ -#define PBHTLTCLR_HEADER_MASK (0x7f << PBHTLTCLR_HEADER_OFFS) -#define PBHTLTCLR_HEADER_STANDARD (0x0 << PBHTLTCLR_HEADER_OFFS) -#define PBHTLTCLR_HEADER_PCI2PCI_BRIDGE (0x1 << PBHTLTCLR_HEADER_OFFS) - - -#define PBHTLTCLR_BISTCOMP_OFFS 24 /* BIST Completion Code */ -#define PBHTLTCLR_BISTCOMP_MASK (0xf << PBHTLTCLR_BISTCOMP_OFFS) - -#define PBHTLTCLR_BISTACT BIT30 /* BIST Activate bit */ -#define PBHTLTCLR_BISTCAP BIT31 /* BIST Capable Bit */ - - -/* PCI Bar Base Low Register (PBBLR) */ -#define PBBLR_IOSPACE BIT0 /* Memory Space Indicator */ - -#define PBBLR_TYPE_OFFS 1 /* BAR Type/Init Val. */ -#define PBBLR_TYPE_MASK (0x3 << PBBLR_TYPE_OFFS) -#define PBBLR_TYPE_32BIT_ADDR (0x0 << PBBLR_TYPE_OFFS) -#define PBBLR_TYPE_64BIT_ADDR (0x2 << PBBLR_TYPE_OFFS) - -#define PBBLR_PREFETCH_EN BIT3 /* Prefetch Enable */ - - -#define PBBLR_MEM_BASE_OFFS 4 /* Memory Bar Base address. Corresponds to - address bits [31:4] */ -#define PBBLR_MEM_BASE_MASK (0xfffffff << PBBLR_MEM_BASE_OFFS) - -#define PBBLR_IO_BASE_OFFS 2 /* IO Bar Base address. Corresponds to - address bits [31:2] */ -#define PBBLR_IO_BASE_MASK (0x3fffffff << PBBLR_IO_BASE_OFFS) - - -#define PBBLR_BASE_OFFS 12 /* Base address. Address bits [31:12] */ -#define PBBLR_BASE_MASK (0xfffff << PBBLR_BASE_OFFS) -#define PBBLR_BASE_ALIGNMET (1 << PBBLR_BASE_OFFS) - - -/* PCI Bar Base High Fegister (PBBHR) */ -#define PBBHR_BASE_OFFS 0 /* Base address. Address bits [31:12] */ -#define PBBHR_BASE_MASK (0xffffffff << PBBHR_BASE_OFFS) - - -/* PCI configuration register offset=0x2C fields - (PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID)(PSISVI) */ - -#define PSISVIR_VENID_OFFS 0 /* Subsystem Manufacturer Vendor ID Number */ -#define PSISVIR_VENID_MASK (0xffff << PSISVIR_VENID_OFFS) - -#define PSISVIR_DEVID_OFFS 16 /* Subsystem Device ID Number */ -#define PSISVIR_DEVID_MASK (0xffff << PSISVIR_DEVID_OFFS) - -/* PCI configuration register offset=0x30 fields - (PCI_EXPANSION_ROM_BASE_ADDR_REG)(PERBA) */ - -#define PERBAR_EXPROMEN BIT0 /* Expansion ROM Enable */ - -#define PERBAR_BASE_OFFS 12 /* Expansion ROM Base Address */ -#define PERBAR_BASE_MASK (0xfffff << PERBAR_BASE_OFFS) - -/* PCI configuration register offset=0x34 fields - (PCI_CAPABILTY_LIST_POINTER)(PCLP) */ - -#define PCLPR_CAPPTR_OFFS 0 /* Capability List Pointer */ -#define PCLPR_CAPPTR_MASK (0xff << PCLPR_CAPPTR_OFFS) - -/* PCI configuration register offset=0x3C fields - (PCI_INTERRUPT_PIN_AND_LINE)(PIPL) */ - -#define PIPLR_INTLINE_OFFS 0 /* Interrupt line (IRQ) */ -#define PIPLR_INTLINE_MASK (0xff << PIPLR_INTLINE_OFFS) - -#define PIPLR_INTPIN_OFFS 8 /* interrupt pin (A,B,C,D) */ -#define PIPLR_INTPIN_MASK (0xff << PIPLR_INTPIN_OFFS) - -#define PIPLR_MINGRANT_OFFS 16 /* Minimum Grant on 250 nano seconds units */ -#define PIPLR_MINGRANT_MASK (0xff << PIPLR_MINGRANT_OFFS) - -#define PIPLR_MAXLATEN_OFFS 24 /* Maximum latency on 250 nano seconds units */ -#define PIPLR_MAXLATEN_MASK (0xff << PIPLR_MAXLATEN_OFFS) - -#endif /* #ifndef __INCPCIIFREGSH */ - diff --git a/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.c b/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.c deleted file mode 100644 index f2169793b8..0000000000 --- a/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.c +++ /dev/null @@ -1,1006 +0,0 @@ -/******************************************************************************* -Copyright (C) Marvell International Ltd. and its affiliates - -This software file (the "File") is owned and distributed by Marvell -International Ltd. and/or its affiliates ("Marvell") under the following -alternative licensing terms. Once you have made an election to distribute the -File under one of the following license alternatives, please (i) delete this -introductory statement regarding license alternatives, (ii) delete the two -license alternatives that you have not elected to use and (iii) preserve the -Marvell copyright notice above. - -******************************************************************************** -Marvell Commercial License Option - -If you received this File from Marvell and you have entered into a commercial -license agreement (a "Commercial License") with Marvell, the File is licensed -to you under the terms of the applicable Commercial License. - -******************************************************************************** -Marvell GPL License Option - -If you received this File from Marvell, you may opt to use, redistribute and/or -modify this File in accordance with the terms and conditions of the General -Public License Version 2, June 1991 (the "GPL License"), a copy of which is -available along with the File in the license.txt file or by writing to the Free -Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -on the worldwide web at http://www.gnu.org/licenses/gpl.txt. - -THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -DISCLAIMED. The GPL License provides additional details about this warranty -disclaimer. -******************************************************************************** -Marvell BSD License Option - -If you received this File from Marvell, you may opt to use, redistribute and/or -modify this File under the following licensing terms. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - * Neither the name of Marvell nor the names of its contributors may be - used to endorse or promote products derived from this software without - specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -*******************************************************************************/ - -/* includes */ -#include "mvPciUtils.h" - -#include "ctrlEnv/mvCtrlEnvLib.h" - -/* #define MV_DEBUG */ -/* defines */ -#ifdef MV_DEBUG - #define DB(x) x - #define mvOsPrintf printf -#else - #define DB(x) -#endif - -/* -This module only support scanning of Header type 00h of pci devices -There is no suppotr for Header type 01h of pci devices ( PCI bridges ) -*/ - - -static MV_STATUS pciDetectDevice(MV_U32 pciIf, - MV_U32 bus, - MV_U32 dev, - MV_U32 func, - MV_PCI_DEVICE *pPciAgent); - -static MV_U32 pciDetectDeviceBars(MV_U32 pciIf, - MV_U32 bus, - MV_U32 dev, - MV_U32 func, - MV_PCI_DEVICE *pPciAgent); - - - - - - -/******************************************************************************* -* mvPciScan - Scan a PCI interface bus -* -* DESCRIPTION: -* Performs a full scan on a PCI interface and returns all possible details -* on the agents found on the bus. -* -* INPUT: -* pciIf - PCI Interface -* pPciAgents - Pointer to an Array of the pci agents to be detected -* pPciAgentsNum - pPciAgents array maximum number of elements -* -* OUTPUT: -* pPciAgents - Array of the pci agents detected on the bus -* pPciAgentsNum - Number of pci agents detected on the bus -* -* RETURN: -* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -* -*******************************************************************************/ - -MV_STATUS mvPciScan(MV_U32 pciIf, - MV_PCI_DEVICE *pPciAgents, - MV_U32 *pPciAgentsNum) -{ - - MV_U32 devIndex,funcIndex=0,busIndex=0,detectedDevNum=0; - MV_U32 localBus=mvPciIfLocalBusNumGet(pciIf); - MV_PCI_DEVICE *pPciDevice; - MV_PCI_DEVICE *pMainDevice; - - DB(mvOsPrintf("mvPciScan: PCI interface num %d\n", pciIf)); - /* Parameter checking */ - if (pciIf >= mvCtrlPexMaxIfGet()) - { - DB(mvOsPrintf("mvPciScan: ERR. Invalid PCI interface num %d\n", pciIf)); - return MV_BAD_PARAM; - } - if (NULL == pPciAgents) - { - DB(mvOsPrintf("mvPciScan: ERR. pPciAgents=NULL \n")); - return MV_BAD_PARAM; - } - if (NULL == pPciAgentsNum) - { - DB(mvOsPrintf("mvPciScan: ERR. pPciAgentsNum=NULL \n")); - return MV_BAD_PARAM; - } - - - DB(mvOsPrintf("mvPciScan: PCI interface num %d mvPciMasterEnable\n", pciIf)); - /* Master enable the MV PCI master */ - if (MV_OK != mvPciIfMasterEnable(pciIf,MV_TRUE)) - { - DB(mvOsPrintf("mvPciScan: ERR. mvPciMasterEnable failed \n")); - return MV_ERROR; - - } - - DB(mvOsPrintf("mvPciScan: PCI interface num scan%d\n", pciIf)); - - /* go through all busses */ - for (busIndex=localBus ; busIndex < MAX_PCI_BUSSES ; busIndex++) - { - /* go through all possible devices on the local bus */ - for (devIndex=0 ; devIndex < MAX_PCI_DEVICES ; devIndex++) - { - /* always start with function equal to zero */ - funcIndex=0; - - pPciDevice=&pPciAgents[detectedDevNum]; - DB(mvOsPrintf("mvPciScan: PCI interface num scan%d:%d\n", busIndex, devIndex)); - - if (MV_ERROR == pciDetectDevice(pciIf, - busIndex, - devIndex, - funcIndex, - pPciDevice)) - { - /* no device detected , try the next address */ - continue; - } - - /* We are here ! means we have detected a device*/ - /* always we start with only one function per device */ - pMainDevice = pPciDevice; - pPciDevice->funtionsNum = 1; - - - /* move on */ - detectedDevNum++; - - - /* check if we have no more room for a new device */ - if (detectedDevNum == *pPciAgentsNum) - { - DB(mvOsPrintf("mvPciScan: ERR. array passed too small \n")); - return MV_ERROR; - } - - /* check the detected device if it is a multi functional device then - scan all device functions*/ - if (pPciDevice->isMultiFunction == MV_TRUE) - { - /* start with function number 1 because we have already detected - function 0 */ - for (funcIndex=1; funcIndex<MAX_PCI_FUNCS ; funcIndex++) - { - pPciDevice=&pPciAgents[detectedDevNum]; - - if (MV_ERROR == pciDetectDevice(pciIf, - busIndex, - devIndex, - funcIndex, - pPciDevice)) - { - /* no device detected means no more functions !*/ - continue; - } - /* We are here ! means we have detected a device */ - - /* move on */ - pMainDevice->funtionsNum++; - detectedDevNum++; - - /* check if we have no more room for a new device */ - if (detectedDevNum == *pPciAgentsNum) - { - DB(mvOsPrintf("mvPciScan: ERR. Array too small\n")); - return MV_ERROR; - } - - - } - } - - } - - } - - /* return the number of devices actually detected on the bus ! */ - *pPciAgentsNum = detectedDevNum; - - return MV_OK; - -} - - -/******************************************************************************* -* pciDetectDevice - Detect a pci device parameters -* -* DESCRIPTION: -* This function detect if a pci agent exist on certain address ! -* and if exists then it fills all possible information on the -* agent -* -* INPUT: -* pciIf - PCI Interface -* bus - Bus number -* dev - Device number -* func - Function number -* -* -* -* OUTPUT: -* pPciAgent - pointer to the pci agent filled with its information -* -* RETURN: -* MV_ERROR if no device , MV_OK otherwise -* -*******************************************************************************/ - -static MV_STATUS pciDetectDevice(MV_U32 pciIf, - MV_U32 bus, - MV_U32 dev, - MV_U32 func, - MV_PCI_DEVICE *pPciAgent) -{ - MV_U32 pciData; - - /* no Parameters checking ! because it is static function and it is assumed - that all parameters were checked in the calling function */ - - - /* Try read the PCI Vendor ID and Device ID */ - - /* We will scan only ourselves and the PCI slots that exist on the - board, because we may have a case that we have one slot that has - a Cardbus connector, and because CardBus answers all IDsels we want - to scan only this slot and ourseleves. - - */ - #if defined(MV_INCLUDE_PCI) - if ((PCI_IF_TYPE_CONVEN_PCIX == mvPciIfTypeGet(pciIf)) && - (DB_88F5181_DDR1_PRPMC != mvBoardIdGet()) && - (DB_88F5181_DDR1_PEXPCI != mvBoardIdGet()) && - (DB_88F5181_DDR1_MNG != mvBoardIdGet())) - { - - if (mvBoardIsOurPciSlot(bus, dev) == MV_FALSE) - { - return MV_ERROR; - } - } - #endif /* defined(MV_INCLUDE_PCI) */ - - pciData = mvPciIfConfigRead(pciIf, bus,dev,func, PCI_DEVICE_AND_VENDOR_ID); - - if (PCI_ERROR_CODE == pciData) - { - /* no device exist */ - return MV_ERROR; - } - - /* we are here ! means a device is detected */ - - /* fill basic information */ - pPciAgent->busNumber=bus; - pPciAgent->deviceNum=dev; - pPciAgent->function=func; - - /* Fill the PCI Vendor ID and Device ID */ - - pPciAgent->venID = (pciData & PDVIR_VEN_ID_MASK) >> PDVIR_VEN_ID_OFFS; - pPciAgent->deviceID = (pciData & PDVIR_DEV_ID_MASK) >> PDVIR_DEV_ID_OFFS; - - /* Read Status and command */ - pciData = mvPciIfConfigRead(pciIf, - bus,dev,func, - PCI_STATUS_AND_COMMAND); - - - /* Fill related Status and Command information*/ - - if (pciData & PSCR_TAR_FAST_BB) - { - pPciAgent->isFastB2BCapable = MV_TRUE; - } - else - { - pPciAgent->isFastB2BCapable = MV_FALSE; - } - - if (pciData & PSCR_CAP_LIST) - { - pPciAgent->isCapListSupport=MV_TRUE; - } - else - { - pPciAgent->isCapListSupport=MV_FALSE; - } - - if (pciData & PSCR_66MHZ_EN) - { - pPciAgent->is66MHZCapable=MV_TRUE; - } - else - { - pPciAgent->is66MHZCapable=MV_FALSE; - } - - /* Read Class Code and Revision */ - pciData = mvPciIfConfigRead(pciIf, - bus,dev,func, - PCI_CLASS_CODE_AND_REVISION_ID); - - - pPciAgent->baseClassCode = - (pciData & PCCRIR_BASE_CLASS_MASK) >> PCCRIR_BASE_CLASS_OFFS; - - pPciAgent->subClassCode = - (pciData & PCCRIR_SUB_CLASS_MASK) >> PCCRIR_SUB_CLASS_OFFS; - - pPciAgent->progIf = - (pciData & PCCRIR_PROGIF_MASK) >> PCCRIR_PROGIF_OFFS; - - pPciAgent->revisionID = - (pciData & PCCRIR_REVID_MASK) >> PCCRIR_REVID_OFFS; - - /* Read PCI_BIST_HDR_TYPE_LAT_TMR_CACHE_LINE */ - pciData = mvPciIfConfigRead(pciIf, - bus,dev,func, - PCI_BIST_HDR_TYPE_LAT_TMR_CACHE_LINE); - - - - pPciAgent->pciCacheLine= - (pciData & PBHTLTCLR_CACHELINE_MASK ) >> PBHTLTCLR_CACHELINE_OFFS; - pPciAgent->pciLatencyTimer= - (pciData & PBHTLTCLR_LATTIMER_MASK) >> PBHTLTCLR_LATTIMER_OFFS; - - switch (pciData & PBHTLTCLR_HEADER_MASK) - { - case PBHTLTCLR_HEADER_STANDARD: - - pPciAgent->pciHeader=MV_PCI_STANDARD; - break; - case PBHTLTCLR_HEADER_PCI2PCI_BRIDGE: - - pPciAgent->pciHeader=MV_PCI_PCI2PCI_BRIDGE; - break; - - } - - if (pciData & PBHTLTCLR_MULTI_FUNC) - { - pPciAgent->isMultiFunction=MV_TRUE; - } - else - { - pPciAgent->isMultiFunction=MV_FALSE; - } - - if (pciData & PBHTLTCLR_BISTCAP) - { - pPciAgent->isBISTCapable=MV_TRUE; - } - else - { - pPciAgent->isBISTCapable=MV_FALSE; - } - - - /* read this device pci bars */ - - pciDetectDeviceBars(pciIf, - bus,dev,func, - pPciAgent); - - - /* check if we are bridge*/ - if ((pPciAgent->baseClassCode == PCI_BRIDGE_CLASS)&& - (pPciAgent->subClassCode == P2P_BRIDGE_SUB_CLASS_CODE)) - { - - /* Read P2P_BUSSES_NUM */ - pciData = mvPciIfConfigRead(pciIf, - bus,dev,func, - P2P_BUSSES_NUM); - - pPciAgent->p2pPrimBusNum = - (pciData & PBM_PRIME_BUS_NUM_MASK) >> PBM_PRIME_BUS_NUM_OFFS; - - pPciAgent->p2pSecBusNum = - (pciData & PBM_SEC_BUS_NUM_MASK) >> PBM_SEC_BUS_NUM_OFFS; - - pPciAgent->p2pSubBusNum = - (pciData & PBM_SUB_BUS_NUM_MASK) >> PBM_SUB_BUS_NUM_OFFS; - - pPciAgent->p2pSecLatencyTimer = - (pciData & PBM_SEC_LAT_TMR_MASK) >> PBM_SEC_LAT_TMR_OFFS; - - /* Read P2P_IO_BASE_LIMIT_SEC_STATUS */ - pciData = mvPciIfConfigRead(pciIf, - bus,dev,func, - P2P_IO_BASE_LIMIT_SEC_STATUS); - - pPciAgent->p2pSecStatus = - (pciData & PIBLSS_SEC_STATUS_MASK) >> PIBLSS_SEC_STATUS_OFFS; - - - pPciAgent->p2pIObase = - (pciData & PIBLSS_IO_BASE_MASK) << PIBLSS_IO_LIMIT_OFFS; - - /* clear low address (should be zero)*/ - pPciAgent->p2pIObase &= PIBLSS_HIGH_ADDR_MASK; - - pPciAgent->p2pIOLimit = - (pciData & PIBLSS_IO_LIMIT_MASK); - - /* fill low address with 0xfff */ - pPciAgent->p2pIOLimit |= PIBLSS_LOW_ADDR_MASK; - - - switch ((pciData & PIBLSS_ADD_CAP_MASK) >> PIBLSS_ADD_CAP_OFFS) - { - case PIBLSS_ADD_CAP_16BIT: - - pPciAgent->bIO32 = MV_FALSE; - - break; - case PIBLSS_ADD_CAP_32BIT: - - pPciAgent->bIO32 = MV_TRUE; - - /* Read P2P_IO_BASE_LIMIT_UPPER_16 */ - pciData = mvPciIfConfigRead(pciIf, - bus,dev,func, - P2P_IO_BASE_LIMIT_UPPER_16); - - pPciAgent->p2pIObase |= - (pciData & PRBU_IO_UPP_BASE_MASK) << PRBU_IO_UPP_LIMIT_OFFS; - - - pPciAgent->p2pIOLimit |= - (pciData & PRBU_IO_UPP_LIMIT_MASK); - - break; - - } - - - /* Read P2P_MEM_BASE_LIMIT */ - pciData = mvPciIfConfigRead(pciIf, - bus,dev,func, - P2P_MEM_BASE_LIMIT); - - pPciAgent->p2pMemBase = - (pciData & PMBL_MEM_BASE_MASK) << PMBL_MEM_LIMIT_OFFS; - - /* clear low address */ - pPciAgent->p2pMemBase &= PMBL_HIGH_ADDR_MASK; - - pPciAgent->p2pMemLimit = - (pciData & PMBL_MEM_LIMIT_MASK); - - /* add 0xfffff */ - pPciAgent->p2pMemLimit |= PMBL_LOW_ADDR_MASK; - - - /* Read P2P_PREF_MEM_BASE_LIMIT */ - pciData = mvPciIfConfigRead(pciIf, - bus,dev,func, - P2P_PREF_MEM_BASE_LIMIT); - - - pPciAgent->p2pPrefMemBase = - (pciData & PRMBL_PREF_MEM_BASE_MASK) << PRMBL_PREF_MEM_LIMIT_OFFS; - - /* get high address only */ - pPciAgent->p2pPrefMemBase &= PRMBL_HIGH_ADDR_MASK; - - - - pPciAgent->p2pPrefMemLimit = - (pciData & PRMBL_PREF_MEM_LIMIT_MASK); - - /* add 0xfffff */ - pPciAgent->p2pPrefMemLimit |= PRMBL_LOW_ADDR_MASK; - - switch (pciData & PRMBL_ADD_CAP_MASK) - { - case PRMBL_ADD_CAP_32BIT: - - pPciAgent->bPrefMem64 = MV_FALSE; - - /* Read P2P_PREF_BASE_UPPER_32 */ - pPciAgent->p2pPrefBaseUpper32Bits = 0; - - /* Read P2P_PREF_LIMIT_UPPER_32 */ - pPciAgent->p2pPrefLimitUpper32Bits = 0; - - break; - case PRMBL_ADD_CAP_64BIT: - - pPciAgent->bPrefMem64 = MV_TRUE; - - /* Read P2P_PREF_BASE_UPPER_32 */ - pPciAgent->p2pPrefBaseUpper32Bits = mvPciIfConfigRead(pciIf, - bus,dev,func, - P2P_PREF_BASE_UPPER_32); - - /* Read P2P_PREF_LIMIT_UPPER_32 */ - pPciAgent->p2pPrefLimitUpper32Bits = mvPciIfConfigRead(pciIf, - bus,dev,func, - P2P_PREF_LIMIT_UPPER_32); - - break; - - } - - } - else /* no bridge */ - { - /* Read PCI_SUBSYS_ID_AND_SUBSYS_VENDOR_ID */ - pciData = mvPciIfConfigRead(pciIf, - bus,dev,func, - PCI_SUBSYS_ID_AND_SUBSYS_VENDOR_ID); - - - pPciAgent->subSysVenID = - (pciData & PSISVIR_VENID_MASK) >> PSISVIR_VENID_OFFS; - pPciAgent->subSysID = - (pciData & PSISVIR_DEVID_MASK) >> PSISVIR_DEVID_OFFS; - - - /* Read PCI_EXPANSION_ROM_BASE_ADDR_REG */ - pciData = mvPciIfConfigRead(pciIf, - bus,dev,func, - PCI_EXPANSION_ROM_BASE_ADDR_REG); - - - if (pciData & PERBAR_EXPROMEN) - { - pPciAgent->isExpRom = MV_TRUE; - } - else - { - pPciAgent->isExpRom = MV_FALSE; - } - - pPciAgent->expRomAddr = - (pciData & PERBAR_BASE_MASK) >> PERBAR_BASE_OFFS; - - } - - - if (MV_TRUE == pPciAgent->isCapListSupport) - { - /* Read PCI_CAPABILTY_LIST_POINTER */ - pciData = mvPciIfConfigRead(pciIf, - bus,dev,func, - PCI_CAPABILTY_LIST_POINTER); - - pPciAgent->capListPointer = - (pciData & PCLPR_CAPPTR_MASK) >> PCLPR_CAPPTR_OFFS; - - } - - /* Read PCI_INTERRUPT_PIN_AND_LINE */ - pciData = mvPciIfConfigRead(pciIf, - bus,dev,func, - PCI_INTERRUPT_PIN_AND_LINE); - - - pPciAgent->irqLine= - (pciData & PIPLR_INTLINE_MASK) >> PIPLR_INTLINE_OFFS; - - pPciAgent->intPin= - (MV_PCI_INT_PIN)(pciData & PIPLR_INTPIN_MASK) >> PIPLR_INTPIN_OFFS; - - pPciAgent->minGrant= - (pciData & PIPLR_MINGRANT_MASK) >> PIPLR_MINGRANT_OFFS; - pPciAgent->maxLatency= - (pciData & PIPLR_MAXLATEN_MASK) >> PIPLR_MAXLATEN_OFFS; - - mvPciClassNameGet(pPciAgent->baseClassCode, - (MV_8 *)pPciAgent->type); - - return MV_OK; - - -} - -/******************************************************************************* -* pciDetectDeviceBars - Detect a pci device bars -* -* DESCRIPTION: -* This function detects all pci agent bars -* -* INPUT: -* pciIf - PCI Interface -* bus - Bus number -* dev - Device number -* func - Function number -* -* -* -* OUTPUT: -* pPciAgent - pointer to the pci agent filled with its information -* -* RETURN: -* detected bars number -* -*******************************************************************************/ -static MV_U32 pciDetectDeviceBars(MV_U32 pciIf, - MV_U32 bus, - MV_U32 dev, - MV_U32 func, - MV_PCI_DEVICE *pPciAgent) -{ - MV_U32 pciData,barIndex,detectedBar=0; - MV_U32 tmpBaseHigh=0,tmpBaseLow=0; - MV_U32 pciMaxBars=0; - - pPciAgent->barsNum=0; - - /* check if we are bridge*/ - if ((pPciAgent->baseClassCode == PCI_BRIDGE_CLASS)&& - (pPciAgent->subClassCode == P2P_BRIDGE_SUB_CLASS_CODE)) - { - pciMaxBars = 2; - } - else /* no bridge */ - { - pciMaxBars = 6; - } - - /* read this device pci bars */ - for (barIndex = 0 ; barIndex < pciMaxBars ; barIndex++ ) - { - /* Read PCI_MEMORY_BAR_BASE_ADDR */ - tmpBaseLow = pciData = mvPciIfConfigRead(pciIf, - bus,dev,func, - PCI_MEMORY_BAR_BASE_ADDR(barIndex)); - - pPciAgent->pciBar[detectedBar].barOffset = - PCI_MEMORY_BAR_BASE_ADDR(barIndex); - - /* check if the bar is 32bit or 64bit bar */ - switch (pciData & PBBLR_TYPE_MASK) - { - case PBBLR_TYPE_32BIT_ADDR: - pPciAgent->pciBar[detectedBar].barType = PCI_32BIT_BAR; - break; - case PBBLR_TYPE_64BIT_ADDR: - pPciAgent->pciBar[detectedBar].barType = PCI_64BIT_BAR; - break; - - } - - /* check if it is memory or IO bar */ - if (pciData & PBBLR_IOSPACE) - { - pPciAgent->pciBar[detectedBar].barMapping=PCI_IO_BAR; - } - else - { - pPciAgent->pciBar[detectedBar].barMapping=PCI_MEMORY_BAR; - } - - /* if it is memory bar then check if it is prefetchable */ - if (PCI_MEMORY_BAR == pPciAgent->pciBar[detectedBar].barMapping) - { - if (pciData & PBBLR_PREFETCH_EN) - { - pPciAgent->pciBar[detectedBar].isPrefetchable = MV_TRUE; - } - else - { - pPciAgent->pciBar[detectedBar].isPrefetchable = MV_FALSE; - } - - pPciAgent->pciBar[detectedBar].barBaseLow = - pciData & PBBLR_MEM_BASE_MASK; - - - } - else /* IO Bar */ - { - pPciAgent->pciBar[detectedBar].barBaseLow = - pciData & PBBLR_IO_BASE_MASK; - - } - - pPciAgent->pciBar[detectedBar].barBaseHigh=0; - - if (PCI_64BIT_BAR == pPciAgent->pciBar[detectedBar].barType) - { - barIndex++; - - tmpBaseHigh = pPciAgent->pciBar[detectedBar].barBaseHigh = - mvPciIfConfigRead(pciIf, - bus,dev,func, - PCI_MEMORY_BAR_BASE_ADDR(barIndex)); - - - } - - /* calculating full base address (64bit) */ - pPciAgent->pciBar[detectedBar].barBaseAddr = - (MV_U64)pPciAgent->pciBar[detectedBar].barBaseHigh; - - pPciAgent->pciBar[detectedBar].barBaseAddr <<= 32; - - pPciAgent->pciBar[detectedBar].barBaseAddr |= - (MV_U64)pPciAgent->pciBar[detectedBar].barBaseLow; - - - - /* get the sizes of the the bar */ - - pPciAgent->pciBar[detectedBar].barSizeHigh=0; - - if ((PCI_64BIT_BAR == pPciAgent->pciBar[detectedBar].barType) && - (PCI_MEMORY_BAR == pPciAgent->pciBar[detectedBar].barMapping)) - - { - /* write oxffffffff to the bar to get the size */ - /* start with sizelow ( original value was saved in tmpBaseLow ) */ - mvPciIfConfigWrite(pciIf, - bus,dev,func, - PCI_MEMORY_BAR_BASE_ADDR(barIndex-1), - 0xffffffff); - - /* read size */ - pPciAgent->pciBar[detectedBar].barSizeLow = - mvPciIfConfigRead(pciIf, - bus,dev,func, - PCI_MEMORY_BAR_BASE_ADDR(barIndex-1)); - - - - /* restore original value */ - mvPciIfConfigWrite(pciIf, - bus,dev,func, - PCI_MEMORY_BAR_BASE_ADDR(barIndex-1), - tmpBaseLow); - - - /* now do the same for BaseHigh */ - - /* write oxffffffff to the bar to get the size */ - mvPciIfConfigWrite(pciIf, - bus,dev,func, - PCI_MEMORY_BAR_BASE_ADDR(barIndex), - 0xffffffff); - - /* read size */ - pPciAgent->pciBar[detectedBar].barSizeHigh = - mvPciIfConfigRead(pciIf, - bus,dev,func, - PCI_MEMORY_BAR_BASE_ADDR(barIndex)); - - /* restore original value */ - mvPciIfConfigWrite(pciIf, - bus,dev,func, - PCI_MEMORY_BAR_BASE_ADDR(barIndex), - tmpBaseHigh); - - if ((0 == pPciAgent->pciBar[detectedBar].barSizeLow)&& - (0 == pPciAgent->pciBar[detectedBar].barSizeHigh)) - { - /* this bar is not applicable for this device, - ignore all previous settings and check the next bar*/ - - /* we though this was a 64bit bar , and it seems this - was wrong ! so decrement barIndex */ - barIndex--; - continue; - } - - /* calculate the full 64 bit size */ - - if (0 != pPciAgent->pciBar[detectedBar].barSizeHigh) - { - pPciAgent->pciBar[detectedBar].barSizeLow &= PBBLR_MEM_BASE_MASK; - - pPciAgent->pciBar[detectedBar].barSizeLow = - ~pPciAgent->pciBar[detectedBar].barSizeLow + 1; - - pPciAgent->pciBar[detectedBar].barSizeHigh = 0; - - } - else - { - - pPciAgent->pciBar[detectedBar].barSizeLow &= PBBLR_MEM_BASE_MASK; - - pPciAgent->pciBar[detectedBar].barSizeLow = - ~pPciAgent->pciBar[detectedBar].barSizeLow + 1; - - pPciAgent->pciBar[detectedBar].barSizeHigh = 0; - - } - - - - } - else /* 32bit bar */ - { - /* write oxffffffff to the bar to get the size */ - mvPciIfConfigWrite(pciIf, - bus,dev,func, - PCI_MEMORY_BAR_BASE_ADDR(barIndex), - 0xffffffff); - - /* read size */ - pPciAgent->pciBar[detectedBar].barSizeLow = - mvPciIfConfigRead(pciIf, - bus,dev,func, - PCI_MEMORY_BAR_BASE_ADDR(barIndex)); - - if (0 == pPciAgent->pciBar[detectedBar].barSizeLow) - { - /* this bar is not applicable for this device, - ignore all previous settings and check the next bar*/ - continue; - } - - - /* restore original value */ - mvPciIfConfigWrite(pciIf, - bus,dev,func, - PCI_MEMORY_BAR_BASE_ADDR(barIndex), - tmpBaseLow); - - /* calculate size low */ - - if (PCI_MEMORY_BAR == pPciAgent->pciBar[detectedBar].barMapping) - { - pPciAgent->pciBar[detectedBar].barSizeLow &= PBBLR_MEM_BASE_MASK; - } - else - { - pPciAgent->pciBar[detectedBar].barSizeLow &= PBBLR_IO_BASE_MASK; - } - - pPciAgent->pciBar[detectedBar].barSizeLow = - ~pPciAgent->pciBar[detectedBar].barSizeLow + 1; - - pPciAgent->pciBar[detectedBar].barSizeHigh = 0; - pPciAgent->pciBar[detectedBar].barSize = - (MV_U64)pPciAgent->pciBar[detectedBar].barSizeLow; - - - } - - /* we are here ! this means we have already detected a bar for - this device , now move on */ - - detectedBar++; - pPciAgent->barsNum++; - } - - return detectedBar; -} - - -/******************************************************************************* -* mvPciClassNameGet - get PCI class name -* -* DESCRIPTION: -* This function returns the PCI class name -* -* INPUT: -* baseClassCode - Base Class Code. -* -* OUTPUT: -* pType - the class name -* -* RETURN: -* MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK -* -*******************************************************************************/ -MV_STATUS mvPciClassNameGet(MV_U32 baseClassCode, MV_8 *pType) -{ - - switch(baseClassCode) - { - case 0x0: - strcpy(pType,"Old generation device"); - break; - case 0x1: - strcpy(pType,"Mass storage controller"); - break; - case 0x2: - strcpy(pType,"Network controller"); - break; - case 0x3: - strcpy(pType,"Display controller"); - break; - case 0x4: - strcpy(pType,"Multimedia device"); - break; - case 0x5: - strcpy(pType,"Memory controller"); - break; - case 0x6: - strcpy(pType,"Bridge Device"); - break; - case 0x7: - strcpy(pType,"Simple Communication controllers"); - break; - case 0x8: - strcpy(pType,"Base system peripherals"); - break; - case 0x9: - strcpy(pType,"Input Devices"); - break; - case 0xa: - strcpy(pType,"Docking stations"); - break; - case 0xb: - strcpy(pType,"Processors"); - break; - case 0xc: - strcpy(pType,"Serial bus controllers"); - break; - case 0xd: - strcpy(pType,"Wireless controllers"); - break; - case 0xe: - strcpy(pType,"Intelligent I/O controllers"); - break; - case 0xf: - strcpy(pType,"Satellite communication controllers"); - break; - case 0x10: - strcpy(pType,"Encryption/Decryption controllers"); - break; - case 0x11: - strcpy(pType,"Data acquisition and signal processing controllers"); - break; - default: - strcpy(pType,"Unknown device"); - break; - } - - return MV_OK; - -} - - - diff --git a/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.h b/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.h deleted file mode 100644 index 2ee0b1738b..0000000000 --- a/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/pci_util/mvPciUtils.h +++ /dev/null @@ -1,323 +0,0 @@ -/******************************************************************************* -Copyright (C) Marvell International Ltd. and its affiliates - -This software file (the "File") is owned and distributed by Marvell -International Ltd. and/or its affiliates ("Marvell") under the following -alternative licensing terms. Once you have made an election to distribute the -File under one of the following license alternatives, please (i) delete this -introductory statement regarding license alternatives, (ii) delete the two -license alternatives that you have not elected to use and (iii) preserve the -Marvell copyright notice above. - -******************************************************************************** -Marvell Commercial License Option - -If you received this File from Marvell and you have entered into a commercial -license agreement (a "Commercial License") with Marvell, the File is licensed -to you under the terms of the applicable Commercial License. - -******************************************************************************** -Marvell GPL License Option - -If you received this File from Marvell, you may opt to use, redistribute and/or -modify this File in accordance with the terms and conditions of the General -Public License Version 2, June 1991 (the "GPL License"), a copy of which is -available along with the File in the license.txt file or by writing to the Free -Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or -on the worldwide web at http://www.gnu.org/licenses/gpl.txt. - -THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED -WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY -DISCLAIMED. The GPL License provides additional details about this warranty -disclaimer. -******************************************************************************** -Marvell BSD License Option - -If you received this File from Marvell, you may opt to use, redistribute and/or -modify this File under the following licensing terms. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - * Neither the name of Marvell nor the names of its contributors may be - used to endorse or promote products derived from this software without - specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -*******************************************************************************/ - -#ifndef __INCmvPciUtilsh -#define __INCmvPciUtilsh - -/* -This module only support scanning of Header type 00h of pci devices -There is no suppotr for Header type 01h of pci devices ( PCI bridges ) -*/ - -/* includes */ -#include "mvSysHwConfig.h" -#include "pci-if/mvPciIf.h" -#include "pci/mvPciRegs.h" - - - -/* PCI base address low bar mask */ -#define PCI_ERROR_CODE 0xffffffff - -#define PCI_BRIDGE_CLASS 0x6 -#define P2P_BRIDGE_SUB_CLASS_CODE 0x4 - - -#define P2P_BUSSES_NUM 0x18 -#define P2P_IO_BASE_LIMIT_SEC_STATUS 0x1C -#define P2P_MEM_BASE_LIMIT 0x20 -#define P2P_PREF_MEM_BASE_LIMIT 0x24 -#define P2P_PREF_BASE_UPPER_32 0x28 -#define P2P_PREF_LIMIT_UPPER_32 0x2C -#define P2P_IO_BASE_LIMIT_UPPER_16 0x30 -#define P2P_EXP_ROM 0x38 - -/* P2P_BUSSES_NUM (PBM) */ - -#define PBM_PRIME_BUS_NUM_OFFS 0 -#define PBM_PRIME_BUS_NUM_MASK (0xff << PBM_PRIME_BUS_NUM_OFFS) - -#define PBM_SEC_BUS_NUM_OFFS 8 -#define PBM_SEC_BUS_NUM_MASK (0xff << PBM_SEC_BUS_NUM_OFFS) - -#define PBM_SUB_BUS_NUM_OFFS 16 -#define PBM_SUB_BUS_NUM_MASK (0xff << PBM_SUB_BUS_NUM_OFFS) - -#define PBM_SEC_LAT_TMR_OFFS 24 -#define PBM_SEC_LAT_TMR_MASK (0xff << PBM_SEC_LAT_TMR_OFFS) - -/* P2P_IO_BASE_LIMIT_SEC_STATUS (PIBLSS) */ - -#define PIBLSS_IO_BASE_OFFS 0 -#define PIBLSS_IO_BASE_MASK (0xff << PIBLSS_IO_BASE_OFFS) - -#define PIBLSS_ADD_CAP_OFFS 0 -#define PIBLSS_ADD_CAP_MASK (0x3 << PIBLSS_ADD_CAP_OFFS) -#define PIBLSS_ADD_CAP_16BIT (0x0 << PIBLSS_ADD_CAP_OFFS) -#define PIBLSS_ADD_CAP_32BIT (0x1 << PIBLSS_ADD_CAP_OFFS) - -#define PIBLSS_LOW_ADDR_OFFS 0 -#define PIBLSS_LOW_ADDR_MASK (0xFFF << PIBLSS_LOW_ADDR_OFFS) - -#define PIBLSS_HIGH_ADDR_OFFS 12 -#define PIBLSS_HIGH_ADDR_MASK (0xF << PIBLSS_HIGH_ADDR_OFFS) - -#define PIBLSS_IO_LIMIT_OFFS 8 -#define PIBLSS_IO_LIMIT_MASK (0xff << PIBLSS_IO_LIMIT_OFFS) - -#define PIBLSS_SEC_STATUS_OFFS 16 -#define PIBLSS_SEC_STATUS_MASK (0xffff << PIBLSS_SEC_STATUS_OFFS) - - -/* P2P_MEM_BASE_LIMIT (PMBL)*/ - -#define PMBL_MEM_BASE_OFFS 0 -#define PMBL_MEM_BASE_MASK (0xffff << PMBL_MEM_BASE_OFFS) - -#define PMBL_MEM_LIMIT_OFFS 16 -#define PMBL_MEM_LIMIT_MASK (0xffff << PMBL_MEM_LIMIT_OFFS) - - -#define PMBL_LOW_ADDR_OFFS 0 -#define PMBL_LOW_ADDR_MASK (0xFFFFF << PMBL_LOW_ADDR_OFFS) - -#define PMBL_HIGH_ADDR_OFFS 20 -#define PMBL_HIGH_ADDR_MASK (0xFFF << PMBL_HIGH_ADDR_OFFS) - - -/* P2P_PREF_MEM_BASE_LIMIT (PRMBL) */ - -#define PRMBL_PREF_MEM_BASE_OFFS 0 -#define PRMBL_PREF_MEM_BASE_MASK (0xffff << PRMBL_PREF_MEM_BASE_OFFS) - -#define PRMBL_PREF_MEM_LIMIT_OFFS 16 -#define PRMBL_PREF_MEM_LIMIT_MASK (0xffff<<PRMBL_PREF_MEM_LIMIT_OFFS) - -#define PRMBL_LOW_ADDR_OFFS 0 -#define PRMBL_LOW_ADDR_MASK (0xFFFFF << PRMBL_LOW_ADDR_OFFS) - -#define PRMBL_HIGH_ADDR_OFFS 20 -#define PRMBL_HIGH_ADDR_MASK (0xFFF << PRMBL_HIGH_ADDR_OFFS) - -#define PRMBL_ADD_CAP_OFFS 0 -#define PRMBL_ADD_CAP_MASK (0xf << PRMBL_ADD_CAP_OFFS) -#define PRMBL_ADD_CAP_32BIT (0x0 << PRMBL_ADD_CAP_OFFS) -#define PRMBL_ADD_CAP_64BIT (0x1 << PRMBL_ADD_CAP_OFFS) - -/* P2P_IO_BASE_LIMIT_UPPER_16 (PIBLU) */ - -#define PRBU_IO_UPP_BASE_OFFS 0 -#define PRBU_IO_UPP_BASE_MASK (0xffff << PRBU_IO_UPP_BASE_OFFS) - -#define PRBU_IO_UPP_LIMIT_OFFS 16 -#define PRBU_IO_UPP_LIMIT_MASK (0xffff << PRBU_IO_UPP_LIMIT_OFFS) - - -/* typedefs */ - -typedef enum _mvPciBarMapping -{ - PCI_MEMORY_BAR, - PCI_IO_BAR, - PCI_NO_MAPPING -}MV_PCI_BAR_MAPPING; - -typedef enum _mvPciBarType -{ - PCI_32BIT_BAR, - PCI_64BIT_BAR -}MV_PCI_BAR_TYPE; - -typedef enum _mvPciIntPin -{ - MV_PCI_INTA = 1, - MV_PCI_INTB = 2, - MV_PCI_INTC = 3, - MV_PCI_INTD = 4 -}MV_PCI_INT_PIN; - -typedef enum _mvPciHeader -{ - MV_PCI_STANDARD, - MV_PCI_PCI2PCI_BRIDGE - -}MV_PCI_HEADER; - - -/* BAR structure */ -typedef struct _pciBar -{ - MV_U32 barOffset; - MV_U32 barBaseLow; - MV_U32 barBaseHigh; - MV_U32 barSizeLow; - MV_U32 barSizeHigh; - /* The 'barBaseAddr' is a 64-bit variable - that will contain the TOTAL base address - value achived by combining both the 'barBaseLow' - and the 'barBaseHigh' parameters as follows: - - BIT: 63 31 0 - | | | - barBaseHigh barBaseLow */ - MV_U64 barBaseAddr; - /* The 'barSize' is a 64-bit variable - that will contain the TOTAL size achived - by combining both the 'barSizeLow' and - the 'barSizeHigh' parameters as follows: - - BIT: 63 31 0 - | | | - barSizeHigh barSizeLow - - NOTE: The total size described above - is AFTER the size calculation as - described in PCI spec rev2.2 */ - MV_U64 barSize; - MV_BOOL isPrefetchable; - MV_PCI_BAR_TYPE barType; - MV_PCI_BAR_MAPPING barMapping; - - -} PCI_BAR; - -/* Device information structure */ -typedef struct _mvPciDevice -{ - /* Device specific information */ - MV_U32 busNumber; /* Pci agent bus number */ - MV_U32 deviceNum; /* Pci agent device number */ - MV_U32 function; /* Pci agent function number */ - - MV_U32 venID; /* Pci agent Vendor ID */ - MV_U32 deviceID; /* Pci agent Device ID */ - - MV_BOOL isFastB2BCapable; /* Capability of Fast Back to Back - transactions */ - MV_BOOL isCapListSupport; /* Support of Capability list */ - MV_BOOL is66MHZCapable; /* 66MHZ support */ - - MV_U32 baseClassCode; /* Pci agent base Class Code */ - MV_U32 subClassCode; /* Pci agent sub Class Code */ - MV_U32 progIf; /* Pci agent Programing interface */ - MV_U32 revisionID; - - PCI_BAR pciBar[6]; /* Pci agent bar list */ - - MV_U32 p2pPrimBusNum; /* P2P Primary Bus number*/ - MV_U32 p2pSecBusNum; /* P2P Secondary Bus Number*/ - MV_U32 p2pSubBusNum; /* P2P Subordinate bus Number */ - MV_U32 p2pSecLatencyTimer; /* P2P Econdary Latency Timer*/ - MV_U32 p2pIObase; /* P2P IO Base */ - MV_U32 p2pIOLimit; /* P2P IO Linit */ - MV_BOOL bIO32; - MV_U32 p2pSecStatus; /* P2P Secondary Status */ - MV_U32 p2pMemBase; /* P2P Memory Space */ - MV_U32 p2pMemLimit; /* P2P Memory Limit*/ - MV_U32 p2pPrefMemBase; /* P2P Prefetchable Mem Base*/ - MV_U32 p2pPrefMemLimit; /* P2P Prefetchable Memory Limit*/ - MV_BOOL bPrefMem64; - MV_U32 p2pPrefBaseUpper32Bits;/* P2P Prefetchable upper 32 bits*/ - MV_U32 p2pPrefLimitUpper32Bits;/* P2P prefetchable limit upper 32*/ - - - MV_U32 pciCacheLine; /* Pci agent cache line */ - MV_U32 pciLatencyTimer; /* Pci agent Latency timer */ - MV_PCI_HEADER pciHeader; /* Pci agent header type*/ - MV_BOOL isMultiFunction; /* Multi function support */ - MV_BOOL isBISTCapable; /* Self test capable */ - - MV_U32 subSysID; /* Sub System ID */ - MV_U32 subSysVenID; /* Sub System Vendor ID */ - - MV_BOOL isExpRom; /* Expantion Rom support */ - MV_U32 expRomAddr; /* Expantion Rom pointer */ - - MV_U32 capListPointer; /* Capability list pointer */ - - MV_U32 irqLine; /* IRQ line */ - MV_PCI_INT_PIN intPin; /* Interrupt pin */ - MV_U32 minGrant; /* Minimum grant*/ - MV_U32 maxLatency; /* Maximum latency*/ - - MV_U32 funtionsNum; /* pci agent total functions number */ - - MV_U32 barsNum; - MV_U8 type[60]; /* class name of the pci agent */ - - -} MV_PCI_DEVICE; - -/* PCI gloabl functions */ -MV_STATUS mvPciClassNameGet(MV_U32 classCode, MV_8 *pType); - - -/* Performs a full scan on both PCIs and returns all possible details on the - agents found on the bus. */ -MV_STATUS mvPciScan(MV_U32 pciIf, - MV_PCI_DEVICE *pPciAgents, - MV_U32 *pPciAgentsNum); - - -#endif /* #ifndef __INCmvPciUtilsh */ |