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path: root/target/linux/cns3xxx/patches-3.0/102-cns3xxx_timers.patch
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Diffstat (limited to 'target/linux/cns3xxx/patches-3.0/102-cns3xxx_timers.patch')
-rw-r--r--target/linux/cns3xxx/patches-3.0/102-cns3xxx_timers.patch10
1 files changed, 5 insertions, 5 deletions
diff --git a/target/linux/cns3xxx/patches-3.0/102-cns3xxx_timers.patch b/target/linux/cns3xxx/patches-3.0/102-cns3xxx_timers.patch
index c99d0e9fb6..dddb85a4db 100644
--- a/target/linux/cns3xxx/patches-3.0/102-cns3xxx_timers.patch
+++ b/target/linux/cns3xxx/patches-3.0/102-cns3xxx_timers.patch
@@ -1,6 +1,6 @@
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
-@@ -117,12 +117,13 @@ static void cns3xxx_timer_set_mode(enum
+@@ -118,12 +118,13 @@ static void cns3xxx_timer_set_mode(enum
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
@@ -15,7 +15,7 @@
ctrl |= (1 << 2) | (1 << 9);
break;
case CLOCK_EVT_MODE_UNUSED:
-@@ -147,11 +148,11 @@ static int cns3xxx_timer_set_next_event(
+@@ -148,11 +149,11 @@ static int cns3xxx_timer_set_next_event(
static struct clock_event_device cns3xxx_tmr1_clockevent = {
.name = "cns3xxx timer1",
@@ -29,7 +29,7 @@
.cpumask = cpu_all_mask,
};
-@@ -193,6 +194,35 @@ static struct irqaction cns3xxx_timer_ir
+@@ -194,6 +195,35 @@ static struct irqaction cns3xxx_timer_ir
.handler = cns3xxx_timer_interrupt,
};
@@ -65,7 +65,7 @@
/*
* Set up the clock source and clock events devices
*/
-@@ -210,13 +240,12 @@ static void __init __cns3xxx_timer_init(
+@@ -211,13 +241,12 @@ static void __init __cns3xxx_timer_init(
/* stop free running timer3 */
writel(0, cns3xxx_tmr1 + TIMER_FREERUN_CONTROL_OFFSET);
@@ -82,7 +82,7 @@
/* mask irq, non-mask timer1 overflow */
irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET);
irq_mask &= ~(1 << 2);
-@@ -228,23 +257,9 @@ static void __init __cns3xxx_timer_init(
+@@ -229,23 +258,9 @@ static void __init __cns3xxx_timer_init(
val |= (1 << 9);
writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);