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path: root/target/linux/ar71xx/patches-2.6.39/950-convert-to-new-irq-functions.patch
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Diffstat (limited to 'target/linux/ar71xx/patches-2.6.39/950-convert-to-new-irq-functions.patch')
-rw-r--r--target/linux/ar71xx/patches-2.6.39/950-convert-to-new-irq-functions.patch259
1 files changed, 259 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-2.6.39/950-convert-to-new-irq-functions.patch b/target/linux/ar71xx/patches-2.6.39/950-convert-to-new-irq-functions.patch
new file mode 100644
index 0000000000..7102d5e979
--- /dev/null
+++ b/target/linux/ar71xx/patches-2.6.39/950-convert-to-new-irq-functions.patch
@@ -0,0 +1,259 @@
+--- a/arch/mips/ar71xx/irq.c
++++ b/arch/mips/ar71xx/irq.c
+@@ -37,13 +37,12 @@ static void ar71xx_gpio_irq_dispatch(voi
+ spurious_interrupt();
+ }
+
+-static void ar71xx_gpio_irq_unmask(unsigned int irq)
++static void ar71xx_gpio_irq_unmask(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_GPIO_IRQ_BASE;
+ void __iomem *base = ar71xx_gpio_base;
+ u32 t;
+
+- irq -= AR71XX_GPIO_IRQ_BASE;
+-
+ t = __raw_readl(base + GPIO_REG_INT_ENABLE);
+ __raw_writel(t | (1 << irq), base + GPIO_REG_INT_ENABLE);
+
+@@ -51,13 +50,12 @@ static void ar71xx_gpio_irq_unmask(unsig
+ (void) __raw_readl(base + GPIO_REG_INT_ENABLE);
+ }
+
+-static void ar71xx_gpio_irq_mask(unsigned int irq)
++static void ar71xx_gpio_irq_mask(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_GPIO_IRQ_BASE;
+ void __iomem *base = ar71xx_gpio_base;
+ u32 t;
+
+- irq -= AR71XX_GPIO_IRQ_BASE;
+-
+ t = __raw_readl(base + GPIO_REG_INT_ENABLE);
+ __raw_writel(t & ~(1 << irq), base + GPIO_REG_INT_ENABLE);
+
+@@ -67,9 +65,9 @@ static void ar71xx_gpio_irq_mask(unsigne
+
+ static struct irq_chip ar71xx_gpio_irq_chip = {
+ .name = "AR71XX GPIO",
+- .unmask = ar71xx_gpio_irq_unmask,
+- .mask = ar71xx_gpio_irq_mask,
+- .mask_ack = ar71xx_gpio_irq_mask,
++ .irq_unmask = ar71xx_gpio_irq_unmask,
++ .irq_mask = ar71xx_gpio_irq_mask,
++ .irq_mask_ack = ar71xx_gpio_irq_mask,
+ };
+
+ static struct irqaction ar71xx_gpio_irqaction = {
+@@ -95,7 +93,7 @@ static void __init ar71xx_gpio_irq_init(
+
+ for (i = AR71XX_GPIO_IRQ_BASE;
+ i < AR71XX_GPIO_IRQ_BASE + AR71XX_GPIO_IRQ_COUNT; i++)
+- set_irq_chip_and_handler(i, &ar71xx_gpio_irq_chip,
++ irq_set_chip_and_handler(i, &ar71xx_gpio_irq_chip,
+ handle_level_irq);
+
+ setup_irq(AR71XX_MISC_IRQ_GPIO, &ar71xx_gpio_irqaction);
+@@ -151,13 +149,12 @@ static void ar71xx_misc_irq_dispatch(voi
+ spurious_interrupt();
+ }
+
+-static void ar71xx_misc_irq_unmask(unsigned int irq)
++static void ar71xx_misc_irq_unmask(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
+ void __iomem *base = ar71xx_reset_base;
+ u32 t;
+
+- irq -= AR71XX_MISC_IRQ_BASE;
+-
+ t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+ __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+
+@@ -165,13 +162,12 @@ static void ar71xx_misc_irq_unmask(unsig
+ (void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+ }
+
+-static void ar71xx_misc_irq_mask(unsigned int irq)
++static void ar71xx_misc_irq_mask(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
+ void __iomem *base = ar71xx_reset_base;
+ u32 t;
+
+- irq -= AR71XX_MISC_IRQ_BASE;
+-
+ t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+ __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+
+@@ -179,13 +175,12 @@ static void ar71xx_misc_irq_mask(unsigne
+ (void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
+ }
+
+-static void ar724x_misc_irq_ack(unsigned int irq)
++static void ar724x_misc_irq_ack(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
+ void __iomem *base = ar71xx_reset_base;
+ u32 t;
+
+- irq -= AR71XX_MISC_IRQ_BASE;
+-
+ t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
+ __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS);
+
+@@ -195,8 +190,8 @@ static void ar724x_misc_irq_ack(unsigned
+
+ static struct irq_chip ar71xx_misc_irq_chip = {
+ .name = "AR71XX MISC",
+- .unmask = ar71xx_misc_irq_unmask,
+- .mask = ar71xx_misc_irq_mask,
++ .irq_unmask = ar71xx_misc_irq_unmask,
++ .irq_mask = ar71xx_misc_irq_mask,
+ };
+
+ static struct irqaction ar71xx_misc_irqaction = {
+@@ -221,16 +216,16 @@ static void __init ar71xx_misc_irq_init(
+ case AR71XX_SOC_AR9341:
+ case AR71XX_SOC_AR9342:
+ case AR71XX_SOC_AR9344:
+- ar71xx_misc_irq_chip.ack = ar724x_misc_irq_ack;
++ ar71xx_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
+ break;
+ default:
+- ar71xx_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask;
++ ar71xx_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;
+ break;
+ }
+
+ for (i = AR71XX_MISC_IRQ_BASE;
+ i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++)
+- set_irq_chip_and_handler(i, &ar71xx_misc_irq_chip,
++ irq_set_chip_and_handler(i, &ar71xx_misc_irq_chip,
+ handle_level_irq);
+
+ setup_irq(AR71XX_CPU_IRQ_MISC, &ar71xx_misc_irqaction);
+--- a/arch/mips/pci/pci-ar71xx.c
++++ b/arch/mips/pci/pci-ar71xx.c
+@@ -329,13 +329,12 @@ static void ar71xx_pci_irq_handler(unsig
+ spurious_interrupt();
+ }
+
+-static void ar71xx_pci_irq_unmask(unsigned int irq)
++static void ar71xx_pci_irq_unmask(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_PCI_IRQ_BASE;
+ void __iomem *base = ar71xx_reset_base;
+ u32 t;
+
+- irq -= AR71XX_PCI_IRQ_BASE;
+-
+ t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
+ __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
+
+@@ -343,13 +342,12 @@ static void ar71xx_pci_irq_unmask(unsign
+ (void) __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
+ }
+
+-static void ar71xx_pci_irq_mask(unsigned int irq)
++static void ar71xx_pci_irq_mask(struct irq_data *d)
+ {
++ unsigned int irq = d->irq - AR71XX_PCI_IRQ_BASE;
+ void __iomem *base = ar71xx_reset_base;
+ u32 t;
+
+- irq -= AR71XX_PCI_IRQ_BASE;
+-
+ t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
+ __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
+
+@@ -359,9 +357,9 @@ static void ar71xx_pci_irq_mask(unsigned
+
+ static struct irq_chip ar71xx_pci_irq_chip = {
+ .name = "AR71XX PCI ",
+- .mask = ar71xx_pci_irq_mask,
+- .unmask = ar71xx_pci_irq_unmask,
+- .mask_ack = ar71xx_pci_irq_mask,
++ .irq_mask = ar71xx_pci_irq_mask,
++ .irq_unmask = ar71xx_pci_irq_unmask,
++ .irq_mask_ack = ar71xx_pci_irq_mask,
+ };
+
+ static void __init ar71xx_pci_irq_init(void)
+@@ -374,10 +372,10 @@ static void __init ar71xx_pci_irq_init(v
+
+ for (i = AR71XX_PCI_IRQ_BASE;
+ i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
+- set_irq_chip_and_handler(i, &ar71xx_pci_irq_chip,
++ irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
+ handle_level_irq);
+
+- set_irq_chained_handler(AR71XX_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
++ irq_set_chained_handler(AR71XX_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
+ }
+
+ int __init ar71xx_pcibios_init(void)
+--- a/arch/mips/pci/pci-ar724x.c
++++ b/arch/mips/pci/pci-ar724x.c
+@@ -280,15 +280,13 @@ static void ar724x_pci_irq_handler(unsig
+ spurious_interrupt();
+ }
+
+-static void ar724x_pci_irq_unmask(unsigned int irq)
++static void ar724x_pci_irq_unmask(struct irq_data *d)
+ {
+ void __iomem *base = ar724x_pci_ctrl_base;
+ u32 t;
+
+- switch (irq) {
++ switch (d->irq) {
+ case AR71XX_PCI_IRQ_DEV0:
+- irq -= AR71XX_PCI_IRQ_BASE;
+-
+ t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
+ __raw_writel(t | AR724X_PCI_INT_DEV0,
+ base + AR724X_PCI_REG_INT_MASK);
+@@ -297,15 +295,13 @@ static void ar724x_pci_irq_unmask(unsign
+ }
+ }
+
+-static void ar724x_pci_irq_mask(unsigned int irq)
++static void ar724x_pci_irq_mask(struct irq_data *d)
+ {
+ void __iomem *base = ar724x_pci_ctrl_base;
+ u32 t;
+
+- switch (irq) {
++ switch (d->irq) {
+ case AR71XX_PCI_IRQ_DEV0:
+- irq -= AR71XX_PCI_IRQ_BASE;
+-
+ t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
+ __raw_writel(t & ~AR724X_PCI_INT_DEV0,
+ base + AR724X_PCI_REG_INT_MASK);
+@@ -324,9 +320,9 @@ static void ar724x_pci_irq_mask(unsigned
+
+ static struct irq_chip ar724x_pci_irq_chip = {
+ .name = "AR724X PCI ",
+- .mask = ar724x_pci_irq_mask,
+- .unmask = ar724x_pci_irq_unmask,
+- .mask_ack = ar724x_pci_irq_mask,
++ .irq_mask = ar724x_pci_irq_mask,
++ .irq_unmask = ar724x_pci_irq_unmask,
++ .irq_mask_ack = ar724x_pci_irq_mask,
+ };
+
+ static void __init ar724x_pci_irq_init(void)
+@@ -346,10 +342,10 @@ static void __init ar724x_pci_irq_init(v
+
+ for (i = AR71XX_PCI_IRQ_BASE;
+ i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
+- set_irq_chip_and_handler(i, &ar724x_pci_irq_chip,
++ irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
+ handle_level_irq);
+
+- set_irq_chained_handler(AR71XX_CPU_IRQ_IP2, ar724x_pci_irq_handler);
++ irq_set_chained_handler(AR71XX_CPU_IRQ_IP2, ar724x_pci_irq_handler);
+ }
+
+ int __init ar724x_pcibios_init(void)