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-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt20
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/Makefile2
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-cpe510.c30
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c1
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-om2p.c1
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-som9331.c125
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c71
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt-xm.c700
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-wrtnode2q.c126
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/machtypes.h6
10 files changed, 1075 insertions, 7 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
index ac2cdaec3c..52b9b5527e 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
+++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
@@ -249,6 +249,16 @@ config ATH79_MACH_ESR1750
select ATH79_DEV_USB
select ATH79_DEV_WMAC
+config ATH79_MACH_SOM9331
+ bool "SOM9331 support"
+ select SOC_AR933X
+ select ATH79_DEV_ETH
+ select ATH79_DEV_GPIO_BUTTONS
+ select ATH79_DEV_LEDS_GPIO
+ select ATH79_DEV_M25P80
+ select ATH79_DEV_USB
+ select ATH79_DEV_WMAC
+
config ATH79_MACH_WHR_HP_G300N
bool "Buffalo WHR-HP-G300N board support"
select SOC_AR724X
@@ -680,6 +690,16 @@ config ATH79_MACH_WRT400N
select ATH79_DEV_LEDS_GPIO
select ATH79_DEV_M25P80
+config ATH79_MACH_WRTNODE2Q
+ bool "WRTnode2Q board support"
+ select SOC_QCA953X
+ select ATH79_DEV_AP9X_PCI if PCI
+ select ATH79_DEV_ETH
+ select ATH79_DEV_GPIO_BUTTONS
+ select ATH79_DEV_LEDS_GPIO
+ select ATH79_DEV_M25P80
+ select ATH79_DEV_WMAC
+
config ATH79_MACH_R6100
bool "NETGEAR R6100 board support"
select SOC_AR934X
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Makefile b/target/linux/ar71xx/files/arch/mips/ath79/Makefile
index 6144e29157..f8b0b2bb5a 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/Makefile
+++ b/target/linux/ar71xx/files/arch/mips/ath79/Makefile
@@ -135,6 +135,7 @@ obj-$(CONFIG_ATH79_MACH_RB2011) += mach-rb2011.o
obj-$(CONFIG_ATH79_MACH_RBSXTLITE) += mach-rbsxtlite.o
obj-$(CONFIG_ATH79_MACH_RW2458N) += mach-rw2458n.o
obj-$(CONFIG_ATH79_MACH_SMART_300) += mach-smart-300.o
+obj-$(CONFIG_ATH79_MACH_SOM9331) += mach-som9331.o
obj-$(CONFIG_ATH79_MACH_TELLSTICK_ZNET_LITE) += mach-tellstick-znet-lite.o
obj-$(CONFIG_ATH79_MACH_TEW_632BRP) += mach-tew-632brp.o
obj-$(CONFIG_ATH79_MACH_TEW_673GRU) += mach-tew-673gru.o
@@ -194,6 +195,7 @@ obj-$(CONFIG_ATH79_MACH_WPJ531) += mach-wpj531.o
obj-$(CONFIG_ATH79_MACH_WPJ558) += mach-wpj558.o
obj-$(CONFIG_ATH79_MACH_WRT160NL) += mach-wrt160nl.o
obj-$(CONFIG_ATH79_MACH_WRT400N) += mach-wrt400n.o
+obj-$(CONFIG_ATH79_MACH_WRTNODE2Q) += mach-wrtnode2q.o
obj-$(CONFIG_ATH79_MACH_WZR_HP_G300NH) += mach-wzr-hp-g300nh.o
obj-$(CONFIG_ATH79_MACH_WZR_HP_G300NH2) += mach-wzr-hp-g300nh2.o
obj-$(CONFIG_ATH79_MACH_WZR_HP_AG300H) += mach-wzr-hp-ag300h.o
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-cpe510.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-cpe510.c
index 5cb052a84a..875589dde8 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-cpe510.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-cpe510.c
@@ -78,12 +78,8 @@ static struct gpio_keys_button cpe510_gpio_keys[] __initdata = {
}
};
-
-static void __init cpe510_setup(void)
+static void __init cpe_setup(u8 *mac)
{
- u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
- u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
-
/* Disable JTAG, enabling GPIOs 0-3 */
/* Configure OBS4 line, for GPIO 4*/
ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
@@ -105,9 +101,31 @@ static void __init cpe510_setup(void)
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_register_eth(1);
+}
+
+
+static void __init cpe210_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+ cpe_setup(mac);
+
+ ath79_register_wmac(ee, mac);
+}
+
+static void __init cpe510_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff5000);
+
+ cpe_setup(mac);
ath79_register_wmac(ee, mac);
}
-MIPS_MACHINE(ATH79_MACH_CPE510, "CPE510", "TP-LINK CPE210/220/510/520",
+MIPS_MACHINE(ATH79_MACH_CPE210, "CPE210", "TP-LINK CPE210/220",
+ cpe210_setup);
+
+MIPS_MACHINE(ATH79_MACH_CPE510, "CPE510", "TP-LINK CPE510/520",
cpe510_setup);
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c
index e3c04e7756..18101ce8e4 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c
@@ -168,3 +168,4 @@ static void __init mr1750_setup(void)
}
MIPS_MACHINE(ATH79_MACH_MR1750, "MR1750", "OpenMesh MR1750", mr1750_setup);
+MIPS_MACHINE(ATH79_MACH_MR1750V2, "MR1750v2", "OpenMesh MR1750v2", mr1750_setup);
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-om2p.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-om2p.c
index 6b0bdc3dcd..3b282a36ea 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-om2p.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-om2p.c
@@ -223,3 +223,4 @@ static void __init om2p_hs_setup(void)
MIPS_MACHINE(ATH79_MACH_OM2P_HS, "OM2P-HS", "OpenMesh OM2P HS", om2p_hs_setup);
MIPS_MACHINE(ATH79_MACH_OM2P_HSv2, "OM2P-HSv2", "OpenMesh OM2P HSv2", om2p_hs_setup);
+MIPS_MACHINE(ATH79_MACH_OM2P_HSv3, "OM2P-HSv3", "OpenMesh OM2P HSv3", om2p_hs_setup);
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-som9331.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-som9331.c
new file mode 100644
index 0000000000..eef5bcedc2
--- /dev/null
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-som9331.c
@@ -0,0 +1,125 @@
+/*
+ * OpenEmbed SOM9331 board support
+ *
+ * Copyright (C) 2011 dongyuqi <729650915@qq.com>
+ * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * 5/27/2016 - Modified by Allan Nick Pedrana <nik9993@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define SOM9331_GPIO_LED_WLAN 27
+#define SOM9331_GPIO_LED_SYSTEM 0
+#define SOM9331_GPIO_LED_2 13
+#define SOM9331_GPIO_LED_3 14
+#define SOM9331_GPIO_LED_5 16
+#define SOM9331_GPIO_LED_WAN SOM9331_GPIO_LED_2
+#define SOM9331_GPIO_LED_LAN1 SOM9331_GPIO_LED_3
+#define SOM9331_GPIO_LED_LAN2 SOM9331_GPIO_LED_5
+#define SOM9331_GPIO_BTN_RESET 11
+
+#define SOM9331_KEYS_POLL_INTERVAL 20 /* msecs */
+#define SOM9331_KEYS_DEBOUNCE_INTERVAL (3 * SOM9331_KEYS_POLL_INTERVAL)
+
+static const char *som9331_part_probes[] = {
+ "tp-link",
+ NULL,
+};
+
+static struct flash_platform_data som9331_flash_data = {
+ .part_probes = som9331_part_probes,
+};
+
+static struct gpio_led som9331_leds_gpio[] __initdata = {
+ {
+ .name = "som9331:red:wlan",
+ .gpio = SOM9331_GPIO_LED_WLAN,
+ .active_low = 1,
+ },
+ {
+ .name = "som9331:orange:wan",
+ .gpio = SOM9331_GPIO_LED_WAN,
+ .active_low = 0,
+ },
+ {
+ .name = "som9331:orange:lan1",
+ .gpio = SOM9331_GPIO_LED_LAN1,
+ .active_low = 0,
+ },
+ {
+ .name = "som9331:orange:lan2",
+ .gpio = SOM9331_GPIO_LED_LAN2,
+ .active_low = 0,
+ },
+ {
+ .name = "som9331:blue:system",
+ .gpio = SOM9331_GPIO_LED_SYSTEM,
+ .active_low = 0,
+ },
+};
+
+static struct gpio_keys_button som9331_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = SOM9331_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = SOM9331_GPIO_BTN_RESET,
+ .active_low = 0,
+ }
+};
+
+static void __init som9331_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+ ath79_setup_ar933x_phy4_switch(true, true);
+
+ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
+ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
+ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
+ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
+
+ ath79_register_m25p80(&som9331_flash_data);
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(som9331_leds_gpio),
+ som9331_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, SOM9331_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(som9331_gpio_keys),
+ som9331_gpio_keys);
+
+ ath79_register_usb();
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
+
+ ath79_register_mdio(0, 0x0);
+
+ /* LAN ports */
+ ath79_register_eth(1);
+
+ /* WAN port */
+ ath79_register_eth(0);
+
+ ath79_register_wmac(ee, mac);
+}
+
+MIPS_MACHINE(ATH79_MACH_SOM9331, "SOM9331", "OpenEmbed SOM9331", som9331_setup);
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c
index 02096031db..f806568f98 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c
@@ -1,8 +1,9 @@
/*
- * TP-LINK TL-WR841N/ND v9/TL-WR842N/ND v3
+ * TP-LINK TL-WR841N/ND v9/v11 / TL-WR842N/ND v3
*
* Copyright (C) 2014 Matthias Schiffer <mschiffer@universe-factory.net>
* Copyright (C) 2016 Cezary Jackiewicz <cezary@eko.one.pl>
+ * Copyright (C) 2016 Stijn Segers <francesco.borromini@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
@@ -35,6 +36,19 @@
#define TL_WR841NV9_GPIO_BTN_RESET 12
#define TL_WR841NV9_GPIO_BTN_WIFI 17
+#define TL_WR841NV11_GPIO_LED_SYSTEM 1
+#define TL_WR841NV11_GPIO_LED_QSS 3
+#define TL_WR841NV11_GPIO_LED_WAN 4
+#define TL_WR841NV11_GPIO_LED_WAN_STATUS 2
+#define TL_WR841NV11_GPIO_LED_WLAN 13
+#define TL_WR841NV11_GPIO_LED_LAN1 16
+#define TL_WR841NV11_GPIO_LED_LAN2 15
+#define TL_WR841NV11_GPIO_LED_LAN3 14
+#define TL_WR841NV11_GPIO_LED_LAN4 11
+
+#define TL_WR841NV11_GPIO_BTN_RESET 12
+#define TL_WR841NV11_GPIO_BTN_WIFI 17
+
#define TL_WR842NV3_GPIO_LED_SYSTEM 2
#define TL_WR842NV3_GPIO_LED_WLAN 3
#define TL_WR842NV3_GPIO_LED_WAN_RED 4
@@ -111,6 +125,46 @@ static struct gpio_keys_button tl_wr841n_v9_gpio_keys[] __initdata = {
}
};
+static struct gpio_led tl_wr841n_v11_leds_gpio[] __initdata = {
+ {
+ .name = "tp-link:green:lan1",
+ .gpio = TL_WR841NV9_GPIO_LED_LAN1,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:lan2",
+ .gpio = TL_WR841NV9_GPIO_LED_LAN2,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:lan3",
+ .gpio = TL_WR841NV9_GPIO_LED_LAN3,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:lan4",
+ .gpio = TL_WR841NV9_GPIO_LED_LAN4,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:qss",
+ .gpio = TL_WR841NV9_GPIO_LED_QSS,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:system",
+ .gpio = TL_WR841NV11_GPIO_LED_SYSTEM,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:wan",
+ .gpio = TL_WR841NV9_GPIO_LED_WAN,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:wan_status",
+ .gpio = TL_WR841NV11_GPIO_LED_WAN_STATUS,
+ .active_low = 1,
+ }, {
+ .name = "tp-link:green:wlan",
+ .gpio = TL_WR841NV9_GPIO_LED_WLAN,
+ .active_low = 1,
+ },
+};
+
static struct gpio_led tl_wr842n_v3_leds_gpio[] __initdata = {
{
.name = "tp-link:green:lan1",
@@ -221,6 +275,21 @@ static void __init tl_wr841n_v9_setup(void)
MIPS_MACHINE(ATH79_MACH_TL_WR841N_V9, "TL-WR841N-v9", "TP-LINK TL-WR841N/ND v9",
tl_wr841n_v9_setup);
+static void __init tl_wr841n_v11_setup(void)
+{
+ tl_ap143_setup();
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v11_leds_gpio),
+ tl_wr841n_v11_leds_gpio);
+
+ ath79_register_gpio_keys_polled(1, TL_WR841NV9_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(tl_wr841n_v9_gpio_keys),
+ tl_wr841n_v9_gpio_keys);
+}
+
+MIPS_MACHINE(ATH79_MACH_TL_WR841N_V11, "TL-WR841N-v11", "TP-LINK TL-WR841N/ND v11",
+ tl_wr841n_v11_setup);
+
static void __init tl_wr842n_v3_setup(void)
{
tl_ap143_setup();
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt-xm.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt-xm.c
new file mode 100644
index 0000000000..622c81f107
--- /dev/null
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt-xm.c
@@ -0,0 +1,700 @@
+/*
+ * Ubiquiti Networks XM (rev 1.0) board support
+ *
+ * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
+ *
+ * Derived from: mach-pb44.c
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+#include <linux/etherdevice.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/irq.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include <linux/platform_data/phy-at803x.h>
+
+#include "common.h"
+#include "dev-ap9x-pci.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define UBNT_XM_GPIO_LED_L1 0
+#define UBNT_XM_GPIO_LED_L2 1
+#define UBNT_XM_GPIO_LED_L3 11
+#define UBNT_XM_GPIO_LED_L4 7
+
+#define UBNT_XM_GPIO_BTN_RESET 12
+
+#define UBNT_XM_KEYS_POLL_INTERVAL 20
+#define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL)
+
+#define UBNT_XM_EEPROM_ADDR 0x1fff1000
+
+static struct gpio_led ubnt_xm_leds_gpio[] __initdata = {
+ {
+ .name = "ubnt:red:link1",
+ .gpio = UBNT_XM_GPIO_LED_L1,
+ .active_low = 0,
+ }, {
+ .name = "ubnt:orange:link2",
+ .gpio = UBNT_XM_GPIO_LED_L2,
+ .active_low = 0,
+ }, {
+ .name = "ubnt:green:link3",
+ .gpio = UBNT_XM_GPIO_LED_L3,
+ .active_low = 0,
+ }, {
+ .name = "ubnt:green:link4",
+ .gpio = UBNT_XM_GPIO_LED_L4,
+ .active_low = 0,
+ },
+};
+
+static struct gpio_keys_button ubnt_xm_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = UBNT_XM_GPIO_BTN_RESET,
+ .active_low = 1,
+ }
+};
+
+#define UBNT_M_WAN_PHYMASK BIT(4)
+
+static void __init ubnt_xm_init(void)
+{
+ u8 *eeprom = (u8 *) KSEG1ADDR(UBNT_XM_EEPROM_ADDR);
+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio),
+ ubnt_xm_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(ubnt_xm_gpio_keys),
+ ubnt_xm_gpio_keys);
+
+ ath79_register_m25p80(NULL);
+ ap91_pci_init(eeprom, NULL);
+
+ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK);
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
+ ath79_register_eth(0);
+}
+
+MIPS_MACHINE(ATH79_MACH_UBNT_XM,
+ "UBNT-XM",
+ "Ubiquiti Networks XM (rev 1.0) board",
+ ubnt_xm_init);
+
+MIPS_MACHINE(ATH79_MACH_UBNT_BULLET_M, "UBNT-BM", "Ubiquiti Bullet M",
+ ubnt_xm_init);
+
+static void __init ubnt_rocket_m_setup(void)
+{
+ ubnt_xm_init();
+ ath79_register_usb();
+}
+
+MIPS_MACHINE(ATH79_MACH_UBNT_ROCKET_M, "UBNT-RM", "Ubiquiti Rocket M",
+ ubnt_rocket_m_setup);
+
+static void __init ubnt_nano_m_setup(void)
+{
+ ubnt_xm_init();
+ ath79_register_eth(1);
+}
+
+MIPS_MACHINE(ATH79_MACH_UBNT_NANO_M, "UBNT-NM", "Ubiquiti Nanostation M",
+ ubnt_nano_m_setup);
+
+static struct gpio_led ubnt_airrouter_leds_gpio[] __initdata = {
+ {
+ .name = "ubnt:green:globe",
+ .gpio = 0,
+ .active_low = 1,
+ }, {
+ .name = "ubnt:green:power",
+ .gpio = 11,
+ .active_low = 1,
+ .default_state = LEDS_GPIO_DEFSTATE_ON,
+ }
+};
+
+static void __init ubnt_airrouter_setup(void)
+{
+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+ ath79_register_m25p80(NULL);
+ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK);
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
+ ath79_init_local_mac(ath79_eth1_data.mac_addr, mac1);
+
+ ath79_register_eth(1);
+ ath79_register_eth(0);
+ ath79_register_usb();
+
+ ap91_pci_init(ee, NULL);
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airrouter_leds_gpio),
+ ubnt_airrouter_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(ubnt_xm_gpio_keys),
+ ubnt_xm_gpio_keys);
+}
+
+MIPS_MACHINE(ATH79_MACH_UBNT_AIRROUTER, "UBNT-AR", "Ubiquiti AirRouter",
+ ubnt_airrouter_setup);
+
+static struct gpio_led ubnt_unifi_leds_gpio[] __initdata = {
+ {
+ .name = "ubnt:orange:dome",
+ .gpio = 1,
+ .active_low = 0,
+ }, {
+ .name = "ubnt:green:dome",
+ .gpio = 0,
+ .active_low = 0,
+ }
+};
+
+static struct gpio_led ubnt_unifi_outdoor_leds_gpio[] __initdata = {
+ {
+ .name = "ubnt:orange:front",
+ .gpio = 1,
+ .active_low = 0,
+ }, {
+ .name = "ubnt:green:front",
+ .gpio = 0,
+ .active_low = 0,
+ }
+};
+
+static struct gpio_led ubnt_unifi_outdoor_plus_leds_gpio[] __initdata = {
+ {
+ .name = "ubnt:white:front",
+ .gpio = 1,
+ .active_low = 0,
+ }, {
+ .name = "ubnt:blue:front",
+ .gpio = 0,
+ .active_low = 0,
+ }
+};
+
+
+static void __init ubnt_unifi_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK);
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
+ ath79_register_eth(0);
+
+ ap91_pci_init(ee, NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_leds_gpio),
+ ubnt_unifi_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(ubnt_xm_gpio_keys),
+ ubnt_xm_gpio_keys);
+}
+
+MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI, "UBNT-UF", "Ubiquiti UniFi",
+ ubnt_unifi_setup);
+
+
+#define UBNT_UNIFIOD_PRI_PHYMASK BIT(4)
+#define UBNT_UNIFIOD_2ND_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3))
+
+static void __init ubnt_unifi_outdoor_setup(void)
+{
+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_mdio(0, ~(UBNT_UNIFIOD_PRI_PHYMASK |
+ UBNT_UNIFIOD_2ND_PHYMASK));
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
+ ath79_register_eth(0);
+ ath79_register_eth(1);
+
+ ap91_pci_init(ee, NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_outdoor_leds_gpio),
+ ubnt_unifi_outdoor_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(ubnt_xm_gpio_keys),
+ ubnt_xm_gpio_keys);
+}
+
+MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI_OUTDOOR, "UBNT-U20",
+ "Ubiquiti UniFiAP Outdoor",
+ ubnt_unifi_outdoor_setup);
+
+
+static void __init ubnt_unifi_outdoor_plus_setup(void)
+{
+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_mdio(0, ~(UBNT_UNIFIOD_PRI_PHYMASK |
+ UBNT_UNIFIOD_2ND_PHYMASK));
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
+ ath79_register_eth(0);
+ ath79_register_eth(1);
+
+ ap91_pci_init(ee, NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_outdoor_plus_leds_gpio),
+ ubnt_unifi_outdoor_plus_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(ubnt_xm_gpio_keys),
+ ubnt_xm_gpio_keys);
+}
+
+MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI_OUTDOOR_PLUS, "UBNT-UOP",
+ "Ubiquiti UniFiAP Outdoor+",
+ ubnt_unifi_outdoor_plus_setup);
+
+
+static struct gpio_led ubnt_uap_pro_gpio_leds[] __initdata = {
+ {
+ .name = "ubnt:white:dome",
+ .gpio = 12,
+ }, {
+ .name = "ubnt:blue:dome",
+ .gpio = 13,
+ }
+};
+
+static struct gpio_keys_button uap_pro_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = 17,
+ .active_low = 1,
+ }
+};
+
+static struct ar8327_pad_cfg uap_pro_ar8327_pad0_cfg = {
+ .mode = AR8327_PAD_MAC_RGMII,
+ .txclk_delay_en = true,
+ .rxclk_delay_en = true,
+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+};
+
+static struct ar8327_platform_data uap_pro_ar8327_data = {
+ .pad0_cfg = &uap_pro_ar8327_pad0_cfg,
+ .port0_cfg = {
+ .force_link = 1,
+ .speed = AR8327_PORT_SPEED_1000,
+ .duplex = 1,
+ .txpause = 1,
+ .rxpause = 1,
+ },
+};
+
+static struct mdio_board_info uap_pro_mdio0_info[] = {
+ {
+ .bus_id = "ag71xx-mdio.0",
+ .phy_addr = 0,
+ .platform_data = &uap_pro_ar8327_data,
+ },
+};
+
+#define UAP_PRO_MAC0_OFFSET 0x0000
+#define UAP_PRO_MAC1_OFFSET 0x0006
+#define UAP_PRO_WMAC_CALDATA_OFFSET 0x1000
+#define UAP_PRO_PCI_CALDATA_OFFSET 0x5000
+
+static void __init ubnt_uap_pro_setup(void)
+{
+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000);
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_uap_pro_gpio_leds),
+ ubnt_uap_pro_gpio_leds);
+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(uap_pro_gpio_keys),
+ uap_pro_gpio_keys);
+
+ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL);
+ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL);
+
+ ath79_register_mdio(0, 0x0);
+ mdiobus_register_board_info(uap_pro_mdio0_info,
+ ARRAY_SIZE(uap_pro_mdio0_info));
+
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
+ ath79_init_mac(ath79_eth0_data.mac_addr,
+ eeprom + UAP_PRO_MAC0_OFFSET, 0);
+
+ /* GMAC0 is connected to an AR8327 switch */
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.phy_mask = BIT(0);
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+ ath79_eth0_pll_data.pll_1000 = 0x06000000;
+ ath79_register_eth(0);
+}
+
+MIPS_MACHINE(ATH79_MACH_UBNT_UAP_PRO, "UAP-PRO", "Ubiquiti UniFi AP Pro",
+ ubnt_uap_pro_setup);
+
+#define UBNT_XW_GPIO_LED_L1 11
+#define UBNT_XW_GPIO_LED_L2 16
+#define UBNT_XW_GPIO_LED_L3 13
+#define UBNT_XW_GPIO_LED_L4 14
+
+static struct gpio_led ubnt_xw_leds_gpio[] __initdata = {
+ {
+ .name = "ubnt:red:link1",
+ .gpio = UBNT_XW_GPIO_LED_L1,
+ .active_low = 1,
+ }, {
+ .name = "ubnt:orange:link2",
+ .gpio = UBNT_XW_GPIO_LED_L2,
+ .active_low = 1,
+ }, {
+ .name = "ubnt:green:link3",
+ .gpio = UBNT_XW_GPIO_LED_L3,
+ .active_low = 1,
+ }, {
+ .name = "ubnt:green:link4",
+ .gpio = UBNT_XW_GPIO_LED_L4,
+ .active_low = 1,
+ },
+};
+
+#define UBNT_ROCKET_TI_GPIO_LED_L1 16
+#define UBNT_ROCKET_TI_GPIO_LED_L2 17
+#define UBNT_ROCKET_TI_GPIO_LED_L3 18
+#define UBNT_ROCKET_TI_GPIO_LED_L4 19
+#define UBNT_ROCKET_TI_GPIO_LED_L5 20
+#define UBNT_ROCKET_TI_GPIO_LED_L6 21
+static struct gpio_led ubnt_rocket_ti_leds_gpio[] __initdata = {
+ {
+ .name = "ubnt:green:link1",
+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L1,
+ .active_low = 1,
+ }, {
+ .name = "ubnt:green:link2",
+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L2,
+ .active_low = 1,
+ }, {
+ .name = "ubnt:green:link3",
+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L3,
+ .active_low = 1,
+ }, {
+ .name = "ubnt:green:link4",
+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L4,
+ .active_low = 0,
+ }, {
+ .name = "ubnt:green:link5",
+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L5,
+ .active_low = 0,
+ }, {
+ .name = "ubnt:green:link6",
+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L6,
+ .active_low = 0,
+ },
+};
+
+static void __init ubnt_xw_init(void)
+{
+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000);
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xw_leds_gpio),
+ ubnt_xw_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(ubnt_xm_gpio_keys),
+ ubnt_xm_gpio_keys);
+
+ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL);
+ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL);
+
+
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_MII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0_SLAVE);
+ ath79_init_mac(ath79_eth0_data.mac_addr,
+ eeprom + UAP_PRO_MAC0_OFFSET, 0);
+
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+}
+
+static void __init ubnt_nano_m_xw_setup(void)
+{
+ ubnt_xw_init();
+
+ /* GMAC0 is connected to an AR8326 switch */
+ ath79_register_mdio(0, ~(BIT(0) | BIT(1) | BIT(5)));
+ ath79_eth0_data.phy_mask = (BIT(0) | BIT(1) | BIT(5));
+ ath79_eth0_data.speed = SPEED_100;
+ ath79_eth0_data.duplex = DUPLEX_FULL;
+ ath79_register_eth(0);
+}
+
+static void __init ubnt_loco_m_xw_setup(void)
+{
+ ubnt_xw_init();
+
+ ath79_register_mdio(0, ~BIT(1));
+ ath79_eth0_data.phy_mask = BIT(1);
+ ath79_register_eth(0);
+}
+
+static void __init ubnt_rocket_m_xw_setup(void)
+{
+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000);
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xw_leds_gpio),
+ ubnt_xw_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(ubnt_xm_gpio_keys),
+ ubnt_xm_gpio_keys);
+
+ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL);
+ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL);
+
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
+ ath79_init_mac(ath79_eth0_data.mac_addr,
+ eeprom + UAP_PRO_MAC0_OFFSET, 0);
+
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+
+ ath79_register_mdio(0, ~BIT(4));
+ ath79_eth0_data.phy_mask = BIT(4);
+ ath79_eth0_pll_data.pll_1000 = 0x06000000;
+ ath79_register_eth(0);
+}
+
+static struct at803x_platform_data ubnt_rocket_m_ti_at803_data = {
+ .disable_smarteee = 1,
+ .enable_rgmii_rx_delay = 1,
+ .enable_rgmii_tx_delay = 1,
+};
+static struct mdio_board_info ubnt_rocket_m_ti_mdio_info[] = {
+ {
+ .bus_id = "ag71xx-mdio.0",
+ .phy_addr = 4,
+ .platform_data = &ubnt_rocket_m_ti_at803_data,
+ },
+};
+
+static void __init ubnt_rocket_m_ti_setup(void)
+{
+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000);
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rocket_ti_leds_gpio),
+ ubnt_rocket_ti_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(ubnt_xm_gpio_keys),
+ ubnt_xm_gpio_keys);
+
+ ap91_pci_init(eeprom + 0x1000, NULL);
+
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
+ ath79_setup_ar934x_eth_rx_delay(3, 3);
+ ath79_init_mac(ath79_eth0_data.mac_addr,
+ eeprom + UAP_PRO_MAC0_OFFSET, 0);
+ ath79_init_mac(ath79_eth1_data.mac_addr,
+ eeprom + UAP_PRO_MAC1_OFFSET, 0);
+
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev;
+
+ mdiobus_register_board_info(ubnt_rocket_m_ti_mdio_info,
+ ARRAY_SIZE(ubnt_rocket_m_ti_mdio_info));
+ ath79_register_mdio(0, 0x0);
+
+
+ ath79_eth0_data.phy_mask = BIT(4);
+ /* read out from vendor */
+ ath79_eth0_pll_data.pll_1000 = 0x2000000;
+ ath79_eth0_pll_data.pll_10 = 0x1313;
+ ath79_register_eth(0);
+
+ ath79_register_mdio(1, 0x0);
+ ath79_eth1_data.phy_mask = BIT(3);
+ ath79_register_eth(1);
+}
+
+
+MIPS_MACHINE(ATH79_MACH_UBNT_NANO_M_XW, "UBNT-NM-XW", "Ubiquiti Nanostation M XW",
+ ubnt_nano_m_xw_setup);
+
+MIPS_MACHINE(ATH79_MACH_UBNT_LOCO_M_XW, "UBNT-LOCO-XW", "Ubiquiti Loco M XW",
+ ubnt_loco_m_xw_setup);
+
+MIPS_MACHINE(ATH79_MACH_UBNT_ROCKET_M_XW, "UBNT-RM-XW", "Ubiquiti Rocket M XW",
+ ubnt_rocket_m_xw_setup);
+
+MIPS_MACHINE(ATH79_MACH_UBNT_ROCKET_M_TI, "UBNT-RM-TI", "Ubiquiti Rocket M TI",
+ ubnt_rocket_m_ti_setup);
+
+static struct gpio_led ubnt_airgateway_gpio_leds[] __initdata = {
+ {
+ .name = "ubnt:blue:wlan",
+ .gpio = 0,
+ }, {
+ .name = "ubnt:white:status",
+ .gpio = 1,
+ },
+};
+
+static struct gpio_keys_button airgateway_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = 12,
+ .active_low = 1,
+ }
+};
+
+static void __init ubnt_airgateway_setup(void)
+{
+ u32 t;
+ u8 *mac0 = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN);
+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+
+ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
+ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
+ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
+ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
+
+ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
+ t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN;
+ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t);
+
+ ath79_register_m25p80(NULL);
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airgateway_gpio_leds),
+ ubnt_airgateway_gpio_leds);
+
+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(airgateway_gpio_keys),
+ airgateway_gpio_keys);
+
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac0, 0);
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
+
+ ath79_register_mdio(0, 0x0);
+
+ ath79_register_eth(1);
+ ath79_register_eth(0);
+
+ ath79_register_wmac(ee, NULL);
+}
+
+MIPS_MACHINE(ATH79_MACH_UBNT_AIRGW, "UBNT-AGW", "Ubiquiti AirGateway",
+ ubnt_airgateway_setup);
+
+static struct gpio_led ubnt_airgateway_pro_gpio_leds[] __initdata = {
+ {
+ .name = "ubnt:blue:wlan",
+ .gpio = 13,
+ }, {
+ .name = "ubnt:white:status",
+ .gpio = 17,
+ },
+};
+
+
+static struct gpio_keys_button airgateway_pro_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = 12,
+ .active_low = 1,
+ }
+};
+
+static void __init ubnt_airgateway_pro_setup(void)
+{
+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 *mac0 = (u8 *) KSEG1ADDR(0x1fff0000);
+
+ ath79_register_m25p80(NULL);
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airgateway_pro_gpio_leds),
+ ubnt_airgateway_pro_gpio_leds);
+
+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(airgateway_pro_gpio_keys),
+ airgateway_pro_gpio_keys);
+
+ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL);
+ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL);
+
+
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
+
+ ath79_register_mdio(1, 0x0);
+
+ /* GMAC0 is left unused in this configuration */
+
+ /* GMAC1 is connected to MAC0 on the internal switch */
+ /* The PoE/WAN port connects to port 5 on the internal switch */
+ /* The LAN port connects to port 4 on the internal switch */
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac0, 0);
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_register_eth(1);
+
+}
+
+MIPS_MACHINE(ATH79_MACH_UBNT_AIRGWP, "UBNT-AGWP", "Ubiquiti AirGateway Pro",
+ ubnt_airgateway_pro_setup);
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wrtnode2q.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wrtnode2q.c
new file mode 100644
index 0000000000..150a28b0d7
--- /dev/null
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wrtnode2q.c
@@ -0,0 +1,126 @@
+/*
+ * WRTnode2Q board support
+ *
+ * Copyright (c) 2013 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (c) 2015 Kelei <xzmu@wrtnode.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+#include "pci.h"
+
+#define WRTNODE2Q_GPIO_LED_WLAN 12
+#define WRTNODE2Q_GPIO_LED_WPS 13
+#define WRTNODE2Q_GPIO_LED_STATUS 13
+
+#define WRTNODE2Q_GPIO_LED_WAN 4
+#define WRTNODE2Q_GPIO_LED_LAN1 16
+#define WRTNODE2Q_GPIO_LED_LAN2 15
+#define WRTNODE2Q_GPIO_LED_LAN3 14
+#define WRTNODE2Q_GPIO_LED_LAN4 11
+
+#define WRTNODE2Q_GPIO_BTN_WPS 17
+
+#define WRTNODE2Q_KEYS_POLL_INTERVAL 20 /* msecs */
+#define WRTNODE2Q_KEYS_DEBOUNCE_INTERVAL (3 * WRTNODE2Q_KEYS_POLL_INTERVAL)
+
+#define WRTNODE2Q_MAC0_OFFSET 0
+#define WRTNODE2Q_WMAC_CALDATA_OFFSET 0x1000
+
+static struct gpio_led wrtnode2q_leds_gpio[] __initdata = {
+ {
+ .name = "wrtnode2q:green:status",
+ .gpio = WRTNODE2Q_GPIO_LED_STATUS,
+ .active_low = 1,
+ },
+ {
+ .name = "wrtnode2q:green:wlan",
+ .gpio = WRTNODE2Q_GPIO_LED_WLAN,
+ .active_low = 1,
+ }
+};
+
+static struct gpio_keys_button wrtnode2q_gpio_keys[] __initdata = {
+ {
+ .desc = "WPS button",
+ .type = EV_KEY,
+ .code = KEY_WPS_BUTTON,
+ .debounce_interval = WRTNODE2Q_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = WRTNODE2Q_GPIO_BTN_WPS,
+ .active_low = 1,
+ },
+};
+
+static void __init wrtnode2q_gpio_led_setup(void)
+{
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wrtnode2q_leds_gpio),
+ wrtnode2q_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, WRTNODE2Q_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(wrtnode2q_gpio_keys),
+ wrtnode2q_gpio_keys);
+}
+
+static void __init wrtnode2q_setup(void)
+{
+ u8 *art = (u8 *) KSEG1ADDR(0x1f040000);
+
+ ath79_register_m25p80(NULL);
+
+ wrtnode2q_gpio_led_setup();
+
+ ath79_register_pci();
+ ath79_register_usb();
+
+ ath79_register_wmac(art + WRTNODE2Q_WMAC_CALDATA_OFFSET, NULL);
+
+ ath79_register_mdio(0, 0x0);
+ ath79_register_mdio(1, 0x0);
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, art + WRTNODE2Q_MAC0_OFFSET, 0);
+ ath79_init_mac(ath79_eth1_data.mac_addr, art + WRTNODE2Q_MAC0_OFFSET, 1);
+
+ /* LAN ports */
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_eth1_data.speed = SPEED_1000;
+ ath79_eth1_data.duplex = DUPLEX_FULL;
+ ath79_switch_data.phy_poll_mask |= BIT(4);
+ ath79_switch_data.phy4_mii_en = 1;
+ ath79_register_eth(1);
+
+ /* WAN port */
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ath79_eth0_data.speed = SPEED_100;
+ ath79_eth0_data.duplex = DUPLEX_FULL;
+ ath79_eth0_data.phy_mask = BIT(4);
+ ath79_register_eth(0);
+}
+
+MIPS_MACHINE(ATH79_MACH_WRTNODE2Q, "WRTNODE2Q", "WRTnode2Q board",
+ wrtnode2q_setup); \ No newline at end of file
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
index f53efff0b6..f40b4a43b5 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
+++ b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
@@ -51,6 +51,7 @@ enum ath79_mach_type {
ATH79_MACH_CAP4200AG, /* Senao CAP4200AG */
ATH79_MACH_CARAMBOLA2, /* 8devices Carambola2 */
ATH79_MACH_CF_E316N_V2, /* COMFAST CF-E316N v2 */
+ ATH79_MACH_CPE210, /* TP-LINK CPE210 */
ATH79_MACH_CPE510, /* TP-LINK CPE510 */
ATH79_MACH_CR3000, /* PowerCloud CR3000 */
ATH79_MACH_CR5000, /* PowerCloud CR5000 */
@@ -97,6 +98,7 @@ enum ath79_mach_type {
ATH79_MACH_MR16, /* Cisco Meraki MR16 */
ATH79_MACH_MR18, /* Cisco Meraki MR18 */
ATH79_MACH_MR1750, /* OpenMesh MR1750 */
+ ATH79_MACH_MR1750V2, /* OpenMesh MR1750v2 */
ATH79_MACH_MR600V2, /* OpenMesh MR600v2 */
ATH79_MACH_MR600, /* OpenMesh MR600 */
ATH79_MACH_MR900, /* OpenMesh MR900 */
@@ -110,6 +112,7 @@ enum ath79_mach_type {
ATH79_MACH_NBG6616, /* Zyxel NBG6616 */
ATH79_MACH_NBG6716, /* Zyxel NBG6716 */
ATH79_MACH_OM2P_HSv2, /* OpenMesh OM2P-HSv2 */
+ ATH79_MACH_OM2P_HSv3, /* OpenMesh OM2P-HSv3 */
ATH79_MACH_OM2P_HS, /* OpenMesh OM2P-HS */
ATH79_MACH_OM2P_LC, /* OpenMesh OM2P-LC */
ATH79_MACH_OM2Pv2, /* OpenMesh OM2Pv2 */
@@ -150,6 +153,7 @@ enum ath79_mach_type {
ATH79_MACH_RB_SXTLITE5ND, /* Mikrotik RouterBOARD SXT Lite 5nD */
ATH79_MACH_RW2458N, /* Redwave RW2458N */
ATH79_MACH_SMART_300, /* NC-LINK SMART-300 */
+ ATH79_MACH_SOM9331, /* OpenEmbed SOM9331 */
ATH79_MACH_TELLSTICK_ZNET_LITE, /* TellStick ZNet Lite */
ATH79_MACH_TEW_632BRP, /* TRENDnet TEW-632BRP */
ATH79_MACH_TEW_673GRU, /* TRENDnet TEW-673GRU */
@@ -199,6 +203,7 @@ enum ath79_mach_type {
ATH79_MACH_TL_WR841N_V7, /* TP-LINK TL-WR841N/ND v7 */
ATH79_MACH_TL_WR841N_V8, /* TP-LINK TL-WR841N/ND v8 */
ATH79_MACH_TL_WR841N_V9, /* TP-LINK TL-WR841N/ND v9 */
+ ATH79_MACH_TL_WR841N_V11, /* TP-LINK TL-WR841N/ND v11 */
ATH79_MACH_TL_WR842N_V2, /* TP-LINK TL-WR842N/ND v2 */
ATH79_MACH_TL_WR842N_V3, /* TP-LINK TL-WR842N/ND v3 */
ATH79_MACH_TL_WR941ND, /* TP-LINK TL-WR941ND */
@@ -251,6 +256,7 @@ enum ath79_mach_type {
ATH79_MACH_WPJ558, /* Compex WPJ558 */
ATH79_MACH_WRT160NL, /* Linksys WRT160NL */
ATH79_MACH_WRT400N, /* Linksys WRT400N */
+ ATH79_MACH_WRTNODE2Q, /* WRTnode2Q */
ATH79_MACH_WZR_HP_AG300H, /* Buffalo WZR-HP-AG300H */
ATH79_MACH_WZR_HP_G300NH, /* Buffalo WZR-HP-G300NH */
ATH79_MACH_WZR_HP_G300NH2, /* Buffalo WZR-HP-G300NH2 */