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authorJohn Crispin <blogic@openwrt.org>2015-10-19 10:08:18 +0000
committerJohn Crispin <blogic@openwrt.org>2015-10-19 10:08:18 +0000
commit577138a7d1b997e8ef184366e9d1f149d7492245 (patch)
treebfb0223d378b3800b0822ce1fea583f10740cfd2 /tools/quilt
parent16a63963fc79d022849d6632b35753e02f3816d9 (diff)
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lantiq: Fixed reading the number of RX FIFOs in the SPI driver
Until now the SPI driver used the TX bits for the RX FIFO. This seems uncritical for now since both are equals on my devices (VR9), but this could cause problems on other SoCs. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47208 3c298f89-4303-0410-b956-a3cf2f4a3e73
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