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| author | John Crispin <blogic@openwrt.org> | 2015-11-28 23:24:40 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2015-11-28 23:24:40 +0000 |
| commit | f65d2d5238c338879eb99d7afe473a99af6307b0 (patch) | |
| tree | fd4e54a5d3c29f278b8c8bf8c7ac51267f16c670 /target | |
| parent | f37f5db11d196e7200df16a5085f21ae148fb8bf (diff) | |
| download | master-187ad058-f65d2d5238c338879eb99d7afe473a99af6307b0.tar.gz master-187ad058-f65d2d5238c338879eb99d7afe473a99af6307b0.tar.bz2 master-187ad058-f65d2d5238c338879eb99d7afe473a99af6307b0.zip | |
ramips: add second SPI clocks
These clocks were missing in the changes introduced in r47573-47580
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47666 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ramips/patches-3.18/0051-SPI-ralink-add-Ralink-SoC-spi-clocks.patch | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.18/0051-SPI-ralink-add-Ralink-SoC-spi-clocks.patch b/target/linux/ramips/patches-3.18/0051-SPI-ralink-add-Ralink-SoC-spi-clocks.patch new file mode 100644 index 0000000000..bca872fea4 --- /dev/null +++ b/target/linux/ramips/patches-3.18/0051-SPI-ralink-add-Ralink-SoC-spi-clocks.patch @@ -0,0 +1,30 @@ +--- a/arch/mips/ralink/mt7620.c ++++ b/arch/mips/ralink/mt7620.c +@@ -415,6 +415,7 @@ void __init ralink_clk_init(void) + ralink_clk_add("10000100.timer", periph_rate); + ralink_clk_add("10000120.watchdog", periph_rate); + ralink_clk_add("10000b00.spi", sys_rate); ++ ralink_clk_add("10000b40.spi", sys_rate); + ralink_clk_add("10000c00.uartlite", periph_rate); + ralink_clk_add("10000d00.uart1", periph_rate); + ralink_clk_add("10000e00.uart2", periph_rate); +--- a/arch/mips/ralink/rt305x.c ++++ b/arch/mips/ralink/rt305x.c +@@ -201,6 +201,7 @@ void __init ralink_clk_init(void) + ralink_clk_add("cpu", cpu_rate); + ralink_clk_add("sys", sys_rate); + ralink_clk_add("10000b00.spi", sys_rate); ++ ralink_clk_add("10000b40.spi", sys_rate); + ralink_clk_add("10000100.timer", wdt_rate); + ralink_clk_add("10000120.watchdog", wdt_rate); + ralink_clk_add("10000500.uart", uart_rate); +--- a/arch/mips/ralink/rt3883.c ++++ b/arch/mips/ralink/rt3883.c +@@ -109,6 +109,7 @@ void __init ralink_clk_init(void) + ralink_clk_add("10000120.watchdog", sys_rate); + ralink_clk_add("10000500.uart", 40000000); + ralink_clk_add("10000b00.spi", sys_rate); ++ ralink_clk_add("10000b40.spi", sys_rate); + ralink_clk_add("10000c00.uartlite", 40000000); + ralink_clk_add("10100000.ethernet", sys_rate); + ralink_clk_add("10180000.wmac", 40000000); |