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author | Luka Perkov <luka@openwrt.org> | 2014-09-10 21:40:19 +0000 |
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committer | Luka Perkov <luka@openwrt.org> | 2014-09-10 21:40:19 +0000 |
commit | e5441232a81d01e2ed46d88e340a30fd6b15b012 (patch) | |
tree | e008cc6bd24a0e2c9b283d94a69f7a027bcfb856 /target/linux/sunxi/patches-3.14/176-clk-sun5i-add-support-for-reset-ctrler.patch | |
parent | 048910c4e07b6fae28513ce1dea62fe3b6bb03de (diff) | |
download | master-187ad058-e5441232a81d01e2ed46d88e340a30fd6b15b012.tar.gz master-187ad058-e5441232a81d01e2ed46d88e340a30fd6b15b012.tar.bz2 master-187ad058-e5441232a81d01e2ed46d88e340a30fd6b15b012.zip |
kernel: update 3.14 to 3.14.18
Targets were build tested and patches are refreshed.
Signed-off-by: Luka Perkov <luka@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@42463 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/sunxi/patches-3.14/176-clk-sun5i-add-support-for-reset-ctrler.patch')
-rw-r--r-- | target/linux/sunxi/patches-3.14/176-clk-sun5i-add-support-for-reset-ctrler.patch | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/target/linux/sunxi/patches-3.14/176-clk-sun5i-add-support-for-reset-ctrler.patch b/target/linux/sunxi/patches-3.14/176-clk-sun5i-add-support-for-reset-ctrler.patch index 6d322c7bc6..3986d193b1 100644 --- a/target/linux/sunxi/patches-3.14/176-clk-sun5i-add-support-for-reset-ctrler.patch +++ b/target/linux/sunxi/patches-3.14/176-clk-sun5i-add-support-for-reset-ctrler.patch @@ -13,8 +13,6 @@ Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> drivers/clocksource/timer-sun5i.c | 6 ++++++ 2 files changed, 10 insertions(+) -diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt -index 7c26154..27cfc7d 100644 --- a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt +++ b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt @@ -9,6 +9,9 @@ Required properties: @@ -33,8 +31,6 @@ index 7c26154..27cfc7d 100644 clocks = <&ahb1_gates 19>; + resets = <&ahb1rst 19>; }; -diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c -index deebcd6..0226844 100644 --- a/drivers/clocksource/timer-sun5i.c +++ b/drivers/clocksource/timer-sun5i.c @@ -16,6 +16,7 @@ @@ -53,7 +49,7 @@ index deebcd6..0226844 100644 unsigned long rate; struct clk *clk; int ret, irq; -@@ -162,6 +164,10 @@ static void __init sun5i_timer_init(struct device_node *node) +@@ -162,6 +164,10 @@ static void __init sun5i_timer_init(stru clk_prepare_enable(clk); rate = clk_get_rate(clk); @@ -64,6 +60,3 @@ index deebcd6..0226844 100644 writel(~0, timer_base + TIMER_INTVAL_LO_REG(1)); writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD, timer_base + TIMER_CTL_REG(1)); --- -2.0.3 - |