sunxi: driver refresh for 3.13

 - update gmac / mmc / usb / ahci drivers to follow mainline dev trees
 - add driver for spi
 - update clock support
 - update a31 support
 - move to new DT compats where appropriate
 - re-order patchqueue where needed
 - verified working a20 smp
 - move most DTSes off files/
 - update defconfig

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>



git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39782 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 56 insertions, 0 deletions

diff --git a/target/linux/sunxi/patches-3.13/150-1-dt-sun7i-add-gmac-clock-node.patch b/target/linux/sunxi/patches-3.13/150-1-dt-sun7i-add-gmac-clock-node.patch
new file mode 100644
index 0000000000..16c0aa0809
--- /dev/null
+++ b/target/linux/sunxi/patches-3.13/150-1-dt-sun7i-add-gmac-clock-node.patch
@@ -0,0 +1,56 @@
+From bc7a0478e6dac1304fdfdb6f3056f438b632da62 Mon Sep 17 00:00:00 2001
+From: Chen-Yu Tsai <wens@csie.org>
+Date: Mon, 10 Feb 2014 18:35:48 +0800
+Subject: [PATCH] ARM: dts: sun7i: Add GMAC clock node to sun7i DTSI
+
+The GMAC uses 1 of 2 sources for its transmit clock, depending on the
+PHY interface mode. Add both sources as dummy clocks, and as parents
+to the GMAC clock node.
+
+Signed-off-by: Chen-Yu Tsai <wens@csie.org>
+---
+ arch/arm/boot/dts/sun7i-a20.dtsi | 28 ++++++++++++++++++++++++++++
+ 1 file changed, 28 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
+index cefd7ac..7d98edc 100644
+--- a/arch/arm/boot/dts/sun7i-a20.dtsi
++++ b/arch/arm/boot/dts/sun7i-a20.dtsi
+@@ -322,6 +322,34 @@
+ 		};
+ 
+ 		/*
++		 * The following two are dummy clocks, placeholders used in the gmac_tx
++		 * clock. The gmac driver will choose one parent depending on the PHY
++		 * interface mode, using clk_set_rate auto-reparenting.
++		 * The actual TX clock rate is not controlled by the gmac_tx clock.
++		 */
++		mii_phy_tx_clk: clk@2 {
++			#clock-cells = <0>;
++			compatible = "fixed-clock";
++			clock-frequency = <25000000>;
++			clock-output-names = "mii_phy_tx";
++		};
++
++		gmac_int_tx_clk: clk@3 {
++			#clock-cells = <0>;
++			compatible = "fixed-clock";
++			clock-frequency = <125000000>;
++			clock-output-names = "gmac_int_tx";
++		};
++
++		gmac_tx_clk: clk@01c20164 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun7i-a20-gmac-clk";
++			reg = <0x01c20164 0x4>;
++			clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>;
++			clock-output-names = "gmac_tx";
++		};
++
++		/*
+ 		 * Dummy clock used by output clocks
+ 		 */
+ 		osc24M_32k: clk@1 {
+-- 
+1.8.5.5
+