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| author | John Crispin <blogic@openwrt.org> | 2013-07-22 13:52:32 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2013-07-22 13:52:32 +0000 |
| commit | 020c18be59888443948895663079574ce54d2fd8 (patch) | |
| tree | 24f396509057722aa70d908e7be2132777b9dcf5 /target/linux/ramips/patches-3.9/0163-USB-MIPS-ralink-fix-usb-issue-on-mt7620.patch | |
| parent | bd2cbce22c162e9bc56b27bbcda95b7877b3a89f (diff) | |
| download | master-187ad058-020c18be59888443948895663079574ce54d2fd8.tar.gz master-187ad058-020c18be59888443948895663079574ce54d2fd8.tar.bz2 master-187ad058-020c18be59888443948895663079574ce54d2fd8.zip | |
ralink: set v3.10 as default
Signed-off-by: John Crispin <blogic@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37497 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/patches-3.9/0163-USB-MIPS-ralink-fix-usb-issue-on-mt7620.patch')
| -rw-r--r-- | target/linux/ramips/patches-3.9/0163-USB-MIPS-ralink-fix-usb-issue-on-mt7620.patch | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/target/linux/ramips/patches-3.9/0163-USB-MIPS-ralink-fix-usb-issue-on-mt7620.patch b/target/linux/ramips/patches-3.9/0163-USB-MIPS-ralink-fix-usb-issue-on-mt7620.patch deleted file mode 100644 index d755a506f6..0000000000 --- a/target/linux/ramips/patches-3.9/0163-USB-MIPS-ralink-fix-usb-issue-on-mt7620.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 7bb04eed36ee0b2f3148fc33db7f75d9b4c8548c Mon Sep 17 00:00:00 2001 -From: John Crispin <blogic@openwrt.org> -Date: Fri, 24 May 2013 21:28:08 +0200 -Subject: [PATCH 163/164] USB: MIPS: ralink: fix usb issue on mt7620 - -USB fails when frequency scaling is enabled. Increase the idle cpu speed when -scaled. - -Signed-off-by: John Crispin <blogic@openwrt.org> ---- - arch/mips/include/asm/mach-ralink/mt7620.h | 1 + - arch/mips/ralink/mt7620.c | 8 ++++++++ - 2 files changed, 9 insertions(+) - ---- a/arch/mips/include/asm/mach-ralink/mt7620.h -+++ b/arch/mips/include/asm/mach-ralink/mt7620.h -@@ -20,6 +20,7 @@ - #define SYSC_REG_CHIP_REV 0x0c - #define SYSC_REG_SYSTEM_CONFIG0 0x10 - #define SYSC_REG_SYSTEM_CONFIG1 0x14 -+#define SYSC_REG_CPU_SYS_CLKCFG 0x3c - #define SYSC_REG_CPLL_CONFIG0 0x54 - #define SYSC_REG_CPLL_CONFIG1 0x58 - ---- a/arch/mips/ralink/mt7620.c -+++ b/arch/mips/ralink/mt7620.c -@@ -186,6 +186,14 @@ void __init ralink_clk_init(void) - ralink_clk_add("10000500.uart", 40000000); - ralink_clk_add("10000b00.spi", 40000000); - ralink_clk_add("10000c00.uartlite", 40000000); -+ -+#ifdef CONFIG_USB -+ /* -+ * When the CPU goes into sleep mode, the BUS clock will be too low for -+ * USB to function properly -+ */ -+ rt_sysc_m32(0x1f1f, 0x303, SYSC_REG_CPU_SYS_CLKCFG); -+#endif - } - - void __init ralink_of_remap(void) |