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| author | Jonas Gorski <jogo@openwrt.org> | 2013-06-30 13:10:12 +0000 |
|---|---|---|
| committer | Jonas Gorski <jogo@openwrt.org> | 2013-06-30 13:10:12 +0000 |
| commit | a4c4a82647099a5d42afa8adb1e5eae1e0919797 (patch) | |
| tree | 6297442313ccd9407a125bf42cd9d5e81e547fa2 /target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch | |
| parent | 34747df14a33f589976259d7a6ef9831438ac94a (diff) | |
| download | master-187ad058-a4c4a82647099a5d42afa8adb1e5eae1e0919797.tar.gz master-187ad058-a4c4a82647099a5d42afa8adb1e5eae1e0919797.tar.bz2 master-187ad058-a4c4a82647099a5d42afa8adb1e5eae1e0919797.zip | |
kernel: update linux 3.9 to 3.9.8
Includes memory allocation fixes as well as several networking fixes.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37103 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch')
| -rw-r--r-- | target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch b/target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch index 001483873d..10b15dc62a 100644 --- a/target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch +++ b/target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch @@ -12,8 +12,6 @@ Patchwork: http://patchwork.linux-mips.org/patch/5183/ arch/mips/ralink/mt7620.c | 20 ++++++++++++++++++++ 2 files changed, 28 insertions(+) -diff --git a/arch/mips/include/asm/mach-ralink/mt7620.h b/arch/mips/include/asm/mach-ralink/mt7620.h -index b272649..9809972 100644 --- a/arch/mips/include/asm/mach-ralink/mt7620.h +++ b/arch/mips/include/asm/mach-ralink/mt7620.h @@ -50,6 +50,14 @@ @@ -31,11 +29,9 @@ index b272649..9809972 100644 #define MT7620_GPIO_MODE_I2C BIT(0) #define MT7620_GPIO_MODE_UART0_SHIFT 2 #define MT7620_GPIO_MODE_UART0_MASK 0x7 -diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c -index eb00ab8..98ddb93 100644 --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c -@@ -211,4 +211,24 @@ void prom_soc_init(struct ralink_soc_info *soc_info) +@@ -211,4 +211,24 @@ void prom_soc_init(struct ralink_soc_inf cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0); dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK; @@ -60,6 +56,3 @@ index eb00ab8..98ddb93 100644 + } + soc_info->mem_base = MT7620_DRAM_BASE; } --- -1.7.10.4 - |